board.h 1.3 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-05-11 shelton first version
  9. */
  10. #ifndef __BOARD_H__
  11. #define __BOARD_H__
  12. #include <rtthread.h>
  13. #include "at32f425.h"
  14. #include "at32_msp.h"
  15. #include "drv_common.h"
  16. #include "drv_gpio.h"
  17. #ifdef __cplusplus
  18. extern "C" {
  19. #endif
  20. #define AT32_FLASH_START_ADRESS ((uint32_t)0x08000000)
  21. #define FLASH_PAGE_SIZE (1 * 1024)
  22. #define AT32_FLASH_SIZE (64 * 1024)
  23. #define AT32_FLASH_END_ADDRESS ((uint32_t)(AT32_FLASH_START_ADRESS + AT32_FLASH_SIZE))
  24. /* internal sram memory size[kbytes] <20>, default: 20*/
  25. #define AT32_SRAM_SIZE 20
  26. #define AT32_SRAM_END (0x20000000 + AT32_SRAM_SIZE * 1024)
  27. #if defined(__ARMCC_VERSION)
  28. extern int Image$$RW_IRAM1$$ZI$$Limit;
  29. #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
  30. #elif __ICCARM__
  31. #pragma section="CSTACK"
  32. #define HEAP_BEGIN (__segment_end("CSTACK"))
  33. #else
  34. extern int __bss_end;
  35. #define HEAP_BEGIN ((void *)&__bss_end)
  36. #endif
  37. #define HEAP_END AT32_SRAM_END
  38. void system_clock_config(void);
  39. #ifdef __cplusplus
  40. }
  41. #endif
  42. #endif /* __BOARD_H__ */