pm.h 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543
  1. /*****************************************************************************
  2. *
  3. * \file
  4. *
  5. * \brief Power Manager driver.
  6. *
  7. * Copyright (c) 2009-2018 Microchip Technology Inc. and its subsidiaries.
  8. *
  9. * \asf_license_start
  10. *
  11. * \page License
  12. *
  13. * Subject to your compliance with these terms, you may use Microchip
  14. * software and any derivatives exclusively with Microchip products.
  15. * It is your responsibility to comply with third party license terms applicable
  16. * to your use of third party software (including open source software) that
  17. * may accompany Microchip software.
  18. *
  19. * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
  20. * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
  21. * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
  22. * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
  23. * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
  24. * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
  25. * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
  26. * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
  27. * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
  28. * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
  29. * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
  30. *
  31. * \asf_license_stop
  32. *
  33. *****************************************************************************/
  34. /*
  35. * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
  36. */
  37. #ifndef _PM_H_
  38. #define _PM_H_
  39. /**
  40. * \defgroup group_avr32_drivers_pm CPU - PM - Power Manager
  41. *
  42. * The Power Manager (PM) controls the oscillators and PLLs, and generates the clocks and resets in the device.
  43. *
  44. * \{
  45. */
  46. #include <avr32/io.h>
  47. #include "compiler.h"
  48. #include "preprocessor.h"
  49. /*! \name Sleep Functions
  50. */
  51. //! @{
  52. /*! \brief Sets the MCU in the specified sleep mode.
  53. *
  54. * \param mode Sleep mode:
  55. * \arg \c AVR32_PM_SMODE_IDLE: Idle;
  56. * \arg \c AVR32_PM_SMODE_FROZEN: Frozen;
  57. * \arg \c AVR32_PM_SMODE_STANDBY: Standby;
  58. * \arg \c AVR32_PM_SMODE_STOP: Stop;
  59. * \arg \c AVR32_PM_SMODE_DEEP_STOP: DeepStop;
  60. * \arg \c AVR32_PM_SMODE_STATIC: Static.
  61. */
  62. #define SLEEP(mode) {__asm__ __volatile__ ("sleep "STRINGZ(mode));}
  63. /*! \brief Enable one or several asynchronous wake-up source.
  64. *
  65. * \param awen_mask Mask of asynchronous wake-up sources (use one of the defines
  66. * AVR32_PM_AWEN_xxxxWEN_MASK in the part-specific header file under
  67. * "toolchain folder"/avr32/inc(lude)/avr32/)
  68. */
  69. __always_inline static void pm_asyn_wake_up_enable(unsigned long awen_mask)
  70. {
  71. AVR32_PM.awen |= awen_mask;
  72. }
  73. /*! \brief Disable one or several asynchronous wake-up sources
  74. *
  75. * \param awen_mask Mask of asynchronous wake-up sources (use one of the defines
  76. * AVR32_PM_AWEN_xxxxWEN_MASK in the part-specific header file under
  77. * "toolchain folder"/avr32/inc(lude)/avr32/)
  78. */
  79. __always_inline static void pm_asyn_wake_up_disable(unsigned long awen_mask)
  80. {
  81. AVR32_PM.awen &= ~awen_mask;
  82. }
  83. //! @}
  84. //! Input and output parameters when initializing PM clocks using pm_configure_clocks().
  85. typedef struct
  86. {
  87. //! CPU frequency (input/output argument).
  88. unsigned long cpu_f;
  89. //! PBA frequency (input/output argument).
  90. unsigned long pba_f;
  91. //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument).
  92. unsigned long osc0_f;
  93. //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument).
  94. unsigned long osc0_startup;
  95. } pm_freq_param_t;
  96. #define PM_FREQ_STATUS_FAIL (-1)
  97. #define PM_FREQ_STATUS_OK (0)
  98. /*! \brief Gets the MCU reset cause.
  99. *
  100. * \param pm Base address of the Power Manager instance (i.e. &AVR32_PM).
  101. *
  102. * \return The MCU reset cause which can be masked with the
  103. * \c AVR32_PM_RCAUSE_x_MASK bit-masks to isolate specific causes.
  104. */
  105. __always_inline static unsigned int pm_get_reset_cause(volatile avr32_pm_t *pm)
  106. {
  107. return pm->rcause;
  108. }
  109. /*!
  110. * \brief This function will enable the external clock mode of the oscillator 0.
  111. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  112. */
  113. extern void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm);
  114. /*!
  115. * \brief This function will enable the crystal mode of the oscillator 0.
  116. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  117. * \param fosc0 Oscillator 0 crystal frequency (Hz)
  118. */
  119. extern void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0);
  120. /*!
  121. * \brief This function will enable the oscillator 0 to be used with a startup time.
  122. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  123. * \param startup Clock 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
  124. */
  125. extern void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup);
  126. /*!
  127. * \brief This function will disable the oscillator 0.
  128. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  129. */
  130. extern void pm_disable_clk0(volatile avr32_pm_t *pm);
  131. /*!
  132. * \brief This function will enable the oscillator 0 to be used with no startup time.
  133. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  134. * \param startup Clock 0 startup time, for which the function does not wait. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
  135. */
  136. extern void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
  137. /*!
  138. * \brief This function will wait until the Osc0 clock is ready.
  139. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  140. */
  141. extern void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm);
  142. /*!
  143. * \brief This function will enable the external clock mode of the oscillator 1.
  144. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  145. */
  146. extern void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm);
  147. /*!
  148. * \brief This function will enable the crystal mode of the oscillator 1.
  149. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  150. * \param fosc1 Oscillator 1 crystal frequency (Hz)
  151. */
  152. extern void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1);
  153. /*!
  154. * \brief This function will enable the oscillator 1 to be used with a startup time.
  155. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  156. * \param startup Clock 1 startup time. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC.
  157. */
  158. extern void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup);
  159. /*!
  160. * \brief This function will disable the oscillator 1.
  161. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  162. */
  163. extern void pm_disable_clk1(volatile avr32_pm_t *pm);
  164. /*!
  165. * \brief This function will enable the oscillator 1 to be used with no startup time.
  166. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  167. * \param startup Clock 1 startup time, for which the function does not wait. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC.
  168. */
  169. extern void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
  170. /*!
  171. * \brief This function will wait until the Osc1 clock is ready.
  172. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  173. */
  174. extern void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm);
  175. /*!
  176. * \brief This function will enable the external clock mode of the 32-kHz oscillator.
  177. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  178. */
  179. extern void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm);
  180. /*!
  181. * \brief This function will enable the crystal mode of the 32-kHz oscillator.
  182. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  183. */
  184. extern void pm_enable_osc32_crystal(volatile avr32_pm_t *pm);
  185. /*!
  186. * \brief This function will enable the oscillator 32 to be used with a startup time.
  187. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  188. * \param startup Clock 32 kHz startup time. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC.
  189. */
  190. extern void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup);
  191. /*!
  192. * \brief This function will disable the oscillator 32.
  193. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  194. */
  195. extern void pm_disable_clk32(volatile avr32_pm_t *pm);
  196. /*!
  197. * \brief This function will enable the oscillator 32 to be used with no startup time.
  198. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  199. * \param startup Clock 32 kHz startup time, for which the function does not wait. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC.
  200. */
  201. extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
  202. /*!
  203. * \brief This function will wait until the osc32 clock is ready.
  204. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  205. */
  206. extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm);
  207. /*!
  208. * \brief This function will select all the power manager clocks.
  209. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  210. * \param pbadiv Peripheral Bus A clock divisor enable
  211. * \param pbasel Peripheral Bus A select
  212. * \param pbbdiv Peripheral Bus B clock divisor enable
  213. * \param pbbsel Peripheral Bus B select
  214. * \param hsbdiv High Speed Bus clock divisor enable (CPU clock = HSB clock)
  215. * \param hsbsel High Speed Bus select (CPU clock = HSB clock )
  216. */
  217. extern void pm_cksel(volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel);
  218. /*!
  219. * \brief This function will setup a generic clock.
  220. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  221. * \param gc generic clock number (0 for gc0...)
  222. * \param osc_or_pll Use OSC (=0) or PLL (=1)
  223. * \param pll_osc Select Osc0/PLL0 or Osc1/PLL1
  224. * \param diven Generic clock divisor enable
  225. * \param div Generic clock divisor
  226. */
  227. extern void pm_gc_setup(volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div);
  228. /*!
  229. * \brief This function will enable a generic clock.
  230. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  231. * \param gc generic clock number (0 for gc0...)
  232. */
  233. extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc);
  234. /*!
  235. * \brief This function will disable a generic clock.
  236. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  237. * \param gc generic clock number (0 for gc0...)
  238. */
  239. extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc);
  240. /*!
  241. * \brief This function will setup a PLL.
  242. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  243. * \param pll PLL number(0 for PLL0, 1 for PLL1)
  244. * \param mul PLL MUL in the PLL formula
  245. * \param div PLL DIV in the PLL formula
  246. * \param osc OSC number (0 for osc0, 1 for osc1)
  247. * \param lockcount PLL lock count
  248. */
  249. extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount);
  250. /*!
  251. * \brief This function will set a PLL option.
  252. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  253. * \param pll PLL number(0 for PLL0, 1 for PLL1)
  254. * \param pll_freq Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
  255. * \param pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
  256. * \param pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
  257. */
  258. extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int pll_freq, unsigned int pll_div2, unsigned int pll_wbwdisable);
  259. /*!
  260. * \brief This function will get a PLL option.
  261. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  262. * \param pll PLL number(0 for PLL0, 1 for PLL1)
  263. * \return Option
  264. */
  265. extern unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, unsigned int pll);
  266. /*!
  267. * \brief This function will enable a PLL.
  268. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  269. * \param pll PLL number(0 for PLL0, 1 for PLL1)
  270. */
  271. extern void pm_pll_enable(volatile avr32_pm_t *pm, unsigned int pll);
  272. /*!
  273. * \brief This function will disable a PLL.
  274. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  275. * \param pll PLL number(0 for PLL0, 1 for PLL1)
  276. */
  277. extern void pm_pll_disable(volatile avr32_pm_t *pm, unsigned int pll);
  278. /*!
  279. * \brief This function will wait for PLL0 locked
  280. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  281. */
  282. extern void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm);
  283. /*!
  284. * \brief This function will wait for PLL1 locked
  285. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  286. */
  287. extern void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm);
  288. /*!
  289. * \brief This function returns the cksel (Clock Select).
  290. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  291. * \param p_cksel output cksel value
  292. */
  293. extern void pm_cksel_get(volatile avr32_pm_t *pm, unsigned long* p_cksel);
  294. /*!
  295. * \brief This function set the cksel (Clock Select).
  296. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  297. * \param cksel The cksel value.
  298. */
  299. extern void pm_cksel_set(volatile avr32_pm_t *pm, unsigned long cksel);
  300. /*!
  301. * \brief This function returns the power manager main clock.
  302. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  303. * \retval The main clock value.
  304. */
  305. extern unsigned long pm_get_clock(volatile avr32_pm_t *pm);
  306. /*!
  307. * \brief This function will switch the power manager main clock.
  308. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  309. * \param clock Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0.
  310. */
  311. extern void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock);
  312. /*!
  313. * \brief Switch main clock to clock Osc0 (crystal mode)
  314. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  315. * \param fosc0 Oscillator 0 crystal frequency (Hz)
  316. * \param startup Crystal 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
  317. */
  318. extern void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup);
  319. /*! \brief Enables the Brown-Out Detector interrupt.
  320. *
  321. * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
  322. */
  323. extern void pm_bod_enable_irq(volatile avr32_pm_t *pm);
  324. /*! \brief Disables the Brown-Out Detector interrupt.
  325. *
  326. * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
  327. */
  328. extern void pm_bod_disable_irq(volatile avr32_pm_t *pm);
  329. /*! \brief Clears the Brown-Out Detector interrupt flag.
  330. *
  331. * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
  332. */
  333. extern void pm_bod_clear_irq(volatile avr32_pm_t *pm);
  334. /*! \brief Gets the Brown-Out Detector interrupt flag.
  335. *
  336. * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
  337. *
  338. * \retval 0 No BOD interrupt.
  339. * \retval 1 BOD interrupt pending.
  340. */
  341. extern unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm);
  342. /*! \brief Gets the Brown-Out Detector interrupt enable status.
  343. *
  344. * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
  345. *
  346. * \retval 0 BOD interrupt disabled.
  347. * \retval 1 BOD interrupt enabled.
  348. */
  349. extern unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm);
  350. /*! \brief Gets the triggering threshold of the Brown-Out Detector.
  351. *
  352. * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
  353. *
  354. * \return Triggering threshold of the BOD. See the electrical characteristics
  355. * in the part datasheet for actual voltage levels.
  356. */
  357. extern unsigned long pm_bod_get_level(volatile avr32_pm_t *pm);
  358. /*!
  359. * \brief Read the content of the PM GPLP registers
  360. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  361. * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
  362. *
  363. * \return The content of the chosen GPLP register.
  364. */
  365. extern unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp);
  366. /*!
  367. * \brief Write into the PM GPLP registers
  368. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  369. * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
  370. * \param value Value to write
  371. */
  372. extern void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value);
  373. /*! \brief Enable the clock of a module.
  374. *
  375. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  376. * \param module The module to clock (use one of the defines in the part-specific
  377. * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
  378. * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks")
  379. *
  380. * \return Status.
  381. * \retval 0 Success.
  382. * \retval <0 An error occurred.
  383. */
  384. extern long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module);
  385. /*! \brief Disable the clock of a module.
  386. *
  387. * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
  388. * \param module The module to shut down (use one of the defines in the part-specific
  389. * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
  390. * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks")
  391. *
  392. * \return Status.
  393. * \retval 0 Success.
  394. * \retval <0 An error occurred.
  395. */
  396. extern long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module);
  397. /*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks
  398. * according to the user wishes.
  399. *
  400. * This function needs some parameters stored in a pm_freq_param_t structure:
  401. * - cpu_f and pba_f are the wanted frequencies,
  402. * - osc0_f is the oscillator 0 on-board frequency (e.g. FOSC0),
  403. * - osc0_startup is the oscillator 0 startup time (e.g. OSC0_STARTUP).
  404. *
  405. * The function will then configure the clocks using the following rules:
  406. * - It first try to find a valid PLL frequency (the highest possible value to avoid jitter) in order
  407. * to satisfy the CPU frequency,
  408. * - It optimizes the configuration depending the various divide stages,
  409. * - Then, the PBA frequency is configured from the CPU freq.
  410. * - Note that HSB and PBB are configured with the same frequency as CPU.
  411. * - Note also that the number of wait states of the flash read accesses is automatically set-up depending
  412. * the CPU frequency. As a consequence, the application needs the FLASHC driver to compile.
  413. *
  414. * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f.
  415. *
  416. * \param param pointer on the configuration structure.
  417. *
  418. * \retval PM_FREQ_STATUS_OK Mode successfully initialized.
  419. * \retval PM_FREQ_STATUS_FAIL The configuration can not be done.
  420. */
  421. extern int pm_configure_clocks(pm_freq_param_t *param);
  422. /*! \brief Automatically configure the USB clock.
  423. *
  424. * USB clock is configured to 48MHz, using the PLL1 from the Oscillator0, assuming
  425. * a 12 MHz crystal is connected to it.
  426. */
  427. extern void pm_configure_usb_clock(void);
  428. /**
  429. * \}
  430. */
  431. #endif // _PM_H_