drv_uart.c 7.3 KB

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  1. /*
  2. * Copyright (c) 2006-2024, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2023/06/25 flyingcys first version
  9. */
  10. #include <rthw.h>
  11. #include <rtthread.h>
  12. #include <rtdevice.h>
  13. #include "board.h"
  14. #include "drv_uart.h"
  15. #define DBG_TAG "DRV.UART"
  16. #define DBG_LVL DBG_WARNING
  17. #include <rtdbg.h>
  18. /*
  19. * Divide positive or negative dividend by positive divisor and round
  20. * to closest integer. Result is undefined for negative divisors and
  21. * for negative dividends if the divisor variable type is unsigned.
  22. */
  23. #define DIV_ROUND_CLOSEST(x, divisor)( \
  24. { \
  25. typeof(x) __x = x; \
  26. typeof(divisor) __d = divisor; \
  27. (((typeof(x))-1) > 0 || \
  28. ((typeof(divisor))-1) > 0 || (__x) > 0) ? \
  29. (((__x) + ((__d) / 2)) / (__d)) : \
  30. (((__x) - ((__d) / 2)) / (__d)); \
  31. } \
  32. )
  33. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  34. struct hw_uart_device
  35. {
  36. rt_ubase_t hw_base;
  37. rt_uint32_t irqno;
  38. };
  39. #define BSP_DEFINE_UART_DEVICE(no) \
  40. static struct hw_uart_device _uart##no##_device = \
  41. { \
  42. UART##no##_BASE, \
  43. UART##no##_IRQ \
  44. }; \
  45. static struct rt_serial_device _serial##no;
  46. #ifdef RT_USING_UART0
  47. BSP_DEFINE_UART_DEVICE(0);
  48. #endif
  49. #ifdef RT_USING_UART1
  50. BSP_DEFINE_UART_DEVICE(1);
  51. #endif
  52. #ifdef RT_USING_UART2
  53. BSP_DEFINE_UART_DEVICE(2);
  54. #endif
  55. #ifdef RT_USING_UART3
  56. BSP_DEFINE_UART_DEVICE(3);
  57. #endif
  58. rt_inline rt_uint32_t dw8250_read32(rt_ubase_t addr, rt_ubase_t offset)
  59. {
  60. return *((volatile rt_uint32_t *)(addr + (offset << UART_REG_SHIFT)));
  61. }
  62. rt_inline void dw8250_write32(rt_ubase_t addr, rt_ubase_t offset, rt_uint32_t value)
  63. {
  64. *((volatile rt_uint32_t *)(addr + (offset << UART_REG_SHIFT))) = value;
  65. if (offset == UART_LCR)
  66. {
  67. int tries = 1000;
  68. /* Make sure LCR write wasn't ignored */
  69. while (tries--)
  70. {
  71. unsigned int lcr = dw8250_read32(addr, UART_LCR);
  72. if ((value & ~UART_LCR_STKP) == (lcr & ~UART_LCR_STKP))
  73. {
  74. return;
  75. }
  76. dw8250_write32(addr, UART_FCR, UART_FCR_DEFVAL);
  77. dw8250_read32(addr, UART_RX);
  78. *((volatile rt_uint32_t *)(addr + (offset << UART_REG_SHIFT))) = value;
  79. }
  80. }
  81. }
  82. static void dw8250_uart_setbrg(rt_ubase_t addr, int baud_divisor)
  83. {
  84. /* to keep serial format, read lcr before writing BKSE */
  85. int lcr_val = dw8250_read32(addr, UART_LCR) & ~UART_LCR_BKSE;
  86. dw8250_write32(addr, UART_LCR, UART_LCR_BKSE | lcr_val);
  87. dw8250_write32(addr, UART_DLL, baud_divisor & 0xff);
  88. dw8250_write32(addr, UART_DLM, (baud_divisor >> 8) & 0xff);
  89. dw8250_write32(addr, UART_LCR, lcr_val);
  90. }
  91. static rt_err_t dw8250_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  92. {
  93. rt_base_t base;
  94. struct hw_uart_device *uart;
  95. int clock_divisor;
  96. RT_ASSERT(serial != RT_NULL);
  97. uart = (struct hw_uart_device *)serial->parent.user_data;
  98. base = uart->hw_base;
  99. while (!(dw8250_read32(base, UART_LSR) & UART_LSR_TEMT));
  100. dw8250_write32(base, UART_IER, 0);
  101. dw8250_write32(base, UART_MCR, UART_MCRVAL);
  102. dw8250_write32(base, UART_FCR, UART_FCR_DEFVAL);
  103. /* initialize serial config to 8N1 before writing baudrate */
  104. dw8250_write32(base, UART_LCR, UART_LCR_8N1);
  105. clock_divisor = DIV_ROUND_CLOSEST(UART_INPUT_CLK, 16 * serial->config.baud_rate);
  106. dw8250_uart_setbrg(base, clock_divisor);
  107. return RT_EOK;
  108. }
  109. static rt_err_t dw8250_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
  110. {
  111. struct hw_uart_device *uart;
  112. RT_ASSERT(serial != RT_NULL);
  113. uart = (struct hw_uart_device *)serial->parent.user_data;
  114. switch (cmd)
  115. {
  116. case RT_DEVICE_CTRL_CLR_INT:
  117. /* Disable rx irq */
  118. dw8250_write32(uart->hw_base, UART_IER, !UART_IER_RDI);
  119. rt_hw_interrupt_mask(uart->irqno);
  120. break;
  121. case RT_DEVICE_CTRL_SET_INT:
  122. /* Enable rx irq */
  123. dw8250_write32(uart->hw_base, UART_IER, UART_IER_RDI);
  124. rt_hw_interrupt_umask(uart->irqno);
  125. break;
  126. }
  127. return RT_EOK;
  128. }
  129. static int dw8250_uart_putc(struct rt_serial_device *serial, char c)
  130. {
  131. rt_base_t base;
  132. struct hw_uart_device *uart;
  133. RT_ASSERT(serial != RT_NULL);
  134. uart = (struct hw_uart_device *)serial->parent.user_data;
  135. base = uart->hw_base;
  136. while ((dw8250_read32(base, UART_LSR) & BOTH_EMPTY) != BOTH_EMPTY);
  137. dw8250_write32(base, UART_TX, c);
  138. return 1;
  139. }
  140. static int dw8250_uart_getc(struct rt_serial_device *serial)
  141. {
  142. int ch = -1;
  143. rt_base_t base;
  144. struct hw_uart_device *uart;
  145. RT_ASSERT(serial != RT_NULL);
  146. uart = (struct hw_uart_device *)serial->parent.user_data;
  147. base = uart->hw_base;
  148. if (dw8250_read32(base, UART_LSR) & UART_LSR_DR)
  149. {
  150. ch = dw8250_read32(base, UART_RX) & 0xff;
  151. }
  152. return ch;
  153. }
  154. static const struct rt_uart_ops _uart_ops =
  155. {
  156. dw8250_uart_configure,
  157. dw8250_uart_control,
  158. dw8250_uart_putc,
  159. dw8250_uart_getc,
  160. };
  161. static void rt_hw_uart_isr(int irqno, void *param)
  162. {
  163. unsigned int iir, status;
  164. struct rt_serial_device *serial = (struct rt_serial_device *)param;
  165. struct hw_uart_device *uart = (struct hw_uart_device *)serial->parent.user_data;
  166. iir = dw8250_read32(uart->hw_base, UART_IIR);
  167. /* If don't do this in non-DMA mode then the "RX TIMEOUT" interrupt will fire forever. */
  168. if ((iir & 0x3f) == UART_IIR_RX_TIMEOUT)
  169. {
  170. status = dw8250_read32(uart->hw_base, UART_LSR);
  171. if (!(status & (UART_LSR_DR | UART_LSR_BI)))
  172. {
  173. dw8250_read32(uart->hw_base, UART_RX);
  174. }
  175. }
  176. if (!(iir & UART_IIR_NO_INT))
  177. {
  178. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  179. }
  180. if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY)
  181. {
  182. /* Clear the USR */
  183. dw8250_read32(uart->hw_base, UART_USR);
  184. return;
  185. }
  186. }
  187. int rt_hw_uart_init(void)
  188. {
  189. struct hw_uart_device* uart;
  190. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  191. config.baud_rate = 115200;
  192. #define BSP_INSTALL_UART_DEVICE(no) \
  193. uart = &_uart##no##_device; \
  194. _serial##no.ops = &_uart_ops; \
  195. _serial##no.config = config; \
  196. rt_hw_serial_register(&_serial##no, "uart" #no, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart); \
  197. rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, &_serial##no, "uart" #no);
  198. #ifdef RT_USING_UART0
  199. PINMUX_CONFIG(UART0_RX, UART0_RX);
  200. PINMUX_CONFIG(UART0_TX, UART0_TX);
  201. BSP_INSTALL_UART_DEVICE(0);
  202. #endif
  203. #ifdef RT_USING_UART1
  204. PINMUX_CONFIG(IIC0_SDA, UART1_RX);
  205. PINMUX_CONFIG(IIC0_SCL, UART1_TX);
  206. BSP_INSTALL_UART_DEVICE(1);
  207. #endif
  208. #ifdef RT_USING_UART2
  209. PINMUX_CONFIG(SD1_D1, UART2_RX);
  210. PINMUX_CONFIG(SD1_D2, UART2_TX);
  211. BSP_INSTALL_UART_DEVICE(2);
  212. #endif
  213. #ifdef RT_USING_UART3
  214. PINMUX_CONFIG(SD1_D1, UART3_RX);
  215. PINMUX_CONFIG(SD1_D2, UART3_TX);
  216. BSP_INSTALL_UART_DEVICE(3);
  217. #endif
  218. #ifdef RT_USING_UART4
  219. PINMUX_CONFIG(SD1_GP0, UART4_RX);
  220. PINMUX_CONFIG(SD1_GP1, UART4_TX);
  221. BSP_INSTALL_UART_DEVICE(4);
  222. #endif
  223. return 0;
  224. }