drv_adc.c 6.6 KB

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  1. /*
  2. * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. *
  18. * Change Logs:
  19. * Date Author Notes
  20. * 2019-04-03 wangyq the first version
  21. * 2019-11-01 wangyq update libraries
  22. * 2021-04-20 liuhy the second version
  23. */
  24. #include <rthw.h>
  25. #include <rtthread.h>
  26. #include <rtdevice.h>
  27. #include "board.h"
  28. #include "drv_adc.h"
  29. #ifdef RT_USING_ADC
  30. /* define adc instance */
  31. #ifdef BSP_USING_ADC0
  32. static struct rt_adc_device _device_adc0;
  33. #endif /*BSP_USING_ADC0*/
  34. #ifdef BSP_USING_ADC1
  35. static struct rt_adc_device _device_adc1;
  36. #endif /*BSP_USING_ADC1*/
  37. /* enable or disable adc */
  38. static rt_err_t es32f3_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
  39. {
  40. adc_handle_t *_hadc = (adc_handle_t *)device->parent.user_data;
  41. RT_ASSERT(device != RT_NULL);
  42. if (enabled)
  43. {
  44. ADC_ENABLE(_hadc); ;
  45. }
  46. else
  47. {
  48. ADC_DISABLE(_hadc);
  49. }
  50. return RT_EOK;
  51. }
  52. static adc_channel_t es32f3_adc_get_channel(rt_uint32_t channel)
  53. {
  54. adc_channel_t es32f3_channel;
  55. gpio_init_t gpio_initstruct;
  56. /* Initialize ADC pin */
  57. gpio_initstruct.mode = GPIO_MODE_INPUT;
  58. gpio_initstruct.pupd = GPIO_FLOATING;
  59. gpio_initstruct.odos = GPIO_OPEN_DRAIN;
  60. gpio_initstruct.podrv = GPIO_OUT_DRIVE_6;
  61. gpio_initstruct.nodrv = GPIO_OUT_DRIVE_6;
  62. gpio_initstruct.flt = GPIO_FILTER_DISABLE;
  63. gpio_initstruct.type = GPIO_TYPE_CMOS;
  64. gpio_initstruct.func = GPIO_FUNC_0;
  65. /* select gpio pin as adc function */
  66. switch (channel)
  67. {
  68. case 0:
  69. es32f3_channel = ADC_CHANNEL_0;
  70. ald_gpio_init(ES_GPIO_ADC_CH0_GPIO, ES_GPIO_ADC_CH0_PIN, &gpio_initstruct);
  71. break;
  72. case 1:
  73. es32f3_channel = ADC_CHANNEL_1;
  74. ald_gpio_init(ES_GPIO_ADC_CH1_GPIO, ES_GPIO_ADC_CH1_PIN, &gpio_initstruct);
  75. break;
  76. case 2:
  77. es32f3_channel = ADC_CHANNEL_2;
  78. ald_gpio_init(ES_GPIO_ADC_CH2_GPIO, ES_GPIO_ADC_CH2_PIN, &gpio_initstruct);
  79. break;
  80. case 3:
  81. es32f3_channel = ADC_CHANNEL_3;
  82. ald_gpio_init(ES_GPIO_ADC_CH3_GPIO, ES_GPIO_ADC_CH3_PIN, &gpio_initstruct);
  83. break;
  84. case 4:
  85. es32f3_channel = ADC_CHANNEL_4;
  86. ald_gpio_init(ES_GPIO_ADC_CH4_GPIO, ES_GPIO_ADC_CH4_PIN, &gpio_initstruct);
  87. break;
  88. case 5:
  89. es32f3_channel = ADC_CHANNEL_5;
  90. ald_gpio_init(ES_GPIO_ADC_CH5_GPIO, ES_GPIO_ADC_CH5_PIN, &gpio_initstruct);
  91. break;
  92. case 6:
  93. es32f3_channel = ADC_CHANNEL_6;
  94. ald_gpio_init(ES_GPIO_ADC_CH6_GPIO, ES_GPIO_ADC_CH6_PIN, &gpio_initstruct);
  95. break;
  96. case 7:
  97. es32f3_channel = ADC_CHANNEL_7;
  98. ald_gpio_init(ES_GPIO_ADC_CH7_GPIO, ES_GPIO_ADC_CH7_PIN, &gpio_initstruct);
  99. break;
  100. case 8:
  101. es32f3_channel = ADC_CHANNEL_8;
  102. ald_gpio_init(ES_GPIO_ADC_CH8_GPIO, ES_GPIO_ADC_CH8_PIN, &gpio_initstruct);
  103. break;
  104. case 9:
  105. es32f3_channel = ADC_CHANNEL_9;
  106. ald_gpio_init(ES_GPIO_ADC_CH9_GPIO, ES_GPIO_ADC_CH9_PIN, &gpio_initstruct);
  107. break;
  108. case 10:
  109. es32f3_channel = ADC_CHANNEL_10;
  110. ald_gpio_init(ES_GPIO_ADC_CH10_GPIO, ES_GPIO_ADC_CH10_PIN, &gpio_initstruct);
  111. break;
  112. case 11:
  113. es32f3_channel = ADC_CHANNEL_11;
  114. ald_gpio_init(ES_GPIO_ADC_CH11_GPIO, ES_GPIO_ADC_CH11_PIN, &gpio_initstruct);
  115. break;
  116. case 12:
  117. es32f3_channel = ADC_CHANNEL_12;
  118. ald_gpio_init(ES_GPIO_ADC_CH12_GPIO, ES_GPIO_ADC_CH12_PIN, &gpio_initstruct);
  119. break;
  120. case 13:
  121. es32f3_channel = ADC_CHANNEL_13;
  122. ald_gpio_init(ES_GPIO_ADC_CH13_GPIO, ES_GPIO_ADC_CH13_PIN, &gpio_initstruct);
  123. break;
  124. case 14:
  125. es32f3_channel = ADC_CHANNEL_14;
  126. ald_gpio_init(ES_GPIO_ADC_CH14_GPIO, ES_GPIO_ADC_CH14_PIN, &gpio_initstruct);
  127. break;
  128. case 15:
  129. es32f3_channel = ADC_CHANNEL_15;
  130. ald_gpio_init(ES_GPIO_ADC_CH15_GPIO, ES_GPIO_ADC_CH15_PIN, &gpio_initstruct);
  131. break;
  132. default:
  133. break;
  134. }
  135. return es32f3_channel;
  136. }
  137. static rt_err_t es32f3_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
  138. {
  139. adc_handle_t *_hadc = (adc_handle_t *)device->parent.user_data;
  140. adc_nch_conf_t nm_config;
  141. RT_ASSERT(device != RT_NULL);
  142. RT_ASSERT(value != RT_NULL);
  143. /* config adc channel */
  144. nm_config.ch = es32f3_adc_get_channel(channel);
  145. nm_config.idx = ADC_NCH_IDX_1;
  146. nm_config.samp = ES_ADC0_NCH_SAMPLETIME;
  147. ald_adc_normal_channel_config(_hadc, &nm_config);
  148. ald_adc_normal_start(_hadc);
  149. if (ald_adc_normal_poll_for_conversion(_hadc, 5000) == OK)
  150. *value = ald_adc_normal_get_value(_hadc);
  151. return RT_EOK;
  152. }
  153. static const struct rt_adc_ops es32f3_adc_ops =
  154. {
  155. es32f3_adc_enabled,
  156. es32f3_get_adc_value,
  157. };
  158. int rt_hw_adc_init(void)
  159. {
  160. int result = RT_EOK;
  161. adc_handle_t _h_adc;
  162. /* adc function initialization */
  163. _h_adc.init.scan = DISABLE;
  164. _h_adc.init.cont = DISABLE;
  165. _h_adc.init.disc = ADC_ALL_DISABLE;
  166. _h_adc.init.disc_nr = ADC_DISC_NR_1;
  167. _h_adc.init.nch_nr = ADC_NCH_NR_16;
  168. _h_adc.init.nche_sel = ADC_NCHESEL_MODE_ALL;
  169. _h_adc.init.cont = DISABLE;
  170. _h_adc.init.n_ref = ADC_NEG_REF_VSS;
  171. _h_adc.init.p_ref = ADC_POS_REF_VDD;
  172. #ifdef BSP_USING_ADC0
  173. static adc_handle_t _h_adc0;
  174. _h_adc0.init = _h_adc.init;
  175. _h_adc0.perh = ADC0;
  176. _h_adc0.init.align = ES_ADC0_ALIGN;
  177. _h_adc0.init.data_bit = ES_ADC0_DATA_BIT;
  178. _h_adc0.init.div = ES_ADC0_CLK_DIV;
  179. ald_adc_init(&_h_adc0);
  180. rt_hw_adc_register(&_device_adc0, ES_DEVICE_NAME_ADC0, &es32f3_adc_ops, &_h_adc0);
  181. #endif /*BSP_USING_ADC0*/
  182. #ifdef BSP_USING_ADC1
  183. static adc_handle_t _h_adc1;
  184. _h_adc1.init = _h_adc.init;
  185. _h_adc1.perh = ADC1;
  186. _h_adc1.init.align = ES_ADC1_ALIGN;
  187. _h_adc1.init.data_bit = ES_ADC1_DATA_BIT;
  188. _h_adc1.init.div = ES_ADC1_CLK_DIV;
  189. ald_adc_init(&_h_adc1);
  190. rt_hw_adc_register(&_device_adc1, ES_DEVICE_NAME_ADC1, &es32f3_adc_ops, &_h_adc1);
  191. #endif /*BSP_USING_ADC1*/
  192. return result;
  193. }
  194. INIT_BOARD_EXPORT(rt_hw_adc_init);
  195. #endif