drv_sdio.c 108 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927
  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-07-20 jiezhi320 the first version
  9. */
  10. #include <stddef.h>
  11. #include <rthw.h>
  12. #include <rtthread.h>
  13. #ifdef RT_USING_SDIO
  14. #include "drv_sdio.h"
  15. //#define DRV_DEBUG
  16. #define LOG_TAG "drv.sdio"
  17. #include "drv_log.h"
  18. #define SDIO_DMA_USE_IPC 0//1:ʹÓÃipc×öͬ²½
  19. /* card status of R1 definitions */
  20. #define SD_R1_OUT_OF_RANGE BIT(31) /* command's argument was out of the allowed range */
  21. #define SD_R1_ADDRESS_ERROR BIT(30) /* misaligned address which did not match the block length */
  22. #define SD_R1_BLOCK_LEN_ERROR BIT(29) /* transferred block length is not allowed */
  23. #define SD_R1_ERASE_SEQ_ERROR BIT(28) /* an error in the sequence of erase commands occurred */
  24. #define SD_R1_ERASE_PARAM BIT(27) /* an invalid selection of write-blocks for erase occurred */
  25. #define SD_R1_WP_VIOLATION BIT(26) /* the host attempts to write to a protected block or to the temporary or permanent write protected card */
  26. #define SD_R1_CARD_IS_LOCKED BIT(25) /* the card is locked by the host */
  27. #define SD_R1_LOCK_UNLOCK_FAILED BIT(24) /* a sequence or password error has been detected in lock/unlock card command */
  28. #define SD_R1_COM_CRC_ERROR BIT(23) /* CRC check of the previous command failed */
  29. #define SD_R1_ILLEGAL_COMMAND BIT(22) /* command not legal for the card state */
  30. #define SD_R1_CARD_ECC_FAILED BIT(21) /* card internal ECC was applied but failed to correct the data */
  31. #define SD_R1_CC_ERROR BIT(20) /* internal card controller error */
  32. #define SD_R1_GENERAL_UNKNOWN_ERROR BIT(19) /* a general or an unknown error occurred during the operation */
  33. #define SD_R1_CSD_OVERWRITE BIT(16) /* read only section of the CSD does not match or attempt to reverse the copy or permanent WP bits */
  34. #define SD_R1_WP_ERASE_SKIP BIT(15) /* partial address space was erased */
  35. #define SD_R1_CARD_ECC_DISABLED BIT(14) /* command has been executed without using the internal ECC */
  36. #define SD_R1_ERASE_RESET BIT(13) /* an erase sequence was cleared before executing */
  37. #define SD_R1_READY_FOR_DATA BIT(8) /* correspond to buffer empty signaling on the bus */
  38. #define SD_R1_APP_CMD BIT(5) /* card will expect ACMD */
  39. #define SD_R1_AKE_SEQ_ERROR BIT(3) /* error in the sequence of the authentication process */
  40. #define SD_R1_ERROR_BITS (uint32_t)0xFDF9E008 /* all the R1 error bits */
  41. /* card status of R6 definitions */
  42. #define SD_R6_COM_CRC_ERROR BIT(15) /* CRC check of the previous command failed */
  43. #define SD_R6_ILLEGAL_COMMAND BIT(14) /* command not legal for the card state */
  44. #define SD_R6_GENERAL_UNKNOWN_ERROR BIT(13) /* a general or an unknown error occurred during the operation */
  45. /* card state */
  46. #define SD_CARDSTATE_IDLE ((uint8_t)0x00) /* card is in idle state */
  47. #define SD_CARDSTATE_READY ((uint8_t)0x01) /* card is in ready state */
  48. #define SD_CARDSTATE_IDENTIFICAT ((uint8_t)0x02) /* card is in identificat state */
  49. #define SD_CARDSTATE_STANDBY ((uint8_t)0x03) /* card is in standby state */
  50. #define SD_CARDSTATE_TRANSFER ((uint8_t)0x04) /* card is in transfer state */
  51. #define SD_CARDSTATE_DATA ((uint8_t)0x05) /* card is in data sending state */
  52. #define SD_CARDSTATE_RECEIVING ((uint8_t)0x06) /* card is in receiving state */
  53. #define SD_CARDSTATE_PROGRAMMING ((uint8_t)0x07) /* card is in programming state */
  54. #define SD_CARDSTATE_DISCONNECT ((uint8_t)0x08) /* card is in disconnect state */
  55. #define SD_CARDSTATE_LOCKED ((uint32_t)0x02000000) /* card is in locked state */
  56. #define SD_CHECK_PATTERN ((uint32_t)0x000001AA) /* check pattern for CMD8 */
  57. #define SD_VOLTAGE_WINDOW ((uint32_t)0x80100000) /* host 3.3V request in ACMD41 */
  58. /* parameters for ACMD41(voltage validation) */
  59. #define SD_HIGH_CAPACITY ((uint32_t)0x40000000) /* high capacity SD memory card */
  60. #define SD_STD_CAPACITY ((uint32_t)0x00000000) /* standard capacity SD memory card */
  61. /* SD bus width, check SCR register */
  62. #define SD_BUS_WIDTH_4BIT ((uint32_t)0x00040000) /* 4-bit width bus mode */
  63. #define SD_BUS_WIDTH_1BIT ((uint32_t)0x00010000) /* 1-bit width bus mode */
  64. /* masks for SCR register */
  65. #define SD_MASK_0_7BITS ((uint32_t)0x000000FF) /* mask [7:0] bits */
  66. #define SD_MASK_8_15BITS ((uint32_t)0x0000FF00) /* mask [15:8] bits */
  67. #define SD_MASK_16_23BITS ((uint32_t)0x00FF0000) /* mask [23:16] bits */
  68. #define SD_MASK_24_31BITS ((uint32_t)0xFF000000) /* mask [31:24] bits */
  69. #define SDIO_FIFO_ADDR ((uint32_t)0x40012C80) /* address of SDIO_FIFO */
  70. #define SD_FIFOHALF_WORDS ((uint32_t)0x00000008) /* words of FIFO half full/empty */
  71. #define SD_FIFOHALF_BYTES ((uint32_t)0x00000020) /* bytes of FIFO half full/empty */
  72. #define SD_DATATIMEOUT ((uint32_t)0xFFFFFFFF) /* DSM data timeout */
  73. #define SD_MAX_VOLT_VALIDATION ((uint32_t)0x0000FFFF) /* the maximum times of voltage validation */
  74. #define SD_MAX_DATA_LENGTH ((uint32_t)0x01FFFFFF) /* the maximum length of data */
  75. #define SD_ALLZERO ((uint32_t)0x00000000) /* all zero */
  76. #define SD_RCA_SHIFT ((uint8_t)0x10) /* RCA shift bits */
  77. #define SD_CLK_DIV_INIT ((uint16_t)0x0076) /* SD clock division in initialization phase */
  78. #define SD_CLK_DIV_TRANS ((uint16_t)0x0002) /* SD clock division in transmission phase */
  79. #define SDIO_MASK_INTC_FLAGS ((uint32_t)0x00C007FF) /* mask flags of SDIO_INTC */
  80. typedef struct{
  81. uint32_t sd_scr[2] ; /* content of SCR register */
  82. sdio_card_type_enum cardtype; /* SD card type */
  83. uint32_t sd_csd[4]; /* content of CSD register */
  84. uint32_t sd_cid[4]; /* content of CID register */
  85. uint16_t sd_rca; /* RCA of SD card */
  86. uint32_t transmode;
  87. uint32_t totalnumber_bytes;
  88. uint32_t stopcondition;
  89. __IO sd_error_enum transerror;
  90. __IO uint32_t transend;
  91. __IO uint32_t number_bytes;
  92. }sdcard_opration_t;
  93. static sdcard_opration_t card_opration = {
  94. .sd_scr = {0,0},
  95. .cardtype = SDIO_STD_CAPACITY_SD_CARD_V1_1,
  96. .sd_csd = {0,0,0,0},
  97. .sd_cid = {0,0,0,0},
  98. .sd_rca = 0,
  99. .transmode = SD_POLLING_MODE,
  100. .totalnumber_bytes = 0,
  101. .stopcondition = 0,
  102. .transerror = SD_OK,
  103. .transend = 0,
  104. .number_bytes = 0,
  105. };
  106. /* set sector size to 512 */
  107. #define SECTOR_SIZE 512
  108. typedef struct
  109. {
  110. struct rt_device sdcard_device;
  111. sd_card_info_struct sd_cardinfo;
  112. IRQn_Type irqn;
  113. struct rt_mutex sd_lock;
  114. struct rt_semaphore sem;
  115. char *device_name;
  116. } gd32_sdio_t;
  117. static gd32_sdio_t sd = {
  118. .irqn = SDIO_IRQn,
  119. .device_name = "sd0",
  120. };
  121. /* check if the command sent error occurs */
  122. static sd_error_enum cmdsent_error_check(void);
  123. /* check if error occurs for R1 response */
  124. static sd_error_enum r1_error_check(uint8_t cmdindex);
  125. /* check if error type for R1 response */
  126. static sd_error_enum r1_error_type_check(uint32_t resp);
  127. /* check if error occurs for R2 response */
  128. static sd_error_enum r2_error_check(void);
  129. /* check if error occurs for R3 response */
  130. static sd_error_enum r3_error_check(void);
  131. /* check if error occurs for R6 response */
  132. static sd_error_enum r6_error_check(uint8_t cmdindex, uint16_t *prca);
  133. /* check if error occurs for R7 response */
  134. static sd_error_enum r7_error_check(void);
  135. /* get the state which the card is in */
  136. static sd_error_enum sd_card_state_get(uint8_t *pcardstate);
  137. /* configure the bus width mode */
  138. static sd_error_enum sd_bus_width_config(uint32_t buswidth);
  139. /* get the SCR of corresponding card */
  140. static sd_error_enum sd_scr_get(uint16_t rca, uint32_t *pscr);
  141. /* get the data block size */
  142. static uint32_t sd_datablocksize_get(uint16_t bytesnumber);
  143. /* configure the GPIO of SDIO interface */
  144. static void gpio_config(void);
  145. /* configure the RCU of SDIO and DMA */
  146. static void rcu_config(void);
  147. /* configure the DMA for SDIO transfer request */
  148. static void dma_transfer_config(uint32_t *srcbuf, uint32_t bufsize);
  149. /* configure the DMA for SDIO reveive request */
  150. static void dma_receive_config(uint32_t *dstbuf, uint32_t bufsize);
  151. static void nvic_config(void);
  152. static sd_error_enum sd_config(void);
  153. static void card_info_get(void);
  154. #if SDIO_DMA_USE_IPC
  155. static void sdio_dma_irq_config(void);
  156. #endif
  157. /* RT-Thread Device Driver Interface */
  158. static rt_err_t rt_sdcard_init(rt_device_t dev)
  159. {
  160. rt_err_t ret = RT_EOK;
  161. sd_error_enum sd_error = SD_OK;
  162. uint16_t retry = 5;
  163. ret = rt_mutex_init(&sd.sd_lock, "sd_lock", RT_IPC_FLAG_FIFO);
  164. if (RT_EOK != ret) {
  165. LOG_E("init mutex failed\n");
  166. return ret;
  167. }
  168. ret = rt_sem_init(&sd.sem, "sd_sem", 0, RT_IPC_FLAG_FIFO);
  169. if (RT_EOK != ret) {
  170. LOG_E("init semaphore failed\n");
  171. return ret;
  172. }
  173. nvic_irq_enable(sd.irqn, 0, 0);
  174. do {
  175. /* initialize the card, get the card information and configurate the bus mode and transfer mode */
  176. sd_error = sd_config();
  177. } while((SD_OK != sd_error) && (--retry));
  178. if (retry) {
  179. LOG_I("\r\n Card init success!\r\n");
  180. }
  181. else {
  182. LOG_E("\r\n Card init failed!\r\n");
  183. ret = -RT_EIO;
  184. return ret;
  185. }
  186. card_info_get();
  187. return ret;
  188. }
  189. static rt_err_t rt_sdcard_open(rt_device_t dev, rt_uint16_t oflag)
  190. {
  191. return RT_EOK;
  192. }
  193. static rt_err_t rt_sdcard_close(rt_device_t dev)
  194. {
  195. return RT_EOK;
  196. }
  197. static uint32_t dma_buffer[SECTOR_SIZE/sizeof(uint32_t)];
  198. static rt_ssize_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
  199. {
  200. RT_ASSERT(dev != RT_NULL);
  201. sd_error_enum sd_error;
  202. uint32_t status;
  203. gd32_sdio_t *sd = (gd32_sdio_t *)dev->user_data;
  204. if (!buffer) {
  205. return 0;
  206. }
  207. rt_mutex_take(&sd->sd_lock, RT_WAITING_FOREVER);
  208. if(((uint32_t)buffer & 0x03) != 0)
  209. {
  210. /* non-aligned. */
  211. uint32_t i;
  212. uint32_t sector_adr;
  213. uint32_t* copy_buffer;
  214. sector_adr = pos*SECTOR_SIZE;
  215. copy_buffer = (uint32_t*)buffer;
  216. for(i=0; i<size; i++){
  217. sd_error = sd_block_read((uint32_t*)dma_buffer, sector_adr, SECTOR_SIZE);
  218. rt_memcpy(copy_buffer, dma_buffer, SECTOR_SIZE);
  219. sector_adr += SECTOR_SIZE;
  220. copy_buffer += SECTOR_SIZE;
  221. }
  222. }
  223. else {
  224. if (size == 1){
  225. sd_error = sd_block_read((uint32_t*)buffer, pos*SECTOR_SIZE, SECTOR_SIZE);
  226. }
  227. else {
  228. sd_error = sd_multiblocks_read((uint32_t*)buffer, pos*SECTOR_SIZE, SECTOR_SIZE, size);
  229. }
  230. }
  231. rt_mutex_release(&sd->sd_lock);
  232. if (sd_error == SD_OK){
  233. return size;
  234. }
  235. else {
  236. return 0;
  237. }
  238. }
  239. static rt_ssize_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
  240. {
  241. #define WR_RETRY_TIMES 2
  242. RT_ASSERT(dev != RT_NULL);
  243. uint8_t retry = 0;
  244. sd_error_enum sd_error;
  245. uint32_t status;
  246. gd32_sdio_t *sd = (gd32_sdio_t *)dev->user_data;
  247. rt_mutex_take(&sd->sd_lock, RT_WAITING_FOREVER);
  248. if (((uint32_t)buffer & 0x03) != 0) {
  249. /* non-aligned. */
  250. uint32_t i;
  251. rt_size_t sector_adr;
  252. uint32_t* copy_buffer;
  253. sector_adr = pos*SECTOR_SIZE;
  254. copy_buffer = (uint32_t*)buffer;
  255. for (i=0; i<size; i++) {
  256. retry = WR_RETRY_TIMES;
  257. rt_memcpy(dma_buffer, copy_buffer, SECTOR_SIZE);
  258. while (retry > 0) {
  259. sd_error = sd_block_write((uint32_t*)dma_buffer, sector_adr, SECTOR_SIZE);
  260. retry--;
  261. if (sd_error == SD_OK) {
  262. break;
  263. }
  264. }
  265. sector_adr += SECTOR_SIZE;
  266. copy_buffer += SECTOR_SIZE;
  267. }
  268. }
  269. else {
  270. retry = WR_RETRY_TIMES;
  271. if (size == 1) {
  272. while (retry > 0) {
  273. sd_error = sd_block_write((uint32_t*)buffer, pos*SECTOR_SIZE, SECTOR_SIZE);
  274. retry--;
  275. if (sd_error == SD_OK) {
  276. break;
  277. }
  278. }
  279. }
  280. else {
  281. while (retry > 0) {
  282. sd_error = sd_multiblocks_write((uint32_t*)buffer, pos*SECTOR_SIZE, SECTOR_SIZE, size);
  283. retry--;
  284. if (sd_error == SD_OK) {
  285. break;
  286. }
  287. }
  288. }
  289. }
  290. rt_mutex_release(&sd->sd_lock);
  291. if (!retry) {
  292. LOG_D("sdio e:%d r:%d\n", sd_error, retry);
  293. }
  294. if (sd_error == SD_OK) {
  295. return size;
  296. }
  297. else {
  298. return 0;
  299. }
  300. }
  301. static rt_err_t rt_sdcard_control(rt_device_t dev, int cmd, void *args)
  302. {
  303. RT_ASSERT(dev != RT_NULL);
  304. gd32_sdio_t *sd = (gd32_sdio_t *)dev->user_data;
  305. if (cmd == RT_DEVICE_CTRL_BLK_GETGEOME) {
  306. struct rt_device_blk_geometry *geometry;
  307. geometry = (struct rt_device_blk_geometry *)args;
  308. if (geometry == RT_NULL)
  309. return -RT_ERROR;
  310. geometry->bytes_per_sector = 512;
  311. geometry->block_size = sd->sd_cardinfo.card_blocksize;
  312. if (sd->sd_cardinfo.card_type == SDIO_HIGH_CAPACITY_SD_CARD)
  313. geometry->sector_count = (sd->sd_cardinfo.card_csd.c_size + 1) * 1024;
  314. else
  315. geometry->sector_count = sd->sd_cardinfo.card_capacity/sd->sd_cardinfo.card_blocksize;
  316. }
  317. return RT_EOK;
  318. }
  319. int rt_hw_sdcard_init(void)
  320. {
  321. /* register sdcard device */
  322. sd.sdcard_device.type = RT_Device_Class_Block;
  323. sd.sdcard_device.init = rt_sdcard_init;
  324. sd.sdcard_device.open = rt_sdcard_open;
  325. sd.sdcard_device.close = rt_sdcard_close;
  326. sd.sdcard_device.read = rt_sdcard_read;
  327. sd.sdcard_device.write = rt_sdcard_write;
  328. sd.sdcard_device.control = rt_sdcard_control;
  329. sd.sdcard_device.user_data = &sd;
  330. rt_device_register(&sd.sdcard_device, sd.device_name, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
  331. return RT_EOK;
  332. }
  333. INIT_DEVICE_EXPORT(rt_hw_sdcard_init);
  334. /*!
  335. \brief initialize the card, get the card information, set the bus mode and transfer mode
  336. \param[in] none
  337. \param[out] none
  338. \retval sd_error_enum
  339. */
  340. sd_error_enum sd_config(void)
  341. {
  342. sd_error_enum status = SD_OK;
  343. uint32_t cardstate = 0;
  344. /* initialize the card */
  345. status = sd_init();
  346. if(SD_OK == status){
  347. status = sd_card_information_get(&sd.sd_cardinfo);
  348. }
  349. if(SD_OK == status){
  350. status = sd_card_select_deselect(sd.sd_cardinfo.card_rca);
  351. }
  352. status = sd_cardstatus_get(&cardstate);
  353. if(cardstate & 0x02000000){
  354. LOG_D("\r\n The card is locked!");
  355. #if 0
  356. /* unlock the card if necessary */
  357. status = sd_lock_unlock(SD_UNLOCK);
  358. if(SD_OK != status){
  359. LOG_D("\r\n Unlock failed!");
  360. while (1){
  361. }
  362. }else{
  363. LOG_W("\r\n The card is unlocked! Please reset MCU!");
  364. }
  365. #endif
  366. while (1){
  367. }
  368. }
  369. if ((SD_OK == status) && (!(cardstate & 0x02000000)))
  370. {
  371. /* set bus mode */
  372. status = sd_bus_mode_config(SDIO_BUSMODE_4BIT);
  373. // status = sd_bus_mode_config( SDIO_BUSMODE_1BIT );
  374. }
  375. if (SD_OK == status)
  376. {
  377. /* set data transfer mode */
  378. status = sd_transfer_mode_config(SD_DMA_MODE);
  379. //status = sd_transfer_mode_config(SD_POLLING_MODE);
  380. }
  381. return status;
  382. }
  383. /*!
  384. \brief get the card information and print it out by USRAT
  385. \param[in] none
  386. \param[out] none
  387. \retval none
  388. */
  389. void card_info_get(void)
  390. {
  391. uint8_t sd_spec, sd_spec3, sd_spec4, sd_security;
  392. uint32_t block_count, block_size;
  393. uint16_t temp_ccc;
  394. LOG_D("\r\nCard information:");
  395. sd_spec = (card_opration.sd_scr[1] & 0x0F000000) >> 24;
  396. sd_spec3 = (card_opration.sd_scr[1] & 0x00008000) >> 15;
  397. sd_spec4 = (card_opration.sd_scr[1] & 0x00000400) >> 10;
  398. if(2 == sd_spec){
  399. if(1 == sd_spec3){
  400. if(1 == sd_spec4){
  401. LOG_D("\r\n## Card version 4.xx ##");
  402. }else{
  403. LOG_D("\r\n## Card version 3.0x ##");
  404. }
  405. }else{
  406. LOG_D("\r\n## Card version 2.00 ##");
  407. }
  408. }else if(1 == sd_spec){
  409. LOG_D("\r\n## Card version 1.10 ##");
  410. }else if(0 == sd_spec){
  411. LOG_D("\r\n## Card version 1.0x ##");
  412. }
  413. sd_security = (card_opration.sd_scr[1] & 0x00700000) >> 20;
  414. if(2 == sd_security){
  415. LOG_I("\r\n## SDSC card ##");
  416. }else if(3 == sd_security){
  417. LOG_I("\r\n## SDHC card ##");
  418. }else if(4 == sd_security){
  419. LOG_I("\r\n## SDXC card ##");
  420. }
  421. block_count = (sd.sd_cardinfo.card_csd.c_size + 1)*1024;
  422. block_size = 512;
  423. LOG_I("\r\n## Device size is %dKB ##", sd_card_capacity_get());
  424. LOG_D("\r\n## Block size is %dB - %dB ##", block_size, sd.sd_cardinfo.card_blocksize);
  425. LOG_D("\r\n## Block count is %d ##", block_count);
  426. if(sd.sd_cardinfo.card_csd.read_bl_partial){
  427. LOG_D("\r\n## Partial blocks for read allowed ##" );
  428. }
  429. if(sd.sd_cardinfo.card_csd.write_bl_partial){
  430. LOG_D("\r\n## Partial blocks for write allowed ##" );
  431. }
  432. temp_ccc = sd.sd_cardinfo.card_csd.ccc;
  433. LOG_D("\r\n## CardCommandClasses is: %x ##", temp_ccc);
  434. if((SD_CCC_BLOCK_READ & temp_ccc) && (SD_CCC_BLOCK_WRITE & temp_ccc)){
  435. LOG_D("\r\n## Block operation supported ##");
  436. }
  437. if(SD_CCC_ERASE & temp_ccc){
  438. LOG_D("\r\n## Erase supported ##");
  439. }
  440. if(SD_CCC_WRITE_PROTECTION & temp_ccc){
  441. LOG_D("\r\n## Write protection supported ##");
  442. }
  443. if(SD_CCC_LOCK_CARD & temp_ccc){
  444. LOG_D("\r\n## Lock unlock supported ##");
  445. }
  446. if(SD_CCC_APPLICATION_SPECIFIC & temp_ccc){
  447. LOG_D("\r\n## Application specific supported ##");
  448. }
  449. if(SD_CCC_IO_MODE & temp_ccc){
  450. LOG_D("\r\n## I/O mode supported ##");
  451. }
  452. if(SD_CCC_SWITCH & temp_ccc){
  453. LOG_D("\r\n## Switch function supported ##");
  454. }
  455. }
  456. void SDIO_IRQHandler(void)
  457. {
  458. sd_error_enum status;
  459. rt_interrupt_enter();
  460. status = sd_interrupts_process();
  461. if (SD_OK != status) {
  462. LOG_D("irq:%d", status);
  463. }
  464. rt_interrupt_leave();
  465. }
  466. /*!
  467. \brief initialize the SD card and make it in standby state
  468. \param[in] none
  469. \param[out] none
  470. \retval sd_error_enum
  471. */
  472. sd_error_enum sd_init(void)
  473. {
  474. sd_error_enum status = SD_OK;
  475. /* configure the RCU and GPIO, deinitialize the SDIO */
  476. rcu_config();
  477. gpio_config();
  478. sdio_deinit();
  479. /* configure the clock and work voltage */
  480. status = sd_power_on();
  481. if(SD_OK != status){
  482. return status;
  483. }
  484. /* initialize the card and get CID and CSD of the card */
  485. status = sd_card_init();
  486. if(SD_OK != status){
  487. return status;
  488. }
  489. /* configure the SDIO peripheral */
  490. sdio_clock_config(SDIO_SDIOCLKEDGE_RISING, SDIO_CLOCKBYPASS_DISABLE, SDIO_CLOCKPWRSAVE_DISABLE, SD_CLK_DIV_TRANS);
  491. sdio_bus_mode_set(SDIO_BUSMODE_1BIT);
  492. sdio_hardware_clock_enable();//sdio_hardware_clock_disable();
  493. return status;
  494. }
  495. /*!
  496. \brief initialize the card and get CID and CSD of the card
  497. \param[in] none
  498. \param[out] none
  499. \retval sd_error_enum
  500. */
  501. sd_error_enum sd_card_init(void)
  502. {
  503. sd_error_enum status = SD_OK;
  504. uint16_t temp_rca = 0x01;
  505. if(SDIO_POWER_OFF == sdio_power_state_get()){
  506. status = SD_OPERATION_IMPROPER;
  507. return status;
  508. }
  509. /* the card is not I/O only card */
  510. if(SDIO_SECURE_DIGITAL_IO_CARD != card_opration.cardtype){
  511. /* send CMD2(SD_CMD_ALL_SEND_CID) to get the CID numbers */
  512. sdio_command_response_config(SD_CMD_ALL_SEND_CID, (uint32_t)0x0, SDIO_RESPONSETYPE_LONG);
  513. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  514. sdio_csm_enable();
  515. /* check if some error occurs */
  516. status = r2_error_check();
  517. if(SD_OK != status){
  518. return status;
  519. }
  520. /* store the CID numbers */
  521. card_opration.sd_cid[0] = sdio_response_get(SDIO_RESPONSE0);
  522. card_opration.sd_cid[1] = sdio_response_get(SDIO_RESPONSE1);
  523. card_opration.sd_cid[2] = sdio_response_get(SDIO_RESPONSE2);
  524. card_opration.sd_cid[3] = sdio_response_get(SDIO_RESPONSE3);
  525. }
  526. /* the card is SD memory card or the I/O card has the memory portion */
  527. if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == card_opration.cardtype) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == card_opration.cardtype) ||
  528. (SDIO_HIGH_CAPACITY_SD_CARD == card_opration.cardtype) || (SDIO_SECURE_DIGITAL_IO_COMBO_CARD == card_opration.cardtype)){
  529. /* send CMD3(SEND_RELATIVE_ADDR) to ask the card to publish a new relative address (RCA) */
  530. sdio_command_response_config(SD_CMD_SEND_RELATIVE_ADDR, (uint32_t)0x0, SDIO_RESPONSETYPE_SHORT);
  531. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  532. sdio_csm_enable();
  533. /* check if some error occurs */
  534. status = r6_error_check(SD_CMD_SEND_RELATIVE_ADDR, &temp_rca);
  535. if(SD_OK != status){
  536. return status;
  537. }
  538. }
  539. if(SDIO_SECURE_DIGITAL_IO_CARD != card_opration.cardtype){
  540. /* the card is not I/O only card */
  541. card_opration.sd_rca = temp_rca;
  542. /* send CMD9(SEND_CSD) to get the addressed card's card-specific data (CSD) */
  543. sdio_command_response_config(SD_CMD_SEND_CSD, (uint32_t)(temp_rca << SD_RCA_SHIFT), SDIO_RESPONSETYPE_LONG);
  544. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  545. sdio_csm_enable();
  546. /* check if some error occurs */
  547. status = r2_error_check();
  548. if(SD_OK != status){
  549. return status;
  550. }
  551. /* store the card-specific data (CSD) */
  552. card_opration.sd_csd[0] = sdio_response_get(SDIO_RESPONSE0);
  553. card_opration.sd_csd[1] = sdio_response_get(SDIO_RESPONSE1);
  554. card_opration.sd_csd[2] = sdio_response_get(SDIO_RESPONSE2);
  555. card_opration.sd_csd[3] = sdio_response_get(SDIO_RESPONSE3);
  556. }
  557. return status;
  558. }
  559. /*!
  560. \brief configure the clock and the work voltage, and get the card type
  561. \param[in] none
  562. \param[out] none
  563. \retval sd_error_enum
  564. */
  565. sd_error_enum sd_power_on(void)
  566. {
  567. sd_error_enum status = SD_OK;
  568. uint32_t sdcardtype = SD_STD_CAPACITY, response = 0, count = 0;
  569. uint8_t busyflag = 0;
  570. /* configure the SDIO peripheral */
  571. sdio_clock_config(SDIO_SDIOCLKEDGE_RISING, SDIO_CLOCKBYPASS_DISABLE, SDIO_CLOCKPWRSAVE_DISABLE, SD_CLK_DIV_INIT);
  572. sdio_bus_mode_set(SDIO_BUSMODE_1BIT);
  573. sdio_hardware_clock_enable();//sdio_hardware_clock_disable();
  574. sdio_power_state_set(SDIO_POWER_ON);
  575. /* enable SDIO_CLK clock output */
  576. sdio_clock_enable();
  577. /* send CMD0(GO_IDLE_STATE) to reset the card */
  578. sdio_command_response_config(SD_CMD_GO_IDLE_STATE, (uint32_t)0x0, SDIO_RESPONSETYPE_NO);
  579. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  580. /* enable the CSM */
  581. sdio_csm_enable();
  582. /* check if command sent error occurs */
  583. status = cmdsent_error_check();
  584. if(SD_OK != status){
  585. return status;
  586. }
  587. /* send CMD8(SEND_IF_COND) to get SD memory card interface condition */
  588. sdio_command_response_config(SD_CMD_SEND_IF_COND, SD_CHECK_PATTERN, SDIO_RESPONSETYPE_SHORT);
  589. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  590. sdio_csm_enable();
  591. if(SD_OK == r7_error_check()){
  592. /* SD Card 2.0 */
  593. card_opration.cardtype = SDIO_STD_CAPACITY_SD_CARD_V2_0;
  594. sdcardtype = SD_HIGH_CAPACITY;
  595. }
  596. /* send CMD55(APP_CMD) to indicate next command is application specific command */
  597. sdio_command_response_config(SD_CMD_APP_CMD, (uint32_t)0x0, SDIO_RESPONSETYPE_SHORT);
  598. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  599. sdio_csm_enable();
  600. if(SD_OK == r1_error_check(SD_CMD_APP_CMD)){
  601. /* SD memory card */
  602. while((!busyflag) && (count < SD_MAX_VOLT_VALIDATION)){
  603. /* send CMD55(APP_CMD) to indicate next command is application specific command */
  604. sdio_command_response_config(SD_CMD_APP_CMD, (uint32_t)0x0, SDIO_RESPONSETYPE_SHORT);
  605. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  606. sdio_csm_enable();
  607. /* check if some error occurs */
  608. status = r1_error_check(SD_CMD_APP_CMD);
  609. if(SD_OK != status){
  610. return status;
  611. }
  612. /* send ACMD41(SD_SEND_OP_COND) to get host capacity support information (HCS) and OCR content */
  613. sdio_command_response_config(SD_APPCMD_SD_SEND_OP_COND, (SD_VOLTAGE_WINDOW | sdcardtype), SDIO_RESPONSETYPE_SHORT);
  614. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  615. sdio_csm_enable();
  616. /* check if some error occurs */
  617. status = r3_error_check();
  618. if(SD_OK != status){
  619. return status;
  620. }
  621. /* get the response and check card power up status bit(busy) */
  622. response = sdio_response_get(SDIO_RESPONSE0);
  623. busyflag = (uint8_t)((response >> 31)&(uint32_t)0x01);
  624. ++count;
  625. }
  626. if(count >= SD_MAX_VOLT_VALIDATION){
  627. status = SD_VOLTRANGE_INVALID;
  628. return status;
  629. }
  630. if(response &= SD_HIGH_CAPACITY){
  631. /* SDHC card */
  632. card_opration.cardtype = SDIO_HIGH_CAPACITY_SD_CARD;
  633. }
  634. }
  635. return status;
  636. }
  637. /*!
  638. \brief close the power of SDIO
  639. \param[in] none
  640. \param[out] none
  641. \retval sd_error_enum
  642. */
  643. sd_error_enum sd_power_off(void)
  644. {
  645. sd_error_enum status = SD_OK;
  646. sdio_power_state_set(SDIO_POWER_OFF);
  647. return status;
  648. }
  649. /*!
  650. \brief configure the bus mode
  651. \param[in] busmode: the bus mode
  652. \arg SDIO_BUSMODE_1BIT: 1-bit SDIO card bus mode
  653. \arg SDIO_BUSMODE_4BIT: 4-bit SDIO card bus mode
  654. \arg SDIO_BUSMODE_8BIT: 8-bit SDIO card bus mode (MMC only)
  655. \param[out] none
  656. \retval sd_error_enum
  657. */
  658. sd_error_enum sd_bus_mode_config(uint32_t busmode)
  659. {
  660. sd_error_enum status = SD_OK;
  661. if(SDIO_MULTIMEDIA_CARD == card_opration.cardtype){
  662. /* MMC card doesn't support this function */
  663. status = SD_FUNCTION_UNSUPPORTED;
  664. return status;
  665. }else if((SDIO_STD_CAPACITY_SD_CARD_V1_1 == card_opration.cardtype) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == card_opration.cardtype) ||
  666. (SDIO_HIGH_CAPACITY_SD_CARD == card_opration.cardtype)){
  667. if(SDIO_BUSMODE_8BIT == busmode){
  668. /* 8 bit bus mode doesn't support */
  669. status = SD_FUNCTION_UNSUPPORTED;
  670. return status;
  671. }else if(SDIO_BUSMODE_4BIT == busmode){
  672. /* configure SD bus width and the SDIO */
  673. status = sd_bus_width_config(SD_BUS_WIDTH_4BIT);
  674. if(SD_OK == status){
  675. sdio_clock_config(SDIO_SDIOCLKEDGE_RISING, SDIO_CLOCKBYPASS_DISABLE,
  676. SDIO_CLOCKPWRSAVE_DISABLE, SD_CLK_DIV_TRANS);
  677. sdio_bus_mode_set(busmode);
  678. sdio_hardware_clock_enable();//sdio_hardware_clock_disable();
  679. }
  680. }else if(SDIO_BUSMODE_1BIT == busmode){
  681. /* configure SD bus width and the SDIO */
  682. status = sd_bus_width_config(SD_BUS_WIDTH_1BIT);
  683. if(SD_OK == status){
  684. sdio_clock_config(SDIO_SDIOCLKEDGE_RISING, SDIO_CLOCKBYPASS_DISABLE,
  685. SDIO_CLOCKPWRSAVE_DISABLE, SD_CLK_DIV_TRANS);
  686. sdio_bus_mode_set(busmode);
  687. sdio_hardware_clock_enable();//sdio_hardware_clock_disable();
  688. }
  689. }else{
  690. status = SD_PARAMETER_INVALID;
  691. }
  692. }
  693. return status;
  694. }
  695. /*!
  696. \brief configure the mode of transmission
  697. \param[in] txmode: transfer mode
  698. \arg SD_DMA_MODE: DMA mode
  699. \arg SD_POLLING_MODE: polling mode
  700. \param[out] none
  701. \retval sd_error_enum
  702. */
  703. sd_error_enum sd_transfer_mode_config(uint32_t txmode)
  704. {
  705. sd_error_enum status = SD_OK;
  706. /* set the transfer mode */
  707. if((SD_DMA_MODE == txmode) || (SD_POLLING_MODE == txmode)){
  708. card_opration.transmode = txmode;
  709. }else{
  710. status = SD_PARAMETER_INVALID;
  711. }
  712. return status;
  713. }
  714. /*!
  715. \brief read a block data into a buffer from the specified address of a card
  716. \param[out] preadbuffer: a pointer that store a block read data
  717. \param[in] readaddr: the read data address
  718. \param[in] blocksize: the data block size
  719. \retval sd_error_enum
  720. */
  721. sd_error_enum sd_block_read(uint32_t *preadbuffer, uint32_t readaddr, uint16_t blocksize)
  722. {
  723. /* initialize the variables */
  724. sd_error_enum status = SD_OK;
  725. uint32_t count = 0, align = 0, datablksize = SDIO_DATABLOCKSIZE_1BYTE, *ptempbuff = preadbuffer;
  726. __IO uint32_t timeout = 0;
  727. if(NULL == preadbuffer){
  728. status = SD_PARAMETER_INVALID;
  729. return status;
  730. }
  731. card_opration.transerror = SD_OK;
  732. card_opration.transend = 0;
  733. card_opration.totalnumber_bytes = 0;
  734. /* clear all DSM configuration */
  735. sdio_data_config(0, 0, SDIO_DATABLOCKSIZE_1BYTE);
  736. sdio_data_transfer_config(SDIO_TRANSDIRECTION_TOCARD, SDIO_TRANSMODE_BLOCK);
  737. sdio_dsm_disable();
  738. sdio_dma_disable();
  739. /* check whether the card is locked */
  740. if(sdio_response_get(SDIO_RESPONSE0) & SD_CARDSTATE_LOCKED){
  741. status = SD_LOCK_UNLOCK_FAILED;
  742. return status;
  743. }
  744. /* blocksize is fixed in 512B for SDHC card */
  745. if (SDIO_HIGH_CAPACITY_SD_CARD == card_opration.cardtype)
  746. {
  747. blocksize = 512;
  748. readaddr /= 512;
  749. }
  750. align = blocksize & (blocksize - 1);
  751. if((blocksize > 0) && (blocksize <= 2048) && (0 == align)){
  752. datablksize = sd_datablocksize_get(blocksize);
  753. /* send CMD16(SET_BLOCKLEN) to set the block length */
  754. sdio_command_response_config(SD_CMD_SET_BLOCKLEN, (uint32_t)blocksize, SDIO_RESPONSETYPE_SHORT);
  755. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  756. sdio_csm_enable();
  757. /* check if some error occurs */
  758. status = r1_error_check(SD_CMD_SET_BLOCKLEN);
  759. if(SD_OK != status){
  760. return status;
  761. }
  762. }else{
  763. status = SD_PARAMETER_INVALID;
  764. return status;
  765. }
  766. card_opration.stopcondition = 0;
  767. card_opration.totalnumber_bytes = blocksize;
  768. /* configure SDIO data transmisson */
  769. sdio_data_config(SD_DATATIMEOUT, card_opration.totalnumber_bytes, datablksize);
  770. sdio_data_transfer_config(SDIO_TRANSDIRECTION_TOSDIO, SDIO_TRANSMODE_BLOCK);
  771. sdio_dsm_enable();
  772. /* send CMD17(READ_SINGLE_BLOCK) to read a block */
  773. sdio_command_response_config(SD_CMD_READ_SINGLE_BLOCK, (uint32_t)readaddr, SDIO_RESPONSETYPE_SHORT);
  774. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  775. sdio_csm_enable();
  776. /* check if some error occurs */
  777. status = r1_error_check(SD_CMD_READ_SINGLE_BLOCK);
  778. if(SD_OK != status){
  779. return status;
  780. }
  781. if(SD_POLLING_MODE == card_opration.transmode){
  782. /* polling mode */
  783. while(!sdio_flag_get(SDIO_FLAG_DTCRCERR | SDIO_FLAG_DTTMOUT | SDIO_FLAG_RXORE | SDIO_FLAG_DTBLKEND | SDIO_FLAG_STBITE)){
  784. if(RESET != sdio_flag_get(SDIO_FLAG_RFH)){
  785. /* at least 8 words can be read in the FIFO */
  786. for(count = 0; count < SD_FIFOHALF_WORDS; count++){
  787. *(ptempbuff + count) = sdio_data_read();
  788. }
  789. ptempbuff += SD_FIFOHALF_WORDS;
  790. }
  791. }
  792. /* whether some error occurs and return it */
  793. if(RESET != sdio_flag_get(SDIO_FLAG_DTCRCERR)){
  794. status = SD_DATA_CRC_ERROR;
  795. sdio_flag_clear(SDIO_FLAG_DTCRCERR);
  796. return status;
  797. }else if(RESET != sdio_flag_get(SDIO_FLAG_DTTMOUT)){
  798. status = SD_DATA_TIMEOUT;
  799. sdio_flag_clear(SDIO_FLAG_DTTMOUT);
  800. return status;
  801. }else if(RESET != sdio_flag_get(SDIO_FLAG_RXORE)){
  802. status = SD_RX_OVERRUN_ERROR;
  803. sdio_flag_clear(SDIO_FLAG_RXORE);
  804. return status;
  805. }else if(RESET != sdio_flag_get(SDIO_FLAG_STBITE)){
  806. status = SD_START_BIT_ERROR;
  807. sdio_flag_clear(SDIO_FLAG_STBITE);
  808. return status;
  809. }
  810. while(RESET != sdio_flag_get(SDIO_FLAG_RXDTVAL)){
  811. *ptempbuff = sdio_data_read();
  812. ++ptempbuff;
  813. }
  814. /* clear the SDIO_INTC flags */
  815. sdio_flag_clear(SDIO_MASK_INTC_FLAGS);
  816. }else if(SD_DMA_MODE == card_opration.transmode){
  817. /* DMA mode */
  818. /* enable the SDIO corresponding interrupts and DMA function */
  819. sdio_interrupt_enable(SDIO_INT_CCRCERR | SDIO_INT_DTTMOUT | SDIO_INT_RXORE | SDIO_INT_DTEND | SDIO_INT_STBITE);
  820. sdio_dma_enable();
  821. dma_receive_config(preadbuffer, blocksize);
  822. #if SDIO_DMA_USE_IPC
  823. sdio_dma_irq_config();
  824. if (RT_EOK != rt_sem_take(&sd.sem, 100)) {
  825. return SD_ERROR;
  826. }
  827. #else
  828. timeout = 400000;
  829. while((RESET == dma_flag_get(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_FLAG_FTF)) && (timeout > 0)){
  830. timeout--;
  831. if(0 == timeout){
  832. return SD_ERROR;
  833. }
  834. }
  835. #endif
  836. }else{
  837. status = SD_PARAMETER_INVALID;
  838. }
  839. return status;
  840. }
  841. /*!
  842. \brief read multiple blocks data into a buffer from the specified address of a card
  843. \param[out] preadbuffer: a pointer that store multiple blocks read data
  844. \param[in] readaddr: the read data address
  845. \param[in] blocksize: the data block size
  846. \param[in] blocksnumber: number of blocks that will be read
  847. \retval sd_error_enum
  848. */
  849. sd_error_enum sd_multiblocks_read(uint32_t *preadbuffer, uint32_t readaddr, uint16_t blocksize, uint32_t blocksnumber)
  850. {
  851. /* initialize the variables */
  852. sd_error_enum status = SD_OK;
  853. uint32_t count = 0, align = 0, datablksize = SDIO_DATABLOCKSIZE_1BYTE, *ptempbuff = preadbuffer;
  854. __IO uint32_t timeout = 0;
  855. if(NULL == preadbuffer){
  856. status = SD_PARAMETER_INVALID;
  857. return status;
  858. }
  859. card_opration.transerror = SD_OK;
  860. card_opration.transend = 0;
  861. card_opration.totalnumber_bytes = 0;
  862. /* clear all DSM configuration */
  863. sdio_data_config(0, 0, SDIO_DATABLOCKSIZE_1BYTE);
  864. sdio_data_transfer_config(SDIO_TRANSDIRECTION_TOCARD, SDIO_TRANSMODE_BLOCK);
  865. sdio_dsm_disable();
  866. sdio_dma_disable();
  867. /* check whether the card is locked */
  868. if(sdio_response_get(SDIO_RESPONSE0) & SD_CARDSTATE_LOCKED){
  869. status = SD_LOCK_UNLOCK_FAILED;
  870. return status;
  871. }
  872. /* blocksize is fixed in 512B for SDHC card */
  873. if (SDIO_HIGH_CAPACITY_SD_CARD == card_opration.cardtype)
  874. {
  875. blocksize = 512;
  876. readaddr /= 512;
  877. }
  878. align = blocksize & (blocksize - 1);
  879. if((blocksize > 0) && (blocksize <= 2048) && (0 == align)){
  880. datablksize = sd_datablocksize_get(blocksize);
  881. /* send CMD16(SET_BLOCKLEN) to set the block length */
  882. sdio_command_response_config(SD_CMD_SET_BLOCKLEN, (uint32_t)blocksize, SDIO_RESPONSETYPE_SHORT);
  883. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  884. sdio_csm_enable();
  885. /* check if some error occurs */
  886. status = r1_error_check(SD_CMD_SET_BLOCKLEN);
  887. if(SD_OK != status){
  888. return status;
  889. }
  890. }else{
  891. status = SD_PARAMETER_INVALID;
  892. return status;
  893. }
  894. if(blocksnumber > 1){
  895. if(blocksnumber * blocksize > SD_MAX_DATA_LENGTH){
  896. /* exceeds the maximum length */
  897. status = SD_PARAMETER_INVALID;
  898. return status;
  899. }
  900. card_opration.stopcondition = 1;
  901. card_opration.totalnumber_bytes = blocksnumber * blocksize;
  902. /* configure the SDIO data transmisson */
  903. sdio_data_config(SD_DATATIMEOUT, card_opration.totalnumber_bytes, datablksize);
  904. sdio_data_transfer_config(SDIO_TRANSDIRECTION_TOSDIO, SDIO_TRANSMODE_BLOCK);
  905. sdio_dsm_enable();
  906. /* send CMD18(READ_MULTIPLE_BLOCK) to read multiple blocks */
  907. sdio_command_response_config(SD_CMD_READ_MULTIPLE_BLOCK, readaddr, SDIO_RESPONSETYPE_SHORT);
  908. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  909. sdio_csm_enable();
  910. /* check if some error occurs */
  911. status = r1_error_check(SD_CMD_READ_MULTIPLE_BLOCK);
  912. if(SD_OK != status){
  913. return status;
  914. }
  915. if(SD_POLLING_MODE == card_opration.transmode){
  916. /* polling mode */
  917. while(!sdio_flag_get(SDIO_FLAG_DTCRCERR | SDIO_FLAG_DTTMOUT | SDIO_FLAG_RXORE | SDIO_FLAG_DTEND | SDIO_FLAG_STBITE)){
  918. if(RESET != sdio_flag_get(SDIO_FLAG_RFH)){
  919. /* at least 8 words can be read in the FIFO */
  920. for(count = 0; count < SD_FIFOHALF_WORDS; count++){
  921. *(ptempbuff + count) = sdio_data_read();
  922. }
  923. ptempbuff += SD_FIFOHALF_WORDS;
  924. }
  925. }
  926. /* whether some error occurs and return it */
  927. if(RESET != sdio_flag_get(SDIO_FLAG_DTCRCERR)){
  928. status = SD_DATA_CRC_ERROR;
  929. sdio_flag_clear(SDIO_FLAG_DTCRCERR);
  930. return status;
  931. }else if(RESET != sdio_flag_get(SDIO_FLAG_DTTMOUT)){
  932. status = SD_DATA_TIMEOUT;
  933. sdio_flag_clear(SDIO_FLAG_DTTMOUT);
  934. return status;
  935. }else if(RESET != sdio_flag_get(SDIO_FLAG_RXORE)){
  936. status = SD_RX_OVERRUN_ERROR;
  937. sdio_flag_clear(SDIO_FLAG_RXORE);
  938. return status;
  939. }else if(RESET != sdio_flag_get(SDIO_FLAG_STBITE)){
  940. status = SD_START_BIT_ERROR;
  941. sdio_flag_clear(SDIO_FLAG_STBITE);
  942. return status;
  943. }
  944. while(RESET != sdio_flag_get(SDIO_FLAG_RXDTVAL)){
  945. *ptempbuff = sdio_data_read();
  946. ++ptempbuff;
  947. }
  948. if(RESET != sdio_flag_get(SDIO_FLAG_DTEND)){
  949. if((SDIO_STD_CAPACITY_SD_CARD_V1_1 == card_opration.cardtype) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == card_opration.cardtype) ||
  950. (SDIO_HIGH_CAPACITY_SD_CARD == card_opration.cardtype)){
  951. /* send CMD12(STOP_TRANSMISSION) to stop transmission */
  952. sdio_command_response_config(SD_CMD_STOP_TRANSMISSION, (uint32_t)0x0, SDIO_RESPONSETYPE_SHORT);
  953. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  954. sdio_csm_enable();
  955. /* check if some error occurs */
  956. status = r1_error_check(SD_CMD_STOP_TRANSMISSION);
  957. if(SD_OK != status){
  958. return status;
  959. }
  960. }
  961. }
  962. sdio_flag_clear(SDIO_MASK_INTC_FLAGS);
  963. }else if(SD_DMA_MODE == card_opration.transmode){
  964. /* DMA mode */
  965. /* enable the SDIO corresponding interrupts and DMA function */
  966. sdio_interrupt_enable(SDIO_INT_DTCRCERR | SDIO_INT_DTTMOUT | SDIO_INT_RXORE | SDIO_INT_DTEND | SDIO_INT_STBITE);
  967. sdio_dma_enable();
  968. dma_receive_config(preadbuffer, card_opration.totalnumber_bytes);
  969. #if SDIO_DMA_USE_IPC
  970. sdio_dma_irq_config();
  971. if (RT_EOK != rt_sem_take(&sd.sem, 100)) {
  972. return SD_ERROR;
  973. }
  974. #else
  975. timeout = 400000;
  976. while((RESET == dma_flag_get(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_FLAG_FTF)) && (timeout > 0)){
  977. timeout--;
  978. if(0 == timeout){
  979. return SD_ERROR;
  980. }
  981. }
  982. #endif
  983. while((0 == card_opration.transend) && (SD_OK == card_opration.transerror)){
  984. }
  985. if(SD_OK != card_opration.transerror){
  986. return card_opration.transerror;
  987. }
  988. }else{
  989. status = SD_PARAMETER_INVALID;
  990. }
  991. }
  992. return status;
  993. }
  994. /*!
  995. \brief write a block data to the specified address of a card
  996. \param[in] pwritebuffer: a pointer that store a block data to be transferred
  997. \param[in] writeaddr: the read data address
  998. \param[in] blocksize: the data block size
  999. \param[out] none
  1000. \retval sd_error_enum
  1001. */
  1002. sd_error_enum sd_block_write(uint32_t *pwritebuffer, uint32_t writeaddr, uint16_t blocksize)
  1003. {
  1004. /* initialize the variables */
  1005. sd_error_enum status = SD_OK;
  1006. uint8_t cardstate = 0;
  1007. uint32_t count = 0, align = 0, datablksize = SDIO_DATABLOCKSIZE_1BYTE, *ptempbuff = pwritebuffer;
  1008. uint32_t transbytes = 0, restwords = 0, response = 0;
  1009. __IO uint32_t timeout = 0;
  1010. if(NULL == pwritebuffer){
  1011. status = SD_PARAMETER_INVALID;
  1012. return status;
  1013. }
  1014. card_opration.transerror = SD_OK;
  1015. card_opration.transend = 0;
  1016. card_opration.totalnumber_bytes = 0;
  1017. /* clear all DSM configuration */
  1018. sdio_data_config(0, 0, SDIO_DATABLOCKSIZE_1BYTE);
  1019. sdio_data_transfer_config(SDIO_TRANSDIRECTION_TOCARD, SDIO_TRANSMODE_BLOCK);
  1020. sdio_dsm_disable();
  1021. sdio_dma_disable();
  1022. /* check whether the card is locked */
  1023. if(sdio_response_get(SDIO_RESPONSE0) & SD_CARDSTATE_LOCKED){
  1024. status = SD_LOCK_UNLOCK_FAILED;
  1025. return status;
  1026. }
  1027. /* blocksize is fixed in 512B for SDHC card */
  1028. if (SDIO_HIGH_CAPACITY_SD_CARD == card_opration.cardtype)
  1029. {
  1030. blocksize = 512;
  1031. writeaddr /= 512;
  1032. }
  1033. align = blocksize & (blocksize - 1);
  1034. if((blocksize > 0) && (blocksize <= 2048) && (0 == align)){
  1035. datablksize = sd_datablocksize_get(blocksize);
  1036. /* send CMD16(SET_BLOCKLEN) to set the block length */
  1037. sdio_command_response_config(SD_CMD_SET_BLOCKLEN, (uint32_t)blocksize, SDIO_RESPONSETYPE_SHORT);
  1038. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1039. sdio_csm_enable();
  1040. /* check if some error occurs */
  1041. status = r1_error_check(SD_CMD_SET_BLOCKLEN);
  1042. if(SD_OK != status){
  1043. return status;
  1044. }
  1045. }else{
  1046. status = SD_PARAMETER_INVALID;
  1047. return status;
  1048. }
  1049. /* send CMD13(SEND_STATUS), addressed card sends its status registers */
  1050. sdio_command_response_config(SD_CMD_SEND_STATUS, (uint32_t)card_opration.sd_rca << SD_RCA_SHIFT, SDIO_RESPONSETYPE_SHORT);
  1051. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1052. sdio_csm_enable();
  1053. /* check if some error occurs */
  1054. status = r1_error_check(SD_CMD_SEND_STATUS);
  1055. if(SD_OK != status){
  1056. return status;
  1057. }
  1058. response = sdio_response_get(SDIO_RESPONSE0);
  1059. timeout = 400000;
  1060. while((0 == (response & SD_R1_READY_FOR_DATA)) && (timeout > 0)){
  1061. /* continue to send CMD13 to polling the state of card until buffer empty or timeout */
  1062. --timeout;
  1063. /* send CMD13(SEND_STATUS), addressed card sends its status registers */
  1064. sdio_command_response_config(SD_CMD_SEND_STATUS, (uint32_t)card_opration.sd_rca << SD_RCA_SHIFT, SDIO_RESPONSETYPE_SHORT);
  1065. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1066. sdio_csm_enable();
  1067. /* check if some error occurs */
  1068. status = r1_error_check(SD_CMD_SEND_STATUS);
  1069. if(SD_OK != status){
  1070. return status;
  1071. }
  1072. response = sdio_response_get(SDIO_RESPONSE0);
  1073. }
  1074. if(0 == timeout){
  1075. return SD_ERROR;
  1076. }
  1077. /* send CMD24(WRITE_BLOCK) to write a block */
  1078. sdio_command_response_config(SD_CMD_WRITE_BLOCK, writeaddr, SDIO_RESPONSETYPE_SHORT);
  1079. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1080. sdio_csm_enable();
  1081. /* check if some error occurs */
  1082. status = r1_error_check(SD_CMD_WRITE_BLOCK);
  1083. if(SD_OK != status){
  1084. return status;
  1085. }
  1086. card_opration.stopcondition = 0;
  1087. card_opration.totalnumber_bytes = blocksize;
  1088. /* configure the SDIO data transmisson */
  1089. sdio_data_config(SD_DATATIMEOUT, card_opration.totalnumber_bytes, datablksize);
  1090. sdio_data_transfer_config(SDIO_TRANSDIRECTION_TOCARD, SDIO_TRANSMODE_BLOCK);
  1091. sdio_dsm_enable();
  1092. if(SD_POLLING_MODE == card_opration.transmode){
  1093. /* polling mode */
  1094. while(!sdio_flag_get(SDIO_FLAG_DTCRCERR | SDIO_FLAG_DTTMOUT | SDIO_FLAG_TXURE | SDIO_FLAG_DTBLKEND | SDIO_FLAG_STBITE)){
  1095. if(RESET != sdio_flag_get(SDIO_FLAG_TFH)){
  1096. /* at least 8 words can be written into the FIFO */
  1097. if((card_opration.totalnumber_bytes - transbytes) < SD_FIFOHALF_BYTES){
  1098. restwords = (card_opration.totalnumber_bytes - transbytes)/4 + (((card_opration.totalnumber_bytes - transbytes)%4 == 0) ? 0 : 1);
  1099. for(count = 0; count < restwords; count++){
  1100. sdio_data_write(*ptempbuff);
  1101. ++ptempbuff;
  1102. transbytes += 4;
  1103. }
  1104. }else{
  1105. for(count = 0; count < SD_FIFOHALF_WORDS; count++){
  1106. sdio_data_write(*(ptempbuff + count));
  1107. }
  1108. /* 8 words(32 bytes) has been transferred */
  1109. ptempbuff += SD_FIFOHALF_WORDS;
  1110. transbytes += SD_FIFOHALF_BYTES;
  1111. }
  1112. }
  1113. }
  1114. /* whether some error occurs and return it */
  1115. if(RESET != sdio_flag_get(SDIO_FLAG_DTCRCERR)){
  1116. status = SD_DATA_CRC_ERROR;
  1117. sdio_flag_clear(SDIO_FLAG_DTCRCERR);
  1118. return status;
  1119. }else if(RESET != sdio_flag_get(SDIO_FLAG_DTTMOUT)){
  1120. status = SD_DATA_TIMEOUT;
  1121. sdio_flag_clear(SDIO_FLAG_DTTMOUT);
  1122. return status;
  1123. }else if(RESET != sdio_flag_get(SDIO_FLAG_TXURE)){
  1124. status = SD_TX_UNDERRUN_ERROR;
  1125. sdio_flag_clear(SDIO_FLAG_TXURE);
  1126. return status;
  1127. }else if(RESET != sdio_flag_get(SDIO_FLAG_STBITE)){
  1128. status = SD_START_BIT_ERROR;
  1129. sdio_flag_clear(SDIO_FLAG_STBITE);
  1130. return status;
  1131. }
  1132. }else if(SD_DMA_MODE == card_opration.transmode){
  1133. /* DMA mode */
  1134. /* enable the SDIO corresponding interrupts and DMA */
  1135. sdio_interrupt_enable(SDIO_INT_DTCRCERR | SDIO_INT_DTTMOUT | SDIO_INT_TXURE | SDIO_INT_DTEND | SDIO_INT_STBITE);
  1136. dma_transfer_config(pwritebuffer, blocksize);
  1137. sdio_dma_enable();
  1138. #if SDIO_DMA_USE_IPC
  1139. sdio_dma_irq_config();
  1140. if (RT_EOK != rt_sem_take(&sd.sem, 100)) {
  1141. return SD_ERROR;
  1142. }
  1143. #else
  1144. timeout = 400000;
  1145. while((RESET == dma_flag_get(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_FLAG_FTF)) && (timeout > 0)){
  1146. timeout--;
  1147. if(0 == timeout){
  1148. return SD_ERROR;
  1149. }
  1150. }
  1151. #endif
  1152. while ((0 == card_opration.transend) && (SD_OK == card_opration.transerror)){
  1153. }
  1154. if (SD_OK != card_opration.transerror){
  1155. return card_opration.transerror;
  1156. }
  1157. }else{
  1158. status = SD_PARAMETER_INVALID;
  1159. return status;
  1160. }
  1161. /* clear the SDIO_INTC flags */
  1162. sdio_flag_clear(SDIO_MASK_INTC_FLAGS);
  1163. /* get the card state and wait the card is out of programming and receiving state */
  1164. status = sd_card_state_get(&cardstate);
  1165. while((SD_OK == status) && ((SD_CARDSTATE_PROGRAMMING == cardstate) || (SD_CARDSTATE_RECEIVING == cardstate))){
  1166. status = sd_card_state_get(&cardstate);
  1167. }
  1168. return status;
  1169. }
  1170. /*!
  1171. \brief write multiple blocks data to the specified address of a card
  1172. \param[in] pwritebuffer: a pointer that store multiple blocks data to be transferred
  1173. \param[in] writeaddr: the read data address
  1174. \param[in] blocksize: the data block size
  1175. \param[in] blocksnumber: number of blocks that will be written
  1176. \param[out] none
  1177. \retval sd_error_enum
  1178. */
  1179. sd_error_enum sd_multiblocks_write(uint32_t *pwritebuffer, uint32_t writeaddr, uint16_t blocksize, uint32_t blocksnumber)
  1180. {
  1181. /* initialize the variables */
  1182. sd_error_enum status = SD_OK;
  1183. uint8_t cardstate = 0;
  1184. uint32_t count = 0, align = 0, datablksize = SDIO_DATABLOCKSIZE_1BYTE, *ptempbuff = pwritebuffer;
  1185. uint32_t transbytes = 0, restwords = 0;
  1186. __IO uint32_t timeout = 0;
  1187. if(NULL == pwritebuffer){
  1188. status = SD_PARAMETER_INVALID;
  1189. return status;
  1190. }
  1191. card_opration.transerror = SD_OK;
  1192. card_opration.transend = 0;
  1193. card_opration.totalnumber_bytes = 0;
  1194. /* clear all DSM configuration */
  1195. sdio_data_config(0, 0, SDIO_DATABLOCKSIZE_1BYTE);
  1196. sdio_data_transfer_config(SDIO_TRANSDIRECTION_TOCARD, SDIO_TRANSMODE_BLOCK);
  1197. sdio_dsm_disable();
  1198. sdio_dma_disable();
  1199. /* check whether the card is locked */
  1200. if(sdio_response_get(SDIO_RESPONSE0) & SD_CARDSTATE_LOCKED){
  1201. status = SD_LOCK_UNLOCK_FAILED;
  1202. return status;
  1203. }
  1204. /* blocksize is fixed in 512B for SDHC card */
  1205. if (SDIO_HIGH_CAPACITY_SD_CARD == card_opration.cardtype)
  1206. {
  1207. blocksize = 512;
  1208. writeaddr /= 512;
  1209. }
  1210. align = blocksize & (blocksize - 1);
  1211. if((blocksize > 0) && (blocksize <= 2048) && (0 == align)){
  1212. datablksize = sd_datablocksize_get(blocksize);
  1213. /* send CMD16(SET_BLOCKLEN) to set the block length */
  1214. sdio_command_response_config(SD_CMD_SET_BLOCKLEN, (uint32_t)blocksize, SDIO_RESPONSETYPE_SHORT);
  1215. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1216. sdio_csm_enable();
  1217. /* check if some error occurs */
  1218. status = r1_error_check(SD_CMD_SET_BLOCKLEN);
  1219. if(SD_OK != status){
  1220. LOG_D("#st:%d\n", status);
  1221. return status;
  1222. }
  1223. }else{
  1224. status = SD_PARAMETER_INVALID;
  1225. return status;
  1226. }
  1227. /* send CMD13(SEND_STATUS), addressed card sends its status registers */
  1228. sdio_command_response_config(SD_CMD_SEND_STATUS, (uint32_t)card_opration.sd_rca << SD_RCA_SHIFT, SDIO_RESPONSETYPE_SHORT);
  1229. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1230. sdio_csm_enable();
  1231. /* check if some error occurs */
  1232. status = r1_error_check(SD_CMD_SEND_STATUS);
  1233. if(SD_OK != status){
  1234. return status;
  1235. }
  1236. if(blocksnumber > 1){
  1237. if(blocksnumber * blocksize > SD_MAX_DATA_LENGTH){
  1238. status = SD_PARAMETER_INVALID;
  1239. return status;
  1240. }
  1241. if((SDIO_STD_CAPACITY_SD_CARD_V1_1 == card_opration.cardtype) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == card_opration.cardtype) ||
  1242. (SDIO_HIGH_CAPACITY_SD_CARD == card_opration.cardtype)){
  1243. /* send CMD55(APP_CMD) to indicate next command is application specific command */
  1244. sdio_command_response_config(SD_CMD_APP_CMD, (uint32_t)card_opration.sd_rca << SD_RCA_SHIFT, SDIO_RESPONSETYPE_SHORT);
  1245. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1246. sdio_csm_enable();
  1247. /* check if some error occurs */
  1248. status = r1_error_check(SD_CMD_APP_CMD);
  1249. if(SD_OK != status){
  1250. return status;
  1251. }
  1252. /* send ACMD23(SET_WR_BLK_ERASE_COUNT) to set the number of write blocks to be preerased before writing */
  1253. sdio_command_response_config(SD_APPCMD_SET_WR_BLK_ERASE_COUNT, blocksnumber, SDIO_RESPONSETYPE_SHORT);
  1254. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1255. sdio_csm_enable();
  1256. /* check if some error occurs */
  1257. status = r1_error_check(SD_APPCMD_SET_WR_BLK_ERASE_COUNT);
  1258. if(SD_OK != status){
  1259. return status;
  1260. }
  1261. }
  1262. /* send CMD25(WRITE_MULTIPLE_BLOCK) to continuously write blocks of data */
  1263. sdio_command_response_config(SD_CMD_WRITE_MULTIPLE_BLOCK, writeaddr, SDIO_RESPONSETYPE_SHORT);
  1264. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1265. sdio_csm_enable();
  1266. /* check if some error occurs */
  1267. status = r1_error_check(SD_CMD_WRITE_MULTIPLE_BLOCK);
  1268. if(SD_OK != status){
  1269. return status;
  1270. }
  1271. card_opration.stopcondition = 1;
  1272. card_opration.totalnumber_bytes = blocksnumber * blocksize;
  1273. /* configure the SDIO data transmisson */
  1274. sdio_data_config(SD_DATATIMEOUT, card_opration.totalnumber_bytes, datablksize);
  1275. sdio_data_transfer_config(SDIO_TRANSDIRECTION_TOCARD, SDIO_TRANSMODE_BLOCK);
  1276. sdio_dsm_enable();
  1277. if(SD_POLLING_MODE == card_opration.transmode){
  1278. /* polling mode */
  1279. while(!sdio_flag_get(SDIO_FLAG_DTCRCERR | SDIO_FLAG_DTTMOUT | SDIO_FLAG_TXURE | SDIO_FLAG_DTEND | SDIO_FLAG_STBITE)){
  1280. if(RESET != sdio_flag_get(SDIO_FLAG_TFH)){
  1281. /* at least 8 words can be written into the FIFO */
  1282. if(!((card_opration.totalnumber_bytes - transbytes) < SD_FIFOHALF_BYTES)){
  1283. for(count = 0; count < SD_FIFOHALF_WORDS; count++){
  1284. sdio_data_write(*(ptempbuff + count));
  1285. }
  1286. /* 8 words(32 bytes) has been transferred */
  1287. ptempbuff += SD_FIFOHALF_WORDS;
  1288. transbytes += SD_FIFOHALF_BYTES;
  1289. }else{
  1290. restwords = (card_opration.totalnumber_bytes - transbytes)/4 + (((card_opration.totalnumber_bytes - transbytes)%4 == 0) ? 0 : 1);
  1291. for(count = 0; count < restwords; count++){
  1292. sdio_data_write(*ptempbuff);
  1293. ++ptempbuff;
  1294. transbytes += 4;
  1295. }
  1296. }
  1297. }
  1298. }
  1299. /* whether some error occurs and return it */
  1300. if(RESET != sdio_flag_get(SDIO_FLAG_DTCRCERR)){
  1301. status = SD_DATA_CRC_ERROR;
  1302. sdio_flag_clear(SDIO_FLAG_DTCRCERR);
  1303. return status;
  1304. }else if(RESET != sdio_flag_get(SDIO_FLAG_DTTMOUT)){
  1305. status = SD_DATA_TIMEOUT;
  1306. sdio_flag_clear(SDIO_FLAG_DTTMOUT);
  1307. return status;
  1308. }else if(RESET != sdio_flag_get(SDIO_FLAG_TXURE)){
  1309. status = SD_TX_UNDERRUN_ERROR;
  1310. sdio_flag_clear(SDIO_FLAG_TXURE);
  1311. return status;
  1312. }else if(RESET != sdio_flag_get(SDIO_FLAG_STBITE)){
  1313. status = SD_START_BIT_ERROR;
  1314. sdio_flag_clear(SDIO_FLAG_STBITE);
  1315. return status;
  1316. }
  1317. if(RESET != sdio_flag_get(SDIO_FLAG_DTEND)){
  1318. if((SDIO_STD_CAPACITY_SD_CARD_V1_1 == card_opration.cardtype) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == card_opration.cardtype) ||
  1319. (SDIO_HIGH_CAPACITY_SD_CARD == card_opration.cardtype)){
  1320. /* send CMD12(STOP_TRANSMISSION) to stop transmission */
  1321. sdio_command_response_config(SD_CMD_STOP_TRANSMISSION, (uint32_t)0x0, SDIO_RESPONSETYPE_SHORT);
  1322. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1323. sdio_csm_enable();
  1324. /* check if some error occurs */
  1325. status = r1_error_check(SD_CMD_STOP_TRANSMISSION);
  1326. if(SD_OK != status){
  1327. return status;
  1328. }
  1329. }
  1330. }
  1331. sdio_flag_clear(SDIO_MASK_INTC_FLAGS);
  1332. }else if(SD_DMA_MODE == card_opration.transmode){
  1333. /* DMA mode */
  1334. /* enable SDIO corresponding interrupts and DMA */
  1335. sdio_interrupt_enable(SDIO_INT_DTCRCERR | SDIO_INT_DTTMOUT | SDIO_INT_TXURE | SDIO_INT_DTEND | SDIO_INT_STBITE);
  1336. sdio_dma_enable();
  1337. dma_transfer_config(pwritebuffer, card_opration.totalnumber_bytes);
  1338. #if SDIO_DMA_USE_IPC
  1339. sdio_dma_irq_config();
  1340. if (RT_EOK != rt_sem_take(&sd.sem, 100)) {
  1341. return SD_ERROR;
  1342. }
  1343. #else
  1344. timeout = 400000;
  1345. while((RESET == dma_flag_get(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_FLAG_FTF) && (timeout > 0))){
  1346. timeout--;
  1347. if(0 == timeout){
  1348. return SD_ERROR;
  1349. }
  1350. }
  1351. #endif
  1352. while((0 == card_opration.transend) && (SD_OK == card_opration.transerror)){
  1353. }
  1354. if(SD_OK != card_opration.transerror){
  1355. return card_opration.transerror;
  1356. }
  1357. }else{
  1358. status = SD_PARAMETER_INVALID;
  1359. return status;
  1360. }
  1361. }
  1362. /* clear the SDIO_INTC flags */
  1363. sdio_flag_clear(SDIO_MASK_INTC_FLAGS);
  1364. /* get the card state and wait the card is out of programming and receiving state */
  1365. status = sd_card_state_get(&cardstate);
  1366. while((SD_OK == status) && ((SD_CARDSTATE_PROGRAMMING == cardstate) || (SD_CARDSTATE_RECEIVING == cardstate))){
  1367. status = sd_card_state_get(&cardstate);
  1368. }
  1369. return status;
  1370. }
  1371. /*!
  1372. \brief erase a continuous area of a card
  1373. \param[in] startaddr: the start address
  1374. \param[in] endaddr: the end address
  1375. \param[out] none
  1376. \retval sd_error_enum
  1377. */
  1378. sd_error_enum sd_erase(uint32_t startaddr, uint32_t endaddr)
  1379. {
  1380. /* initialize the variables */
  1381. sd_error_enum status = SD_OK;
  1382. uint32_t count = 0, clkdiv = 0;
  1383. __IO uint32_t delay = 0;
  1384. uint8_t cardstate = 0, tempbyte = 0;
  1385. uint16_t tempccc = 0;
  1386. /* get the card command classes from CSD */
  1387. tempbyte = (uint8_t)((card_opration.sd_csd[1] & SD_MASK_24_31BITS) >> 24);
  1388. tempccc = (uint16_t)((uint16_t)tempbyte << 4);
  1389. tempbyte = (uint8_t)((card_opration.sd_csd[1] & SD_MASK_16_23BITS) >> 16);
  1390. tempccc |= (uint16_t)((uint16_t)(tempbyte & 0xF0) >> 4);
  1391. if(0 == (tempccc & SD_CCC_ERASE)){
  1392. /* don't support the erase command */
  1393. status = SD_FUNCTION_UNSUPPORTED;
  1394. return status;
  1395. }
  1396. clkdiv = (SDIO_CLKCTL & SDIO_CLKCTL_DIV);
  1397. clkdiv += ((SDIO_CLKCTL & SDIO_CLKCTL_DIV8)>>31)*256;
  1398. clkdiv += 2;
  1399. delay = 168000 / clkdiv;
  1400. /* check whether the card is locked */
  1401. if (sdio_response_get(SDIO_RESPONSE0) & SD_CARDSTATE_LOCKED)
  1402. {
  1403. status = SD_LOCK_UNLOCK_FAILED;
  1404. return(status);
  1405. }
  1406. /* blocksize is fixed in 512B for SDHC card */
  1407. if (SDIO_HIGH_CAPACITY_SD_CARD == card_opration.cardtype)
  1408. {
  1409. startaddr /= 512;
  1410. endaddr /= 512;
  1411. }
  1412. if((SDIO_STD_CAPACITY_SD_CARD_V1_1 == card_opration.cardtype) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == card_opration.cardtype) ||
  1413. (SDIO_HIGH_CAPACITY_SD_CARD == card_opration.cardtype)){
  1414. /* send CMD32(ERASE_WR_BLK_START) to set the address of the first write block to be erased */
  1415. sdio_command_response_config(SD_CMD_ERASE_WR_BLK_START, startaddr, SDIO_RESPONSETYPE_SHORT);
  1416. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1417. sdio_csm_enable();
  1418. /* check if some error occurs */
  1419. status = r1_error_check(SD_CMD_ERASE_WR_BLK_START);
  1420. if(SD_OK != status){
  1421. return status;
  1422. }
  1423. /* send CMD33(ERASE_WR_BLK_END) to set the address of the last write block of the continuous range to be erased */
  1424. sdio_command_response_config(SD_CMD_ERASE_WR_BLK_END, endaddr, SDIO_RESPONSETYPE_SHORT);
  1425. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1426. sdio_csm_enable();
  1427. /* check if some error occurs */
  1428. status = r1_error_check(SD_CMD_ERASE_WR_BLK_END);
  1429. if(SD_OK != status){
  1430. return status;
  1431. }
  1432. }
  1433. /* send CMD38(ERASE) to set the address of the first write block to be erased */
  1434. sdio_command_response_config(SD_CMD_ERASE, (uint32_t)0x0, SDIO_RESPONSETYPE_SHORT);
  1435. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1436. sdio_csm_enable();
  1437. /* check if some error occurs */
  1438. status = r1_error_check(SD_CMD_ERASE);
  1439. if(SD_OK != status){
  1440. return status;
  1441. }
  1442. /* loop until the counter is reach to the calculated time */
  1443. for(count = 0; count < delay; count++){
  1444. }
  1445. /* get the card state and wait the card is out of programming and receiving state */
  1446. status = sd_card_state_get(&cardstate);
  1447. while((SD_OK == status) && ((SD_CARDSTATE_PROGRAMMING == cardstate) || (SD_CARDSTATE_RECEIVING == cardstate))){
  1448. status = sd_card_state_get(&cardstate);
  1449. }
  1450. return status;
  1451. }
  1452. /*!
  1453. \brief process all the interrupts which the corresponding flags are set
  1454. \param[in] none
  1455. \param[out] none
  1456. \retval sd_error_enum
  1457. */
  1458. sd_error_enum sd_interrupts_process(void)
  1459. {
  1460. card_opration.transerror = SD_OK;
  1461. if(RESET != sdio_interrupt_flag_get(SDIO_INT_DTEND)){
  1462. /* send CMD12 to stop data transfer in multipule blocks operation */
  1463. if(1 == card_opration.stopcondition){
  1464. card_opration.transerror = sd_transfer_stop();
  1465. }else{
  1466. card_opration.transerror = SD_OK;
  1467. }
  1468. sdio_interrupt_flag_clear(SDIO_INT_DTEND);
  1469. /* disable all the interrupts */
  1470. sdio_interrupt_disable(SDIO_INT_DTCRCERR | SDIO_INT_DTTMOUT | SDIO_INT_DTEND | SDIO_INT_STBITE |
  1471. SDIO_INT_TFH | SDIO_INT_RFH | SDIO_INT_TXURE | SDIO_INT_RXORE);
  1472. card_opration.transend = 1;
  1473. card_opration.number_bytes = 0;
  1474. return card_opration.transerror;
  1475. }
  1476. if(RESET != sdio_interrupt_flag_get(SDIO_INT_DTCRCERR)){
  1477. sdio_interrupt_flag_clear(SDIO_INT_DTCRCERR);
  1478. /* disable all the interrupts */
  1479. sdio_interrupt_disable(SDIO_INT_DTCRCERR | SDIO_INT_DTTMOUT | SDIO_INT_DTEND | SDIO_INT_STBITE |
  1480. SDIO_INT_TFH | SDIO_INT_RFH | SDIO_INT_TXURE | SDIO_INT_RXORE);
  1481. card_opration.number_bytes = 0;
  1482. card_opration.transerror = SD_DATA_CRC_ERROR;
  1483. return card_opration.transerror;
  1484. }
  1485. if(RESET != sdio_interrupt_flag_get(SDIO_INT_DTTMOUT)){
  1486. sdio_interrupt_flag_clear(SDIO_INT_DTTMOUT);
  1487. /* disable all the interrupts */
  1488. sdio_interrupt_disable(SDIO_INT_DTCRCERR | SDIO_INT_DTTMOUT | SDIO_INT_DTEND | SDIO_INT_STBITE |
  1489. SDIO_INT_TFH | SDIO_INT_RFH | SDIO_INT_TXURE | SDIO_INT_RXORE);
  1490. card_opration.number_bytes = 0;
  1491. card_opration.transerror = SD_DATA_TIMEOUT;
  1492. return card_opration.transerror;
  1493. }
  1494. if(RESET != sdio_interrupt_flag_get(SDIO_INT_STBITE)){
  1495. sdio_interrupt_flag_clear(SDIO_INT_STBITE);
  1496. /* disable all the interrupts */
  1497. sdio_interrupt_disable(SDIO_INT_DTCRCERR | SDIO_INT_DTTMOUT | SDIO_INT_DTEND | SDIO_INT_STBITE |
  1498. SDIO_INT_TFH | SDIO_INT_RFH | SDIO_INT_TXURE | SDIO_INT_RXORE);
  1499. card_opration.number_bytes = 0;
  1500. card_opration.transerror = SD_START_BIT_ERROR;
  1501. return card_opration.transerror;
  1502. }
  1503. if(RESET != sdio_interrupt_flag_get(SDIO_INT_TXURE)){
  1504. sdio_interrupt_flag_clear(SDIO_INT_TXURE);
  1505. /* disable all the interrupts */
  1506. sdio_interrupt_disable(SDIO_INT_DTCRCERR | SDIO_INT_DTTMOUT | SDIO_INT_DTEND | SDIO_INT_STBITE |
  1507. SDIO_INT_TFH | SDIO_INT_RFH | SDIO_INT_TXURE | SDIO_INT_RXORE);
  1508. card_opration.number_bytes = 0;
  1509. card_opration.transerror = SD_TX_UNDERRUN_ERROR;
  1510. return card_opration.transerror;
  1511. }
  1512. if(RESET != sdio_interrupt_flag_get(SDIO_INT_RXORE)){
  1513. sdio_interrupt_flag_clear(SDIO_INT_RXORE);
  1514. /* disable all the interrupts */
  1515. sdio_interrupt_disable(SDIO_INT_DTCRCERR | SDIO_INT_DTTMOUT | SDIO_INT_DTEND | SDIO_INT_STBITE |
  1516. SDIO_INT_TFH | SDIO_INT_RFH | SDIO_INT_TXURE | SDIO_INT_RXORE);
  1517. card_opration.number_bytes = 0;
  1518. card_opration.transerror = SD_RX_OVERRUN_ERROR;
  1519. return card_opration.transerror;
  1520. }
  1521. return card_opration.transerror;
  1522. }
  1523. /*!
  1524. \brief select or deselect a card
  1525. \param[in] cardrca: the RCA of a card
  1526. \param[out] none
  1527. \retval sd_error_enum
  1528. */
  1529. sd_error_enum sd_card_select_deselect(uint16_t cardrca)
  1530. {
  1531. sd_error_enum status = SD_OK;
  1532. /* send CMD7(SELECT/DESELECT_CARD) to select or deselect the card */
  1533. sdio_command_response_config(SD_CMD_SELECT_DESELECT_CARD, (uint32_t)(cardrca << SD_RCA_SHIFT), SDIO_RESPONSETYPE_SHORT);
  1534. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1535. sdio_csm_enable();
  1536. status = r1_error_check(SD_CMD_SELECT_DESELECT_CARD);
  1537. return status;
  1538. }
  1539. /*!
  1540. \brief get the card status whose response format R1 contains a 32-bit field
  1541. \param[in] none
  1542. \param[out] pcardstatus: a pointer that store card status
  1543. \retval sd_error_enum
  1544. */
  1545. sd_error_enum sd_cardstatus_get(uint32_t *pcardstatus)
  1546. {
  1547. sd_error_enum status = SD_OK;
  1548. if(NULL == pcardstatus){
  1549. status = SD_PARAMETER_INVALID;
  1550. return status;
  1551. }
  1552. /* send CMD13(SEND_STATUS), addressed card sends its status register */
  1553. sdio_command_response_config(SD_CMD_SEND_STATUS, (uint32_t)card_opration.sd_rca << SD_RCA_SHIFT, SDIO_RESPONSETYPE_SHORT);
  1554. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1555. sdio_csm_enable();
  1556. /* check if some error occurs */
  1557. status = r1_error_check(SD_CMD_SEND_STATUS);
  1558. if(SD_OK != status){
  1559. return status;
  1560. }
  1561. *pcardstatus = sdio_response_get(SDIO_RESPONSE0);
  1562. return status;
  1563. }
  1564. /*!
  1565. \brief get the SD status, the size of the SD status is one data block of 512 bit
  1566. \param[in] none
  1567. \param[out] psdstatus: a pointer that store SD card status
  1568. \retval sd_error_enum
  1569. */
  1570. sd_error_enum sd_sdstatus_get(uint32_t *psdstatus)
  1571. {
  1572. sd_error_enum status = SD_OK;
  1573. uint32_t count = 0;
  1574. /* check whether the card is locked */
  1575. if (sdio_response_get(SDIO_RESPONSE0) & SD_CARDSTATE_LOCKED){
  1576. status = SD_LOCK_UNLOCK_FAILED;
  1577. return(status);
  1578. }
  1579. /* send CMD16(SET_BLOCKLEN) to set the block length */
  1580. sdio_command_response_config(SD_CMD_SET_BLOCKLEN, (uint32_t)64, SDIO_RESPONSETYPE_SHORT);
  1581. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1582. sdio_csm_enable();
  1583. /* check if some error occurs */
  1584. status = r1_error_check(SD_CMD_SET_BLOCKLEN);
  1585. if(SD_OK != status){
  1586. return status;
  1587. }
  1588. /* send CMD55(APP_CMD) to indicate next command is application specific command */
  1589. sdio_command_response_config(SD_CMD_APP_CMD, (uint32_t)card_opration.sd_rca << SD_RCA_SHIFT, SDIO_RESPONSETYPE_SHORT);
  1590. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1591. sdio_csm_enable();
  1592. /* check if some error occurs */
  1593. status = r1_error_check(SD_CMD_APP_CMD);
  1594. if(SD_OK != status){
  1595. return status;
  1596. }
  1597. /* configure the SDIO data transmisson */
  1598. sdio_data_config(SD_DATATIMEOUT, (uint32_t)64, SDIO_DATABLOCKSIZE_64BYTES);
  1599. sdio_data_transfer_config(SDIO_TRANSDIRECTION_TOSDIO, SDIO_TRANSMODE_BLOCK);
  1600. sdio_dsm_enable();
  1601. /* send ACMD13(SD_STATUS) to get the SD status */
  1602. sdio_command_response_config(SD_APPCMD_SD_STATUS, (uint32_t)0x0, SDIO_RESPONSETYPE_SHORT);
  1603. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1604. sdio_csm_enable();
  1605. /* check if some error occurs */
  1606. status = r1_error_check(SD_APPCMD_SD_STATUS);
  1607. if(SD_OK != status){
  1608. return status;
  1609. }
  1610. while(!sdio_flag_get(SDIO_FLAG_DTCRCERR | SDIO_FLAG_DTTMOUT | SDIO_FLAG_RXORE | SDIO_FLAG_DTBLKEND | SDIO_FLAG_STBITE)){
  1611. if(RESET != sdio_flag_get(SDIO_FLAG_RFH)){
  1612. for(count = 0; count < SD_FIFOHALF_WORDS; count++){
  1613. *(psdstatus + count) = sdio_data_read();
  1614. }
  1615. psdstatus += SD_FIFOHALF_WORDS;
  1616. }
  1617. }
  1618. /* whether some error occurs and return it */
  1619. if(RESET != sdio_flag_get(SDIO_FLAG_DTCRCERR)){
  1620. status = SD_DATA_CRC_ERROR;
  1621. sdio_flag_clear(SDIO_FLAG_DTCRCERR);
  1622. return status;
  1623. }else if(RESET != sdio_flag_get(SDIO_FLAG_DTTMOUT)){
  1624. status = SD_DATA_TIMEOUT;
  1625. sdio_flag_clear(SDIO_FLAG_DTTMOUT);
  1626. return status;
  1627. }else if(RESET != sdio_flag_get(SDIO_FLAG_RXORE)){
  1628. status = SD_RX_OVERRUN_ERROR;
  1629. sdio_flag_clear(SDIO_FLAG_RXORE);
  1630. return status;
  1631. }else if(RESET != sdio_flag_get(SDIO_FLAG_STBITE)){
  1632. status = SD_START_BIT_ERROR;
  1633. sdio_flag_clear(SDIO_FLAG_STBITE);
  1634. return status;
  1635. }
  1636. while(RESET != sdio_flag_get(SDIO_FLAG_RXDTVAL)){
  1637. *psdstatus = sdio_data_read();
  1638. ++psdstatus;
  1639. }
  1640. /* clear the SDIO_INTC flags */
  1641. sdio_flag_clear(SDIO_MASK_INTC_FLAGS);
  1642. psdstatus -= 16;
  1643. for(count = 0; count < 16; count++){
  1644. psdstatus[count] = ((psdstatus[count] & SD_MASK_0_7BITS) << 24) |((psdstatus[count] & SD_MASK_8_15BITS) << 8) |
  1645. ((psdstatus[count] & SD_MASK_16_23BITS) >> 8) |((psdstatus[count] & SD_MASK_24_31BITS) >> 24);
  1646. }
  1647. return status;
  1648. }
  1649. /*!
  1650. \brief stop an ongoing data transfer
  1651. \param[in] none
  1652. \param[out] none
  1653. \retval sd_error_enum
  1654. */
  1655. sd_error_enum sd_transfer_stop(void)
  1656. {
  1657. sd_error_enum status = SD_OK;
  1658. /* send CMD12(STOP_TRANSMISSION) to stop transmission */
  1659. sdio_command_response_config(SD_CMD_STOP_TRANSMISSION, (uint32_t)0x0, SDIO_RESPONSETYPE_SHORT);
  1660. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1661. sdio_csm_enable();
  1662. /* check if some error occurs */
  1663. status = r1_error_check(SD_CMD_STOP_TRANSMISSION);
  1664. return status;
  1665. }
  1666. /*!
  1667. \brief lock or unlock a card
  1668. \param[in] lockstate: the lock state
  1669. \arg SD_LOCK: lock the SD card
  1670. \arg SD_UNLOCK: unlock the SD card
  1671. \param[out] none
  1672. \retval sd_error_enum
  1673. */
  1674. sd_error_enum sd_lock_unlock(uint8_t lockstate)
  1675. {
  1676. sd_error_enum status = SD_OK;
  1677. uint8_t cardstate = 0, tempbyte = 0;
  1678. uint32_t pwd1 = 0, pwd2 = 0, response = 0, timeout = 0;
  1679. uint16_t tempccc = 0;
  1680. /* get the card command classes from CSD */
  1681. tempbyte = (uint8_t)((card_opration.sd_csd[1] & SD_MASK_24_31BITS) >> 24);
  1682. tempccc = (uint16_t)((uint16_t)tempbyte << 4);
  1683. tempbyte = (uint8_t)((card_opration.sd_csd[1] & SD_MASK_16_23BITS) >> 16);
  1684. tempccc |= (uint16_t)((uint16_t)(tempbyte & 0xF0) >> 4);
  1685. if(0 == (tempccc & SD_CCC_LOCK_CARD)){
  1686. /* don't support the lock command */
  1687. status = SD_FUNCTION_UNSUPPORTED;
  1688. return status;
  1689. }
  1690. /* password pattern */
  1691. pwd1 = (0x01020600|lockstate);
  1692. pwd2 = 0x03040506;
  1693. /* clear all DSM configuration */
  1694. sdio_data_config(0, 0, SDIO_DATABLOCKSIZE_1BYTE);
  1695. sdio_data_transfer_config(SDIO_TRANSDIRECTION_TOCARD, SDIO_TRANSMODE_BLOCK);
  1696. sdio_dsm_disable();
  1697. sdio_dma_disable();
  1698. /* send CMD16(SET_BLOCKLEN) to set the block length */
  1699. sdio_command_response_config(SD_CMD_SET_BLOCKLEN, (uint32_t)8, SDIO_RESPONSETYPE_SHORT);
  1700. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1701. sdio_csm_enable();
  1702. /* check if some error occurs */
  1703. status = r1_error_check(SD_CMD_SET_BLOCKLEN);
  1704. if(SD_OK != status){
  1705. return status;
  1706. }
  1707. /* send CMD13(SEND_STATUS), addressed card sends its status register */
  1708. sdio_command_response_config(SD_CMD_SEND_STATUS, (uint32_t)card_opration.sd_rca << SD_RCA_SHIFT, SDIO_RESPONSETYPE_SHORT);
  1709. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1710. sdio_csm_enable();
  1711. /* check if some error occurs */
  1712. status = r1_error_check(SD_CMD_SEND_STATUS);
  1713. if(SD_OK != status){
  1714. return status;
  1715. }
  1716. response = sdio_response_get(SDIO_RESPONSE0);
  1717. timeout = 400000;
  1718. while((0 == (response & SD_R1_READY_FOR_DATA)) && (timeout > 0)){
  1719. /* continue to send CMD13 to polling the state of card until buffer empty or timeout */
  1720. --timeout;
  1721. /* send CMD13(SEND_STATUS), addressed card sends its status registers */
  1722. sdio_command_response_config(SD_CMD_SEND_STATUS, (uint32_t)card_opration.sd_rca << SD_RCA_SHIFT, SDIO_RESPONSETYPE_SHORT);
  1723. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1724. sdio_csm_enable();
  1725. /* check if some error occurs */
  1726. status = r1_error_check(SD_CMD_SEND_STATUS);
  1727. if(SD_OK != status){
  1728. return status;
  1729. }
  1730. response = sdio_response_get(SDIO_RESPONSE0);
  1731. }
  1732. if(0 == timeout){
  1733. return SD_ERROR;
  1734. }
  1735. /* send CMD42(LOCK_UNLOCK) to set/reset the password or lock/unlock the card */
  1736. sdio_command_response_config(SD_CMD_LOCK_UNLOCK, (uint32_t)0x0, SDIO_RESPONSETYPE_SHORT);
  1737. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  1738. sdio_csm_enable();
  1739. /* check if some error occurs */
  1740. status = r1_error_check(SD_CMD_LOCK_UNLOCK);
  1741. if(SD_OK != status){
  1742. return status;
  1743. }
  1744. response = sdio_response_get(SDIO_RESPONSE0);
  1745. /* configure the SDIO data transmisson */
  1746. sdio_data_config(SD_DATATIMEOUT, (uint32_t)8, SDIO_DATABLOCKSIZE_8BYTES);
  1747. sdio_data_transfer_config(SDIO_TRANSDIRECTION_TOCARD, SDIO_TRANSMODE_BLOCK);
  1748. sdio_dsm_enable();
  1749. /* write password pattern */
  1750. sdio_data_write(pwd1);
  1751. sdio_data_write(pwd2);
  1752. /* whether some error occurs and return it */
  1753. if(RESET != sdio_flag_get(SDIO_FLAG_DTCRCERR)){
  1754. status = SD_DATA_CRC_ERROR;
  1755. sdio_flag_clear(SDIO_FLAG_DTCRCERR);
  1756. return status;
  1757. }else if(RESET != sdio_flag_get(SDIO_FLAG_DTTMOUT)){
  1758. status = SD_DATA_TIMEOUT;
  1759. sdio_flag_clear(SDIO_FLAG_DTTMOUT);
  1760. return status;
  1761. }else if(RESET != sdio_flag_get(SDIO_FLAG_TXURE)){
  1762. status = SD_TX_UNDERRUN_ERROR;
  1763. sdio_flag_clear(SDIO_FLAG_TXURE);
  1764. return status;
  1765. }else if(RESET != sdio_flag_get(SDIO_FLAG_STBITE)){
  1766. status = SD_START_BIT_ERROR;
  1767. sdio_flag_clear(SDIO_FLAG_STBITE);
  1768. return status;
  1769. }
  1770. /* clear the SDIO_INTC flags */
  1771. sdio_flag_clear(SDIO_MASK_INTC_FLAGS);
  1772. /* get the card state and wait the card is out of programming and receiving state */
  1773. status = sd_card_state_get(&cardstate);
  1774. while((SD_OK == status) && ((SD_CARDSTATE_PROGRAMMING == cardstate) || (SD_CARDSTATE_RECEIVING == cardstate))){
  1775. status = sd_card_state_get(&cardstate);
  1776. }
  1777. return status;
  1778. }
  1779. /*!
  1780. \brief get the data transfer state
  1781. \param[in] none
  1782. \param[out] none
  1783. \retval sd_error_enum
  1784. */
  1785. sd_transfer_state_enum sd_transfer_state_get(void)
  1786. {
  1787. sd_transfer_state_enum transtate = SD_NO_TRANSFER;
  1788. if(RESET != sdio_flag_get(SDIO_FLAG_TXRUN | SDIO_FLAG_RXRUN)){
  1789. transtate = SD_TRANSFER_IN_PROGRESS;
  1790. }
  1791. return transtate;
  1792. }
  1793. /*!
  1794. \brief get SD card capacity
  1795. \param[in] none
  1796. \param[out] none
  1797. \retval capacity of the card(KB)
  1798. */
  1799. uint32_t sd_card_capacity_get(void)
  1800. {
  1801. uint8_t tempbyte = 0, devicesize_mult = 0, readblklen = 0;
  1802. uint32_t capacity = 0, devicesize = 0;
  1803. if((SDIO_STD_CAPACITY_SD_CARD_V1_1 == card_opration.cardtype) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == card_opration.cardtype)){
  1804. /* calculate the c_size(device size) */
  1805. tempbyte = (uint8_t)((card_opration.sd_csd[1] & SD_MASK_8_15BITS) >> 8);
  1806. devicesize |= (uint32_t)((uint32_t)(tempbyte & 0x03) << 10);
  1807. tempbyte = (uint8_t)(card_opration.sd_csd[1] & SD_MASK_0_7BITS);
  1808. devicesize |= (uint32_t)((uint32_t)tempbyte << 2);
  1809. tempbyte = (uint8_t)((card_opration.sd_csd[2] & SD_MASK_24_31BITS) >> 24);
  1810. devicesize |= (uint32_t)((uint32_t)(tempbyte & 0xC0) >> 6);
  1811. /* calculate the c_size_mult(device size multiplier) */
  1812. tempbyte = (uint8_t)((card_opration.sd_csd[2] & SD_MASK_16_23BITS) >> 16);
  1813. devicesize_mult = (tempbyte & 0x03) << 1;
  1814. tempbyte = (uint8_t)((card_opration.sd_csd[2] & SD_MASK_8_15BITS) >> 8);
  1815. devicesize_mult |= (tempbyte & 0x80) >> 7;
  1816. /* calculate the read_bl_len */
  1817. tempbyte = (uint8_t)((card_opration.sd_csd[1] & SD_MASK_16_23BITS) >> 16);
  1818. readblklen = tempbyte & 0x0F;
  1819. /* capacity = BLOCKNR*BLOCK_LEN, BLOCKNR = (C_SIZE+1)*MULT, MULT = 2^(C_SIZE_MULT+2), BLOCK_LEN = 2^READ_BL_LEN */
  1820. capacity = (devicesize + 1)*(1 << (devicesize_mult + 2));
  1821. capacity *= (1 << readblklen);
  1822. /* change the unit of capacity to KByte */
  1823. capacity /= 1024;
  1824. }else if(SDIO_HIGH_CAPACITY_SD_CARD == card_opration.cardtype){
  1825. /* calculate the c_size */
  1826. tempbyte = (uint8_t)(card_opration.sd_csd[1] & SD_MASK_0_7BITS);
  1827. devicesize = (uint32_t)((uint32_t)(tempbyte & 0x3F) << 16);
  1828. tempbyte = (uint8_t)((card_opration.sd_csd[2] & SD_MASK_24_31BITS) >> 24);
  1829. devicesize |= (uint32_t)((uint32_t)tempbyte << 8);
  1830. tempbyte = (uint8_t)((card_opration.sd_csd[2] & SD_MASK_16_23BITS) >> 16);
  1831. devicesize |= (uint32_t)tempbyte;
  1832. /* capacity = (c_size+1)*512KByte */
  1833. capacity = (devicesize + 1)*512;
  1834. }
  1835. return capacity;
  1836. }
  1837. /*!
  1838. \brief get the detailed information of the SD card based on received CID and CSD
  1839. \param[in] none
  1840. \param[out] pcardinfo: a pointer that store the detailed card information
  1841. \retval sd_error_enum
  1842. */
  1843. sd_error_enum sd_card_information_get(sd_card_info_struct *pcardinfo)
  1844. {
  1845. sd_error_enum status = SD_OK;
  1846. uint8_t tempbyte = 0;
  1847. if(NULL == pcardinfo){
  1848. status = SD_PARAMETER_INVALID;
  1849. return status;
  1850. }
  1851. /* store the card type and RCA */
  1852. pcardinfo->card_type = card_opration.cardtype;
  1853. pcardinfo->card_rca = card_opration.sd_rca;
  1854. /* CID byte 0 */
  1855. tempbyte = (uint8_t)((card_opration.sd_cid[0] & SD_MASK_24_31BITS) >> 24);
  1856. pcardinfo->card_cid.mid = tempbyte;
  1857. /* CID byte 1 */
  1858. tempbyte = (uint8_t)((card_opration.sd_cid[0] & SD_MASK_16_23BITS) >> 16);
  1859. pcardinfo->card_cid.oid = (uint16_t)((uint16_t)tempbyte << 8);
  1860. /* CID byte 2 */
  1861. tempbyte = (uint8_t)((card_opration.sd_cid[0] & SD_MASK_8_15BITS) >> 8);
  1862. pcardinfo->card_cid.oid |= (uint16_t)tempbyte;
  1863. /* CID byte 3 */
  1864. tempbyte = (uint8_t)(card_opration.sd_cid[0] & SD_MASK_0_7BITS);
  1865. pcardinfo->card_cid.pnm0 = (uint32_t)((uint32_t)tempbyte << 24);
  1866. /* CID byte 4 */
  1867. tempbyte = (uint8_t)((card_opration.sd_cid[1] & SD_MASK_24_31BITS) >> 24);
  1868. pcardinfo->card_cid.pnm0 |= (uint32_t)((uint32_t)tempbyte << 16);
  1869. /* CID byte 5 */
  1870. tempbyte = (uint8_t)((card_opration.sd_cid[1] & SD_MASK_16_23BITS) >> 16);
  1871. pcardinfo->card_cid.pnm0 |= (uint32_t)((uint32_t)tempbyte << 8);
  1872. /* CID byte 6 */
  1873. tempbyte = (uint8_t)((card_opration.sd_cid[1] & SD_MASK_8_15BITS) >> 8);
  1874. pcardinfo->card_cid.pnm0 |= (uint32_t)(tempbyte);
  1875. /* CID byte 7 */
  1876. tempbyte = (uint8_t)(card_opration.sd_cid[1] & SD_MASK_0_7BITS);
  1877. pcardinfo->card_cid.pnm1 = tempbyte;
  1878. /* CID byte 8 */
  1879. tempbyte = (uint8_t)((card_opration.sd_cid[2] & SD_MASK_24_31BITS) >> 24);
  1880. pcardinfo->card_cid.prv = tempbyte;
  1881. /* CID byte 9 */
  1882. tempbyte = (uint8_t)((card_opration.sd_cid[2] & SD_MASK_16_23BITS) >> 16);
  1883. pcardinfo->card_cid.psn = (uint32_t)((uint32_t)tempbyte << 24);
  1884. /* CID byte 10 */
  1885. tempbyte = (uint8_t)((card_opration.sd_cid[2] & SD_MASK_8_15BITS) >> 8);
  1886. pcardinfo->card_cid.psn |= (uint32_t)((uint32_t)tempbyte << 16);
  1887. /* CID byte 11 */
  1888. tempbyte = (uint8_t)(card_opration.sd_cid[2] & SD_MASK_0_7BITS);
  1889. pcardinfo->card_cid.psn |= (uint32_t)tempbyte;
  1890. /* CID byte 12 */
  1891. tempbyte = (uint8_t)((card_opration.sd_cid[3] & SD_MASK_24_31BITS) >> 24);
  1892. pcardinfo->card_cid.psn |= (uint32_t)tempbyte;
  1893. /* CID byte 13 */
  1894. tempbyte = (uint8_t)((card_opration.sd_cid[3] & SD_MASK_16_23BITS) >> 16);
  1895. pcardinfo->card_cid.mdt = (uint16_t)((uint16_t)(tempbyte & 0x0F) << 8);
  1896. /* CID byte 14 */
  1897. tempbyte = (uint8_t)((card_opration.sd_cid[3] & SD_MASK_8_15BITS) >> 8);
  1898. pcardinfo->card_cid.mdt |= (uint16_t)tempbyte;
  1899. /* CID byte 15 */
  1900. tempbyte = (uint8_t)(card_opration.sd_cid[3] & SD_MASK_0_7BITS);
  1901. pcardinfo->card_cid.cid_crc = (tempbyte & 0xFE) >> 1;
  1902. /* CSD byte 0 */
  1903. tempbyte = (uint8_t)((card_opration.sd_csd[0] & SD_MASK_24_31BITS) >> 24);
  1904. pcardinfo->card_csd.csd_struct = (tempbyte & 0xC0) >> 6;
  1905. /* CSD byte 1 */
  1906. tempbyte = (uint8_t)((card_opration.sd_csd[0] & SD_MASK_16_23BITS) >> 16);
  1907. pcardinfo->card_csd.taac = tempbyte;
  1908. /* CSD byte 2 */
  1909. tempbyte = (uint8_t)((card_opration.sd_csd[0] & SD_MASK_8_15BITS) >> 8);
  1910. pcardinfo->card_csd.nsac = tempbyte;
  1911. /* CSD byte 3 */
  1912. tempbyte = (uint8_t)(card_opration.sd_csd[0] & SD_MASK_0_7BITS);
  1913. pcardinfo->card_csd.tran_speed = tempbyte;
  1914. /* CSD byte 4 */
  1915. tempbyte = (uint8_t)((card_opration.sd_csd[1] & SD_MASK_24_31BITS) >> 24);
  1916. pcardinfo->card_csd.ccc = (uint16_t)((uint16_t)tempbyte << 4);
  1917. /* CSD byte 5 */
  1918. tempbyte = (uint8_t)((card_opration.sd_csd[1] & SD_MASK_16_23BITS) >> 16);
  1919. pcardinfo->card_csd.ccc |= (uint16_t)((uint16_t)(tempbyte & 0xF0) >> 4);
  1920. pcardinfo->card_csd.read_bl_len = tempbyte & 0x0F;
  1921. /* CSD byte 6 */
  1922. tempbyte = (uint8_t)((card_opration.sd_csd[1] & SD_MASK_8_15BITS) >> 8);
  1923. pcardinfo->card_csd.read_bl_partial = (tempbyte & 0x80) >> 7;
  1924. pcardinfo->card_csd.write_blk_misalign = (tempbyte & 0x40) >> 6;
  1925. pcardinfo->card_csd.read_blk_misalign = (tempbyte & 0x20) >> 5;
  1926. pcardinfo->card_csd.dsp_imp = (tempbyte & 0x10) >> 4;
  1927. if((SDIO_STD_CAPACITY_SD_CARD_V1_1 == card_opration.cardtype) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == card_opration.cardtype)){
  1928. /* card is SDSC card, CSD version 1.0 */
  1929. pcardinfo->card_csd.c_size = (uint32_t)((uint32_t)(tempbyte & 0x03) << 10);
  1930. /* CSD byte 7 */
  1931. tempbyte = (uint8_t)(card_opration.sd_csd[1] & SD_MASK_0_7BITS);
  1932. pcardinfo->card_csd.c_size |= (uint32_t)((uint32_t)tempbyte << 2);
  1933. /* CSD byte 8 */
  1934. tempbyte = (uint8_t)((card_opration.sd_csd[2] & SD_MASK_24_31BITS) >> 24);
  1935. pcardinfo->card_csd.c_size |= (uint32_t)((uint32_t)(tempbyte & 0xC0) >> 6);
  1936. pcardinfo->card_csd.vdd_r_curr_min = (tempbyte & 0x38) >> 3;
  1937. pcardinfo->card_csd.vdd_r_curr_max = tempbyte & 0x07;
  1938. /* CSD byte 9 */
  1939. tempbyte = (uint8_t)((card_opration.sd_csd[2] & SD_MASK_16_23BITS) >> 16);
  1940. pcardinfo->card_csd.vdd_w_curr_min = (tempbyte & 0xE0) >> 5;
  1941. pcardinfo->card_csd.vdd_w_curr_max = (tempbyte & 0x1C) >> 2;
  1942. pcardinfo->card_csd.c_size_mult = (tempbyte & 0x03) << 1;
  1943. /* CSD byte 10 */
  1944. tempbyte = (uint8_t)((card_opration.sd_csd[2] & SD_MASK_8_15BITS) >> 8);
  1945. pcardinfo->card_csd.c_size_mult |= (tempbyte & 0x80) >> 7;
  1946. /* calculate the card block size and capacity */
  1947. pcardinfo->card_blocksize = 1 << (pcardinfo->card_csd.read_bl_len);
  1948. pcardinfo->card_capacity = pcardinfo->card_csd.c_size + 1;
  1949. pcardinfo->card_capacity *= (1 << (pcardinfo->card_csd.c_size_mult + 2));
  1950. pcardinfo->card_capacity *= pcardinfo->card_blocksize;
  1951. }else if(SDIO_HIGH_CAPACITY_SD_CARD == card_opration.cardtype){
  1952. /* card is SDHC card, CSD version 2.0 */
  1953. /* CSD byte 7 */
  1954. tempbyte = (uint8_t)(card_opration.sd_csd[1] & SD_MASK_0_7BITS);
  1955. pcardinfo->card_csd.c_size = (uint32_t)((uint32_t)(tempbyte & 0x3F) << 16);
  1956. /* CSD byte 8 */
  1957. tempbyte = (uint8_t)((card_opration.sd_csd[2] & SD_MASK_24_31BITS) >> 24);
  1958. pcardinfo->card_csd.c_size |= (uint32_t)((uint32_t)tempbyte << 8);
  1959. /* CSD byte 9 */
  1960. tempbyte = (uint8_t)((card_opration.sd_csd[2] & SD_MASK_16_23BITS) >> 16);
  1961. pcardinfo->card_csd.c_size |= (uint32_t)tempbyte;
  1962. /* calculate the card block size and capacity */
  1963. pcardinfo->card_blocksize = 512;
  1964. pcardinfo->card_capacity = (pcardinfo->card_csd.c_size + 1) * 512 *1024;
  1965. }
  1966. pcardinfo->card_csd.erase_blk_en = (tempbyte & 0x40) >> 6;
  1967. pcardinfo->card_csd.sector_size = (tempbyte & 0x3F) << 1;
  1968. /* CSD byte 11 */
  1969. tempbyte = (uint8_t)(card_opration.sd_csd[2] & SD_MASK_0_7BITS);
  1970. pcardinfo->card_csd.sector_size |= (tempbyte & 0x80) >> 7;
  1971. pcardinfo->card_csd.wp_grp_size = (tempbyte & 0x7F);
  1972. /* CSD byte 12 */
  1973. tempbyte = (uint8_t)((card_opration.sd_csd[3] & SD_MASK_24_31BITS) >> 24);
  1974. pcardinfo->card_csd.wp_grp_enable = (tempbyte & 0x80) >> 7;
  1975. pcardinfo->card_csd.r2w_factor = (tempbyte & 0x1C) >> 2;
  1976. pcardinfo->card_csd.write_bl_len = (tempbyte & 0x03) << 2;
  1977. /* CSD byte 13 */
  1978. tempbyte = (uint8_t)((card_opration.sd_csd[3] & SD_MASK_16_23BITS) >> 16);
  1979. pcardinfo->card_csd.write_bl_len |= (tempbyte & 0xC0) >> 6;
  1980. pcardinfo->card_csd.write_bl_partial = (tempbyte & 0x20) >> 5;
  1981. /* CSD byte 14 */
  1982. tempbyte = (uint8_t)((card_opration.sd_csd[3] & SD_MASK_8_15BITS) >> 8);
  1983. pcardinfo->card_csd.file_format_grp = (tempbyte & 0x80) >> 7;
  1984. pcardinfo->card_csd.copy_flag = (tempbyte & 0x40) >> 6;
  1985. pcardinfo->card_csd.perm_write_protect = (tempbyte & 0x20) >> 5;
  1986. pcardinfo->card_csd.tmp_write_protect = (tempbyte & 0x10) >> 4;
  1987. pcardinfo->card_csd.file_format = (tempbyte & 0x0C) >> 2;
  1988. /* CSD byte 15 */
  1989. tempbyte = (uint8_t)(card_opration.sd_csd[3] & SD_MASK_0_7BITS);
  1990. pcardinfo->card_csd.csd_crc = (tempbyte & 0xFE) >> 1;
  1991. return status;
  1992. }
  1993. /*!
  1994. \brief check if the command sent error occurs
  1995. \param[in] none
  1996. \param[out] none
  1997. \retval sd_error_enum
  1998. */
  1999. static sd_error_enum cmdsent_error_check(void)
  2000. {
  2001. sd_error_enum status = SD_OK;
  2002. uint32_t timeout = 400000;
  2003. /* check command sent flag */
  2004. while((RESET == sdio_flag_get(SDIO_FLAG_CMDSEND)) && (timeout > 0)){
  2005. --timeout;
  2006. }
  2007. /* command response is timeout */
  2008. if(0 == timeout){
  2009. status = SD_CMD_RESP_TIMEOUT;
  2010. return status;
  2011. }
  2012. /* if the command is sent, clear the SDIO_INTC flags */
  2013. sdio_flag_clear(SDIO_MASK_INTC_FLAGS);
  2014. return status;
  2015. }
  2016. /*!
  2017. \brief check if error type for R1 response
  2018. \param[in] resp: content of response
  2019. \param[out] none
  2020. \retval sd_error_enum
  2021. */
  2022. static sd_error_enum r1_error_type_check(uint32_t resp)
  2023. {
  2024. sd_error_enum status = SD_ERROR;
  2025. /* check which error occurs */
  2026. if(resp & SD_R1_OUT_OF_RANGE){
  2027. status = SD_OUT_OF_RANGE;
  2028. }else if(resp & SD_R1_ADDRESS_ERROR){
  2029. status = SD_ADDRESS_ERROR;
  2030. }else if(resp & SD_R1_BLOCK_LEN_ERROR){
  2031. status = SD_BLOCK_LEN_ERROR;
  2032. }else if(resp & SD_R1_ERASE_SEQ_ERROR){
  2033. status = SD_ERASE_SEQ_ERROR;
  2034. }else if(resp & SD_R1_ERASE_PARAM){
  2035. status = SD_ERASE_PARAM;
  2036. }else if(resp & SD_R1_WP_VIOLATION){
  2037. status = SD_WP_VIOLATION;
  2038. }else if(resp & SD_R1_LOCK_UNLOCK_FAILED){
  2039. status = SD_LOCK_UNLOCK_FAILED;
  2040. }else if(resp & SD_R1_COM_CRC_ERROR){
  2041. status = SD_COM_CRC_ERROR;
  2042. }else if(resp & SD_R1_ILLEGAL_COMMAND){
  2043. status = SD_ILLEGAL_COMMAND;
  2044. }else if(resp & SD_R1_CARD_ECC_FAILED){
  2045. status = SD_CARD_ECC_FAILED;
  2046. }else if(resp & SD_R1_CC_ERROR){
  2047. status = SD_CC_ERROR;
  2048. }else if(resp & SD_R1_GENERAL_UNKNOWN_ERROR){
  2049. status = SD_GENERAL_UNKNOWN_ERROR;
  2050. }else if(resp & SD_R1_CSD_OVERWRITE){
  2051. status = SD_CSD_OVERWRITE;
  2052. }else if(resp & SD_R1_WP_ERASE_SKIP){
  2053. status = SD_WP_ERASE_SKIP;
  2054. }else if(resp & SD_R1_CARD_ECC_DISABLED){
  2055. status = SD_CARD_ECC_DISABLED;
  2056. }else if(resp & SD_R1_ERASE_RESET){
  2057. status = SD_ERASE_RESET;
  2058. }else if(resp & SD_R1_AKE_SEQ_ERROR){
  2059. status = SD_AKE_SEQ_ERROR;
  2060. }
  2061. return status;
  2062. }
  2063. /*!
  2064. \brief check if error occurs for R1 response
  2065. \param[in] cmdindex: the index of command
  2066. \param[out] none
  2067. \retval sd_error_enum
  2068. */
  2069. static sd_error_enum r1_error_check(uint8_t cmdindex)
  2070. {
  2071. sd_error_enum status = SD_OK;
  2072. uint32_t reg_status = 0, resp_r1 = 0;
  2073. /* store the content of SDIO_STAT */
  2074. reg_status = SDIO_STAT;
  2075. while(!(reg_status & (SDIO_FLAG_CCRCERR | SDIO_FLAG_CMDTMOUT | SDIO_FLAG_CMDRECV))){
  2076. reg_status = SDIO_STAT;
  2077. }
  2078. /* check whether an error or timeout occurs or command response received */
  2079. if(reg_status & SDIO_FLAG_CCRCERR){
  2080. status = SD_CMD_CRC_ERROR;
  2081. sdio_flag_clear(SDIO_FLAG_CCRCERR);
  2082. return status;
  2083. }else if(reg_status & SDIO_FLAG_CMDTMOUT){
  2084. status = SD_CMD_RESP_TIMEOUT;
  2085. sdio_flag_clear(SDIO_FLAG_CMDTMOUT);
  2086. return status;
  2087. }
  2088. /* check whether the last response command index is the desired one */
  2089. if(sdio_command_index_get() != cmdindex){
  2090. status = SD_ILLEGAL_COMMAND;
  2091. return status;
  2092. }
  2093. /* clear all the SDIO_INTC flags */
  2094. sdio_flag_clear(SDIO_MASK_INTC_FLAGS);
  2095. /* get the SDIO response register 0 for checking */
  2096. resp_r1 = sdio_response_get(SDIO_RESPONSE0);
  2097. if(SD_ALLZERO == (resp_r1 & SD_R1_ERROR_BITS)){
  2098. /* no error occurs, return SD_OK */
  2099. status = SD_OK;
  2100. return status;
  2101. }
  2102. /* if some error occurs, return the error type */
  2103. status = r1_error_type_check(resp_r1);
  2104. return status;
  2105. }
  2106. /*!
  2107. \brief check if error occurs for R2 response
  2108. \param[in] none
  2109. \param[out] none
  2110. \retval sd_error_enum
  2111. */
  2112. static sd_error_enum r2_error_check(void)
  2113. {
  2114. sd_error_enum status = SD_OK;
  2115. uint32_t reg_status = 0;
  2116. /* store the content of SDIO_STAT */
  2117. reg_status = SDIO_STAT;
  2118. while(!(reg_status & (SDIO_FLAG_CCRCERR | SDIO_FLAG_CMDTMOUT | SDIO_FLAG_CMDRECV))){
  2119. reg_status = SDIO_STAT;
  2120. }
  2121. /* check whether an error or timeout occurs or command response received */
  2122. if(reg_status & SDIO_FLAG_CCRCERR){
  2123. status = SD_CMD_CRC_ERROR;
  2124. sdio_flag_clear(SDIO_FLAG_CCRCERR);
  2125. return status;
  2126. }else if(reg_status & SDIO_FLAG_CMDTMOUT){
  2127. status = SD_CMD_RESP_TIMEOUT;
  2128. sdio_flag_clear(SDIO_FLAG_CMDTMOUT);
  2129. return status;
  2130. }
  2131. /* clear all the SDIO_INTC flags */
  2132. sdio_flag_clear(SDIO_MASK_INTC_FLAGS);
  2133. return status;
  2134. }
  2135. /*!
  2136. \brief check if error occurs for R3 response
  2137. \param[in] none
  2138. \param[out] none
  2139. \retval sd_error_enum
  2140. */
  2141. static sd_error_enum r3_error_check(void)
  2142. {
  2143. sd_error_enum status = SD_OK;
  2144. uint32_t reg_status = 0;
  2145. /* store the content of SDIO_STAT */
  2146. reg_status = SDIO_STAT;
  2147. while(!(reg_status & (SDIO_FLAG_CCRCERR | SDIO_FLAG_CMDTMOUT | SDIO_FLAG_CMDRECV))){
  2148. reg_status = SDIO_STAT;
  2149. }
  2150. if(reg_status & SDIO_FLAG_CMDTMOUT){
  2151. status = SD_CMD_RESP_TIMEOUT;
  2152. sdio_flag_clear(SDIO_FLAG_CMDTMOUT);
  2153. return status;
  2154. }
  2155. /* clear all the SDIO_INTC flags */
  2156. sdio_flag_clear(SDIO_MASK_INTC_FLAGS);
  2157. return status;
  2158. }
  2159. /*!
  2160. \brief check if error occurs for R6 response
  2161. \param[in] cmdindex: the index of command
  2162. \param[out] prca: a pointer that store the RCA of card
  2163. \retval sd_error_enum
  2164. */
  2165. static sd_error_enum r6_error_check(uint8_t cmdindex, uint16_t *prca)
  2166. {
  2167. sd_error_enum status = SD_OK;
  2168. uint32_t reg_status = 0, response = 0;
  2169. /* store the content of SDIO_STAT */
  2170. reg_status = SDIO_STAT;
  2171. while(!(reg_status & (SDIO_FLAG_CCRCERR | SDIO_FLAG_CMDTMOUT | SDIO_FLAG_CMDRECV))){
  2172. reg_status = SDIO_STAT;
  2173. }
  2174. /* check whether an error or timeout occurs or command response received */
  2175. if(reg_status & SDIO_FLAG_CCRCERR){
  2176. status = SD_CMD_CRC_ERROR;
  2177. sdio_flag_clear(SDIO_FLAG_CCRCERR);
  2178. return status;
  2179. }else if(reg_status & SDIO_FLAG_CMDTMOUT){
  2180. status = SD_CMD_RESP_TIMEOUT;
  2181. sdio_flag_clear(SDIO_FLAG_CMDTMOUT);
  2182. return status;
  2183. }
  2184. /* check whether the last response command index is the desired one */
  2185. if(sdio_command_index_get() != cmdindex){
  2186. status = SD_ILLEGAL_COMMAND;
  2187. return status;
  2188. }
  2189. /* clear all the SDIO_INTC flags */
  2190. sdio_flag_clear(SDIO_MASK_INTC_FLAGS);
  2191. /* get the SDIO response register 0 for checking */
  2192. response = sdio_response_get(SDIO_RESPONSE0);
  2193. if(SD_ALLZERO == (response & (SD_R6_COM_CRC_ERROR | SD_R6_ILLEGAL_COMMAND | SD_R6_GENERAL_UNKNOWN_ERROR))){
  2194. *prca = (uint16_t)(response >> 16);
  2195. return status;
  2196. }
  2197. /* if some error occurs, return the error type */
  2198. if(response & SD_R6_COM_CRC_ERROR){
  2199. status = SD_COM_CRC_ERROR;
  2200. }else if(response & SD_R6_ILLEGAL_COMMAND){
  2201. status = SD_ILLEGAL_COMMAND;
  2202. }else if(response & SD_R6_GENERAL_UNKNOWN_ERROR){
  2203. status = SD_GENERAL_UNKNOWN_ERROR;
  2204. }
  2205. return status;
  2206. }
  2207. /*!
  2208. \brief check if error occurs for R7 response
  2209. \param[in] none
  2210. \param[out] none
  2211. \retval sd_error_enum
  2212. */
  2213. static sd_error_enum r7_error_check(void)
  2214. {
  2215. sd_error_enum status = SD_ERROR;
  2216. uint32_t reg_status = 0, timeout = 400000;
  2217. /* store the content of SDIO_STAT */
  2218. reg_status = SDIO_STAT;
  2219. while(!(reg_status & (SDIO_FLAG_CCRCERR | SDIO_FLAG_CMDTMOUT | SDIO_FLAG_CMDRECV)) && (timeout > 0)){
  2220. reg_status = SDIO_STAT;
  2221. --timeout;
  2222. }
  2223. /* check the flags */
  2224. if((reg_status & SDIO_FLAG_CMDTMOUT) || (0 == timeout)){
  2225. status = SD_CMD_RESP_TIMEOUT;
  2226. sdio_flag_clear(SDIO_FLAG_CMDTMOUT);
  2227. return status;
  2228. }
  2229. if(reg_status & SDIO_FLAG_CMDRECV){
  2230. status = SD_OK;
  2231. sdio_flag_clear(SDIO_FLAG_CMDRECV);
  2232. return status;
  2233. }
  2234. return status;
  2235. }
  2236. /*!
  2237. \brief get the state which the card is in
  2238. \param[in] none
  2239. \param[out] pcardstate: a pointer that store the card state
  2240. \arg SD_CARDSTATE_IDLE: card is in idle state
  2241. \arg SD_CARDSTATE_READY: card is in ready state
  2242. \arg SD_CARDSTATE_IDENTIFICAT: card is in identificat state
  2243. \arg SD_CARDSTATE_STANDBY: card is in standby state
  2244. \arg SD_CARDSTATE_TRANSFER: card is in transfer state
  2245. \arg SD_CARDSTATE_DATA: card is in data state
  2246. \arg SD_CARDSTATE_RECEIVING: card is in receiving state
  2247. \arg SD_CARDSTATE_PROGRAMMING: card is in programming state
  2248. \arg SD_CARDSTATE_DISCONNECT: card is in disconnect state
  2249. \arg SD_CARDSTATE_LOCKED: card is in locked state
  2250. \retval sd_error_enum
  2251. */
  2252. static sd_error_enum sd_card_state_get(uint8_t *pcardstate)
  2253. {
  2254. sd_error_enum status = SD_OK;
  2255. __IO uint32_t reg_status = 0, response = 0;
  2256. /* send CMD13(SEND_STATUS), addressed card sends its status register */
  2257. sdio_command_response_config(SD_CMD_SEND_STATUS, (uint32_t)card_opration.sd_rca << SD_RCA_SHIFT, SDIO_RESPONSETYPE_SHORT);
  2258. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  2259. sdio_csm_enable();
  2260. /* store the content of SDIO_STAT */
  2261. reg_status = SDIO_STAT;
  2262. while(!(reg_status & (SDIO_FLAG_CCRCERR | SDIO_FLAG_CMDTMOUT | SDIO_FLAG_CMDRECV))){
  2263. reg_status = SDIO_STAT;
  2264. }
  2265. /* check whether an error or timeout occurs or command response received */
  2266. if(reg_status & SDIO_FLAG_CCRCERR){
  2267. status = SD_CMD_CRC_ERROR;
  2268. sdio_flag_clear(SDIO_FLAG_CCRCERR);
  2269. return status;
  2270. }else if(reg_status & SDIO_FLAG_CMDTMOUT){
  2271. status = SD_CMD_RESP_TIMEOUT;
  2272. sdio_flag_clear(SDIO_FLAG_CMDTMOUT);
  2273. return status;
  2274. }
  2275. /* command response received, store the response command index */
  2276. reg_status = (uint32_t)sdio_command_index_get();
  2277. if(reg_status != (uint32_t)SD_CMD_SEND_STATUS){
  2278. status = SD_ILLEGAL_COMMAND;
  2279. return status;
  2280. }
  2281. /* clear all the SDIO_INTC flags */
  2282. sdio_flag_clear(SDIO_MASK_INTC_FLAGS);
  2283. /* get the SDIO response register 0 for checking */
  2284. response = sdio_response_get(SDIO_RESPONSE0);
  2285. *pcardstate = (uint8_t)((response >> 9) & 0x0000000F);
  2286. if(SD_ALLZERO == (response & SD_R1_ERROR_BITS)){
  2287. /* no error occurs, return SD_OK */
  2288. status = SD_OK;
  2289. return status;
  2290. }
  2291. /* if some error occurs, return the error type */
  2292. status = r1_error_type_check(response);
  2293. return status;
  2294. }
  2295. /*!
  2296. \brief configure the bus width mode
  2297. \param[in] buswidth: the bus width
  2298. \arg SD_BUS_WIDTH_1BIT: 1-bit bus width
  2299. \arg SD_BUS_WIDTH_4BIT: 4-bit bus width
  2300. \param[out] none
  2301. \retval sd_error_enum
  2302. */
  2303. static sd_error_enum sd_bus_width_config(uint32_t buswidth)
  2304. {
  2305. sd_error_enum status = SD_OK;
  2306. /* check whether the card is locked */
  2307. if(sdio_response_get(SDIO_RESPONSE0) & SD_CARDSTATE_LOCKED){
  2308. status = SD_LOCK_UNLOCK_FAILED;
  2309. return status;
  2310. }
  2311. /* get the SCR register */
  2312. status = sd_scr_get(card_opration.sd_rca, card_opration.sd_scr);
  2313. if(SD_OK != status){
  2314. return status;
  2315. }
  2316. if(SD_BUS_WIDTH_1BIT == buswidth){
  2317. if(SD_ALLZERO != (card_opration.sd_scr[1] & buswidth)){
  2318. /* send CMD55(APP_CMD) to indicate next command is application specific command */
  2319. sdio_command_response_config(SD_CMD_APP_CMD, (uint32_t)card_opration.sd_rca << SD_RCA_SHIFT, SDIO_RESPONSETYPE_SHORT);
  2320. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  2321. sdio_csm_enable();
  2322. /* check if some error occurs */
  2323. status = r1_error_check(SD_CMD_APP_CMD);
  2324. if(SD_OK != status){
  2325. return status;
  2326. }
  2327. /* send ACMD6(SET_BUS_WIDTH) to define the data bus width */
  2328. sdio_command_response_config(SD_APPCMD_SET_BUS_WIDTH, (uint32_t)0x0, SDIO_RESPONSETYPE_SHORT);
  2329. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  2330. sdio_csm_enable();
  2331. /* check if some error occurs */
  2332. status = r1_error_check(SD_APPCMD_SET_BUS_WIDTH);
  2333. if(SD_OK != status){
  2334. return status;
  2335. }
  2336. }else{
  2337. status = SD_OPERATION_IMPROPER;
  2338. }
  2339. return status;
  2340. }else if(SD_BUS_WIDTH_4BIT == buswidth){
  2341. if(SD_ALLZERO != (card_opration.sd_scr[1] & buswidth)){
  2342. /* send CMD55(APP_CMD) to indicate next command is application specific command */
  2343. sdio_command_response_config(SD_CMD_APP_CMD, (uint32_t)card_opration.sd_rca << SD_RCA_SHIFT, SDIO_RESPONSETYPE_SHORT);
  2344. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  2345. sdio_csm_enable();
  2346. /* check if some error occurs */
  2347. status = r1_error_check(SD_CMD_APP_CMD);
  2348. if(SD_OK != status){
  2349. return status;
  2350. }
  2351. /* send ACMD6(SET_BUS_WIDTH) to define the data bus width */
  2352. sdio_command_response_config(SD_APPCMD_SET_BUS_WIDTH, (uint32_t)0x2, SDIO_RESPONSETYPE_SHORT);
  2353. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  2354. sdio_csm_enable();
  2355. /* check if some error occurs */
  2356. status = r1_error_check(SD_APPCMD_SET_BUS_WIDTH);
  2357. if(SD_OK != status){
  2358. return status;
  2359. }
  2360. }else{
  2361. status = SD_OPERATION_IMPROPER;
  2362. }
  2363. return status;
  2364. }else{
  2365. status = SD_PARAMETER_INVALID;
  2366. return status;
  2367. }
  2368. }
  2369. /*!
  2370. \brief get the SCR of corresponding card
  2371. \param[in] rca: RCA of a card
  2372. \param[out] pscr: a pointer that store the SCR content
  2373. \retval sd_error_enum
  2374. */
  2375. static sd_error_enum sd_scr_get(uint16_t rca, uint32_t *pscr)
  2376. {
  2377. sd_error_enum status = SD_OK;
  2378. uint32_t temp_scr[2] = {0, 0}, idx_scr = 0;
  2379. /* send CMD16(SET_BLOCKLEN) to set block length */
  2380. sdio_command_response_config(SD_CMD_SET_BLOCKLEN, (uint32_t)8, SDIO_RESPONSETYPE_SHORT);
  2381. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  2382. sdio_csm_enable();
  2383. /* check if some error occurs */
  2384. status = r1_error_check(SD_CMD_SET_BLOCKLEN);
  2385. if(SD_OK != status){
  2386. return status;
  2387. }
  2388. /* send CMD55(APP_CMD) to indicate next command is application specific command */
  2389. sdio_command_response_config(SD_CMD_APP_CMD, (uint32_t)rca << SD_RCA_SHIFT, SDIO_RESPONSETYPE_SHORT);
  2390. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  2391. sdio_csm_enable();
  2392. /* check if some error occurs */
  2393. status = r1_error_check(SD_CMD_APP_CMD);
  2394. if(SD_OK != status){
  2395. return status;
  2396. }
  2397. /* configure SDIO data */
  2398. sdio_data_config(SD_DATATIMEOUT, (uint32_t)8, SDIO_DATABLOCKSIZE_8BYTES);
  2399. sdio_data_transfer_config(SDIO_TRANSMODE_BLOCK, SDIO_TRANSDIRECTION_TOSDIO);
  2400. sdio_dsm_enable();
  2401. /* send ACMD51(SEND_SCR) to read the SD configuration register */
  2402. sdio_command_response_config(SD_APPCMD_SEND_SCR, (uint32_t)0x0, SDIO_RESPONSETYPE_SHORT);
  2403. sdio_wait_type_set(SDIO_WAITTYPE_NO);
  2404. sdio_csm_enable();
  2405. /* check if some error occurs */
  2406. status = r1_error_check(SD_APPCMD_SEND_SCR);
  2407. if(SD_OK != status){
  2408. return status;
  2409. }
  2410. /* store the received SCR */
  2411. while(!sdio_flag_get(SDIO_FLAG_DTCRCERR | SDIO_FLAG_DTTMOUT | SDIO_FLAG_RXORE | SDIO_FLAG_DTBLKEND | SDIO_FLAG_STBITE)){
  2412. if(RESET != sdio_flag_get(SDIO_FLAG_RXDTVAL)){
  2413. *(temp_scr + idx_scr) = sdio_data_read();
  2414. ++idx_scr;
  2415. }
  2416. }
  2417. /* check whether some error occurs */
  2418. if(RESET != sdio_flag_get(SDIO_FLAG_DTCRCERR)){
  2419. status = SD_DATA_CRC_ERROR;
  2420. sdio_flag_clear(SDIO_FLAG_DTCRCERR);
  2421. return status;
  2422. }else if(RESET != sdio_flag_get(SDIO_FLAG_DTTMOUT)){
  2423. status = SD_DATA_TIMEOUT;
  2424. sdio_flag_clear(SDIO_FLAG_DTTMOUT);
  2425. return status;
  2426. }else if(RESET != sdio_flag_get(SDIO_FLAG_RXORE)){
  2427. status = SD_RX_OVERRUN_ERROR;
  2428. sdio_flag_clear(SDIO_FLAG_RXORE);
  2429. return status;
  2430. }else if(RESET != sdio_flag_get(SDIO_FLAG_STBITE)){
  2431. status = SD_START_BIT_ERROR;
  2432. sdio_flag_clear(SDIO_FLAG_STBITE);
  2433. return status;
  2434. }
  2435. /* clear all the SDIO_INTC flags */
  2436. sdio_flag_clear(SDIO_MASK_INTC_FLAGS);
  2437. /* readjust the temp SCR value */
  2438. *(pscr) = ((temp_scr[1] & SD_MASK_0_7BITS) << 24) | ((temp_scr[1] & SD_MASK_8_15BITS) << 8) |
  2439. ((temp_scr[1] & SD_MASK_16_23BITS) >> 8) | ((temp_scr[1] & SD_MASK_24_31BITS) >> 24);
  2440. *(pscr + 1) = ((temp_scr[0] & SD_MASK_0_7BITS) << 24) | ((temp_scr[0] & SD_MASK_8_15BITS) << 8) |
  2441. ((temp_scr[0] & SD_MASK_16_23BITS) >> 8) | ((temp_scr[0] & SD_MASK_24_31BITS) >> 24);
  2442. return status;
  2443. }
  2444. /*!
  2445. \brief get the data block size
  2446. \param[in] bytesnumber: the number of bytes
  2447. \param[out] none
  2448. \retval data block size
  2449. \arg SDIO_DATABLOCKSIZE_1BYTE: block size = 1 byte
  2450. \arg SDIO_DATABLOCKSIZE_2BYTES: block size = 2 bytes
  2451. \arg SDIO_DATABLOCKSIZE_4BYTES: block size = 4 bytes
  2452. \arg SDIO_DATABLOCKSIZE_8BYTES: block size = 8 bytes
  2453. \arg SDIO_DATABLOCKSIZE_16BYTES: block size = 16 bytes
  2454. \arg SDIO_DATABLOCKSIZE_32BYTES: block size = 32 bytes
  2455. \arg SDIO_DATABLOCKSIZE_64BYTES: block size = 64 bytes
  2456. \arg SDIO_DATABLOCKSIZE_128BYTES: block size = 128 bytes
  2457. \arg SDIO_DATABLOCKSIZE_256BYTES: block size = 256 bytes
  2458. \arg SDIO_DATABLOCKSIZE_512BYTES: block size = 512 bytes
  2459. \arg SDIO_DATABLOCKSIZE_1024BYTES: block size = 1024 bytes
  2460. \arg SDIO_DATABLOCKSIZE_2048BYTES: block size = 2048 bytes
  2461. \arg SDIO_DATABLOCKSIZE_4096BYTES: block size = 4096 bytes
  2462. \arg SDIO_DATABLOCKSIZE_8192BYTES: block size = 8192 bytes
  2463. \arg SDIO_DATABLOCKSIZE_16384BYTES: block size = 16384 bytes
  2464. */
  2465. static uint32_t sd_datablocksize_get(uint16_t bytesnumber)
  2466. {
  2467. uint8_t exp_val = 0;
  2468. /* calculate the exponent of 2 */
  2469. while(1 != bytesnumber){
  2470. bytesnumber >>= 1;
  2471. ++exp_val;
  2472. }
  2473. return DATACTL_BLKSZ(exp_val);
  2474. }
  2475. /*!
  2476. \brief configure the GPIO of SDIO interface
  2477. \param[in] none
  2478. \param[out] none
  2479. \retval none
  2480. */
  2481. static void gpio_config(void)
  2482. {
  2483. /* configure the SDIO_DAT0(PC8), SDIO_DAT1(PC9), SDIO_DAT2(PC10), SDIO_DAT3(PC11), SDIO_CLK(PC12) and SDIO_CMD(PD2) */
  2484. gpio_af_set(SDIO_CLK_PORT, GPIO_AF_12, SDIO_CLK_PIN);
  2485. gpio_af_set(SDIO_CMD_PORT, GPIO_AF_12, SDIO_CMD_PIN);
  2486. gpio_af_set(SDIO_D0_PORT, GPIO_AF_12, SDIO_D0_PIN);
  2487. gpio_af_set(SDIO_D1_PORT, GPIO_AF_12, SDIO_D1_PIN);
  2488. gpio_af_set(SDIO_D2_PORT, GPIO_AF_12, SDIO_D2_PIN);
  2489. gpio_af_set(SDIO_D3_PORT, GPIO_AF_12, SDIO_D3_PIN);
  2490. gpio_mode_set(SDIO_CLK_PORT, GPIO_MODE_AF, GPIO_PUPD_NONE, SDIO_CLK_PIN);
  2491. gpio_output_options_set(SDIO_CLK_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_25MHZ, SDIO_CLK_PIN);
  2492. gpio_mode_set(SDIO_CMD_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, SDIO_CMD_PIN);
  2493. gpio_output_options_set(SDIO_CMD_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_25MHZ, SDIO_CMD_PIN);
  2494. gpio_mode_set(SDIO_D0_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, SDIO_D0_PIN);
  2495. gpio_output_options_set(SDIO_D0_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_25MHZ, SDIO_D0_PIN);
  2496. gpio_mode_set(SDIO_D1_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, SDIO_D1_PIN);
  2497. gpio_output_options_set(SDIO_D1_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_25MHZ, SDIO_D1_PIN);
  2498. gpio_mode_set(SDIO_D2_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, SDIO_D2_PIN);
  2499. gpio_output_options_set(SDIO_D2_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_25MHZ, SDIO_D2_PIN);
  2500. gpio_mode_set(SDIO_D3_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, SDIO_D3_PIN);
  2501. gpio_output_options_set(SDIO_D3_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_25MHZ, SDIO_D3_PIN);
  2502. }
  2503. /*!
  2504. \brief configure the RCU of SDIO and DMA
  2505. \param[in] none
  2506. \param[out] none
  2507. \retval none
  2508. */
  2509. static void rcu_config(void)
  2510. {
  2511. rcu_periph_clock_enable(SDIO_GPIO_CLK);
  2512. rcu_periph_clock_enable(SDIO_GPIO_CMD);
  2513. rcu_periph_clock_enable(SDIO_GPIO_D0);
  2514. rcu_periph_clock_enable(SDIO_GPIO_D1);
  2515. rcu_periph_clock_enable(SDIO_GPIO_D2);
  2516. rcu_periph_clock_enable(SDIO_GPIO_D3);
  2517. rcu_periph_clock_enable(SDIO_PERI_CLOCK);
  2518. rcu_periph_clock_enable(SDIO_DMA_CLOCK);
  2519. }
  2520. /*!
  2521. \brief configure the DMA1 channel 3 for transferring data
  2522. \param[in] srcbuf: a pointer point to a buffer which will be transferred
  2523. \param[in] bufsize: the size of buffer(not used in flow controller is peripheral)
  2524. \param[out] none
  2525. \retval none
  2526. */
  2527. static void dma_transfer_config(uint32_t *srcbuf, uint32_t bufsize)
  2528. {
  2529. dma_multi_data_parameter_struct dma_struct;
  2530. /* clear all the interrupt flags */
  2531. dma_flag_clear(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_FLAG_FEE);
  2532. dma_flag_clear(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_FLAG_SDE);
  2533. dma_flag_clear(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_FLAG_TAE);
  2534. dma_flag_clear(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_FLAG_HTF);
  2535. dma_flag_clear(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_FLAG_FTF);
  2536. dma_channel_disable(SDIO_DMA, SDIO_DMA_CHANNEL);
  2537. dma_deinit(SDIO_DMA, SDIO_DMA_CHANNEL);
  2538. /* configure the DMA1 channel 3 */
  2539. dma_struct.periph_addr = (uint32_t)SDIO_FIFO_ADDR;
  2540. dma_struct.memory0_addr = (uint32_t)srcbuf;
  2541. dma_struct.direction = DMA_MEMORY_TO_PERIPH;
  2542. dma_struct.number = 0;
  2543. dma_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  2544. dma_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  2545. dma_struct.periph_width = DMA_PERIPH_WIDTH_32BIT;
  2546. dma_struct.memory_width = DMA_MEMORY_WIDTH_32BIT;
  2547. dma_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  2548. dma_struct.periph_burst_width = DMA_PERIPH_BURST_4_BEAT;
  2549. dma_struct.memory_burst_width = DMA_MEMORY_BURST_4_BEAT;
  2550. dma_struct.circular_mode = DMA_CIRCULAR_MODE_DISABLE;
  2551. dma_struct.critical_value = DMA_FIFO_4_WORD;
  2552. dma_multi_data_mode_init(SDIO_DMA, SDIO_DMA_CHANNEL, &dma_struct);
  2553. dma_flow_controller_config(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_FLOW_CONTROLLER_PERI);
  2554. dma_channel_subperipheral_select(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_SUBPERI4);
  2555. dma_channel_enable(SDIO_DMA, SDIO_DMA_CHANNEL);
  2556. }
  2557. /*!
  2558. \brief configure the DMA1 channel 3 for receiving data
  2559. \param[in] dstbuf: a pointer point to a buffer which will receive data
  2560. \param[in] bufsize: the size of buffer(not used in flow controller is peripheral)
  2561. \param[out] none
  2562. \retval none
  2563. */
  2564. static void dma_receive_config(uint32_t *dstbuf, uint32_t bufsize)
  2565. {
  2566. dma_multi_data_parameter_struct dma_struct;
  2567. /* clear all the interrupt flags */
  2568. dma_flag_clear(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_FLAG_FEE);
  2569. dma_flag_clear(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_FLAG_SDE);
  2570. dma_flag_clear(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_FLAG_TAE);
  2571. dma_flag_clear(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_FLAG_HTF);
  2572. dma_flag_clear(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_FLAG_FTF);
  2573. dma_channel_disable(SDIO_DMA, SDIO_DMA_CHANNEL);
  2574. dma_deinit(SDIO_DMA, SDIO_DMA_CHANNEL);
  2575. /* configure the DMA1 channel 3 */
  2576. dma_struct.periph_addr = (uint32_t)SDIO_FIFO_ADDR;
  2577. dma_struct.memory0_addr = (uint32_t)dstbuf;
  2578. dma_struct.direction = DMA_PERIPH_TO_MEMORY;
  2579. dma_struct.number = 0;
  2580. dma_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  2581. dma_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  2582. dma_struct.periph_width = DMA_PERIPH_WIDTH_32BIT;
  2583. dma_struct.memory_width = DMA_MEMORY_WIDTH_32BIT;
  2584. dma_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  2585. dma_struct.periph_burst_width = DMA_PERIPH_BURST_4_BEAT;
  2586. dma_struct.memory_burst_width = DMA_MEMORY_BURST_4_BEAT;
  2587. dma_struct.critical_value = DMA_FIFO_4_WORD;
  2588. dma_struct.circular_mode = DMA_CIRCULAR_MODE_DISABLE;
  2589. dma_multi_data_mode_init(SDIO_DMA, SDIO_DMA_CHANNEL, &dma_struct);
  2590. dma_flow_controller_config(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_FLOW_CONTROLLER_PERI);
  2591. dma_channel_subperipheral_select(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_SUBPERI4);
  2592. dma_channel_enable(SDIO_DMA, SDIO_DMA_CHANNEL);
  2593. }
  2594. #if SDIO_DMA_USE_IPC
  2595. static void sdio_dma_irq_config(void)
  2596. {
  2597. dma_interrupt_enable(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_CHXCTL_FTFIE);
  2598. nvic_irq_enable(SDIO_DMA_IRQ, 0, 1);
  2599. }
  2600. void SDIO_DMA_IRQ_HANDLER(void)
  2601. {
  2602. rt_interrupt_enter();
  2603. if(dma_interrupt_flag_get(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_INT_FLAG_FTF)) {
  2604. dma_interrupt_flag_clear(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_INT_FLAG_FTF);
  2605. dma_interrupt_disable(SDIO_DMA, SDIO_DMA_CHANNEL, DMA_CHXCTL_FTFIE);
  2606. rt_sem_release(&sd.sem);
  2607. }
  2608. rt_interrupt_leave();
  2609. }
  2610. #endif /* SDIO_DMA_USE_IPC */
  2611. #endif /* RT_USING_SDIO */