hpm_dmamux_regs.h 2.0 KB

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  1. /*
  2. * Copyright (c) 2021-2023 HPMicro
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. *
  6. */
  7. #ifndef HPM_DMAMUX_H
  8. #define HPM_DMAMUX_H
  9. typedef struct {
  10. __RW uint32_t MUXCFG[16]; /* 0x0 - 0x3C: HDMA MUX0 Configuration */
  11. } DMAMUX_Type;
  12. /* Bitfield definition for register array: MUXCFG */
  13. /*
  14. * ENABLE (RW)
  15. *
  16. * DMA Mux Channel Enable
  17. * Enables the channel for DMA Mux. The DMA has separate channel enables/disables, which should be
  18. * used to disable or reconfigure a DMA channel.
  19. * 0b - DMA Mux channel is disabled
  20. * 1b - DMA Mux channel is enabled
  21. */
  22. #define DMAMUX_MUXCFG_ENABLE_MASK (0x80000000UL)
  23. #define DMAMUX_MUXCFG_ENABLE_SHIFT (31U)
  24. #define DMAMUX_MUXCFG_ENABLE_SET(x) (((uint32_t)(x) << DMAMUX_MUXCFG_ENABLE_SHIFT) & DMAMUX_MUXCFG_ENABLE_MASK)
  25. #define DMAMUX_MUXCFG_ENABLE_GET(x) (((uint32_t)(x) & DMAMUX_MUXCFG_ENABLE_MASK) >> DMAMUX_MUXCFG_ENABLE_SHIFT)
  26. /*
  27. * SOURCE (RW)
  28. *
  29. * DMA Channel Source
  30. * Specifies which DMA source, if any, is routed to a particular DMA channel. See the "DMA MUX Mapping"
  31. */
  32. #define DMAMUX_MUXCFG_SOURCE_MASK (0x7FU)
  33. #define DMAMUX_MUXCFG_SOURCE_SHIFT (0U)
  34. #define DMAMUX_MUXCFG_SOURCE_SET(x) (((uint32_t)(x) << DMAMUX_MUXCFG_SOURCE_SHIFT) & DMAMUX_MUXCFG_SOURCE_MASK)
  35. #define DMAMUX_MUXCFG_SOURCE_GET(x) (((uint32_t)(x) & DMAMUX_MUXCFG_SOURCE_MASK) >> DMAMUX_MUXCFG_SOURCE_SHIFT)
  36. /* MUXCFG register group index macro definition */
  37. #define DMAMUX_MUXCFG_HDMA_MUX0 (0UL)
  38. #define DMAMUX_MUXCFG_HDMA_MUX1 (1UL)
  39. #define DMAMUX_MUXCFG_HDMA_MUX2 (2UL)
  40. #define DMAMUX_MUXCFG_HDMA_MUX3 (3UL)
  41. #define DMAMUX_MUXCFG_HDMA_MUX4 (4UL)
  42. #define DMAMUX_MUXCFG_HDMA_MUX5 (5UL)
  43. #define DMAMUX_MUXCFG_HDMA_MUX6 (6UL)
  44. #define DMAMUX_MUXCFG_HDMA_MUX7 (7UL)
  45. #define DMAMUX_MUXCFG_XDMA_MUX0 (8UL)
  46. #define DMAMUX_MUXCFG_XDMA_MUX1 (9UL)
  47. #define DMAMUX_MUXCFG_XDMA_MUX2 (10UL)
  48. #define DMAMUX_MUXCFG_XDMA_MUX3 (11UL)
  49. #define DMAMUX_MUXCFG_XDMA_MUX4 (12UL)
  50. #define DMAMUX_MUXCFG_XDMA_MUX5 (13UL)
  51. #define DMAMUX_MUXCFG_XDMA_MUX6 (14UL)
  52. #define DMAMUX_MUXCFG_XDMA_MUX7 (15UL)
  53. #endif /* HPM_DMAMUX_H */