LPC54608_features.h 8.5 KB

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  1. /*
  2. ** ###################################################################
  3. ** Version: rev. 1.1, 2016-11-25
  4. ** Build: b170112
  5. **
  6. ** Abstract:
  7. ** Chip specific module features.
  8. **
  9. ** Copyright (c) 2016 Freescale Semiconductor, Inc.
  10. ** Copyright 2016 - 2017 NXP
  11. ** Redistribution and use in source and binary forms, with or without modification,
  12. ** are permitted provided that the following conditions are met:
  13. **
  14. ** o Redistributions of source code must retain the above copyright notice, this list
  15. ** of conditions and the following disclaimer.
  16. **
  17. ** o Redistributions in binary form must reproduce the above copyright notice, this
  18. ** list of conditions and the following disclaimer in the documentation and/or
  19. ** other materials provided with the distribution.
  20. **
  21. ** o Neither the name of the copyright holder nor the names of its
  22. ** contributors may be used to endorse or promote products derived from this
  23. ** software without specific prior written permission.
  24. **
  25. ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  26. ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  27. ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  28. ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  29. ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  30. ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  31. ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  32. ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  33. ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  34. ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. **
  36. ** http: www.nxp.com
  37. ** mail: support@nxp.com
  38. **
  39. ** Revisions:
  40. ** - rev. 1.0 (2016-08-12)
  41. ** Initial version.
  42. ** - rev. 1.1 (2016-11-25)
  43. ** Update CANFD and Classic CAN register.
  44. ** Add MAC TIMERSTAMP registers.
  45. **
  46. ** ###################################################################
  47. */
  48. #ifndef _LPC54608_FEATURES_H_
  49. #define _LPC54608_FEATURES_H_
  50. /* SOC module features */
  51. /* @brief ADC availability on the SoC. */
  52. #define FSL_FEATURE_SOC_ADC_COUNT (1)
  53. /* @brief ASYNC_SYSCON availability on the SoC. */
  54. #define FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT (1)
  55. /* @brief CRC availability on the SoC. */
  56. #define FSL_FEATURE_SOC_CRC_COUNT (1)
  57. /* @brief DMA availability on the SoC. */
  58. #define FSL_FEATURE_SOC_DMA_COUNT (1)
  59. /* @brief DMIC availability on the SoC. */
  60. #define FSL_FEATURE_SOC_DMIC_COUNT (1)
  61. /* @brief FLEXCOMM availability on the SoC. */
  62. #define FSL_FEATURE_SOC_FLEXCOMM_COUNT (10)
  63. /* @brief GINT availability on the SoC. */
  64. #define FSL_FEATURE_SOC_GINT_COUNT (2)
  65. /* @brief GPIO availability on the SoC. */
  66. #define FSL_FEATURE_SOC_GPIO_COUNT (1)
  67. /* @brief I2C availability on the SoC. */
  68. #define FSL_FEATURE_SOC_I2C_COUNT (10)
  69. /* @brief I2S availability on the SoC. */
  70. #define FSL_FEATURE_SOC_I2S_COUNT (2)
  71. /* @brief INPUTMUX availability on the SoC. */
  72. #define FSL_FEATURE_SOC_INPUTMUX_COUNT (1)
  73. /* @brief IOCON availability on the SoC. */
  74. #define FSL_FEATURE_SOC_IOCON_COUNT (1)
  75. /* @brief MRT availability on the SoC. */
  76. #define FSL_FEATURE_SOC_MRT_COUNT (1)
  77. /* @brief PINT availability on the SoC. */
  78. #define FSL_FEATURE_SOC_PINT_COUNT (1)
  79. /* @brief RTC availability on the SoC. */
  80. #define FSL_FEATURE_SOC_RTC_COUNT (1)
  81. /* @brief SCT availability on the SoC. */
  82. #define FSL_FEATURE_SOC_SCT_COUNT (1)
  83. /* @brief SPI availability on the SoC. */
  84. #define FSL_FEATURE_SOC_SPI_COUNT (10)
  85. /* @brief SPIFI availability on the SoC. */
  86. #define FSL_FEATURE_SOC_SPIFI_COUNT (1)
  87. /* @brief SYSCON availability on the SoC. */
  88. #define FSL_FEATURE_SOC_SYSCON_COUNT (1)
  89. /* @brief CTIMER availability on the SoC. */
  90. #define FSL_FEATURE_SOC_CTIMER_COUNT (5)
  91. /* @brief USART availability on the SoC. */
  92. #define FSL_FEATURE_SOC_USART_COUNT (10)
  93. /* @brief USB availability on the SoC. */
  94. #define FSL_FEATURE_SOC_USB_COUNT (1)
  95. /* @brief UTICK availability on the SoC. */
  96. #define FSL_FEATURE_SOC_UTICK_COUNT (1)
  97. /* @brief WWDT availability on the SoC. */
  98. #define FSL_FEATURE_SOC_WWDT_COUNT (1)
  99. /* @brief USBFSH availability on the SoC. */
  100. #define FSL_FEATURE_SOC_USBFSH_COUNT (1)
  101. /* @brief USBHSD availability on the SoC. */
  102. #define FSL_FEATURE_SOC_USBHSD_COUNT (1)
  103. /* @brief USBHSH availability on the SoC. */
  104. #define FSL_FEATURE_SOC_USBHSH_COUNT (1)
  105. /* @brief EEPROM availability on the SoC. */
  106. #define FSL_FEATURE_SOC_EEPROM_COUNT (1)
  107. /* @brief EMC availability on the SoC. */
  108. #define FSL_FEATURE_SOC_EMC_COUNT (1)
  109. /* @brief ENET availability on the SoC. */
  110. #define FSL_FEATURE_SOC_LPC_ENET_COUNT (1)
  111. /* @brief SDIF availability on the SoC. */
  112. #define FSL_FEATURE_SOC_SDIF_COUNT (1)
  113. /* @brief SMARTCARD availability on the SoC. */
  114. #define FSL_FEATURE_SOC_SMARTCARD_COUNT (2)
  115. /* @brief LCD availability on the SoC. */
  116. #define FSL_FEATURE_SOC_LCD_COUNT (1)
  117. /* @brief CAN availability on the SoC. */
  118. #define FSL_FEATURE_SOC_LPC_CAN_COUNT (2)
  119. /* @brief SHA availability on the SoC. */
  120. #define FSL_FEATURE_SOC_SHA_COUNT (0)
  121. /* @brief AES availability on the SoC. */
  122. #define FSL_FEATURE_SOC_AES_COUNT (0)
  123. /* @brief RIT availability on the SoC. */
  124. #define FSL_FEATURE_SOC_RIT_COUNT (1)
  125. /* @brief FMC availability on the SoC. */
  126. #define FSL_FEATURE_SOC_FMC_COUNT (1)
  127. /* @brief RNG availability on the SoC. */
  128. #define FSL_FEATURE_SOC_LPC_RNG_COUNT (1)
  129. /* CAN module features */
  130. /* @brief Support CANFD or not */
  131. #define FSL_FEATURE_CAN_SUPPORT_CANFD (0)
  132. /* DMA module features */
  133. /* @brief Number of channels */
  134. #define FSL_FEATURE_DMA_NUMBER_OF_CHANNELS (30)
  135. /* EEPROM module features */
  136. /* @brief Size of the EEPROM */
  137. #define FSL_FEATURE_EEPROM_SIZE (0x00004000)
  138. /* @brief Base address of the EEPROM */
  139. #define FSL_FEATURE_EEPROM_BASE_ADDRESS (0x40108000)
  140. /* @brief Page count of the EEPROM */
  141. #define FSL_FEATURE_EEPROM_PAGE_COUNT (128)
  142. /* @brief Command number for eeprom program */
  143. #define FSL_FEATURE_EEPROM_PROGRAM_CMD (6)
  144. /* @brief EEPROM internal clock freqency */
  145. #define FSL_FEATURE_EEPROM_INTERNAL_FREQ (1500000)
  146. /* IOCON module features */
  147. /* @brief Func bit field width */
  148. #define FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH (4)
  149. /* PINT module features */
  150. /* @brief Number of connected outputs */
  151. #define FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS (8)
  152. /* SCT module features */
  153. /* @brief Number of events */
  154. #define FSL_FEATURE_SCT_NUMBER_OF_EVENTS (10)
  155. /* @brief Number of states */
  156. #define FSL_FEATURE_SCT_NUMBER_OF_STATES (10)
  157. /* @brief Number of match capture */
  158. #define FSL_FEATURE_SCT_NUMBER_OF_MATCH_CAPTURE (10)
  159. /* SDIF module features */
  160. /* @brief FIFO depth, every location is a WORD */
  161. #define FSL_FEATURE_SDIF_FIFO_DEPTH_64_32BITS (64)
  162. /* @brief Max DMA buffer size */
  163. #define FSL_FEATURE_SDIF_INTERNAL_DMA_MAX_BUFFER_SIZE (4096)
  164. /* @brief Max source clock in HZ */
  165. #define FSL_FEATURE_SDIF_MAX_SOURCE_CLOCK (52000000)
  166. /* SPIFI module features */
  167. /* @brief SPIFI start address */
  168. #define FSL_FEATURE_SPIFI_START_ADDR (0x10000000)
  169. /* @brief SPIFI end address */
  170. #define FSL_FEATURE_SPIFI_END_ADDR (0x17FFFFFF)
  171. /* SYSCON module features */
  172. /* @brief Pointer to ROM IAP entry functions */
  173. #define FSL_FEATURE_SYSCON_IAP_ENTRY_LOCATION (0x03000205)
  174. /* @brief Flash page size in bytes */
  175. #define FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES (256)
  176. /* @brief Flash sector size in bytes */
  177. #define FSL_FEATURE_SYSCON_FLASH_SECTOR_SIZE_BYTES (32768)
  178. /* @brief Flash size in bytes */
  179. #define FSL_FEATURE_SYSCON_FLASH_SIZE_BYTES (524288)
  180. /* USB module features */
  181. /* @brief Size of the USB dedicated RAM */
  182. #define FSL_FEATURE_USB_USB_RAM (0x00002000)
  183. /* @brief Base address of the USB dedicated RAM */
  184. #define FSL_FEATURE_USB_USB_RAM_BASE_ADDRESS (0x40100000)
  185. /* USBFSH module features */
  186. /* @brief Size of the USB dedicated RAM */
  187. #define FSL_FEATURE_USBFSH_USB_RAM (0x00002000)
  188. /* @brief Base address of the USB dedicated RAM */
  189. #define FSL_FEATURE_USBFSH_USB_RAM_BASE_ADDRESS (0x40100000)
  190. /* USBHSD module features */
  191. /* @brief Size of the USB dedicated RAM */
  192. #define FSL_FEATURE_USBHSD_USB_RAM (0x00002000)
  193. /* @brief Base address of the USB dedicated RAM */
  194. #define FSL_FEATURE_USBHSD_USB_RAM_BASE_ADDRESS (0x40100000)
  195. /* USBHSH module features */
  196. /* @brief Size of the USB dedicated RAM */
  197. #define FSL_FEATURE_USBHSH_USB_RAM (0x00002000)
  198. /* @brief Base address of the USB dedicated RAM */
  199. #define FSL_FEATURE_USBHSH_USB_RAM_BASE_ADDRESS (0x40100000)
  200. #endif /* _LPC54608_FEATURES_H_ */