LPC55S36_flash.scf 2.7 KB

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  1. #!armclang --target=arm-arm-none-eabi -march=armv8-m.main -E -x c
  2. /*
  3. ** ###################################################################
  4. ** Processors: LPC55S36JBD100
  5. ** LPC55S36JHI48
  6. **
  7. ** Compiler: Keil ARM C/C++ Compiler
  8. ** Reference manual: LPC55S3x Reference Manual Rev. DraftG, 07/2021
  9. ** Version: rev. 1.1, 2021-08-04
  10. ** Build: b210913
  11. **
  12. ** Abstract:
  13. ** Linker file for the Keil ARM C/C++ Compiler
  14. **
  15. ** Copyright 2016 Freescale Semiconductor, Inc.
  16. ** Copyright 2016-2021 NXP
  17. ** All rights reserved.
  18. **
  19. ** SPDX-License-Identifier: BSD-3-Clause
  20. **
  21. ** http: www.nxp.com
  22. ** mail: support@nxp.com
  23. **
  24. ** ###################################################################
  25. */
  26. /* USB BDT size */
  27. #define usb_bdt_size 0x0
  28. /* Sizes */
  29. #if (defined(__stack_size__))
  30. #define Stack_Size __stack_size__
  31. #else
  32. #define Stack_Size 0x0400
  33. #endif
  34. #if (defined(__heap_size__))
  35. #define Heap_Size __heap_size__
  36. #else
  37. #define Heap_Size 0x0400
  38. #endif
  39. #if (defined(__pkc__))
  40. #define retention_RAMsize 0x00004000 /* SRAM A(16K) reserved for pkc */
  41. #elif (defined(__power_down__))
  42. #define retention_RAMsize 0x00000604 /* The first 0x604 bytes reserved to CPU retention for power down mode */
  43. #else
  44. #define retention_RAMsize 0x00000000
  45. #endif
  46. #if (defined(__powerquad__))
  47. #define powerquad_RAMsize 0x00004000 /* SRAM E(16K) reserved for powerquad */
  48. #else
  49. #define powerquad_RAMsize 0x00000000
  50. #endif
  51. #define m_interrupts_start 0x00000000
  52. #define m_interrupts_size 0x00000400
  53. #define m_text_start 0x00000400
  54. #define m_text_size 0x0003D400
  55. #define m_data_start 0x20000000 + retention_RAMsize
  56. #define m_data_size 0x0001C000 - retention_RAMsize - powerquad_RAMsize
  57. #define m_sramx_start 0x04000000
  58. #define m_sramx_size 0x00004000
  59. LR_m_text m_interrupts_start m_interrupts_size+m_text_size { ; load region size_region
  60. VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
  61. * (.isr_vector,+FIRST)
  62. }
  63. ER_m_text m_text_start FIXED m_text_size { ; load address = execution address
  64. * (InRoot$$Sections)
  65. .ANY (+RO)
  66. }
  67. RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
  68. .ANY (+RW +ZI)
  69. }
  70. ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up
  71. }
  72. ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
  73. }
  74. }