board.h 2.3 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Email Notes
  8. * 2019-07-16 Kevin.Liu kevin.liu.mchp@gmail.com First Release
  9. * 2023-09-16 luhuadong luhuadong@163.com fix uart config
  10. */
  11. #ifndef __BOARD_H__
  12. #define __BOARD_H__
  13. // <o> Internal SRAM memory size[Kbytes] <4-32>
  14. // <i>Default: 32
  15. #if defined(__SAMC21E15A__) || defined(__ATSAMC21E15A__)
  16. #define SAMC21_SRAM_SIZE 4
  17. #elif defined(__SAMC21E16A__) || defined(__ATSAMC21E16A__)
  18. #define SAMC21_SRAM_SIZE 8
  19. #elif defined(__SAMC21E17A__) || defined(__ATSAMC21E17A__)
  20. #define SAMC21_SRAM_SIZE 16
  21. #elif defined(__SAMC21E18A__) || defined(__ATSAMC21E18A__)
  22. #define SAMC21_SRAM_SIZE 32
  23. #elif defined(__SAMC21G15A__) || defined(__ATSAMC21G15A__)
  24. #define SAMC21_SRAM_SIZE 4
  25. #elif defined(__SAMC21G16A__) || defined(__ATSAMC21G16A__)
  26. #define SAMC21_SRAM_SIZE 8
  27. #elif defined(__SAMC21G17A__) || defined(__ATSAMC21G17A__)
  28. #define SAMC21_SRAM_SIZE 16
  29. #elif defined(__SAMC21G18A__) || defined(__ATSAMC21G18A__)
  30. #define SAMC21_SRAM_SIZE 32
  31. #elif defined(__SAMC21J15A__) || defined(__ATSAMC21J15A__)
  32. #define SAMC21_SRAM_SIZE 4
  33. #elif defined(__SAMC21J16A__) || defined(__ATSAMC21J16A__)
  34. #define SAMC21_SRAM_SIZE 8
  35. #elif defined(__SAMC21J17A__) || defined(__ATSAMC21J17A__)
  36. #define SAMC21_SRAM_SIZE 16
  37. #elif defined(__SAMC21J17AU__) || defined(__ATSAMC21J17AU__)
  38. #define SAMC21_SRAM_SIZE 16
  39. #elif defined(__SAMC21J18A__) || defined(__ATSAMC21J18A__)
  40. #define SAMC21_SRAM_SIZE 32
  41. #elif defined(__SAMC21J18AU__) || defined(__ATSAMC21J18AU__)
  42. #define SAMC21_SRAM_SIZE 32
  43. #else
  44. #error Board does not support the specified device.
  45. #endif
  46. #define SAMC21_SRAM_END (0x20000000 + SAMC21_SRAM_SIZE * 1024)
  47. #if defined(__ARMCC_VERSION)
  48. extern int Image$$RW_IRAM1$$ZI$$Limit;
  49. #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
  50. #elif __ICCARM__
  51. #pragma section="HEAP"
  52. #define HEAP_BEGIN (__segment_begin("HEAP"))
  53. #define HEAP_END (__segment_end("HEAP"))
  54. #else
  55. extern int __bss_end;
  56. #define HEAP_BEGIN (&__bss_end)
  57. #define HEAP_END SAMC21_SRAM_END
  58. #endif
  59. #ifdef RT_USING_SERIAL
  60. #include "hpl_sercom_config.h"
  61. #define DEFAULT_USART_BAUD_RATE CONF_SERCOM_4_USART_BAUD
  62. #endif
  63. void rt_hw_board_init(void);
  64. #endif