drv_gpio.c 9.2 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2023-07-15 yby the first version
  9. */
  10. #include "drv_gpio.h"
  11. #ifdef RT_USING_PIN
  12. #define _MSP432_PIN(index, gpioport, gpio_index) \
  13. { \
  14. index, GPIO_PORT##gpioport##_BASE, GPIO_PIN_##gpio_index \
  15. }
  16. static const struct pin_index _msp432_pins[] =
  17. {
  18. /* GPIOA 0~7 */
  19. _MSP432_PIN(0, A, 0),
  20. _MSP432_PIN(1, A, 1),
  21. _MSP432_PIN(2, A, 2),
  22. _MSP432_PIN(3, A, 3),
  23. _MSP432_PIN(4, A, 4),
  24. _MSP432_PIN(5, A, 5),
  25. _MSP432_PIN(6, A, 6),
  26. _MSP432_PIN(7, A, 7),
  27. /* GPIOB 0~5 */
  28. _MSP432_PIN(8, B, 0),
  29. _MSP432_PIN(9, B, 1),
  30. _MSP432_PIN(10, B, 2),
  31. _MSP432_PIN(11, B, 3),
  32. _MSP432_PIN(12, B, 4),
  33. _MSP432_PIN(13, B, 5),
  34. /* GPIOC 0~7 */
  35. _MSP432_PIN(14, C, 0),
  36. _MSP432_PIN(15, C, 1),
  37. _MSP432_PIN(16, C, 2),
  38. _MSP432_PIN(17, C, 3),
  39. _MSP432_PIN(18, C, 4),
  40. _MSP432_PIN(19, C, 5),
  41. _MSP432_PIN(20, C, 6),
  42. _MSP432_PIN(21, C, 7),
  43. /* GPIOD 0~7 */
  44. _MSP432_PIN(22, D, 0),
  45. _MSP432_PIN(23, D, 1),
  46. _MSP432_PIN(24, D, 2),
  47. _MSP432_PIN(25, D, 3),
  48. _MSP432_PIN(26, D, 4),
  49. _MSP432_PIN(27, D, 5),
  50. _MSP432_PIN(28, D, 6),
  51. _MSP432_PIN(29, D, 7),
  52. /* GPIOE 0~5 */
  53. _MSP432_PIN(30, E, 0),
  54. _MSP432_PIN(31, E, 1),
  55. _MSP432_PIN(32, E, 2),
  56. _MSP432_PIN(33, E, 3),
  57. _MSP432_PIN(34, E, 4),
  58. _MSP432_PIN(35, E, 5),
  59. /* GPIOF 0~4 */
  60. _MSP432_PIN(36, F, 0),
  61. _MSP432_PIN(37, F, 1),
  62. _MSP432_PIN(38, F, 2),
  63. _MSP432_PIN(39, F, 3),
  64. _MSP432_PIN(40, F, 4),
  65. /* GPIOG 0~1 */
  66. _MSP432_PIN(41, G, 0),
  67. _MSP432_PIN(42, G, 1),
  68. /* GPIOH 0~3 */
  69. _MSP432_PIN(43, H, 0),
  70. _MSP432_PIN(44, H, 1),
  71. _MSP432_PIN(45, H, 0),
  72. _MSP432_PIN(46, H, 1),
  73. /* GPIOJ 0~1 */
  74. _MSP432_PIN(47, J, 0),
  75. _MSP432_PIN(48, J, 1),
  76. /* GPIOK 0~7 */
  77. _MSP432_PIN(49, K, 0),
  78. _MSP432_PIN(50, K, 1),
  79. _MSP432_PIN(51, K, 2),
  80. _MSP432_PIN(52, K, 3),
  81. _MSP432_PIN(53, K, 4),
  82. _MSP432_PIN(54, K, 5),
  83. _MSP432_PIN(55, K, 6),
  84. _MSP432_PIN(56, K, 7),
  85. /* GPIOL 0~7 */
  86. _MSP432_PIN(57, L, 0),
  87. _MSP432_PIN(58, L, 1),
  88. _MSP432_PIN(59, L, 2),
  89. _MSP432_PIN(60, L, 3),
  90. _MSP432_PIN(61, L, 4),
  91. _MSP432_PIN(62, L, 5),
  92. _MSP432_PIN(63, L, 6),
  93. _MSP432_PIN(64, L, 7),
  94. /* GPIOM 0~7 */
  95. _MSP432_PIN(65, M, 0),
  96. _MSP432_PIN(66, M, 1),
  97. _MSP432_PIN(67, M, 2),
  98. _MSP432_PIN(68, M, 3),
  99. _MSP432_PIN(69, M, 4),
  100. _MSP432_PIN(70, M, 5),
  101. _MSP432_PIN(71, M, 6),
  102. _MSP432_PIN(72, M, 7),
  103. /* GPION 0~5 */
  104. _MSP432_PIN(73, N, 0),
  105. _MSP432_PIN(74, N, 1),
  106. _MSP432_PIN(75, N, 2),
  107. _MSP432_PIN(76, N, 3),
  108. _MSP432_PIN(77, N, 4),
  109. _MSP432_PIN(78, N, 5),
  110. /* GPIOP 0~5 */
  111. _MSP432_PIN(79, P, 0),
  112. _MSP432_PIN(80, P, 1),
  113. _MSP432_PIN(81, P, 2),
  114. _MSP432_PIN(82, P, 3),
  115. _MSP432_PIN(83, P, 4),
  116. _MSP432_PIN(84, P, 5),
  117. /* GPIOQ 0~4 */
  118. _MSP432_PIN(85, Q, 0),
  119. _MSP432_PIN(86, Q, 1),
  120. _MSP432_PIN(87, Q, 2),
  121. _MSP432_PIN(88, Q, 3),
  122. _MSP432_PIN(89, Q, 4)
  123. };
  124. #define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
  125. static const struct pin_index *_get_pin(rt_base_t pin)
  126. {
  127. const struct pin_index *index = RT_NULL;
  128. if (pin < ITEM_NUM(_msp432_pins))
  129. {
  130. index = &_msp432_pins[pin];
  131. }
  132. return index;
  133. }
  134. static rt_base_t msp432_pin_get(const char *name)
  135. {
  136. rt_base_t pin = -1;
  137. if ((name[0] == 'P') || (name[2] == '.'))
  138. {
  139. if (name[1] == 'A')
  140. {
  141. pin = name[3] - '0';
  142. }
  143. else if (name[1] == 'B')
  144. {
  145. pin = 8 + name[3] - '0';
  146. }
  147. else if (name[1] == 'C')
  148. {
  149. pin = 14 + name[3] - '0';
  150. }
  151. else if (name[1] == 'D')
  152. {
  153. pin = 22 + name[3] - '0';
  154. }
  155. else if (name[1] == 'E')
  156. {
  157. pin = 30 + name[3] - '0';
  158. }
  159. else if (name[1] == 'F')
  160. {
  161. pin = 36 + name[3] - '0';
  162. }
  163. else if (name[1] == 'G')
  164. {
  165. pin = 41 + name[3] - '0';
  166. }
  167. else if (name[1] == 'H')
  168. {
  169. pin = 43 + name[3] - '0';
  170. }
  171. else if (name[1] == 'J')
  172. {
  173. pin = 47 + name[3] - '0';
  174. }
  175. else if (name[1] == 'K')
  176. {
  177. pin = 49 + name[3] - '0';
  178. }
  179. else if (name[1] == 'L')
  180. {
  181. pin = 57 + name[3] - '0';
  182. }
  183. else if (name[1] == 'M')
  184. {
  185. pin = 65 + name[3] - '0';
  186. }
  187. else if (name[1] == 'N')
  188. {
  189. pin = 73 + name[3] - '0';
  190. }
  191. else if (name[1] == 'P')
  192. {
  193. pin = 79 + name[3] - '0';
  194. }
  195. else if (name[1] == 'Q')
  196. {
  197. pin = 85 + name[3] - '0';
  198. }
  199. else {}
  200. }
  201. return pin;
  202. }
  203. static void msp432_pin_mode(struct rt_device *device, rt_base_t pin, rt_uint8_t mode)
  204. {
  205. const struct pin_index *index = RT_NULL;
  206. index = _get_pin(pin);
  207. if (index != RT_NULL)
  208. {
  209. if (mode == PIN_MODE_INPUT)
  210. {
  211. GPIOPinTypeGPIOInput(index->gpioBaseAddress, index->pin);
  212. }
  213. else if (mode == PIN_MODE_OUTPUT)
  214. {
  215. GPIOPinTypeGPIOOutput(index->gpioBaseAddress, index->pin);
  216. }
  217. else if (mode == PIN_MODE_INPUT_PULLUP)
  218. {
  219. GPIODirModeSet(index->gpioBaseAddress, index->pin, GPIO_DIR_MODE_IN);
  220. GPIOPadConfigSet(index->gpioBaseAddress, index->pin, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU);
  221. }
  222. else if (mode == PIN_MODE_INPUT_PULLDOWN)
  223. {
  224. GPIODirModeSet(index->gpioBaseAddress, index->pin, GPIO_DIR_MODE_IN);
  225. GPIOPadConfigSet(index->gpioBaseAddress, index->pin, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPD);
  226. }
  227. else if (mode == PIN_MODE_OUTPUT_OD)
  228. {
  229. GPIOPadConfigSet(index->gpioBaseAddress, index->pin, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_OD);
  230. GPIODirModeSet(index->gpioBaseAddress, index->pin, GPIO_DIR_MODE_OUT);
  231. }
  232. else {}
  233. }
  234. }
  235. static void msp432_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t value)
  236. {
  237. const struct pin_index *index = RT_NULL;
  238. index = _get_pin(pin);
  239. if (index != RT_NULL)
  240. {
  241. if (value == PIN_HIGH)
  242. {
  243. GPIOPinWrite(index->gpioBaseAddress, index->pin, index->pin);
  244. }
  245. else
  246. {
  247. GPIOPinWrite(index->gpioBaseAddress, index->pin, 0);
  248. }
  249. }
  250. }
  251. static rt_int8_t msp432_pin_read(struct rt_device *device, rt_base_t pin)
  252. {
  253. const struct pin_index *index = RT_NULL;
  254. rt_int8_t value = -1;
  255. index = _get_pin(pin);
  256. if (index != RT_NULL)
  257. {
  258. value = (rt_int8_t)GPIOPinRead(index->gpioBaseAddress, index->pin);
  259. }
  260. return value;
  261. }
  262. static rt_err_t msp432_pin_attach_irq(struct rt_device *device, rt_base_t pin,
  263. rt_uint8_t mode, void (*hdr)(void *args), void *args)
  264. {
  265. /* this is interface for pin_irq, reserved for update. */
  266. return RT_EOK;
  267. }
  268. static rt_err_t msp432_pin_dettach_irq(struct rt_device *device, rt_base_t pin)
  269. {
  270. /* this is interface for pin_irq, reserved for update. */
  271. return RT_EOK;
  272. }
  273. static rt_err_t msp432_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled)
  274. {
  275. /* this is interface for pin_irq_enable, reserved for update. */
  276. return RT_EOK;
  277. }
  278. const static struct rt_pin_ops _msp432_pin_ops =
  279. {
  280. msp432_pin_mode,
  281. msp432_pin_write,
  282. msp432_pin_read,
  283. msp432_pin_attach_irq,
  284. msp432_pin_dettach_irq,
  285. msp432_pin_irq_enable,
  286. msp432_pin_get,
  287. };
  288. int rt_hw_pin_init(void)
  289. {
  290. int ret = -1;
  291. #if defined(SYSCTL_PERIPH_GPIOA)
  292. SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
  293. #endif
  294. #if defined(SYSCTL_PERIPH_GPIOB)
  295. SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
  296. #endif
  297. #if defined(SYSCTL_PERIPH_GPIOC)
  298. SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
  299. #endif
  300. #if defined(SYSCTL_PERIPH_GPIOD)
  301. SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
  302. #endif
  303. #if defined(SYSCTL_PERIPH_GPIOE)
  304. SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
  305. #endif
  306. #if defined(SYSCTL_PERIPH_GPIOF)
  307. SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
  308. #endif
  309. #if defined(SYSCTL_PERIPH_GPIOG)
  310. SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
  311. #endif
  312. #if defined(SYSCTL_PERIPH_GPIOH)
  313. SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOH);
  314. #endif
  315. #if defined(SYSCTL_PERIPH_GPIOJ)
  316. SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOJ);
  317. #endif
  318. #if defined(SYSCTL_PERIPH_GPIOK)
  319. SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
  320. #endif
  321. #if defined(SYSCTL_PERIPH_GPIOL)
  322. SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOL);
  323. #endif
  324. #if defined(SYSCTL_PERIPH_GPIOM)
  325. SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOM);
  326. #endif
  327. #if defined(SYSCTL_PERIPH_GPION)
  328. SysCtlPeripheralEnable(SYSCTL_PERIPH_GPION);
  329. #endif
  330. #if defined(SYSCTL_PERIPH_GPIOP)
  331. SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOP);
  332. #endif
  333. #if defined(SYSCTL_PERIPH_GPIOQ)
  334. SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOQ);
  335. #endif
  336. ret = rt_device_pin_register("pin", &_msp432_pin_ops, RT_NULL);
  337. return ret;
  338. }
  339. #endif /*RT_USING_PIN*/
  340. /************************** end of file ******************/