drv_uart.c 6.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258
  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2023-07-15 yby the first version
  9. */
  10. #include "drv_uart.h"
  11. #ifdef RT_USING_SERIAL
  12. #include "uart_config.h"
  13. #include "interrupt.h"
  14. #include "uart.h"
  15. #define LOG_TAG "drv.uart"
  16. #include <drv_log.h>
  17. #if !defined(BSP_USING_UART0)&&!defined(BSP_USING_UART1)&&!defined(BSP_USING_UART2)&&!defined(BSP_USING_UART3)
  18. #error "Please define at least one BSP_USING_UARTx"
  19. #endif
  20. enum
  21. {
  22. #ifdef BSP_USING_UART0
  23. UART0_INDEX,
  24. #endif
  25. #ifdef BSP_USING_UART1
  26. UART1_INDEX,
  27. #endif
  28. #ifdef BSP_USING_UART2
  29. UART2_INDEX,
  30. #endif
  31. #ifdef BSP_USING_UART3
  32. UART3_INDEX,
  33. #endif
  34. };
  35. uint32_t uart_intbase[] =
  36. {
  37. #ifdef BSP_USING_UART0
  38. INT_UART0,
  39. #endif
  40. #ifdef BSP_USING_UART1
  41. INT_UART1,
  42. #endif
  43. #ifdef BSP_USING_UART2
  44. INT_UART2,
  45. #endif
  46. #ifdef BSP_USING_UART3
  47. INT_UART3
  48. #endif
  49. };
  50. static struct msp432_uart_config uart_config[] =
  51. {
  52. #ifdef BSP_USING_UART0
  53. UART0_CONFIG,
  54. #endif
  55. #ifdef BSP_USING_UART1
  56. UART1_CONFIG,
  57. #endif
  58. #ifdef BSP_USING_UART2
  59. UART2_CONFIG,
  60. #endif
  61. #ifdef BSP_USING_UART3
  62. UART3_CONFIG,
  63. #endif
  64. };
  65. static struct msp432_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
  66. static rt_err_t msp432_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  67. {
  68. struct msp432_uart *uart;
  69. RT_ASSERT(serial != RT_NULL);
  70. RT_ASSERT(cfg != RT_NULL);
  71. uart = rt_container_of(serial, struct msp432_uart, serial);
  72. UARTConfigSetExpClk(uart->config->uartbase, SystemCoreClock, uart->config->baudrate,
  73. uart->config->mode);
  74. UARTIntEnable(uart->config->uartbase, UART_INT_RX);
  75. UARTEnable(uart->config->uartbase);
  76. UARTFIFODisable(uart->config->uartbase);
  77. IntEnable(uart->uartintbase);
  78. return RT_EOK;
  79. }
  80. static rt_err_t msp432_control(struct rt_serial_device *serial, int cmd, void *arg)
  81. {
  82. struct msp432_uart *uart;
  83. RT_ASSERT(serial != RT_NULL);
  84. uart = rt_container_of(serial, struct msp432_uart, serial);
  85. switch (cmd)
  86. {
  87. /* disable interrupt */
  88. case RT_DEVICE_CTRL_CLR_INT:
  89. /* disable rx irq */
  90. IntDisable(uart->uartintbase);
  91. UARTIntDisable(uart->config->uartbase, UART_INT_RX);
  92. break;
  93. /* enable interrupt */
  94. case RT_DEVICE_CTRL_SET_INT:
  95. /* enable rx irq */
  96. IntEnable(uart->uartintbase);
  97. UARTIntEnable(uart->config->uartbase, UART_INT_RX);
  98. break;
  99. }
  100. return RT_EOK;
  101. }
  102. static int msp432_putc(struct rt_serial_device *serial, char c)
  103. {
  104. struct msp432_uart *uart;
  105. RT_ASSERT(serial != RT_NULL);
  106. uart = rt_container_of(serial, struct msp432_uart, serial);
  107. UARTCharPut(uart->config->uartbase, c);
  108. return 1;
  109. }
  110. static int msp432_getc(struct rt_serial_device *serial)
  111. {
  112. int ch;
  113. struct msp432_uart *uart;
  114. RT_ASSERT(serial != RT_NULL);
  115. uart = rt_container_of(serial, struct msp432_uart, serial);
  116. ch = -1;
  117. ch = UARTCharGetNonBlocking(uart->config->uartbase);
  118. return ch;
  119. }
  120. static rt_ssize_t msp432_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
  121. {
  122. /* this is an interface for uart dma, reserved for uptate. */
  123. return 0;
  124. }
  125. static const struct rt_uart_ops msp432_uart_ops =
  126. {
  127. .configure = msp432_configure,
  128. .control = msp432_control,
  129. .putc = msp432_putc,
  130. .getc = msp432_getc,
  131. .dma_transmit = msp432_dma_transmit
  132. };
  133. /**
  134. * Uart common interrupt process. This need add to uart ISR.
  135. *
  136. * @param serial serial device
  137. */
  138. static void uart_isr(struct rt_serial_device *serial)
  139. {
  140. struct msp432_uart *uart;
  141. uint32_t ui32Ints;
  142. RT_ASSERT(serial != RT_NULL);
  143. uart = rt_container_of(serial, struct msp432_uart, serial);
  144. ui32Ints = UARTIntStatus(uart->config->uartbase, true);
  145. UARTIntClear(uart->config->uartbase, ui32Ints);
  146. /* UART in mode Receiver -------------------------------------------------*/
  147. if (ui32Ints & (UART_INT_RX | UART_INT_RT))
  148. {
  149. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  150. }
  151. }
  152. #if defined(BSP_USING_UART0)
  153. void UART0_IRQHandler(void)
  154. {
  155. /* enter interrupt */
  156. rt_interrupt_enter();
  157. uart_isr(&(uart_obj[UART0_INDEX].serial));
  158. /* leave interrupt */
  159. rt_interrupt_leave();
  160. }
  161. #endif /* BSP_USING_UART0 */
  162. #if defined(BSP_USING_UART1)
  163. void UART1_IRQHandler(void)
  164. {
  165. /* enter interrupt */
  166. rt_interrupt_enter();
  167. uart_isr(&(uart_obj[UART1_INDEX].serial));
  168. /* leave interrupt */
  169. rt_interrupt_leave();
  170. }
  171. #endif /* BSP_USING_UART1 */
  172. #if defined(BSP_USING_UART2)
  173. void UART2_IRQHandler(void)
  174. {
  175. /* enter interrupt */
  176. rt_interrupt_enter();
  177. uart_isr(&(uart_obj[UART2_INDEX].serial));
  178. /* leave interrupt */
  179. rt_interrupt_leave();
  180. }
  181. #endif /* BSP_USING_UART2 */
  182. #if defined(BSP_USING_UART3)
  183. void UART3_IRQHandler(void)
  184. {
  185. /* enter interrupt */
  186. rt_interrupt_enter();
  187. uart_isr(&(uart_obj[UART3_INDEX].serial));
  188. /* leave interrupt */
  189. rt_interrupt_leave();
  190. }
  191. #endif /* BSP_USING_UART3 */
  192. int rt_hw_usart_init(void)
  193. {
  194. rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct msp432_uart);
  195. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  196. rt_err_t result = 0;
  197. uart_hw_config();
  198. for (int i = 0; i < obj_num; i++)
  199. {
  200. uart_obj[i].config = &uart_config[i];
  201. uart_obj[i].uartintbase = uart_intbase[i];
  202. uart_obj[i].serial.ops = &msp432_uart_ops;
  203. uart_obj[i].serial.config = config;
  204. /* register UART device */
  205. result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
  206. RT_DEVICE_FLAG_RDWR
  207. | RT_DEVICE_FLAG_INT_RX
  208. | RT_DEVICE_FLAG_INT_TX
  209. | uart_obj[i].uart_dma_flag
  210. , NULL);
  211. RT_ASSERT(result == RT_EOK);
  212. }
  213. return result;
  214. }
  215. #endif /* RT_USING_SERIAL */
  216. /************************** end of file ******************/