nu_gpio.h 36 KB

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  1. /**************************************************************************//**
  2. * @file nu_gpio.h
  3. * @version V3.00
  4. * @brief M460 series GPIO driver header file
  5. *
  6. * @copyright SPDX-License-Identifier: Apache-2.0
  7. * @copyright Copyright (C) 2021 Nuvoton Technology Corp. All rights reserved.
  8. ******************************************************************************/
  9. #ifndef __NU_GPIO_H__
  10. #define __NU_GPIO_H__
  11. #ifdef __cplusplus
  12. extern "C"
  13. {
  14. #endif
  15. /** @addtogroup Standard_Driver Standard Driver
  16. @{
  17. */
  18. /** @addtogroup GPIO_Driver GPIO Driver
  19. @{
  20. */
  21. /** @addtogroup GPIO_EXPORTED_CONSTANTS GPIO Exported Constants
  22. @{
  23. */
  24. #define GPIO_PIN_MAX 16UL /*!< Specify Maximum Pins of Each GPIO Port \hideinitializer */
  25. /*---------------------------------------------------------------------------------------------------------*/
  26. /* GPIO_MODE Constant Definitions */
  27. /*---------------------------------------------------------------------------------------------------------*/
  28. #define GPIO_MODE_INPUT 0x0UL /*!< Input Mode \hideinitializer */
  29. #define GPIO_MODE_OUTPUT 0x1UL /*!< Output Mode \hideinitializer */
  30. #define GPIO_MODE_OPEN_DRAIN 0x2UL /*!< Open-Drain Mode \hideinitializer */
  31. #define GPIO_MODE_QUASI 0x3UL /*!< Quasi-bidirectional Mode \hideinitializer */
  32. /*---------------------------------------------------------------------------------------------------------*/
  33. /* GPIO Interrupt Type Constant Definitions */
  34. /*---------------------------------------------------------------------------------------------------------*/
  35. #define GPIO_INT_RISING 0x00010000UL /*!< Interrupt enable by Input Rising Edge \hideinitializer */
  36. #define GPIO_INT_FALLING 0x00000001UL /*!< Interrupt enable by Input Falling Edge \hideinitializer */
  37. #define GPIO_INT_BOTH_EDGE 0x00010001UL /*!< Interrupt enable by both Rising Edge and Falling Edge \hideinitializer */
  38. #define GPIO_INT_HIGH 0x01010000UL /*!< Interrupt enable by Level-High \hideinitializer */
  39. #define GPIO_INT_LOW 0x01000001UL /*!< Interrupt enable by Level-Level \hideinitializer */
  40. /*---------------------------------------------------------------------------------------------------------*/
  41. /* GPIO_INTTYPE Constant Definitions */
  42. /*---------------------------------------------------------------------------------------------------------*/
  43. #define GPIO_INTTYPE_EDGE 0UL /*!< GPIO_INTTYPE Setting for Edge Trigger Mode \hideinitializer */
  44. #define GPIO_INTTYPE_LEVEL 1UL /*!< GPIO_INTTYPE Setting for Edge Level Mode \hideinitializer */
  45. /*---------------------------------------------------------------------------------------------------------*/
  46. /* GPIO Slew Rate Type Constant Definitions */
  47. /*---------------------------------------------------------------------------------------------------------*/
  48. #define GPIO_SLEWCTL_NORMAL 0x0UL /*!< GPIO slew setting for normal Mode \hideinitializer */
  49. #define GPIO_SLEWCTL_HIGH 0x1UL /*!< GPIO slew setting for high Mode \hideinitializer */
  50. #define GPIO_SLEWCTL_FAST 0x2UL /*!< GPIO slew setting for fast Mode \hideinitializer */
  51. /*---------------------------------------------------------------------------------------------------------*/
  52. /* GPIO Pull-up And Pull-down Type Constant Definitions */
  53. /*---------------------------------------------------------------------------------------------------------*/
  54. #define GPIO_PUSEL_DISABLE 0x0UL /*!< GPIO PUSEL setting for Disable Mode \hideinitializer */
  55. #define GPIO_PUSEL_PULL_UP 0x1UL /*!< GPIO PUSEL setting for Pull-up Mode \hideinitializer */
  56. #define GPIO_PUSEL_PULL_DOWN 0x2UL /*!< GPIO PUSEL setting for Pull-down Mode \hideinitializer */
  57. /*---------------------------------------------------------------------------------------------------------*/
  58. /* GPIO_DBCTL Constant Definitions */
  59. /*---------------------------------------------------------------------------------------------------------*/
  60. #define GPIO_DBCTL_ICLK_ON 0x00000020UL /*!< GPIO_DBCTL setting for all IO pins edge detection circuit is always active after reset \hideinitializer */
  61. #define GPIO_DBCTL_ICLK_OFF 0x00000000UL /*!< GPIO_DBCTL setting for edge detection circuit is active only if IO pin corresponding GPIOx_IEN bit is set to 1 \hideinitializer */
  62. #define GPIO_DBCTL_DBCLKSRC_LIRC 0x00000010UL /*!< GPIO_DBCTL setting for de-bounce counter clock source is the internal 10 kHz \hideinitializer */
  63. #define GPIO_DBCTL_DBCLKSRC_HCLK 0x00000000UL /*!< GPIO_DBCTL setting for de-bounce counter clock source is the HCLK \hideinitializer */
  64. #define GPIO_DBCTL_DBCLKSEL_1 0x00000000UL /*!< GPIO_DBCTL setting for sampling cycle = 1 clocks \hideinitializer */
  65. #define GPIO_DBCTL_DBCLKSEL_2 0x00000001UL /*!< GPIO_DBCTL setting for sampling cycle = 2 clocks \hideinitializer */
  66. #define GPIO_DBCTL_DBCLKSEL_4 0x00000002UL /*!< GPIO_DBCTL setting for sampling cycle = 4 clocks \hideinitializer */
  67. #define GPIO_DBCTL_DBCLKSEL_8 0x00000003UL /*!< GPIO_DBCTL setting for sampling cycle = 8 clocks \hideinitializer */
  68. #define GPIO_DBCTL_DBCLKSEL_16 0x00000004UL /*!< GPIO_DBCTL setting for sampling cycle = 16 clocks \hideinitializer */
  69. #define GPIO_DBCTL_DBCLKSEL_32 0x00000005UL /*!< GPIO_DBCTL setting for sampling cycle = 32 clocks \hideinitializer */
  70. #define GPIO_DBCTL_DBCLKSEL_64 0x00000006UL /*!< GPIO_DBCTL setting for sampling cycle = 64 clocks \hideinitializer */
  71. #define GPIO_DBCTL_DBCLKSEL_128 0x00000007UL /*!< GPIO_DBCTL setting for sampling cycle = 128 clocks \hideinitializer */
  72. #define GPIO_DBCTL_DBCLKSEL_256 0x00000008UL /*!< GPIO_DBCTL setting for sampling cycle = 256 clocks \hideinitializer */
  73. #define GPIO_DBCTL_DBCLKSEL_512 0x00000009UL /*!< GPIO_DBCTL setting for sampling cycle = 512 clocks \hideinitializer */
  74. #define GPIO_DBCTL_DBCLKSEL_1024 0x0000000AUL /*!< GPIO_DBCTL setting for sampling cycle = 1024 clocks \hideinitializer */
  75. #define GPIO_DBCTL_DBCLKSEL_2048 0x0000000BUL /*!< GPIO_DBCTL setting for sampling cycle = 2048 clocks \hideinitializer */
  76. #define GPIO_DBCTL_DBCLKSEL_4096 0x0000000CUL /*!< GPIO_DBCTL setting for sampling cycle = 4096 clocks \hideinitializer */
  77. #define GPIO_DBCTL_DBCLKSEL_8192 0x0000000DUL /*!< GPIO_DBCTL setting for sampling cycle = 8192 clocks \hideinitializer */
  78. #define GPIO_DBCTL_DBCLKSEL_16384 0x0000000EUL /*!< GPIO_DBCTL setting for sampling cycle = 16384 clocks \hideinitializer */
  79. #define GPIO_DBCTL_DBCLKSEL_32768 0x0000000FUL /*!< GPIO_DBCTL setting for sampling cycle = 32768 clocks \hideinitializer */
  80. /* Define GPIO Pin Data Input/Output. It could be used to control each I/O pin by pin address mapping.
  81. Example 1:
  82. PA0 = 1;
  83. It is used to set GPIO PA.0 to high;
  84. Example 2:
  85. if (PA0)
  86. PA0 = 0;
  87. If GPIO PA.0 pin status is high, then set GPIO PA.0 data output to low.
  88. */
  89. #define GPIO_PIN_DATA(port, pin) (*((volatile uint32_t *)((GPIO_PIN_DATA_BASE+(0x40*(port))) + ((pin)<<2)))) /*!< Pin Data Input/Output \hideinitializer */
  90. #define PA0 GPIO_PIN_DATA(0, 0 ) /*!< Specify PA.0 Pin Data Input/Output \hideinitializer */
  91. #define PA1 GPIO_PIN_DATA(0, 1 ) /*!< Specify PA.1 Pin Data Input/Output \hideinitializer */
  92. #define PA2 GPIO_PIN_DATA(0, 2 ) /*!< Specify PA.2 Pin Data Input/Output \hideinitializer */
  93. #define PA3 GPIO_PIN_DATA(0, 3 ) /*!< Specify PA.3 Pin Data Input/Output \hideinitializer */
  94. #define PA4 GPIO_PIN_DATA(0, 4 ) /*!< Specify PA.4 Pin Data Input/Output \hideinitializer */
  95. #define PA5 GPIO_PIN_DATA(0, 5 ) /*!< Specify PA.5 Pin Data Input/Output \hideinitializer */
  96. #define PA6 GPIO_PIN_DATA(0, 6 ) /*!< Specify PA.6 Pin Data Input/Output \hideinitializer */
  97. #define PA7 GPIO_PIN_DATA(0, 7 ) /*!< Specify PA.7 Pin Data Input/Output \hideinitializer */
  98. #define PA8 GPIO_PIN_DATA(0, 8 ) /*!< Specify PA.8 Pin Data Input/Output \hideinitializer */
  99. #define PA9 GPIO_PIN_DATA(0, 9 ) /*!< Specify PA.9 Pin Data Input/Output \hideinitializer */
  100. #define PA10 GPIO_PIN_DATA(0, 10) /*!< Specify PA.10 Pin Data Input/Output \hideinitializer */
  101. #define PA11 GPIO_PIN_DATA(0, 11) /*!< Specify PA.11 Pin Data Input/Output \hideinitializer */
  102. #define PA12 GPIO_PIN_DATA(0, 12) /*!< Specify PA.12 Pin Data Input/Output \hideinitializer */
  103. #define PA13 GPIO_PIN_DATA(0, 13) /*!< Specify PA.13 Pin Data Input/Output \hideinitializer */
  104. #define PA14 GPIO_PIN_DATA(0, 14) /*!< Specify PA.14 Pin Data Input/Output \hideinitializer */
  105. #define PA15 GPIO_PIN_DATA(0, 15) /*!< Specify PA.15 Pin Data Input/Output \hideinitializer */
  106. #define PB0 GPIO_PIN_DATA(1, 0 ) /*!< Specify PB.0 Pin Data Input/Output \hideinitializer */
  107. #define PB1 GPIO_PIN_DATA(1, 1 ) /*!< Specify PB.1 Pin Data Input/Output \hideinitializer */
  108. #define PB2 GPIO_PIN_DATA(1, 2 ) /*!< Specify PB.2 Pin Data Input/Output \hideinitializer */
  109. #define PB3 GPIO_PIN_DATA(1, 3 ) /*!< Specify PB.3 Pin Data Input/Output \hideinitializer */
  110. #define PB4 GPIO_PIN_DATA(1, 4 ) /*!< Specify PB.4 Pin Data Input/Output \hideinitializer */
  111. #define PB5 GPIO_PIN_DATA(1, 5 ) /*!< Specify PB.5 Pin Data Input/Output \hideinitializer */
  112. #define PB6 GPIO_PIN_DATA(1, 6 ) /*!< Specify PB.6 Pin Data Input/Output \hideinitializer */
  113. #define PB7 GPIO_PIN_DATA(1, 7 ) /*!< Specify PB.7 Pin Data Input/Output \hideinitializer */
  114. #define PB8 GPIO_PIN_DATA(1, 8 ) /*!< Specify PB.8 Pin Data Input/Output \hideinitializer */
  115. #define PB9 GPIO_PIN_DATA(1, 9 ) /*!< Specify PB.9 Pin Data Input/Output \hideinitializer */
  116. #define PB10 GPIO_PIN_DATA(1, 10) /*!< Specify PB.10 Pin Data Input/Output \hideinitializer */
  117. #define PB11 GPIO_PIN_DATA(1, 11) /*!< Specify PB.11 Pin Data Input/Output \hideinitializer */
  118. #define PB12 GPIO_PIN_DATA(1, 12) /*!< Specify PB.12 Pin Data Input/Output \hideinitializer */
  119. #define PB13 GPIO_PIN_DATA(1, 13) /*!< Specify PB.13 Pin Data Input/Output \hideinitializer */
  120. #define PB14 GPIO_PIN_DATA(1, 14) /*!< Specify PB.14 Pin Data Input/Output \hideinitializer */
  121. #define PB15 GPIO_PIN_DATA(1, 15) /*!< Specify PB.15 Pin Data Input/Output \hideinitializer */
  122. #define PC0 GPIO_PIN_DATA(2, 0 ) /*!< Specify PC.0 Pin Data Input/Output \hideinitializer */
  123. #define PC1 GPIO_PIN_DATA(2, 1 ) /*!< Specify PC.1 Pin Data Input/Output \hideinitializer */
  124. #define PC2 GPIO_PIN_DATA(2, 2 ) /*!< Specify PC.2 Pin Data Input/Output \hideinitializer */
  125. #define PC3 GPIO_PIN_DATA(2, 3 ) /*!< Specify PC.3 Pin Data Input/Output \hideinitializer */
  126. #define PC4 GPIO_PIN_DATA(2, 4 ) /*!< Specify PC.4 Pin Data Input/Output \hideinitializer */
  127. #define PC5 GPIO_PIN_DATA(2, 5 ) /*!< Specify PC.5 Pin Data Input/Output \hideinitializer */
  128. #define PC6 GPIO_PIN_DATA(2, 6 ) /*!< Specify PC.6 Pin Data Input/Output \hideinitializer */
  129. #define PC7 GPIO_PIN_DATA(2, 7 ) /*!< Specify PC.7 Pin Data Input/Output \hideinitializer */
  130. #define PC8 GPIO_PIN_DATA(2, 8 ) /*!< Specify PC.8 Pin Data Input/Output \hideinitializer */
  131. #define PC9 GPIO_PIN_DATA(2, 9 ) /*!< Specify PC.9 Pin Data Input/Output \hideinitializer */
  132. #define PC10 GPIO_PIN_DATA(2, 10) /*!< Specify PC.10 Pin Data Input/Output \hideinitializer */
  133. #define PC11 GPIO_PIN_DATA(2, 11) /*!< Specify PC.11 Pin Data Input/Output \hideinitializer */
  134. #define PC12 GPIO_PIN_DATA(2, 12) /*!< Specify PC.12 Pin Data Input/Output \hideinitializer */
  135. #define PC13 GPIO_PIN_DATA(2, 13) /*!< Specify PC.13 Pin Data Input/Output \hideinitializer */
  136. #define PC14 GPIO_PIN_DATA(2, 14) /*!< Specify PC.14 Pin Data Input/Output \hideinitializer */
  137. #define PD0 GPIO_PIN_DATA(3, 0 ) /*!< Specify PD.0 Pin Data Input/Output \hideinitializer */
  138. #define PD1 GPIO_PIN_DATA(3, 1 ) /*!< Specify PD.1 Pin Data Input/Output \hideinitializer */
  139. #define PD2 GPIO_PIN_DATA(3, 2 ) /*!< Specify PD.2 Pin Data Input/Output \hideinitializer */
  140. #define PD3 GPIO_PIN_DATA(3, 3 ) /*!< Specify PD.3 Pin Data Input/Output \hideinitializer */
  141. #define PD4 GPIO_PIN_DATA(3, 4 ) /*!< Specify PD.4 Pin Data Input/Output \hideinitializer */
  142. #define PD5 GPIO_PIN_DATA(3, 5 ) /*!< Specify PD.5 Pin Data Input/Output \hideinitializer */
  143. #define PD6 GPIO_PIN_DATA(3, 6 ) /*!< Specify PD.6 Pin Data Input/Output \hideinitializer */
  144. #define PD7 GPIO_PIN_DATA(3, 7 ) /*!< Specify PD.7 Pin Data Input/Output \hideinitializer */
  145. #define PD8 GPIO_PIN_DATA(3, 8 ) /*!< Specify PD.8 Pin Data Input/Output \hideinitializer */
  146. #define PD9 GPIO_PIN_DATA(3, 9 ) /*!< Specify PD.9 Pin Data Input/Output \hideinitializer */
  147. #define PD10 GPIO_PIN_DATA(3, 10) /*!< Specify PD.10 Pin Data Input/Output \hideinitializer */
  148. #define PD11 GPIO_PIN_DATA(3, 11) /*!< Specify PD.11 Pin Data Input/Output \hideinitializer */
  149. #define PD12 GPIO_PIN_DATA(3, 12) /*!< Specify PD.12 Pin Data Input/Output \hideinitializer */
  150. #define PD13 GPIO_PIN_DATA(3, 13) /*!< Specify PD.13 Pin Data Input/Output \hideinitializer */
  151. #define PD14 GPIO_PIN_DATA(3, 14) /*!< Specify PD.14 Pin Data Input/Output \hideinitializer */
  152. #define PE0 GPIO_PIN_DATA(4, 0 ) /*!< Specify PE.0 Pin Data Input/Output \hideinitializer */
  153. #define PE1 GPIO_PIN_DATA(4, 1 ) /*!< Specify PE.1 Pin Data Input/Output \hideinitializer */
  154. #define PE2 GPIO_PIN_DATA(4, 2 ) /*!< Specify PE.2 Pin Data Input/Output \hideinitializer */
  155. #define PE3 GPIO_PIN_DATA(4, 3 ) /*!< Specify PE.3 Pin Data Input/Output \hideinitializer */
  156. #define PE4 GPIO_PIN_DATA(4, 4 ) /*!< Specify PE.4 Pin Data Input/Output \hideinitializer */
  157. #define PE5 GPIO_PIN_DATA(4, 5 ) /*!< Specify PE.5 Pin Data Input/Output \hideinitializer */
  158. #define PE6 GPIO_PIN_DATA(4, 6 ) /*!< Specify PE.6 Pin Data Input/Output \hideinitializer */
  159. #define PE7 GPIO_PIN_DATA(4, 7 ) /*!< Specify PE.7 Pin Data Input/Output \hideinitializer */
  160. #define PE8 GPIO_PIN_DATA(4, 8 ) /*!< Specify PE.8 Pin Data Input/Output \hideinitializer */
  161. #define PE9 GPIO_PIN_DATA(4, 9 ) /*!< Specify PE.9 Pin Data Input/Output \hideinitializer */
  162. #define PE10 GPIO_PIN_DATA(4, 10) /*!< Specify PE.10 Pin Data Input/Output \hideinitializer */
  163. #define PE11 GPIO_PIN_DATA(4, 11) /*!< Specify PE.11 Pin Data Input/Output \hideinitializer */
  164. #define PE12 GPIO_PIN_DATA(4, 12) /*!< Specify PE.12 Pin Data Input/Output \hideinitializer */
  165. #define PE13 GPIO_PIN_DATA(4, 13) /*!< Specify PE.13 Pin Data Input/Output \hideinitializer */
  166. #define PE14 GPIO_PIN_DATA(4, 14) /*!< Specify PE.14 Pin Data Input/Output \hideinitializer */
  167. #define PE15 GPIO_PIN_DATA(4, 15) /*!< Specify PE.15 Pin Data Input/Output \hideinitializer */
  168. #define PF0 GPIO_PIN_DATA(5, 0 ) /*!< Specify PF.0 Pin Data Input/Output \hideinitializer */
  169. #define PF1 GPIO_PIN_DATA(5, 1 ) /*!< Specify PF.1 Pin Data Input/Output \hideinitializer */
  170. #define PF2 GPIO_PIN_DATA(5, 2 ) /*!< Specify PF.2 Pin Data Input/Output \hideinitializer */
  171. #define PF3 GPIO_PIN_DATA(5, 3 ) /*!< Specify PF.3 Pin Data Input/Output \hideinitializer */
  172. #define PF4 GPIO_PIN_DATA(5, 4 ) /*!< Specify PF.4 Pin Data Input/Output \hideinitializer */
  173. #define PF5 GPIO_PIN_DATA(5, 5 ) /*!< Specify PF.5 Pin Data Input/Output \hideinitializer */
  174. #define PF6 GPIO_PIN_DATA(5, 6 ) /*!< Specify PF.6 Pin Data Input/Output \hideinitializer */
  175. #define PF7 GPIO_PIN_DATA(5, 7 ) /*!< Specify PF.7 Pin Data Input/Output \hideinitializer */
  176. #define PF8 GPIO_PIN_DATA(5, 8 ) /*!< Specify PF.8 Pin Data Input/Output \hideinitializer */
  177. #define PF9 GPIO_PIN_DATA(5, 9 ) /*!< Specify PF.9 Pin Data Input/Output \hideinitializer */
  178. #define PF10 GPIO_PIN_DATA(5, 10) /*!< Specify PF.10 Pin Data Input/Output \hideinitializer */
  179. #define PF11 GPIO_PIN_DATA(5, 11) /*!< Specify PF.11 Pin Data Input/Output \hideinitializer */
  180. #define PG0 GPIO_PIN_DATA(6, 0 ) /*!< Specify PG.0 Pin Data Input/Output \hideinitializer */
  181. #define PG1 GPIO_PIN_DATA(6, 1 ) /*!< Specify PG.1 Pin Data Input/Output \hideinitializer */
  182. #define PG2 GPIO_PIN_DATA(6, 2 ) /*!< Specify PG.2 Pin Data Input/Output \hideinitializer */
  183. #define PG3 GPIO_PIN_DATA(6, 3 ) /*!< Specify PG.3 Pin Data Input/Output \hideinitializer */
  184. #define PG4 GPIO_PIN_DATA(6, 4 ) /*!< Specify PG.4 Pin Data Input/Output \hideinitializer */
  185. #define PG5 GPIO_PIN_DATA(6, 5 ) /*!< Specify PG.5 Pin Data Input/Output \hideinitializer */
  186. #define PG6 GPIO_PIN_DATA(6, 6 ) /*!< Specify PG.6 Pin Data Input/Output \hideinitializer */
  187. #define PG7 GPIO_PIN_DATA(6, 7 ) /*!< Specify PG.7 Pin Data Input/Output \hideinitializer */
  188. #define PG8 GPIO_PIN_DATA(6, 8 ) /*!< Specify PG.8 Pin Data Input/Output \hideinitializer */
  189. #define PG9 GPIO_PIN_DATA(6, 9 ) /*!< Specify PG.9 Pin Data Input/Output \hideinitializer */
  190. #define PG10 GPIO_PIN_DATA(6, 10) /*!< Specify PG.10 Pin Data Input/Output \hideinitializer */
  191. #define PG11 GPIO_PIN_DATA(6, 11) /*!< Specify PG.11 Pin Data Input/Output \hideinitializer */
  192. #define PG12 GPIO_PIN_DATA(6, 12) /*!< Specify PG.12 Pin Data Input/Output \hideinitializer */
  193. #define PG13 GPIO_PIN_DATA(6, 13) /*!< Specify PG.13 Pin Data Input/Output \hideinitializer */
  194. #define PG14 GPIO_PIN_DATA(6, 14) /*!< Specify PG.14 Pin Data Input/Output \hideinitializer */
  195. #define PG15 GPIO_PIN_DATA(6, 15) /*!< Specify PG.15 Pin Data Input/Output \hideinitializer */
  196. #define PH0 GPIO_PIN_DATA(7, 0 ) /*!< Specify PH.0 Pin Data Input/Output \hideinitializer */
  197. #define PH1 GPIO_PIN_DATA(7, 1 ) /*!< Specify PH.1 Pin Data Input/Output \hideinitializer */
  198. #define PH2 GPIO_PIN_DATA(7, 2 ) /*!< Specify PH.2 Pin Data Input/Output \hideinitializer */
  199. #define PH3 GPIO_PIN_DATA(7, 3 ) /*!< Specify PH.3 Pin Data Input/Output \hideinitializer */
  200. #define PH4 GPIO_PIN_DATA(7, 4 ) /*!< Specify PH.4 Pin Data Input/Output \hideinitializer */
  201. #define PH5 GPIO_PIN_DATA(7, 5 ) /*!< Specify PH.5 Pin Data Input/Output \hideinitializer */
  202. #define PH6 GPIO_PIN_DATA(7, 6 ) /*!< Specify PH.6 Pin Data Input/Output \hideinitializer */
  203. #define PH7 GPIO_PIN_DATA(7, 7 ) /*!< Specify PH.7 Pin Data Input/Output \hideinitializer */
  204. #define PH8 GPIO_PIN_DATA(7, 8 ) /*!< Specify PH.8 Pin Data Input/Output \hideinitializer */
  205. #define PH9 GPIO_PIN_DATA(7, 9 ) /*!< Specify PH.9 Pin Data Input/Output \hideinitializer */
  206. #define PH10 GPIO_PIN_DATA(7, 10) /*!< Specify PH.10 Pin Data Input/Output \hideinitializer */
  207. #define PH11 GPIO_PIN_DATA(7, 11) /*!< Specify PH.11 Pin Data Input/Output \hideinitializer */
  208. #define PH12 GPIO_PIN_DATA(7, 12) /*!< Specify PH.12 Pin Data Input/Output \hideinitializer */
  209. #define PH13 GPIO_PIN_DATA(7, 13) /*!< Specify PH.13 Pin Data Input/Output \hideinitializer */
  210. #define PH14 GPIO_PIN_DATA(7, 14) /*!< Specify PH.14 Pin Data Input/Output \hideinitializer */
  211. #define PH15 GPIO_PIN_DATA(7, 15) /*!< Specify PH.15 Pin Data Input/Output \hideinitializer */
  212. #define PI6 GPIO_PIN_DATA(8, 6 ) /*!< Specify PI.6 Pin Data Input/Output \hideinitializer */
  213. #define PI7 GPIO_PIN_DATA(8, 7 ) /*!< Specify PI.7 Pin Data Input/Output \hideinitializer */
  214. #define PI8 GPIO_PIN_DATA(8, 8 ) /*!< Specify PI.8 Pin Data Input/Output \hideinitializer */
  215. #define PI9 GPIO_PIN_DATA(8, 9 ) /*!< Specify PI.9 Pin Data Input/Output \hideinitializer */
  216. #define PI10 GPIO_PIN_DATA(8, 10) /*!< Specify PI.10 Pin Data Input/Output \hideinitializer */
  217. #define PI11 GPIO_PIN_DATA(8, 11) /*!< Specify PI.11 Pin Data Input/Output \hideinitializer */
  218. #define PI12 GPIO_PIN_DATA(8, 12) /*!< Specify PI.12 Pin Data Input/Output \hideinitializer */
  219. #define PI13 GPIO_PIN_DATA(8, 13) /*!< Specify PI.13 Pin Data Input/Output \hideinitializer */
  220. #define PI14 GPIO_PIN_DATA(8, 14) /*!< Specify PI.14 Pin Data Input/Output \hideinitializer */
  221. #define PI15 GPIO_PIN_DATA(8, 15) /*!< Specify PI.15 Pin Data Input/Output \hideinitializer */
  222. #define PJ0 GPIO_PIN_DATA(9, 0 ) /*!< Specify PJ.0 Pin Data Input/Output \hideinitializer */
  223. #define PJ1 GPIO_PIN_DATA(9, 1 ) /*!< Specify PJ.1 Pin Data Input/Output \hideinitializer */
  224. #define PJ2 GPIO_PIN_DATA(9, 2 ) /*!< Specify PJ.2 Pin Data Input/Output \hideinitializer */
  225. #define PJ3 GPIO_PIN_DATA(9, 3 ) /*!< Specify PJ.3 Pin Data Input/Output \hideinitializer */
  226. #define PJ4 GPIO_PIN_DATA(9, 4 ) /*!< Specify PJ.4 Pin Data Input/Output \hideinitializer */
  227. #define PJ5 GPIO_PIN_DATA(9, 5 ) /*!< Specify PJ.5 Pin Data Input/Output \hideinitializer */
  228. #define PJ6 GPIO_PIN_DATA(9, 6 ) /*!< Specify PJ.6 Pin Data Input/Output \hideinitializer */
  229. #define PJ7 GPIO_PIN_DATA(9, 7 ) /*!< Specify PJ.7 Pin Data Input/Output \hideinitializer */
  230. #define PJ8 GPIO_PIN_DATA(9, 8 ) /*!< Specify PJ.8 Pin Data Input/Output \hideinitializer */
  231. #define PJ9 GPIO_PIN_DATA(9, 9 ) /*!< Specify PJ.9 Pin Data Input/Output \hideinitializer */
  232. #define PJ10 GPIO_PIN_DATA(9, 10) /*!< Specify PJ.10 Pin Data Input/Output \hideinitializer */
  233. #define PJ11 GPIO_PIN_DATA(9, 11) /*!< Specify PJ.11 Pin Data Input/Output \hideinitializer */
  234. #define PJ12 GPIO_PIN_DATA(9, 12) /*!< Specify PJ.12 Pin Data Input/Output \hideinitializer */
  235. #define PJ13 GPIO_PIN_DATA(9, 13) /*!< Specify PJ.13 Pin Data Input/Output \hideinitializer */
  236. /*@}*/ /* end of group GPIO_EXPORTED_CONSTANTS */
  237. /** @addtogroup GPIO_EXPORTED_FUNCTIONS GPIO Exported Functions
  238. @{
  239. */
  240. /**
  241. * @brief Clear GPIO Pin Interrupt Flag
  242. *
  243. * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG, \ref PH, \ref PI or \ref PJ.
  244. * @param[in] u32PinMask The single or multiple pins of specified GPIO port. \n
  245. * It could be BIT0 ~ BIT15 for PA, PB, PE, PG and PH GPIO port. \n
  246. * It could be BIT0 ~ BIT14 for PC and PD GPIO port. \n
  247. * It could be BIT0 ~ BIT11 for PF GPIO port. \n
  248. * It could be BIT6 ~ BIT15 for PI GPIO port. \n
  249. * It could be BIT0 ~ BIT13 for PJ GPIO port.
  250. *
  251. * @return None
  252. *
  253. * @details Clear the interrupt status of specified GPIO pin.
  254. * \hideinitializer
  255. */
  256. #define GPIO_CLR_INT_FLAG(port, u32PinMask) ((port)->INTSRC = (u32PinMask))
  257. /**
  258. * @brief Disable Pin De-bounce Function
  259. *
  260. * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG, \ref PH, \ref PI or \ref PJ.
  261. * @param[in] u32PinMask The single or multiple pins of specified GPIO port. \n
  262. * It could be BIT0 ~ BIT15 for PA, PB, PE, PG and PH GPIO port. \n
  263. * It could be BIT0 ~ BIT14 for PC and PD GPIO port. \n
  264. * It could be BIT0 ~ BIT11 for PF GPIO port. \n
  265. * It could be BIT6 ~ BIT15 for PI GPIO port. \n
  266. * It could be BIT0 ~ BIT13 for PJ GPIO port.
  267. *
  268. * @return None
  269. *
  270. * @details Disable the interrupt de-bounce function of specified GPIO pin.
  271. * \hideinitializer
  272. */
  273. #define GPIO_DISABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN &= ~(u32PinMask))
  274. /**
  275. * @brief Enable Pin De-bounce Function
  276. *
  277. * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG, \ref PH, \ref PI or \ref PJ.
  278. * @param[in] u32PinMask The single or multiple pins of specified GPIO port. \n
  279. * It could be BIT0 ~ BIT15 for PA, PB, PE, PG and PH GPIO port. \n
  280. * It could be BIT0 ~ BIT14 for PC and PD GPIO port. \n
  281. * It could be BIT0 ~ BIT11 for PF GPIO port. \n
  282. * It could be BIT6 ~ BIT15 for PI GPIO port. \n
  283. * It could be BIT0 ~ BIT13 for PJ GPIO port.
  284. * @return None
  285. *
  286. * @details Enable the interrupt de-bounce function of specified GPIO pin.
  287. * \hideinitializer
  288. */
  289. #define GPIO_ENABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN |= (u32PinMask))
  290. /**
  291. * @brief Disable I/O Digital Input Path
  292. *
  293. * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG, \ref PH, \ref PI or \ref PJ.
  294. * @param[in] u32PinMask The single or multiple pins of specified GPIO port. \n
  295. * It could be BIT0 ~ BIT15 for PA, PB, PE, PG and PH GPIO port. \n
  296. * It could be BIT0 ~ BIT14 for PC and PD GPIO port. \n
  297. * It could be BIT0 ~ BIT11 for PF GPIO port. \n
  298. * It could be BIT6 ~ BIT15 for PI GPIO port. \n
  299. * It could be BIT0 ~ BIT13 for PJ GPIO port.
  300. *
  301. * @return None
  302. *
  303. * @details Disable I/O digital input path of specified GPIO pin.
  304. * \hideinitializer
  305. */
  306. #define GPIO_DISABLE_DIGITAL_PATH(port, u32PinMask) ((port)->DINOFF |= ((u32PinMask)<<16))
  307. /**
  308. * @brief Enable I/O Digital Input Path
  309. *
  310. * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG, \ref PH, \ref PI or \ref PJ.
  311. * @param[in] u32PinMask The single or multiple pins of specified GPIO port. \n
  312. * It could be BIT0 ~ BIT15 for PA, PB, PE, PG and PH GPIO port. \n
  313. * It could be BIT0 ~ BIT14 for PC and PD GPIO port. \n
  314. * It could be BIT0 ~ BIT11 for PF GPIO port. \n
  315. * It could be BIT6 ~ BIT15 for PI GPIO port. \n
  316. * It could be BIT0 ~ BIT13 for PJ GPIO port.
  317. *
  318. * @return None
  319. *
  320. * @details Enable I/O digital input path of specified GPIO pin.
  321. * \hideinitializer
  322. */
  323. #define GPIO_ENABLE_DIGITAL_PATH(port, u32PinMask) ((port)->DINOFF &= ~((u32PinMask)<<16))
  324. /**
  325. * @brief Disable I/O DOUT mask
  326. *
  327. * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG, \ref PH, \ref PI or \ref PJ.
  328. * @param[in] u32PinMask The single or multiple pins of specified GPIO port. \n
  329. * It could be BIT0 ~ BIT15 for PA, PB, PE, PG and PH GPIO port. \n
  330. * It could be BIT0 ~ BIT14 for PC and PD GPIO port. \n
  331. * It could be BIT0 ~ BIT11 for PF GPIO port. \n
  332. * It could be BIT6 ~ BIT15 for PI GPIO port. \n
  333. * It could be BIT0 ~ BIT13 for PJ GPIO port.
  334. *
  335. * @return None
  336. *
  337. * @details Disable I/O DOUT mask of specified GPIO pin.
  338. * \hideinitializer
  339. */
  340. #define GPIO_DISABLE_DOUT_MASK(port, u32PinMask) ((port)->DATMSK &= ~(u32PinMask))
  341. /**
  342. * @brief Enable I/O DOUT mask
  343. *
  344. * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG, \ref PH, \ref PI or \ref PJ.
  345. * @param[in] u32PinMask The single or multiple pins of specified GPIO port. \n
  346. * It could be BIT0 ~ BIT15 for PA, PB, PE, PG and PH GPIO port. \n
  347. * It could be BIT0 ~ BIT14 for PC and PD GPIO port. \n
  348. * It could be BIT0 ~ BIT11 for PF GPIO port. \n
  349. * It could be BIT6 ~ BIT15 for PI GPIO port. \n
  350. * It could be BIT0 ~ BIT13 for PJ GPIO port.
  351. *
  352. * @return None
  353. *
  354. * @details Enable I/O DOUT mask of specified GPIO pin.
  355. * \hideinitializer
  356. */
  357. #define GPIO_ENABLE_DOUT_MASK(port, u32PinMask) ((port)->DATMSK |= (u32PinMask))
  358. /**
  359. * @brief Get GPIO Pin Interrupt Flag
  360. *
  361. * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG, \ref PH, \ref PI or \ref PJ.
  362. * @param[in] u32PinMask The single or multiple pins of specified GPIO port. \n
  363. * It could be BIT0 ~ BIT15 for PA, PB, PE, PG and PH GPIO port. \n
  364. * It could be BIT0 ~ BIT14 for PC and PD GPIO port. \n
  365. * It could be BIT0 ~ BIT11 for PF GPIO port. \n
  366. * It could be BIT6 ~ BIT15 for PI GPIO port. \n
  367. * It could be BIT0 ~ BIT13 for PJ GPIO port.
  368. *
  369. * @retval 0 No interrupt at specified GPIO pin
  370. * @retval 1 The specified GPIO pin generate an interrupt
  371. *
  372. * @details Get the interrupt status of specified GPIO pin.
  373. * \hideinitializer
  374. */
  375. #define GPIO_GET_INT_FLAG(port, u32PinMask) ((port)->INTSRC & (u32PinMask))
  376. /**
  377. * @brief Set De-bounce Sampling Cycle Time
  378. *
  379. * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG, \ref PH, \ref PI or \ref PJ.
  380. * @param[in] u32ClkSrc The de-bounce counter clock source. It could be
  381. * - \ref GPIO_DBCTL_DBCLKSRC_HCLK
  382. * - \ref GPIO_DBCTL_DBCLKSRC_LIRC.
  383. * @param[in] u32ClkSel The de-bounce sampling cycle selection. It could be
  384. * - \ref GPIO_DBCTL_DBCLKSEL_1
  385. * - \ref GPIO_DBCTL_DBCLKSEL_2
  386. * - \ref GPIO_DBCTL_DBCLKSEL_4
  387. * - \ref GPIO_DBCTL_DBCLKSEL_8
  388. * - \ref GPIO_DBCTL_DBCLKSEL_16
  389. * - \ref GPIO_DBCTL_DBCLKSEL_32
  390. * - \ref GPIO_DBCTL_DBCLKSEL_64
  391. * - \ref GPIO_DBCTL_DBCLKSEL_128
  392. * - \ref GPIO_DBCTL_DBCLKSEL_256
  393. * - \ref GPIO_DBCTL_DBCLKSEL_512
  394. * - \ref GPIO_DBCTL_DBCLKSEL_1024
  395. * - \ref GPIO_DBCTL_DBCLKSEL_2048
  396. * - \ref GPIO_DBCTL_DBCLKSEL_4096
  397. * - \ref GPIO_DBCTL_DBCLKSEL_8192
  398. * - \ref GPIO_DBCTL_DBCLKSEL_16384
  399. * - \ref GPIO_DBCTL_DBCLKSEL_32768
  400. *
  401. * @return None
  402. *
  403. * @details Set the interrupt de-bounce sampling cycle time based on the debounce counter clock source. \n
  404. * Example: GPIO_SET_DEBOUNCE_TIME(PA, GPIO_DBCTL_DBCLKSRC_LIRC, GPIO_DBCTL_DBCLKSEL_4). \n
  405. * It's meaning the De-debounce counter clock source is internal 10 KHz and sampling cycle selection is 4. \n
  406. * Then the target de-bounce sampling cycle time is (4)*(1/(10*1000)) s = 4*0.0001 s = 400 us,
  407. * and system will sampling interrupt input once per 400 us.
  408. */
  409. #define GPIO_SET_DEBOUNCE_TIME(port, u32ClkSrc, u32ClkSel) ((port)->DBCTL = (GPIO_DBCTL_ICLKON_Msk | (u32ClkSrc) | (u32ClkSel)))
  410. /**
  411. * @brief Set GPIO Interrupt Clock on bit
  412. * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG, \ref PH, \ref PI or \ref PJ.
  413. * @return None
  414. * @details Set the I/O pins edge detection circuit always active after reset for specified port.
  415. */
  416. #define GPIO_SET_DEBOUNCE_ICLKON(port) ((port)->DBCTL |= GPIO_DBCTL_ICLKON_Msk)
  417. /**
  418. * @brief Clear GPIO Interrupt Clock on bit
  419. * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG, \ref PH, \ref PI or \ref PJ.
  420. * @return None
  421. * @details Set edge detection circuit active only if I/O pin edge interrupt enabled for specified port.
  422. */
  423. #define GPIO_CLR_DEBOUNCE_ICLKON(port) ((port)->DBCTL &= ~(GPIO_DBCTL_ICLKON_Msk))
  424. /**
  425. * @brief Get GPIO Port IN Data
  426. *
  427. * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG, \ref PH, \ref PI or \ref PJ.
  428. *
  429. * @return The specified port data
  430. *
  431. * @details Get the PIN register of specified GPIO port.
  432. * \hideinitializer
  433. */
  434. #define GPIO_GET_IN_DATA(port) ((port)->PIN)
  435. /**
  436. * @brief Set GPIO Port OUT Data
  437. *
  438. * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG, \ref PH, \ref PI or \ref PJ.
  439. * @param[in] u32Data GPIO port data.
  440. *
  441. * @return None
  442. *
  443. * @details Set the Data into specified GPIO port.
  444. * \hideinitializer
  445. */
  446. #define GPIO_SET_OUT_DATA(port, u32Data) ((port)->DOUT = (u32Data))
  447. /**
  448. * @brief Toggle Specified GPIO pin
  449. *
  450. * @param[in] u32Pin Pxy
  451. *
  452. * @return None
  453. *
  454. * @details Toggle the specified GPIO pint.
  455. * \hideinitializer
  456. */
  457. #define GPIO_TOGGLE(u32Pin) ((u32Pin) ^= 1)
  458. /**
  459. * @brief Enable External GPIO interrupt
  460. *
  461. * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG, \ref PH, \ref PI or \ref PJ.
  462. * @param[in] u32Pin The pin of specified GPIO port. \n
  463. * It could be 0 ~ 15 for PA, PB, PE, PG and PH GPIO port. \n
  464. * It could be 0 ~ 14 for PC and PD GPIO port. \n
  465. * It could be 0 ~ 11 for PF GPIO port. \n
  466. * It could be 6 ~ 15 for PI GPIO port. \n
  467. * It could be 0 ~ 13 for PJ GPIO port.
  468. * @param[in] u32IntAttribs The interrupt attribute of specified GPIO pin. It could be \n
  469. * - \ref GPIO_INT_RISING
  470. * - \ref GPIO_INT_FALLING
  471. * - \ref GPIO_INT_BOTH_EDGE
  472. * - \ref GPIO_INT_HIGH
  473. * - \ref GPIO_INT_LOW
  474. *
  475. * @return None
  476. *
  477. * @details This function is used to enable specified GPIO pin interrupt.
  478. * \hideinitializer
  479. */
  480. #define GPIO_EnableEINT GPIO_EnableInt
  481. /**
  482. * @brief Disable External GPIO interrupt
  483. *
  484. * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG, \ref PH, \ref PI or \ref PJ.
  485. * @param[in] u32Pin The pin of specified GPIO port. \n
  486. * It could be 0 ~ 15 for PA, PB, PE, PG and PH GPIO port. \n
  487. * It could be 0 ~ 14 for PC and PD GPIO port. \n
  488. * It could be 0 ~ 11 for PF GPIO port. \n
  489. * It could be 6 ~ 15 for PI GPIO port. \n
  490. * It could be 0 ~ 13 for PJ GPIO port.
  491. *
  492. * @return None
  493. *
  494. * @details This function is used to disable specified GPIO pin interrupt.
  495. * \hideinitializer
  496. */
  497. #define GPIO_DisableEINT GPIO_DisableInt
  498. void GPIO_SetMode(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode);
  499. void GPIO_EnableInt(GPIO_T *port, uint32_t u32Pin, uint32_t u32IntAttribs);
  500. void GPIO_DisableInt(GPIO_T *port, uint32_t u32Pin);
  501. void GPIO_SetSlewCtl(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode);
  502. void GPIO_SetPullCtl(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode);
  503. /*@}*/ /* end of group GPIO_EXPORTED_FUNCTIONS */
  504. /*@}*/ /* end of group GPIO_Driver */
  505. /*@}*/ /* end of group Standard_Driver */
  506. #ifdef __cplusplus
  507. }
  508. #endif
  509. #endif /* __NU_GPIO_H__ */