nu_pdma.h 22 KB

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  1. /**************************************************************************//**
  2. * @file nu_pdma.h
  3. * @version V1.00
  4. * @brief PDMA driver header file
  5. *
  6. * SPDX-License-Identifier: Apache-2.0
  7. * @copyright (C) 2021 Nuvoton Technology Corp. All rights reserved.
  8. *****************************************************************************/
  9. #ifndef __NU_PDMA_H__
  10. #define __NU_PDMA_H__
  11. #ifdef __cplusplus
  12. extern "C"
  13. {
  14. #endif
  15. /** @addtogroup Standard_Driver Standard Driver
  16. @{
  17. */
  18. /** @addtogroup PDMA_Driver PDMA Driver
  19. @{
  20. */
  21. /** @addtogroup PDMA_EXPORTED_CONSTANTS PDMA Exported Constants
  22. @{
  23. */
  24. #define PDMA_CH_MAX 16UL /*!< Specify Maximum Channels of PDMA \hideinitializer */
  25. /*---------------------------------------------------------------------------------------------------------*/
  26. /* Operation Mode Constant Definitions */
  27. /*---------------------------------------------------------------------------------------------------------*/
  28. #define PDMA_OP_STOP 0x00000000UL /*!<DMA Stop Mode \hideinitializer */
  29. #define PDMA_OP_BASIC 0x00000001UL /*!<DMA Basic Mode \hideinitializer */
  30. #define PDMA_OP_SCATTER 0x00000002UL /*!<DMA Scatter-gather Mode \hideinitializer */
  31. /*---------------------------------------------------------------------------------------------------------*/
  32. /* Data Width Constant Definitions */
  33. /*---------------------------------------------------------------------------------------------------------*/
  34. #define PDMA_WIDTH_8 0x00000000UL /*!<DMA Transfer Width 8-bit \hideinitializer */
  35. #define PDMA_WIDTH_16 0x00001000UL /*!<DMA Transfer Width 16-bit \hideinitializer */
  36. #define PDMA_WIDTH_32 0x00002000UL /*!<DMA Transfer Width 32-bit \hideinitializer */
  37. /*---------------------------------------------------------------------------------------------------------*/
  38. /* Address Attribute Constant Definitions */
  39. /*---------------------------------------------------------------------------------------------------------*/
  40. #define PDMA_SAR_INC 0x00000000UL /*!<DMA SAR increment \hideinitializer */
  41. #define PDMA_SAR_FIX 0x00000300UL /*!<DMA SAR fix address \hideinitializer */
  42. #define PDMA_DAR_INC 0x00000000UL /*!<DMA DAR increment \hideinitializer */
  43. #define PDMA_DAR_FIX 0x00000C00UL /*!<DMA DAR fix address \hideinitializer */
  44. /*---------------------------------------------------------------------------------------------------------*/
  45. /* Burst Mode Constant Definitions */
  46. /*---------------------------------------------------------------------------------------------------------*/
  47. #define PDMA_REQ_SINGLE 0x00000004UL /*!<DMA Single Request \hideinitializer */
  48. #define PDMA_REQ_BURST 0x00000000UL /*!<DMA Burst Request \hideinitializer */
  49. #define PDMA_BURST_128 0x00000000UL /*!<DMA Burst 128 Transfers \hideinitializer */
  50. #define PDMA_BURST_64 0x00000010UL /*!<DMA Burst 64 Transfers \hideinitializer */
  51. #define PDMA_BURST_32 0x00000020UL /*!<DMA Burst 32 Transfers \hideinitializer */
  52. #define PDMA_BURST_16 0x00000030UL /*!<DMA Burst 16 Transfers \hideinitializer */
  53. #define PDMA_BURST_8 0x00000040UL /*!<DMA Burst 8 Transfers \hideinitializer */
  54. #define PDMA_BURST_4 0x00000050UL /*!<DMA Burst 4 Transfers \hideinitializer */
  55. #define PDMA_BURST_2 0x00000060UL /*!<DMA Burst 2 Transfers \hideinitializer */
  56. #define PDMA_BURST_1 0x00000070UL /*!<DMA Burst 1 Transfers \hideinitializer */
  57. /*---------------------------------------------------------------------------------------------------------*/
  58. /* Table Interrupt Disable Constant Definitions */
  59. /*---------------------------------------------------------------------------------------------------------*/
  60. #define PDMA_TBINTDIS_ENABLE (0x0UL<<PDMA_DSCT_CTL_TBINTDIS_Pos) /*!<DMA Table Interrupt Enabled \hideinitializer */
  61. #define PDMA_TBINTDIS_DISABLE (0x1UL<<PDMA_DSCT_CTL_TBINTDIS_Pos) /*!<DMA Table Interrupt Disabled \hideinitializer */
  62. /*---------------------------------------------------------------------------------------------------------*/
  63. /* Peripheral Transfer Mode Constant Definitions */
  64. /*---------------------------------------------------------------------------------------------------------*/
  65. #define PDMA_MEM 0UL /*!<DMA Connect to Memory \hideinitializer */
  66. #define PDMA_USB_TX 2UL /*!<DMA Connect to USB_TX \hideinitializer */
  67. #define PDMA_USB_RX 3UL /*!<DMA Connect to USB_RX \hideinitializer */
  68. #define PDMA_UART0_TX 4UL /*!<DMA Connect to UART0_TX \hideinitializer */
  69. #define PDMA_UART0_RX 5UL /*!<DMA Connect to UART0_RX \hideinitializer */
  70. #define PDMA_UART1_TX 6UL /*!<DMA Connect to UART1_TX \hideinitializer */
  71. #define PDMA_UART1_RX 7UL /*!<DMA Connect to UART1_RX \hideinitializer */
  72. #define PDMA_UART2_TX 8UL /*!<DMA Connect to UART2_TX \hideinitializer */
  73. #define PDMA_UART2_RX 9UL /*!<DMA Connect to UART2_RX \hideinitializer */
  74. #define PDMA_UART3_TX 10UL /*!<DMA Connect to UART3_TX \hideinitializer */
  75. #define PDMA_UART3_RX 11UL /*!<DMA Connect to UART3_RX \hideinitializer */
  76. #define PDMA_UART4_TX 12UL /*!<DMA Connect to UART4_TX \hideinitializer */
  77. #define PDMA_UART4_RX 13UL /*!<DMA Connect to UART4_RX \hideinitializer */
  78. #define PDMA_UART5_TX 14UL /*!<DMA Connect to UART5_TX \hideinitializer */
  79. #define PDMA_UART5_RX 15UL /*!<DMA Connect to UART5_RX \hideinitializer */
  80. #define PDMA_USCI0_TX 16UL /*!<DMA Connect to USCI0_TX \hideinitializer */
  81. #define PDMA_USCI0_RX 17UL /*!<DMA Connect to USCI0_RX \hideinitializer */
  82. #define PDMA_QSPI0_TX 20UL /*!<DMA Connect to QSPI0_TX \hideinitializer */
  83. #define PDMA_QSPI0_RX 21UL /*!<DMA Connect to QSPI0_RX \hideinitializer */
  84. #define PDMA_SPI0_TX 22UL /*!<DMA Connect to SPI0_TX \hideinitializer */
  85. #define PDMA_SPI0_RX 23UL /*!<DMA Connect to SPI0_RX \hideinitializer */
  86. #define PDMA_SPI1_TX 24UL /*!<DMA Connect to SPI1_TX \hideinitializer */
  87. #define PDMA_SPI1_RX 25UL /*!<DMA Connect to SPI1_RX \hideinitializer */
  88. #define PDMA_SPI2_TX 26UL /*!<DMA Connect to SPI2_TX \hideinitializer */
  89. #define PDMA_SPI2_RX 27UL /*!<DMA Connect to SPI2_RX \hideinitializer */
  90. #define PDMA_SPI3_TX 28UL /*!<DMA Connect to SPI3_TX \hideinitializer */
  91. #define PDMA_SPI3_RX 29UL /*!<DMA Connect to SPI3_RX \hideinitializer */
  92. #define PDMA_QSPI1_TX 30UL /*!<DMA Connect to QSPI1_TX \hideinitializer */
  93. #define PDMA_QSPI1_RX 31UL /*!<DMA Connect to QSPI1_RX \hideinitializer */
  94. #define PDMA_EPWM0_P1_RX 32UL /*!<DMA Connect to EPWM0_P1 \hideinitializer */
  95. #define PDMA_EPWM0_P2_RX 33UL /*!<DMA Connect to EPWM0_P2 \hideinitializer */
  96. #define PDMA_EPWM0_P3_RX 34UL /*!<DMA Connect to EPWM0_P3 \hideinitializer */
  97. #define PDMA_EPWM1_P1_RX 35UL /*!<DMA Connect to EPWM1_P1 \hideinitializer */
  98. #define PDMA_EPWM1_P2_RX 36UL /*!<DMA Connect to EPWM1_P2 \hideinitializer */
  99. #define PDMA_EPWM1_P3_RX 37UL /*!<DMA Connect to PWM1_P3 \hideinitializer */
  100. #define PDMA_I2C0_TX 38UL /*!<DMA Connect to I2C0_TX \hideinitializer */
  101. #define PDMA_I2C0_RX 39UL /*!<DMA Connect to I2C0_RX \hideinitializer */
  102. #define PDMA_I2C1_TX 40UL /*!<DMA Connect to I2C1_TX \hideinitializer */
  103. #define PDMA_I2C1_RX 41UL /*!<DMA Connect to I2C1_RX \hideinitializer */
  104. #define PDMA_I2C2_TX 42UL /*!<DMA Connect to I2C2_TX \hideinitializer */
  105. #define PDMA_I2C2_RX 43UL /*!<DMA Connect to I2C2_RX \hideinitializer */
  106. #define PDMA_I2S0_TX 44UL /*!<DMA Connect to I2S0_TX \hideinitializer */
  107. #define PDMA_I2S0_RX 45UL /*!<DMA Connect to I2S0_RX \hideinitializer */
  108. #define PDMA_TMR0 46UL /*!<DMA Connect to TMR0 \hideinitializer */
  109. #define PDMA_TMR1 47UL /*!<DMA Connect to TMR1 \hideinitializer */
  110. #define PDMA_TMR2 48UL /*!<DMA Connect to TMR2 \hideinitializer */
  111. #define PDMA_TMR3 49UL /*!<DMA Connect to TMR3 \hideinitializer */
  112. #define PDMA_EADC0_RX 50UL /*!<DMA Connect to EADC0_RX \hideinitializer */
  113. #define PDMA_DAC0_TX 51UL /*!<DMA Connect to DAC0_TX \hideinitializer */
  114. #define PDMA_DAC1_TX 52UL /*!<DMA Connect to DAC1_TX \hideinitializer */
  115. #define PDMA_EPWM0_CH0_TX 53UL /*!<DMA Connect to EPWM0_CH0_TX \hideinitializer */
  116. #define PDMA_EPWM0_CH1_TX 54UL /*!<DMA Connect to EPWM0_CH1_TX \hideinitializer */
  117. #define PDMA_EPWM0_CH2_TX 55UL /*!<DMA Connect to EPWM0_CH2_TX \hideinitializer */
  118. #define PDMA_EPWM0_CH3_TX 56UL /*!<DMA Connect to EPWM0_CH3_TX \hideinitializer */
  119. #define PDMA_EPWM0_CH4_TX 57UL /*!<DMA Connect to EPWM0_CH4_TX \hideinitializer */
  120. #define PDMA_EPWM0_CH5_TX 58UL /*!<DMA Connect to EPWM0_CH5_TX \hideinitializer */
  121. #define PDMA_EPWM1_CH0_TX 59UL /*!<DMA Connect to EPWM1_CH0_TX \hideinitializer */
  122. #define PDMA_EPWM1_CH1_TX 60UL /*!<DMA Connect to EPWM1_CH1_TX \hideinitializer */
  123. #define PDMA_EPWM1_CH2_TX 61UL /*!<DMA Connect to EPWM1_CH2_TX \hideinitializer */
  124. #define PDMA_EPWM1_CH3_TX 62UL /*!<DMA Connect to EPWM1_CH3_TX \hideinitializer */
  125. #define PDMA_EPWM1_CH4_TX 63UL /*!<DMA Connect to EPWM1_CH4_TX \hideinitializer */
  126. #define PDMA_EPWM1_CH5_TX 64UL /*!<DMA Connect to EPWM1_CH5_TX \hideinitializer */
  127. #define PDMA_UART6_TX 66UL /*!<DMA Connect to UART6_TX \hideinitializer */
  128. #define PDMA_UART6_RX 67UL /*!<DMA Connect to UART6_RX \hideinitializer */
  129. #define PDMA_UART7_TX 68UL /*!<DMA Connect to UART7_TX \hideinitializer */
  130. #define PDMA_UART7_RX 69UL /*!<DMA Connect to UART7_RX \hideinitializer */
  131. #define PDMA_EADC1_RX 70UL /*!<DMA Connect to EADC1_RX \hideinitializer */
  132. #define PDMA_ACMP0 71UL /*!<DMA Connect to ACMP0 \hideinitializer */
  133. #define PDMA_ACMP1 72UL /*!<DMA Connect to ACMP1 \hideinitializer */
  134. #define PDMA_PSIO_TX 73UL /*!<DMA Connect to PSIO_TX \hideinitializer */
  135. #define PDMA_PSIO_RX 74UL /*!<DMA Connect to PSIO_RX \hideinitializer */
  136. #define PDMA_I2C3_TX 75UL /*!<DMA Connect to I2C3_TX \hideinitializer */
  137. #define PDMA_I2C3_RX 76UL /*!<DMA Connect to I2C3_RX \hideinitializer */
  138. #define PDMA_I2C4_TX 77UL /*!<DMA Connect to I2C4_TX \hideinitializer */
  139. #define PDMA_I2C4_RX 78UL /*!<DMA Connect to I2C4_RX \hideinitializer */
  140. #define PDMA_I2S1_TX 79UL /*!<DMA Connect to I2S1_TX \hideinitializer */
  141. #define PDMA_I2S1_RX 80UL /*!<DMA Connect to I2S1_RX \hideinitializer */
  142. #define PDMA_EINT0 81UL /*!<DMA Connect to EINT0 \hideinitializer */
  143. #define PDMA_EINT1 82UL /*!<DMA Connect to EINT1 \hideinitializer */
  144. #define PDMA_EINT2 83UL /*!<DMA Connect to EINT2 \hideinitializer */
  145. #define PDMA_EINT3 84UL /*!<DMA Connect to EINT3 \hideinitializer */
  146. #define PDMA_EINT4 85UL /*!<DMA Connect to EINT4 \hideinitializer */
  147. #define PDMA_EINT5 86UL /*!<DMA Connect to EINT5 \hideinitializer */
  148. #define PDMA_EINT6 87UL /*!<DMA Connect to EINT6 \hideinitializer */
  149. #define PDMA_EINT7 88UL /*!<DMA Connect to EINT7 \hideinitializer */
  150. #define PDMA_UART8_TX 89UL /*!<DMA Connect to UART8_TX \hideinitializer */
  151. #define PDMA_UART8_RX 90UL /*!<DMA Connect to UART8_RX \hideinitializer */
  152. #define PDMA_UART9_TX 91UL /*!<DMA Connect to UART9_TX \hideinitializer */
  153. #define PDMA_UART9_RX 92UL /*!<DMA Connect to UART9_RX \hideinitializer */
  154. #define PDMA_EADC2_RX 93UL /*!<DMA Connect to EADC2_RX \hideinitializer */
  155. #define PDMA_ACMP2 94UL /*!<DMA Connect to ACMP2 \hideinitializer */
  156. #define PDMA_ACMP3 95UL /*!<DMA Connect to ACMP3 \hideinitializer */
  157. #define PDMA_SPI4_TX 96UL /*!<DMA Connect to SPI4_TX \hideinitializer */
  158. #define PDMA_SPI4_RX 97UL /*!<DMA Connect to SPI4_RX \hideinitializer */
  159. #define PDMA_SPI5_TX 98UL /*!<DMA Connect to SPI5_TX \hideinitializer */
  160. #define PDMA_SPI5_RX 99UL /*!<DMA Connect to SPI5_RX \hideinitializer */
  161. #define PDMA_SPI6_TX 100UL /*!<DMA Connect to SPI6_TX \hideinitializer */
  162. #define PDMA_SPI6_RX 101UL /*!<DMA Connect to SPI6_RX \hideinitializer */
  163. #define PDMA_SPI7_TX 102UL /*!<DMA Connect to SPI7_TX \hideinitializer */
  164. #define PDMA_SPI7_RX 103UL /*!<DMA Connect to SPI7_RX \hideinitializer */
  165. #define PDMA_SPI8_TX 104UL /*!<DMA Connect to SPI8_TX \hideinitializer */
  166. #define PDMA_SPI8_RX 105UL /*!<DMA Connect to SPI8_RX \hideinitializer */
  167. #define PDMA_SPI9_TX 106UL /*!<DMA Connect to SPI9_TX \hideinitializer */
  168. #define PDMA_SPI9_RX 107UL /*!<DMA Connect to SPI9_RX \hideinitializer */
  169. #define PDMA_SPI10_TX 108UL /*!<DMA Connect to SPI10_TX \hideinitializer */
  170. #define PDMA_SPI10_RX 109UL /*!<DMA Connect to SPI10_RX \hideinitializer */
  171. #define PDMA_BMC_G0_TX 110UL /*!<DMA Connect to BMC_G0_TX \hideinitializer */
  172. #define PDMA_BMC_G1_TX 111UL /*!<DMA Connect to BMC_G1_TX \hideinitializer */
  173. #define PDMA_BMC_G2_TX 112UL /*!<DMA Connect to BMC_G2_TX \hideinitializer */
  174. #define PDMA_BMC_G3_TX 113UL /*!<DMA Connect to BMC_G3_TX \hideinitializer */
  175. #define PDMA_BMC_G4_TX 114UL /*!<DMA Connect to BMC_G4_TX \hideinitializer */
  176. #define PDMA_BMC_G5_TX 115UL /*!<DMA Connect to BMC_G5_TX \hideinitializer */
  177. #define PDMA_BMC_G6_TX 116UL /*!<DMA Connect to BMC_G6_TX \hideinitializer */
  178. #define PDMA_BMC_G7_TX 117UL /*!<DMA Connect to BMC_G7_TX \hideinitializer */
  179. /*---------------------------------------------------------------------------------------------------------*/
  180. /* Interrupt Type Constant Definitions */
  181. /*---------------------------------------------------------------------------------------------------------*/
  182. #define PDMA_INT_TRANS_DONE 0x00000000UL /*!<Transfer Done Interrupt \hideinitializer */
  183. #define PDMA_INT_TEMPTY 0x00000001UL /*!<Table Empty Interrupt \hideinitializer */
  184. #define PDMA_INT_TIMEOUT 0x00000002UL /*!<Timeout Interrupt \hideinitializer */
  185. #define PDMA_INT_ALIGN 0x00000003UL /*!<Transfer Alignment Interrupt \hideinitializer */
  186. /*@}*/ /* end of group PDMA_EXPORTED_CONSTANTS */
  187. /** @addtogroup PDMA_EXPORTED_FUNCTIONS PDMA Exported Functions
  188. @{
  189. */
  190. /**
  191. * @brief Get PDMA Interrupt Status
  192. *
  193. * @param[in] pdma The pointer of the specified PDMA module
  194. *
  195. * @return None
  196. *
  197. * @details This macro gets the interrupt status.
  198. * \hideinitializer
  199. */
  200. #define PDMA_GET_INT_STATUS(pdma) ((uint32_t)((pdma)->INTSTS))
  201. /**
  202. * @brief Get Transfer Done Interrupt Status
  203. *
  204. * @param[in] pdma The pointer of the specified PDMA module
  205. *
  206. * @return None
  207. *
  208. * @details Get the transfer done Interrupt status.
  209. * \hideinitializer
  210. */
  211. #define PDMA_GET_TD_STS(pdma) ((uint32_t)((pdma)->TDSTS))
  212. /**
  213. * @brief Clear Transfer Done Interrupt Status
  214. *
  215. * @param[in] pdma The pointer of the specified PDMA module
  216. *
  217. * @param[in] u32Mask The channel mask
  218. *
  219. * @return None
  220. *
  221. * @details Clear the transfer done Interrupt status.
  222. * \hideinitializer
  223. */
  224. #define PDMA_CLR_TD_FLAG(pdma, u32Mask) ((uint32_t)((pdma)->TDSTS = (u32Mask)))
  225. /**
  226. * @brief Get Target Abort Interrupt Status
  227. *
  228. * @param[in] pdma The pointer of the specified PDMA module
  229. *
  230. * @return None
  231. *
  232. * @details Get the target abort Interrupt status.
  233. * \hideinitializer
  234. */
  235. #define PDMA_GET_ABORT_STS(pdma) ((uint32_t)((pdma)->ABTSTS))
  236. /**
  237. * @brief Clear Target Abort Interrupt Status
  238. *
  239. * @param[in] pdma The pointer of the specified PDMA module
  240. *
  241. * @param[in] u32Mask The channel mask
  242. *
  243. * @return None
  244. *
  245. * @details Clear the target abort Interrupt status.
  246. * \hideinitializer
  247. */
  248. #define PDMA_CLR_ABORT_FLAG(pdma, u32Mask) ((uint32_t)((pdma)->ABTSTS = (u32Mask)))
  249. /**
  250. * @brief Get Alignment Interrupt Status
  251. *
  252. * @param[in] pdma The pointer of the specified PDMA module
  253. *
  254. * @return None
  255. *
  256. * @details Get Alignment Interrupt status.
  257. * \hideinitializer
  258. */
  259. #define PDMA_GET_ALIGN_STS(pdma) ((uint32_t)((pdma)->ALIGN))
  260. /**
  261. * @brief Clear Alignment Interrupt Status
  262. *
  263. * @param[in] pdma The pointer of the specified PDMA module
  264. * @param[in] u32Mask The channel mask
  265. *
  266. * @return None
  267. *
  268. * @details Clear the Alignment Interrupt status.
  269. * \hideinitializer
  270. */
  271. #define PDMA_CLR_ALIGN_FLAG(pdma, u32Mask) ((uint32_t)((pdma)->ALIGN = (u32Mask)))
  272. /**
  273. * @brief Clear Timeout Interrupt Status
  274. *
  275. * @param[in] pdma The pointer of the specified PDMA module
  276. * @param[in] u32Ch The selected channel
  277. *
  278. * @return None
  279. *
  280. * @details Clear the selected channel timeout interrupt status.
  281. * \hideinitializer
  282. */
  283. #define PDMA_CLR_TMOUT_FLAG(pdma, u32Ch) ((uint32_t)((pdma)->INTSTS = (1UL << ((u32Ch) + 8UL))))
  284. /**
  285. * @brief Check Channel Status
  286. *
  287. * @param[in] pdma The pointer of the specified PDMA module
  288. * @param[in] u32Ch The selected channel
  289. *
  290. * @retval 0 Idle state
  291. * @retval 1 Busy state
  292. *
  293. * @details Check the selected channel is busy or not.
  294. * \hideinitializer
  295. */
  296. #define PDMA_IS_CH_BUSY(pdma, u32Ch) ((uint32_t)((pdma)->TRGSTS & (1UL << (u32Ch)))? 1 : 0)
  297. /**
  298. * @brief Set Source Address
  299. *
  300. * @param[in] pdma The pointer of the specified PDMA module
  301. * @param[in] u32Ch The selected channel
  302. * @param[in] u32Addr The selected address
  303. *
  304. * @return None
  305. *
  306. * @details This macro set the selected channel source address.
  307. * \hideinitializer
  308. */
  309. #define PDMA_SET_SRC_ADDR(pdma, u32Ch, u32Addr) ((uint32_t)((pdma)->DSCT[(u32Ch)].SA = (u32Addr)))
  310. /**
  311. * @brief Set Destination Address
  312. *
  313. * @param[in] pdma The pointer of the specified PDMA module
  314. * @param[in] u32Ch The selected channel
  315. * @param[in] u32Addr The selected address
  316. *
  317. * @return None
  318. *
  319. * @details This macro set the selected channel destination address.
  320. * \hideinitializer
  321. */
  322. #define PDMA_SET_DST_ADDR(pdma, u32Ch, u32Addr) ((uint32_t)((pdma)->DSCT[(u32Ch)].DA = (u32Addr)))
  323. /**
  324. * @brief Set Transfer Count
  325. *
  326. * @param[in] pdma The pointer of the specified PDMA module
  327. * @param[in] u32Ch The selected channel
  328. * @param[in] u32TransCount Transfer Count
  329. *
  330. * @return None
  331. *
  332. * @details This macro set the selected channel transfer count.
  333. * \hideinitializer
  334. */
  335. #define PDMA_SET_TRANS_CNT(pdma, u32Ch, u32TransCount) ((uint32_t)((pdma)->DSCT[(u32Ch)].CTL=((pdma)->DSCT[(u32Ch)].CTL&~PDMA_DSCT_CTL_TXCNT_Msk)|(((u32TransCount)-1UL) << PDMA_DSCT_CTL_TXCNT_Pos)))
  336. /**
  337. * @brief Set Scatter-gather descriptor Address
  338. *
  339. * @param[in] pdma The pointer of the specified PDMA module
  340. * @param[in] u32Ch The selected channel
  341. * @param[in] u32Addr The descriptor address
  342. *
  343. * @return None
  344. *
  345. * @details This macro set the selected channel scatter-gather descriptor address.
  346. * \hideinitializer
  347. */
  348. #define PDMA_SET_SCATTER_DESC(pdma, u32Ch, u32Addr) ((uint32_t)((pdma)->DSCT[(u32Ch)].NEXT = (u32Addr) - ((pdma)->SCATBA)))
  349. /**
  350. * @brief Stop the channel
  351. *
  352. * @param[in] pdma The pointer of the specified PDMA module
  353. * @param[in] u32Ch The selected channel
  354. *
  355. * @return None
  356. *
  357. * @details This macro stop the selected channel.
  358. * \hideinitializer
  359. */
  360. #define PDMA_STOP(pdma, u32Ch) ((uint32_t)((pdma)->PAUSE = (1UL << (u32Ch))))
  361. /**
  362. * @brief Pause the channel
  363. *
  364. * @param[in] pdma The pointer of the specified PDMA module
  365. * @param[in] u32Ch The selected channel
  366. *
  367. * @return None
  368. *
  369. * @details This macro pause the selected channel.
  370. */
  371. #define PDMA_PAUSE(pdma, u32Ch) ((uint32_t)((pdma)->PAUSE = (1UL << (u32Ch))))
  372. /**
  373. * @brief Reset the channel
  374. *
  375. * @param[in] pdma The pointer of the specified PDMA module
  376. * @param[in] u32Ch The selected channel
  377. *
  378. * @return None
  379. *
  380. * @details This macro reset the selected channel.
  381. */
  382. #define PDMA_RESET(pdma, u32Ch) ((uint32_t)((pdma)->CHRST = (1UL << (u32Ch))))
  383. /*---------------------------------------------------------------------------------------------------------*/
  384. /* Define PDMA functions prototype */
  385. /*---------------------------------------------------------------------------------------------------------*/
  386. void PDMA_Open(PDMA_T *pdma, uint32_t u32Mask);
  387. void PDMA_Close(PDMA_T *pdma);
  388. void PDMA_SetTransferCnt(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Width, uint32_t u32TransCount);
  389. void PDMA_SetTransferAddr(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl);
  390. void PDMA_SetTransferMode(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Peripheral, uint32_t u32ScatterEn, uint32_t u32DescAddr);
  391. void PDMA_SetBurstType(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32BurstType, uint32_t u32BurstSize);
  392. void PDMA_EnableTimeout(PDMA_T *pdma, uint32_t u32Mask);
  393. void PDMA_DisableTimeout(PDMA_T *pdma, uint32_t u32Mask);
  394. void PDMA_SetTimeOut(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32OnOff, uint32_t u32TimeOutCnt);
  395. void PDMA_Trigger(PDMA_T *pdma, uint32_t u32Ch);
  396. void PDMA_EnableInt(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Mask);
  397. void PDMA_DisableInt(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Mask);
  398. void PDMA_SetStride(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32DestLen, uint32_t u32SrcLen, uint32_t u32TransCount);
  399. void PDMA_SetRepeat(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32DestInterval, uint32_t u32SrcInterval, uint32_t u32RepeatCount);
  400. /*@}*/ /* end of group PDMA_EXPORTED_FUNCTIONS */
  401. /*@}*/ /* end of group PDMA_Driver */
  402. /*@}*/ /* end of group Standard_Driver */
  403. #ifdef __cplusplus
  404. }
  405. #endif
  406. #endif /* __NU_PDMA_H__ */