drv_eadc.c 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183
  1. /**************************************************************************//**
  2. * @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-3-16 Wayne First version
  9. *
  10. ******************************************************************************/
  11. #include <rtconfig.h>
  12. #include <rtdevice.h>
  13. #include "NuMicro.h"
  14. #if defined(BSP_USING_EADC)
  15. /* Private define ---------------------------------------------------------------*/
  16. enum
  17. {
  18. EADC_START = -1,
  19. #if defined(BSP_USING_EADC0)
  20. EADC0_IDX,
  21. #endif
  22. #if defined(BSP_USING_EADC1)
  23. EADC1_IDX,
  24. #endif
  25. #if defined(BSP_USING_EADC2)
  26. EADC2_IDX,
  27. #endif
  28. EADC_CNT
  29. };
  30. /* Private Typedef --------------------------------------------------------------*/
  31. struct nu_eadc
  32. {
  33. struct rt_adc_device dev;
  34. char *name;
  35. EADC_T *base;
  36. uint32_t chn_msk;
  37. uint32_t max_chn_num;
  38. };
  39. typedef struct nu_eadc *nu_eadc_t;
  40. /* Private functions ------------------------------------------------------------*/
  41. static rt_err_t nu_eadc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled);
  42. static rt_err_t nu_get_eadc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value);
  43. static rt_err_t nu_get_eadc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value);
  44. /* Public functions ------------------------------------------------------------*/
  45. int rt_hw_eadc_init(void);
  46. /* Private variables ------------------------------------------------------------*/
  47. static struct nu_eadc nu_eadc_arr [] =
  48. {
  49. #if defined(BSP_USING_EADC0)
  50. {
  51. .name = "eadc0",
  52. .base = EADC0,
  53. .chn_msk = 0,
  54. .max_chn_num = 16,
  55. },
  56. #endif
  57. #if defined(BSP_USING_EADC1)
  58. {
  59. .name = "eadc1",
  60. .base = EADC1,
  61. .chn_msk = 0,
  62. .max_chn_num = 16,
  63. },
  64. #endif
  65. #if defined(BSP_USING_EADC2)
  66. {
  67. .name = "eadc2",
  68. .base = EADC2,
  69. .chn_msk = 0,
  70. .max_chn_num = 16,
  71. },
  72. #endif
  73. };
  74. static const struct rt_adc_ops nu_adc_ops =
  75. {
  76. nu_eadc_enabled,
  77. nu_get_eadc_value,
  78. };
  79. typedef struct rt_adc_ops *rt_adc_ops_t;
  80. /* nu_adc_enabled - Enable ADC clock and wait for ready */
  81. static rt_err_t nu_eadc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
  82. {
  83. nu_eadc_t psNuEADC = (nu_eadc_t)device;
  84. RT_ASSERT(device);
  85. if (channel >= psNuEADC->max_chn_num)
  86. return -(RT_EINVAL);
  87. if (enabled)
  88. {
  89. if (psNuEADC->chn_msk == 0)
  90. {
  91. EADC_Open(psNuEADC->base, EADC_CTL_DIFFEN_SINGLE_END);
  92. }
  93. psNuEADC->chn_msk |= (0x1 << channel);
  94. }
  95. else
  96. {
  97. psNuEADC->chn_msk &= ~(0x1 << channel);
  98. if (psNuEADC->chn_msk == 0)
  99. {
  100. EADC_Close(psNuEADC->base);
  101. }
  102. }
  103. return RT_EOK;
  104. }
  105. static rt_err_t nu_get_eadc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
  106. {
  107. nu_eadc_t psNuEADC = (nu_eadc_t)device;
  108. rt_err_t ret = -RT_ERROR;
  109. RT_ASSERT(device);
  110. RT_ASSERT(value);
  111. if (channel >= psNuEADC->max_chn_num)
  112. {
  113. *value = 0xFFFFFFFF;
  114. ret = -RT_EINVAL;
  115. goto exit_nu_get_eadc_value;
  116. }
  117. if ((psNuEADC->chn_msk & (1 << channel)) == 0)
  118. {
  119. *value = 0xFFFFFFFF;
  120. ret = -RT_EBUSY;
  121. goto exit_nu_get_eadc_value;
  122. }
  123. EADC_ConfigSampleModule(psNuEADC->base, 0, EADC_SOFTWARE_TRIGGER, channel);
  124. EADC_CLR_INT_FLAG(psNuEADC->base, EADC_STATUS2_ADIF0_Msk);
  125. EADC_ENABLE_INT(psNuEADC->base, BIT0);
  126. EADC_ENABLE_SAMPLE_MODULE_INT(psNuEADC->base, 0, BIT0);
  127. EADC_START_CONV(psNuEADC->base, BIT0);
  128. while (EADC_GET_INT_FLAG(psNuEADC->base, BIT0) == 0);
  129. EADC_DISABLE_INT(psNuEADC->base, BIT0);
  130. *value = EADC_GET_CONV_DATA(psNuEADC->base, 0);
  131. ret = RT_EOK;
  132. exit_nu_get_eadc_value:
  133. return -(ret);
  134. }
  135. int rt_hw_eadc_init(void)
  136. {
  137. int i;
  138. rt_err_t result;
  139. for (i = (EADC_START + 1); i < EADC_CNT; i++)
  140. {
  141. result = rt_hw_adc_register(&nu_eadc_arr[i].dev, nu_eadc_arr[i].name, &nu_adc_ops, NULL);
  142. RT_ASSERT(result == RT_EOK);
  143. }
  144. return 0;
  145. }
  146. INIT_BOARD_EXPORT(rt_hw_eadc_init);
  147. #endif //#if defined(BSP_USING_EADC)