nu_uart.h 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489
  1. /**************************************************************************//**
  2. * @file nu_uart.h
  3. * @brief UART driver header file
  4. *
  5. * SPDX-License-Identifier: Apache-2.0
  6. * @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
  7. *****************************************************************************/
  8. #ifndef __NU_UART_H__
  9. #define __NU_UART_H__
  10. #ifdef __cplusplus
  11. extern "C"
  12. {
  13. #endif
  14. /** @addtogroup Standard_Driver Standard Driver
  15. @{
  16. */
  17. /** @addtogroup UART_Driver UART Driver
  18. @{
  19. */
  20. /** @addtogroup UART_EXPORTED_CONSTANTS UART Exported Constants
  21. @{
  22. */
  23. /*---------------------------------------------------------------------------------------------------------*/
  24. /* UART FIFO size constants definitions */
  25. /*---------------------------------------------------------------------------------------------------------*/
  26. #define UART0_FIFO_SIZE 16ul /*!< UART0 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
  27. #define UART1_FIFO_SIZE 16ul /*!< UART1 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
  28. #define UART2_FIFO_SIZE 16ul /*!< UART2 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
  29. #define UART3_FIFO_SIZE 16ul /*!< UART3 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
  30. #define UART4_FIFO_SIZE 16ul /*!< UART4 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
  31. #define UART5_FIFO_SIZE 16ul /*!< UART5 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
  32. /*---------------------------------------------------------------------------------------------------------*/
  33. /* UART_FIFO constants definitions */
  34. /*---------------------------------------------------------------------------------------------------------*/
  35. #define UART_FIFO_RFITL_1BYTE (0x0ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 1 byte \hideinitializer */
  36. #define UART_FIFO_RFITL_4BYTES (0x1ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 4 bytes \hideinitializer */
  37. #define UART_FIFO_RFITL_8BYTES (0x2ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 8 bytes \hideinitializer */
  38. #define UART_FIFO_RFITL_14BYTES (0x3ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 14 bytes \hideinitializer */
  39. #define UART_FIFO_RTSTRGLV_1BYTE (0x0ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 1 byte \hideinitializer */
  40. #define UART_FIFO_RTSTRGLV_4BYTES (0x1ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 4 bytes \hideinitializer */
  41. #define UART_FIFO_RTSTRGLV_8BYTES (0x2ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 8 bytes \hideinitializer */
  42. #define UART_FIFO_RTSTRGLV_14BYTES (0x3ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 14 bytes \hideinitializer */
  43. /*---------------------------------------------------------------------------------------------------------*/
  44. /* UART_LINE constants definitions */
  45. /*---------------------------------------------------------------------------------------------------------*/
  46. #define UART_WORD_LEN_5 (0ul) /*!< UART_LINE setting to set UART word length to 5 bits \hideinitializer */
  47. #define UART_WORD_LEN_6 (1ul) /*!< UART_LINE setting to set UART word length to 6 bits \hideinitializer */
  48. #define UART_WORD_LEN_7 (2ul) /*!< UART_LINE setting to set UART word length to 7 bits \hideinitializer */
  49. #define UART_WORD_LEN_8 (3ul) /*!< UART_LINE setting to set UART word length to 8 bits \hideinitializer */
  50. #define UART_PARITY_NONE (0x0ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as no parity \hideinitializer */
  51. #define UART_PARITY_ODD (0x1ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as odd parity \hideinitializer */
  52. #define UART_PARITY_EVEN (0x3ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as even parity \hideinitializer */
  53. #define UART_PARITY_MARK (0x5ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '1' \hideinitializer */
  54. #define UART_PARITY_SPACE (0x7ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '0' \hideinitializer */
  55. #define UART_STOP_BIT_1 (0x0ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for one stop bit \hideinitializer */
  56. #define UART_STOP_BIT_1_5 (0x1ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for 1.5 stop bit when 5-bit word length \hideinitializer */
  57. #define UART_STOP_BIT_2 (0x1ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for two stop bit when 6, 7, 8-bit word length \hideinitializer */
  58. /*---------------------------------------------------------------------------------------------------------*/
  59. /* UART RTS ACTIVE LEVEL constants definitions */
  60. /*---------------------------------------------------------------------------------------------------------*/
  61. #define UART_RTS_IS_LOW_LEV_ACTIVE (0x1ul << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is Low Level Active \hideinitializer */
  62. #define UART_RTS_IS_HIGH_LEV_ACTIVE (0x0ul << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is High Level Active \hideinitializer */
  63. /*---------------------------------------------------------------------------------------------------------*/
  64. /* UART_IRDA constants definitions */
  65. /*---------------------------------------------------------------------------------------------------------*/
  66. #define UART_IRDA_TXEN (0x1ul << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Tx mode \hideinitializer */
  67. #define UART_IRDA_RXEN (0x0ul << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Rx mode \hideinitializer */
  68. /*---------------------------------------------------------------------------------------------------------*/
  69. /* UART_FUNCSEL constants definitions */
  70. /*---------------------------------------------------------------------------------------------------------*/
  71. #define UART_FUNCSEL_UART (0x0ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set UART Function (Default) \hideinitializer */
  72. #define UART_FUNCSEL_IrDA (0x2ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set IrDA Function \hideinitializer */
  73. #define UART_FUNCSEL_RS485 (0x3ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set RS485 Function \hideinitializer */
  74. #define UART_FUNCSEL_SINGLE_WIRE (0x4ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set Single-wire Function \hideinitializer */
  75. /*---------------------------------------------------------------------------------------------------------*/
  76. /* UART BAUDRATE MODE constants definitions */
  77. /*---------------------------------------------------------------------------------------------------------*/
  78. #define UART_BAUD_MODE0 (0ul) /*!< Set UART Baudrate Mode is Mode0 \hideinitializer */
  79. #define UART_BAUD_MODE2 (UART_BAUD_BAUDM1_Msk | UART_BAUD_BAUDM0_Msk) /*!< Set UART Baudrate Mode is Mode2 \hideinitializer */
  80. /*@}*/ /* end of group UART_EXPORTED_CONSTANTS */
  81. /** @addtogroup UART_EXPORTED_FUNCTIONS UART Exported Functions
  82. @{
  83. */
  84. /**
  85. * @brief Calculate UART baudrate mode0 divider
  86. *
  87. * @param[in] u32SrcFreq UART clock frequency
  88. * @param[in] u32BaudRate Baudrate of UART module
  89. *
  90. * @return UART baudrate mode0 divider
  91. *
  92. * @details This macro calculate UART baudrate mode0 divider.
  93. * \hideinitializer
  94. */
  95. #define UART_BAUD_MODE0_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)*8ul)) / (u32BaudRate) >> 4ul)-2ul)
  96. /**
  97. * @brief Calculate UART baudrate mode2 divider
  98. *
  99. * @param[in] u32SrcFreq UART clock frequency
  100. * @param[in] u32BaudRate Baudrate of UART module
  101. *
  102. * @return UART baudrate mode2 divider
  103. *
  104. * @details This macro calculate UART baudrate mode2 divider.
  105. * \hideinitializer
  106. */
  107. #define UART_BAUD_MODE2_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)/2ul)) / (u32BaudRate))-2ul)
  108. /**
  109. * @brief Write UART data
  110. *
  111. * @param[in] uart The pointer of the specified UART module
  112. * @param[in] u8Data Data byte to transmit.
  113. *
  114. * @return None
  115. *
  116. * @details This macro write Data to Tx data register.
  117. * \hideinitializer
  118. */
  119. #define UART_WRITE(uart, u8Data) ((uart)->DAT = (u8Data))
  120. /**
  121. * @brief Read UART data
  122. *
  123. * @param[in] uart The pointer of the specified UART module
  124. *
  125. * @return The oldest data byte in RX FIFO.
  126. *
  127. * @details This macro read Rx data register.
  128. * \hideinitializer
  129. */
  130. #define UART_READ(uart) ((uart)->DAT)
  131. /**
  132. * @brief Get Tx empty
  133. *
  134. * @param[in] uart The pointer of the specified UART module
  135. *
  136. * @retval 0 Tx FIFO is not empty
  137. * @retval >=1 Tx FIFO is empty
  138. *
  139. * @details This macro get Transmitter FIFO empty register value.
  140. * \hideinitializer
  141. */
  142. #define UART_GET_TX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTY_Msk)
  143. /**
  144. * @brief Get Rx empty
  145. *
  146. * @param[in] uart The pointer of the specified UART module
  147. *
  148. * @retval 0 Rx FIFO is not empty
  149. * @retval >=1 Rx FIFO is empty
  150. *
  151. * @details This macro get Receiver FIFO empty register value.
  152. * \hideinitializer
  153. */
  154. #define UART_GET_RX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk)
  155. /**
  156. * @brief Check specified UART port transmission is over.
  157. *
  158. * @param[in] uart The pointer of the specified UART module
  159. *
  160. * @retval 0 Tx transmission is not over
  161. * @retval 1 Tx transmission is over
  162. *
  163. * @details This macro return Transmitter Empty Flag register bit value.
  164. * It indicates if specified UART port transmission is over nor not.
  165. * \hideinitializer
  166. */
  167. #define UART_IS_TX_EMPTY(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos)
  168. /**
  169. * @brief Wait specified UART port transmission is over
  170. *
  171. * @param[in] uart The pointer of the specified UART module
  172. *
  173. * @return None
  174. *
  175. * @details This macro wait specified UART port transmission is over.
  176. * \hideinitializer
  177. */
  178. #define UART_WAIT_TX_EMPTY(uart) while(!((((uart)->FIFOSTS) & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos))
  179. /**
  180. * @brief Check RX is ready or not
  181. *
  182. * @param[in] uart The pointer of the specified UART module
  183. *
  184. * @retval 0 The number of bytes in the RX FIFO is less than the RFITL
  185. * @retval 1 The number of bytes in the RX FIFO equals or larger than RFITL
  186. *
  187. * @details This macro check receive data available interrupt flag is set or not.
  188. * \hideinitializer
  189. */
  190. #define UART_IS_RX_READY(uart) (((uart)->INTSTS & UART_INTSTS_RDAIF_Msk)>>UART_INTSTS_RDAIF_Pos)
  191. /**
  192. * @brief Check TX FIFO is full or not
  193. *
  194. * @param[in] uart The pointer of the specified UART module
  195. *
  196. * @retval 1 TX FIFO is full
  197. * @retval 0 TX FIFO is not full
  198. *
  199. * @details This macro check TX FIFO is full or not.
  200. * \hideinitializer
  201. */
  202. #define UART_IS_TX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)>>UART_FIFOSTS_TXFULL_Pos)
  203. /**
  204. * @brief Check RX FIFO is full or not
  205. *
  206. * @param[in] uart The pointer of the specified UART module
  207. *
  208. * @retval 1 RX FIFO is full
  209. * @retval 0 RX FIFO is not full
  210. *
  211. * @details This macro check RX FIFO is full or not.
  212. * \hideinitializer
  213. */
  214. #define UART_IS_RX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)>>UART_FIFOSTS_RXFULL_Pos)
  215. /**
  216. * @brief Get Tx full register value
  217. *
  218. * @param[in] uart The pointer of the specified UART module
  219. *
  220. * @retval 0 Tx FIFO is not full.
  221. * @retval >=1 Tx FIFO is full.
  222. *
  223. * @details This macro get Tx full register value.
  224. * \hideinitializer
  225. */
  226. #define UART_GET_TX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)
  227. /**
  228. * @brief Get Rx full register value
  229. *
  230. * @param[in] uart The pointer of the specified UART module
  231. *
  232. * @retval 0 Rx FIFO is not full.
  233. * @retval >=1 Rx FIFO is full.
  234. *
  235. * @details This macro get Rx full register value.
  236. * \hideinitializer
  237. */
  238. #define UART_GET_RX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)
  239. /**
  240. * @brief Enable specified UART interrupt
  241. *
  242. * @param[in] uart The pointer of the specified UART module
  243. * @param[in] u32eIntSel Interrupt type select
  244. * - \ref UART_INTEN_ABRIEN_Msk : Auto baud rate interrupt
  245. * - \ref UART_INTEN_WKIEN_Msk : Wakeup interrupt
  246. * - \ref UART_INTEN_BUFEIEN_Msk : Buffer Error interrupt
  247. * - \ref UART_INTEN_RXTOIEN_Msk : Rx time-out interrupt
  248. * - \ref UART_INTEN_MODEMIEN_Msk : Modem interrupt
  249. * - \ref UART_INTEN_RLSIEN_Msk : Rx Line status interrupt
  250. * - \ref UART_INTEN_THREIEN_Msk : Tx empty interrupt
  251. * - \ref UART_INTEN_RDAIEN_Msk : Rx ready interrupt
  252. *
  253. * @return None
  254. *
  255. * @details This macro enable specified UART interrupt.
  256. * \hideinitializer
  257. */
  258. #define UART_ENABLE_INT(uart, u32eIntSel) ((uart)->INTEN |= (u32eIntSel))
  259. /**
  260. * @brief Disable specified UART interrupt
  261. *
  262. * @param[in] uart The pointer of the specified UART module
  263. * @param[in] u32eIntSel Interrupt type select
  264. * - \ref UART_INTEN_ABRIEN_Msk : Auto baud rate interrupt
  265. * - \ref UART_INTEN_WKIEN_Msk : Wakeup interrupt
  266. * - \ref UART_INTEN_BUFEIEN_Msk : Buffer Error interrupt
  267. * - \ref UART_INTEN_RXTOIEN_Msk : Rx time-out interrupt
  268. * - \ref UART_INTEN_MODEMIEN_Msk : Modem status interrupt
  269. * - \ref UART_INTEN_RLSIEN_Msk : Receive Line status interrupt
  270. * - \ref UART_INTEN_THREIEN_Msk : Tx empty interrupt
  271. * - \ref UART_INTEN_RDAIEN_Msk : Rx ready interrupt
  272. *
  273. * @return None
  274. *
  275. * @details This macro enable specified UART interrupt.
  276. * \hideinitializer
  277. */
  278. #define UART_DISABLE_INT(uart, u32eIntSel) ((uart)->INTEN &= ~ (u32eIntSel))
  279. /**
  280. * @brief Get specified interrupt flag/status
  281. *
  282. * @param[in] uart The pointer of the specified UART module
  283. * @param[in] u32eIntTypeFlag Interrupt Type Flag, should be
  284. * - \ref UART_INTSTS_PBUFEINT_Msk : PDMA Mode Buffer Error Interrupt Indicator
  285. * - \ref UART_INTSTS_PTOINT_Msk : PDMA Mode Time-out Interrupt Indicator
  286. * - \ref UART_INTSTS_PMODINT_Msk : PDMA Mode MODEM Status Interrupt Indicator
  287. * - \ref UART_INTSTS_PRLSINT_Msk : PDMA Mode Receive Line Status Interrupt Indicator
  288. * - \ref UART_INTSTS_PBUFEIF_Msk : PDMA Mode Buffer Error Interrupt Flag
  289. * - \ref UART_INTSTS_PTOIF_Msk : PDMA Mode Time-out Interrupt Flag
  290. * - \ref UART_INTSTS_PMODIF_Msk : PDMA Mode MODEM Interrupt Flag
  291. * - \ref UART_INTSTS_PRLSIF_Msk : PDMA Mode Receive Line Status Flag
  292. * - \ref UART_INTSTS_BUFEINT_Msk : Buffer Error Interrupt Indicator
  293. * - \ref UART_INTSTS_RXTOINT_Msk : Time-out Interrupt Indicator
  294. * - \ref UART_INTSTS_MODEMINT_Msk : Modem Status Interrupt Indicator
  295. * - \ref UART_INTSTS_RLSINT_Msk : Receive Line Status Interrupt Indicator
  296. * - \ref UART_INTSTS_THREINT_Msk : Transmit Holding Register Empty Interrupt Indicator
  297. * - \ref UART_INTSTS_RDAINT_Msk : Receive Data Available Interrupt Indicator
  298. * - \ref UART_INTSTS_BUFEIF_Msk : Buffer Error Interrupt Flag
  299. * - \ref UART_INTSTS_RXTOIF_Msk : Rx Time-out Interrupt Flag
  300. * - \ref UART_INTSTS_MODEMIF_Msk : Modem Interrupt Flag
  301. * - \ref UART_INTSTS_RLSIF_Msk : Receive Line Status Interrupt Flag
  302. * - \ref UART_INTSTS_THREIF_Msk : Tx Empty Interrupt Flag
  303. * - \ref UART_INTSTS_RDAIF_Msk : Rx Ready Interrupt Flag
  304. *
  305. * @retval 0 The specified interrupt is not happened.
  306. * 1 The specified interrupt is happened.
  307. *
  308. * @details This macro get specified interrupt flag or interrupt indicator status.
  309. * \hideinitializer
  310. */
  311. #define UART_GET_INT_FLAG(uart,u32eIntTypeFlag) (((uart)->INTSTS & (u32eIntTypeFlag))?1:0)
  312. /**
  313. * @brief Clear RS-485 Address Byte Detection Flag
  314. *
  315. * @param[in] uart The pointer of the specified UART module
  316. *
  317. * @return None
  318. *
  319. * @details This macro clear RS-485 address byte detection flag.
  320. * \hideinitializer
  321. */
  322. #define UART_RS485_CLEAR_ADDR_FLAG(uart) ((uart)->FIFOSTS = UART_FIFOSTS_ADDRDETF_Msk)
  323. /**
  324. * @brief Get RS-485 Address Byte Detection Flag
  325. *
  326. * @param[in] uart The pointer of the specified UART module
  327. *
  328. * @retval 0 Receiver detects a data that is not an address bit.
  329. * @retval 1 Receiver detects a data that is an address bit.
  330. *
  331. * @details This macro get RS-485 address byte detection flag.
  332. * \hideinitializer
  333. */
  334. #define UART_RS485_GET_ADDR_FLAG(uart) (((uart)->FIFOSTS & UART_FIFOSTS_ADDRDETF_Msk) >> UART_FIFOSTS_ADDRDETF_Pos)
  335. /* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */
  336. __STATIC_INLINE void UART_CLEAR_RTS(UART_T *uart);
  337. __STATIC_INLINE void UART_SET_RTS(UART_T *uart);
  338. /**
  339. * @brief Set RTS pin to low
  340. *
  341. * @param[in] uart The pointer of the specified UART module
  342. *
  343. * @return None
  344. *
  345. * @details This macro set RTS pin to low.
  346. */
  347. __STATIC_INLINE void UART_CLEAR_RTS(UART_T *uart)
  348. {
  349. uart->MODEM |= UART_MODEM_RTSACTLV_Msk;
  350. uart->MODEM &= ~UART_MODEM_RTS_Msk;
  351. }
  352. /**
  353. * @brief Set RTS pin to high
  354. *
  355. * @param[in] uart The pointer of the specified UART module
  356. *
  357. * @return None
  358. *
  359. * @details This macro set RTS pin to high.
  360. */
  361. __STATIC_INLINE void UART_SET_RTS(UART_T *uart)
  362. {
  363. uart->MODEM |= UART_MODEM_RTSACTLV_Msk | UART_MODEM_RTS_Msk;
  364. }
  365. /**
  366. * @brief Enable specified UART PDMA function
  367. *
  368. * @param[in] uart The pointer of the specified UART module
  369. * @param[in] u32FuncSel Combination of following functions
  370. * - \ref UART_INTEN_TXPDMAEN_Msk
  371. * - \ref UART_INTEN_RXPDMAEN_Msk
  372. *
  373. * @return None
  374. *
  375. * \hideinitializer
  376. */
  377. #define UART_PDMA_ENABLE(uart, u32FuncSel) ((uart)->INTEN |= (u32FuncSel))
  378. /**
  379. * @brief Disable specified UART PDMA function
  380. *
  381. * @param[in] uart The pointer of the specified UART module
  382. * @param[in] u32FuncSel Combination of following functions
  383. * - \ref UART_INTEN_TXPDMAEN_Msk
  384. * - \ref UART_INTEN_RXPDMAEN_Msk
  385. *
  386. * @return None
  387. *
  388. * \hideinitializer
  389. */
  390. #define UART_PDMA_DISABLE(uart, u32FuncSel) ((uart)->INTEN &= ~(u32FuncSel))
  391. void UART_ClearIntFlag(UART_T *uart, uint32_t u32InterruptFlag);
  392. void UART_Close(UART_T *uart);
  393. void UART_DisableFlowCtrl(UART_T *uart);
  394. void UART_DisableInt(UART_T *uart, uint32_t u32InterruptFlag);
  395. void UART_EnableFlowCtrl(UART_T *uart);
  396. void UART_EnableInt(UART_T *uart, uint32_t u32InterruptFlag);
  397. void UART_Open(UART_T *uart, uint32_t u32baudrate);
  398. uint32_t UART_Read(UART_T *uart, uint8_t pu8RxBuf[], uint32_t u32ReadBytes);
  399. void UART_SetLineConfig(UART_T *uart, uint32_t u32baudrate, uint32_t u32data_width, uint32_t u32parity, uint32_t u32stop_bits);
  400. void UART_SetTimeoutCnt(UART_T *uart, uint32_t u32TOC);
  401. void UART_SelectIrDAMode(UART_T *uart, uint32_t u32Buadrate, uint32_t u32Direction);
  402. void UART_SelectRS485Mode(UART_T *uart, uint32_t u32Mode, uint32_t u32Addr);
  403. uint32_t UART_Write(UART_T *uart, uint8_t pu8TxBuf[], uint32_t u32WriteBytes);
  404. /*@}*/ /* end of group UART_EXPORTED_FUNCTIONS */
  405. /*@}*/ /* end of group UART_Driver */
  406. /*@}*/ /* end of group Standard_Driver */
  407. #ifdef __cplusplus
  408. }
  409. #endif
  410. #endif /*__NU_UART_H__*/