board_dev.c 7.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303
  1. /**************************************************************************//**
  2. *
  3. * @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Change Logs:
  8. * Date Author Notes
  9. * 2020-1-16 Wayne First version
  10. *
  11. ******************************************************************************/
  12. #include <rtdevice.h>
  13. #include <drv_gpio.h>
  14. #if defined(BOARD_USING_STORAGE_SPIFLASH)
  15. #if defined(RT_USING_SFUD)
  16. #include "spi_flash.h"
  17. #include "spi_flash_sfud.h"
  18. #endif
  19. #include "drv_qspi.h"
  20. #define W25X_REG_READSTATUS (0x05)
  21. #define W25X_REG_READSTATUS2 (0x35)
  22. #define W25X_REG_WRITEENABLE (0x06)
  23. #define W25X_REG_WRITESTATUS (0x01)
  24. #define W25X_REG_QUADENABLE (0x02)
  25. static rt_uint8_t SpiFlash_ReadStatusReg(struct rt_qspi_device *qspi_device)
  26. {
  27. rt_uint8_t u8Val;
  28. rt_err_t result = RT_EOK;
  29. rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS;
  30. result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
  31. RT_ASSERT(result > 0);
  32. return u8Val;
  33. }
  34. static rt_uint8_t SpiFlash_ReadStatusReg2(struct rt_qspi_device *qspi_device)
  35. {
  36. rt_uint8_t u8Val;
  37. rt_err_t result = RT_EOK;
  38. rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS2;
  39. result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
  40. RT_ASSERT(result > 0);
  41. return u8Val;
  42. }
  43. static rt_err_t SpiFlash_WriteStatusReg(struct rt_qspi_device *qspi_device, uint8_t u8Value1, uint8_t u8Value2)
  44. {
  45. rt_uint8_t w25x_txCMD1;
  46. rt_uint8_t au8Val[2];
  47. rt_err_t result;
  48. struct rt_qspi_message qspi_message = {0};
  49. /* Enable WE */
  50. w25x_txCMD1 = W25X_REG_WRITEENABLE;
  51. result = rt_qspi_send(qspi_device, &w25x_txCMD1, sizeof(w25x_txCMD1));
  52. if (result != sizeof(w25x_txCMD1))
  53. goto exit_SpiFlash_WriteStatusReg;
  54. /* Prepare status-1, 2 data */
  55. au8Val[0] = u8Value1;
  56. au8Val[1] = u8Value2;
  57. /* 1-bit mode: Instruction+payload */
  58. qspi_message.instruction.content = W25X_REG_WRITESTATUS;
  59. qspi_message.instruction.qspi_lines = 1;
  60. qspi_message.qspi_data_lines = 1;
  61. qspi_message.parent.cs_take = 1;
  62. qspi_message.parent.cs_release = 1;
  63. qspi_message.parent.send_buf = &au8Val[0];
  64. qspi_message.parent.length = sizeof(au8Val);
  65. qspi_message.parent.next = RT_NULL;
  66. if (rt_qspi_transfer_message(qspi_device, &qspi_message) != sizeof(au8Val))
  67. {
  68. result = -RT_ERROR;
  69. }
  70. result = RT_EOK;
  71. exit_SpiFlash_WriteStatusReg:
  72. return result;
  73. }
  74. static void SpiFlash_WaitReady(struct rt_qspi_device *qspi_device)
  75. {
  76. volatile uint8_t u8ReturnValue;
  77. do
  78. {
  79. u8ReturnValue = SpiFlash_ReadStatusReg(qspi_device);
  80. u8ReturnValue = u8ReturnValue & 1;
  81. }
  82. while (u8ReturnValue != 0); // check the BUSY bit
  83. }
  84. static void SpiFlash_EnterQspiMode(struct rt_qspi_device *qspi_device)
  85. {
  86. rt_err_t result = RT_EOK;
  87. uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
  88. uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
  89. u8Status2 |= W25X_REG_QUADENABLE;
  90. result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
  91. RT_ASSERT(result == RT_EOK);
  92. SpiFlash_WaitReady(qspi_device);
  93. }
  94. static void SpiFlash_ExitQspiMode(struct rt_qspi_device *qspi_device)
  95. {
  96. rt_err_t result = RT_EOK;
  97. uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
  98. uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
  99. u8Status2 &= ~W25X_REG_QUADENABLE;
  100. result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
  101. RT_ASSERT(result == RT_EOK);
  102. SpiFlash_WaitReady(qspi_device);
  103. }
  104. static int rt_hw_spiflash_init(void)
  105. {
  106. /*
  107. Don't forget to switch SPIM pins to QSPI0 pins on board.
  108. CS: R12-Open, R13-Close
  109. CLK: R14-Open, R15-Close
  110. MOSI: R16-Open, R17-Close
  111. MISO: R18-Open, R19-Close
  112. IO2: R20-Open, R21-Close
  113. IO3: R22-Open, R23-Close
  114. */
  115. if (nu_qspi_bus_attach_device("qspi0", "qspi01", 4, SpiFlash_EnterQspiMode, SpiFlash_ExitQspiMode) != RT_EOK)
  116. return -1;
  117. #if defined(RT_USING_SFUD)
  118. if (rt_sfud_flash_probe(FAL_USING_NOR_FLASH_DEV_NAME, "qspi01") == RT_NULL)
  119. {
  120. return -(RT_ERROR);
  121. }
  122. #endif
  123. return 0;
  124. }
  125. INIT_COMPONENT_EXPORT(rt_hw_spiflash_init);
  126. #endif /* BOARD_USING_STORAGE_SPIFLASH */
  127. #if defined(BOARD_USING_NCT7717U)
  128. #include "sensor_nct7717u.h"
  129. int rt_hw_nct7717u_port(void)
  130. {
  131. struct rt_sensor_config cfg;
  132. cfg.intf.dev_name = "i2c2";
  133. cfg.irq_pin.pin = PIN_IRQ_PIN_NONE;
  134. return rt_hw_nct7717u_init("nct7717u", &cfg);
  135. }
  136. INIT_APP_EXPORT(rt_hw_nct7717u_port);
  137. #endif /* BOARD_USING_NCT7717U */
  138. #if defined(BOARD_USING_MPU6500) && defined(PKG_USING_MPU6XXX)
  139. #include "sensor_inven_mpu6xxx.h"
  140. int rt_hw_mpu6xxx_port(void)
  141. {
  142. struct rt_sensor_config cfg;
  143. rt_base_t mpu_int = NU_GET_PININDEX(NU_PD, 2);
  144. cfg.intf.dev_name = "i2c2";
  145. cfg.intf.arg = (void *)MPU6XXX_ADDR_DEFAULT;
  146. cfg.irq_pin.pin = mpu_int;
  147. return rt_hw_mpu6xxx_init("mpu", &cfg);
  148. }
  149. INIT_APP_EXPORT(rt_hw_mpu6xxx_port);
  150. #endif /* BOARD_USING_MPU6500 */
  151. #if defined(BOARD_USING_ESP8266)
  152. static int rt_hw_esp8266_port(void)
  153. {
  154. rt_base_t esp_rst_pin = NU_GET_PININDEX(NU_PC, 4);
  155. /* ESP8266 reset pin PC.4 */
  156. rt_pin_mode(esp_rst_pin, PIN_MODE_OUTPUT);
  157. rt_pin_write(esp_rst_pin, 1);
  158. return 0;
  159. }
  160. INIT_COMPONENT_EXPORT(rt_hw_esp8266_port);
  161. #endif /* BOARD_USING_ESP8266 */
  162. #if defined(BOARD_USING_LCD_ILI9341) && defined(NU_PKG_USING_ILI9341_SPI)
  163. #if defined(NU_PKG_USING_ADC_TOUCH_SW)
  164. #include "adc_touch.h"
  165. #include "touch_sw.h"
  166. #include "NuMicro.h"
  167. #define NU_MFP_POS(PIN) ((PIN % 4) * 8)
  168. #define NU_MFP_MSK(PIN) (0x1ful << NU_MFP_POS(PIN))
  169. S_CALIBRATION_MATRIX g_sCalMat = { 97, 6214, -3216652, 4844, -30, -2333200, 65536 };
  170. static void nu_pin_func(rt_base_t pin, int data)
  171. {
  172. uint32_t pin_index = NU_GET_PINS(pin);
  173. uint32_t port_index = NU_GET_PORT(pin);
  174. __IO uint32_t *GPx_MFPx = ((__IO uint32_t *) &SYS->GPA_MFP0) + port_index * 4 + (pin_index / 4);
  175. uint32_t MFP_Msk = NU_MFP_MSK(pin_index);
  176. *GPx_MFPx = (*GPx_MFPx & (~MFP_Msk)) | data;
  177. }
  178. static void tp_switch_to_analog(rt_base_t pin)
  179. {
  180. GPIO_T *port = (GPIO_T *)(GPIOA_BASE + (0x40) * NU_GET_PORT(pin));
  181. if (pin == NU_GET_PININDEX(NU_PB, 6))
  182. nu_pin_func(pin, SYS_GPB_MFP1_PB6MFP_EADC0_CH6);
  183. else if (pin == NU_GET_PININDEX(NU_PB, 9))
  184. nu_pin_func(pin, SYS_GPB_MFP2_PB9MFP_EADC0_CH9);
  185. GPIO_DISABLE_DIGITAL_PATH(port, NU_GET_PIN_MASK(NU_GET_PINS(pin)));
  186. }
  187. static void tp_switch_to_digital(rt_base_t pin)
  188. {
  189. GPIO_T *port = (GPIO_T *)(GPIOA_BASE + (0x40) * NU_GET_PORT(pin));
  190. nu_pin_func(pin, 0);
  191. /* Enable digital path on these EADC pins */
  192. GPIO_ENABLE_DIGITAL_PATH(port, NU_GET_PIN_MASK(NU_GET_PINS(pin)));
  193. }
  194. static S_TOUCH_SW sADCTP =
  195. {
  196. .adc_name = "eadc0",
  197. .i32ADCChnYU = 6,
  198. .i32ADCChnXR = 9,
  199. .pin =
  200. {
  201. NU_GET_PININDEX(NU_PB, 7), // XL
  202. NU_GET_PININDEX(NU_PB, 6), // YU
  203. NU_GET_PININDEX(NU_PB, 9), // XR
  204. NU_GET_PININDEX(NU_PB, 8), // YD
  205. },
  206. .switch_to_analog = tp_switch_to_analog,
  207. .switch_to_digital = tp_switch_to_digital,
  208. };
  209. #endif
  210. #include <lcd_ili9341.h>
  211. #if defined(PKG_USING_GUIENGINE)
  212. #include <rtgui/driver.h>
  213. #endif
  214. int rt_hw_ili9341_port(void)
  215. {
  216. if (rt_hw_lcd_ili9341_spi_init("spi2", RT_NULL) != RT_EOK)
  217. return -1;
  218. rt_hw_lcd_ili9341_init();
  219. #if defined(PKG_USING_GUIENGINE)
  220. rt_device_t lcd_ili9341;
  221. lcd_ili9341 = rt_device_find("lcd");
  222. if (lcd_ili9341)
  223. {
  224. rtgui_graphic_set_device(lcd_ili9341);
  225. }
  226. #endif
  227. #if defined(NU_PKG_USING_ADC_TOUCH_SW)
  228. nu_adc_touch_sw_register(&sADCTP);
  229. #endif
  230. return 0;
  231. }
  232. INIT_COMPONENT_EXPORT(rt_hw_ili9341_port);
  233. #endif /* BOARD_USING_LCD_ILI9341 */