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drv_sci.c 25 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2023-09-24 Vandoul first version
  9. * 2023-09-27 Vandoul add sci uart
  10. */
  11. #include "drv_sci.h"
  12. #ifdef BSP_USING_SCI
  13. //#define DRV_DEBUG
  14. #define DBG_TAG "drv.sci"
  15. #ifdef DRV_DEBUG
  16. #define DBG_LVL DBG_LOG
  17. #else
  18. #define DBG_LVL DBG_INFO
  19. #endif /* DRV_DEBUG */
  20. #include <rtdbg.h>
  21. enum
  22. {
  23. #ifdef BSP_USING_SCI0
  24. RA_SCI_INDEX0,
  25. #endif
  26. #ifdef BSP_USING_SCI1
  27. RA_SCI_INDEX1,
  28. #endif
  29. #ifdef BSP_USING_SCI2
  30. RA_SCI_INDEX2,
  31. #endif
  32. #ifdef BSP_USING_SCI3
  33. RA_SCI_INDEX3,
  34. #endif
  35. #ifdef BSP_USING_SCI4
  36. RA_SCI_INDEX4,
  37. #endif
  38. #ifdef BSP_USING_SCI5
  39. RA_SCI_INDEX5,
  40. #endif
  41. #ifdef BSP_USING_SCI6
  42. RA_SCI_INDEX6,
  43. #endif
  44. #ifdef BSP_USING_SCI7
  45. RA_SCI_INDEX7,
  46. #endif
  47. #ifdef BSP_USING_SCI8
  48. RA_SCI_INDEX8,
  49. #endif
  50. #ifdef BSP_USING_SCI9
  51. RA_SCI_INDEX9,
  52. #endif
  53. RA_SCI_INDEX_MAX,
  54. };
  55. struct ra_sci_param
  56. {
  57. const char bus_name[RT_NAME_MAX];
  58. const void *sci_ctrl;
  59. const void *sci_cfg;
  60. const void *ops;
  61. };
  62. #ifdef RT_USING_I2C
  63. rt_weak const struct rt_i2c_bus_device_ops sci_ops_i2c;
  64. #endif
  65. #ifdef RT_USING_SPI
  66. rt_weak const struct rt_spi_ops sci_ops_spi;
  67. #endif
  68. #ifdef RT_USING_UART
  69. rt_weak const struct rt_uart_ops sci_ops_uart;
  70. #endif
  71. struct ra_sci_object
  72. {
  73. union
  74. {
  75. #ifdef RT_USING_SPI
  76. struct
  77. {
  78. struct rt_spi_bus sbus;
  79. struct rt_spi_configuration *spi_cfg;
  80. };
  81. #endif
  82. #ifdef RT_USING_I2C
  83. struct
  84. {
  85. struct rt_i2c_bus_device ibus;
  86. };
  87. #endif
  88. #ifdef RT_USING_UART
  89. struct
  90. {
  91. struct rt_serial_device ubus;
  92. };
  93. #endif
  94. };
  95. const struct ra_sci_param *param;
  96. struct rt_event event;
  97. };
  98. #ifndef BIT
  99. #define BIT(idx) (1ul << (idx))
  100. #endif
  101. #ifndef BITS
  102. #define BITS(b,e) ((((uint32_t)-1)<<(b))&(((uint32_t)-1)>>(31-(e))))
  103. #endif
  104. #define _TO_STR(_a) #_a
  105. #define CONCAT3STR(_a,_b,_c) _TO_STR(_a##_b##_c)
  106. #define RA_SCI_EVENT_ABORTED BIT(0)
  107. #define RA_SCI_EVENT_RX_COMPLETE BIT(1)
  108. #define RA_SCI_EVENT_TX_COMPLETE BIT(2)
  109. #define RA_SCI_EVENT_ERROR BIT(3)
  110. #define RA_SCI_EVENT_ALL BITS(0,3)
  111. #define RA_SCI_HANDLE_ITEM(idx,type,id) {.bus_name=CONCAT3STR(sci,idx,id),.sci_ctrl=&g_sci##idx##_ctrl,.sci_cfg=&g_sci##idx##_cfg,.ops=&sci_ops_##type}
  112. const static struct ra_sci_param sci_param[] =
  113. {
  114. #ifdef BSP_USING_SCI0
  115. #ifdef BSP_USING_SCI0_SPI
  116. RA_SCI_HANDLE_ITEM(0, spi, s),
  117. #elif defined(BSP_USING_SCI0_I2C)
  118. RA_SCI_HANDLE_ITEM(0, i2c, i),
  119. #elif defined(BSP_USING_SCI0_UART)
  120. RA_SCI_HANDLE_ITEM(0, uart, u),
  121. #endif
  122. #endif
  123. #ifdef BSP_USING_SCI1
  124. #ifdef BSP_USING_SCI1_SPI
  125. RA_SCI_HANDLE_ITEM(1, spi, s),
  126. #elif defined(BSP_USING_SCI1_I2C)
  127. RA_SCI_HANDLE_ITEM(1, i2c, i),
  128. #elif defined(BSP_USING_SCI1_UART)
  129. RA_SCI_HANDLE_ITEM(1, uart, u),
  130. #endif
  131. #endif
  132. #ifdef BSP_USING_SCI2
  133. #ifdef BSP_USING_SCI2_SPI
  134. RA_SCI_HANDLE_ITEM(2, spi, s),
  135. #elif defined(BSP_USING_SCI2_I2C)
  136. RA_SCI_HANDLE_ITEM(2, i2c, i),
  137. #elif defined(BSP_USING_SCI2_UART)
  138. RA_SCI_HANDLE_ITEM(2, uart, u),
  139. #endif
  140. #endif
  141. #ifdef BSP_USING_SCI3
  142. #ifdef BSP_USING_SCI3_SPI
  143. RA_SCI_HANDLE_ITEM(3, spi, s),
  144. #elif defined(BSP_USING_SCI3_I2C)
  145. RA_SCI_HANDLE_ITEM(3, i2c, i),
  146. #elif defined(BSP_USING_SCI3_UART)
  147. RA_SCI_HANDLE_ITEM(3, uart, u),
  148. #endif
  149. #endif
  150. #ifdef BSP_USING_SCI4
  151. #ifdef BSP_USING_SCI4_SPI
  152. RA_SCI_HANDLE_ITEM(4, spi, s),
  153. #elif defined(BSP_USING_SCI4_I2C)
  154. RA_SCI_HANDLE_ITEM(4, i2c, i),
  155. #elif defined(BSP_USING_SCI4_UART)
  156. RA_SCI_HANDLE_ITEM(4, uart, u),
  157. #endif
  158. #endif
  159. #ifdef BSP_USING_SCI5
  160. #ifdef BSP_USING_SCI5_SPI
  161. RA_SCI_HANDLE_ITEM(5, spi, s),
  162. #elif defined(BSP_USING_SCI5_I2C)
  163. RA_SCI_HANDLE_ITEM(5, i2c, i),
  164. #elif defined(BSP_USING_SCI5_UART)
  165. RA_SCI_HANDLE_ITEM(5, uart, u),
  166. #endif
  167. #endif
  168. #ifdef BSP_USING_SCI6
  169. #ifdef BSP_USING_SCI6_SPI
  170. RA_SCI_HANDLE_ITEM(6, spi, s),
  171. #elif defined(BSP_USING_SCI6_I2C)
  172. RA_SCI_HANDLE_ITEM(6, i2c, i),
  173. #elif defined(BSP_USING_SCI6_UART)
  174. RA_SCI_HANDLE_ITEM(6, uart, u),
  175. #endif
  176. #endif
  177. #ifdef BSP_USING_SCI7
  178. #ifdef BSP_USING_SCI7_SPI
  179. RA_SCI_HANDLE_ITEM(7, spi, s),
  180. #elif defined(BSP_USING_SCI7_I2C)
  181. RA_SCI_HANDLE_ITEM(7, i2c, i),
  182. #elif defined(BSP_USING_SCI7_UART)
  183. RA_SCI_HANDLE_ITEM(7, uart, u),
  184. #endif
  185. #endif
  186. #ifdef BSP_USING_SCI8
  187. #ifdef BSP_USING_SCI8_SPI
  188. RA_SCI_HANDLE_ITEM(8, spi, s),
  189. #elif defined(BSP_USING_SCI8_I2C)
  190. RA_SCI_HANDLE_ITEM(8, i2c, i),
  191. #elif defined(BSP_USING_SCI8_UART)
  192. RA_SCI_HANDLE_ITEM(8, uart, u),
  193. #endif
  194. #endif
  195. #ifdef BSP_USING_SCI9
  196. #ifdef BSP_USING_SCI9_SPI
  197. RA_SCI_HANDLE_ITEM(9, spi, s),
  198. #elif defined(BSP_USING_SCI9_I2C)
  199. RA_SCI_HANDLE_ITEM(9, i2c, i),
  200. #elif defined(BSP_USING_SCI9_UART)
  201. RA_SCI_HANDLE_ITEM(9, uart, u),
  202. #endif
  203. #endif
  204. };
  205. static struct ra_sci_object sci_obj[RA_SCI_INDEX_MAX] = {0};
  206. rt_used static rt_err_t ra_wait_complete(struct ra_sci_object *obj)
  207. {
  208. rt_uint32_t event = 0;
  209. if (RT_EOK != rt_event_recv(&obj->event, RA_SCI_EVENT_ALL, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, (rt_int32_t)rt_tick_from_millisecond(400), &event))
  210. {
  211. return -RT_ETIMEOUT;
  212. }
  213. if ((event & (RA_SCI_EVENT_ABORTED | RA_SCI_EVENT_ERROR)) == 0)
  214. {
  215. return RT_EOK;
  216. }
  217. return -RT_ERROR;
  218. }
  219. /**
  220. * @brief SCI UART
  221. * @defgroup SCI_UART
  222. * @{
  223. */
  224. #ifdef BSP_USING_SCIn_UART
  225. const static int uart_buff_size[][2] =
  226. {
  227. #ifdef BSP_USING_SCI0_UART
  228. {BSP_SCI0_UART_RX_BUFSIZE, BSP_SCI0_UART_TX_BUFSIZE},
  229. #endif
  230. #ifdef BSP_USING_SCI1_UART
  231. {BSP_SCI1_UART_RX_BUFSIZE, BSP_SCI1_UART_TX_BUFSIZE},
  232. #endif
  233. #ifdef BSP_USING_SCI2_UART
  234. {BSP_SCI2_UART_RX_BUFSIZE, BSP_SCI2_UART_TX_BUFSIZE},
  235. #endif
  236. #ifdef BSP_USING_SCI3_UART
  237. {BSP_SCI3_UART_RX_BUFSIZE, BSP_SCI3_UART_TX_BUFSIZE},
  238. #endif
  239. #ifdef BSP_USING_SCI4_UART
  240. {BSP_SCI4_UART_RX_BUFSIZE, BSP_SCI4_UART_TX_BUFSIZE},
  241. #endif
  242. #ifdef BSP_USING_SCI5_UART
  243. {BSP_SCI5_UART_RX_BUFSIZE, BSP_SCI5_UART_TX_BUFSIZE},
  244. #endif
  245. #ifdef BSP_USING_SCI6_UART
  246. {BSP_SCI6_UART_RX_BUFSIZE, BSP_SCI6_UART_TX_BUFSIZE},
  247. #endif
  248. #ifdef BSP_USING_SCI7_UART
  249. {BSP_SCI7_UART_RX_BUFSIZE, BSP_SCI7_UART_TX_BUFSIZE},
  250. #endif
  251. #ifdef BSP_USING_SCI8_UART
  252. {BSP_SCI8_UART_RX_BUFSIZE, BSP_SCI8_UART_TX_BUFSIZE},
  253. #endif
  254. #ifdef BSP_USING_SCI9_UART
  255. {BSP_SCI9_UART_RX_BUFSIZE, BSP_SCI9_UART_TX_BUFSIZE},
  256. #endif
  257. {0, 0},
  258. };
  259. void sci_uart_irq_callback(uart_callback_args_t *p_args)
  260. {
  261. rt_interrupt_enter();
  262. if (NULL != p_args)
  263. {
  264. struct ra_sci_object *obj = (struct ra_sci_object *)p_args->p_context;
  265. RT_ASSERT(obj != RT_NULL);
  266. if (UART_EVENT_RX_CHAR == p_args->event)
  267. {
  268. struct rt_serial_device *serial = &obj->ubus;
  269. struct rt_serial_rx_fifo *rx_fifo;
  270. rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx;
  271. RT_ASSERT(rx_fifo != RT_NULL);
  272. rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data);
  273. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  274. }
  275. }
  276. rt_interrupt_leave();
  277. }
  278. static rt_err_t ra_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  279. {
  280. struct ra_sci_object *obj;
  281. const struct ra_sci_param *param;
  282. RT_ASSERT(serial != RT_NULL);
  283. RT_ASSERT(cfg != RT_NULL);
  284. fsp_err_t err = FSP_SUCCESS;
  285. obj = rt_container_of(serial, struct ra_sci_object, ubus);
  286. param = obj->param;
  287. RT_ASSERT(param != RT_NULL);
  288. err = R_SCI_UART_Open((uart_ctrl_t *const)param->sci_ctrl, (uart_cfg_t *const)param->sci_cfg);
  289. if (FSP_SUCCESS != err)
  290. {
  291. return -RT_ERROR;
  292. }
  293. err = R_SCI_UART_CallbackSet((uart_ctrl_t *const)param->sci_ctrl, sci_uart_irq_callback, obj, NULL);
  294. if (FSP_SUCCESS != err)
  295. {
  296. //LOG_W("R_SCI_UART_CallbackSet API failed,%d", err);
  297. }
  298. return RT_EOK;
  299. }
  300. static rt_err_t ra_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
  301. {
  302. return RT_EOK;
  303. }
  304. static int ra_uart_putc(struct rt_serial_device *serial, char c)
  305. {
  306. struct ra_sci_object *obj;
  307. const struct ra_sci_param *param;
  308. RT_ASSERT(serial != RT_NULL);
  309. obj = rt_container_of(serial, struct ra_sci_object, ubus);
  310. param = obj->param;
  311. RT_ASSERT(param != RT_NULL);
  312. sci_uart_instance_ctrl_t *p_ctrl = (sci_uart_instance_ctrl_t *)param->sci_ctrl;
  313. p_ctrl->p_reg->TDR = c;
  314. while ((p_ctrl->p_reg->SSR_b.TEND) == 0);
  315. return RT_EOK;
  316. }
  317. static int ra_uart_getc(struct rt_serial_device *serial)
  318. {
  319. return RT_EOK;
  320. }
  321. static rt_ssize_t ra_uart_transmit(struct rt_serial_device *serial,
  322. rt_uint8_t *buf,
  323. rt_size_t size,
  324. rt_uint32_t tx_flag)
  325. {
  326. RT_ASSERT(serial != RT_NULL);
  327. RT_ASSERT(buf != RT_NULL);
  328. return 0;
  329. }
  330. const struct rt_uart_ops sci_ops_uart =
  331. {
  332. .configure = ra_uart_configure,
  333. .control = ra_uart_control,
  334. .putc = ra_uart_putc,
  335. .getc = ra_uart_getc,
  336. .transmit = ra_uart_transmit,
  337. };
  338. #else
  339. void sci_uart_irq_callback(uart_callback_args_t *p_args)
  340. {
  341. }
  342. #endif
  343. /**
  344. * @}
  345. */
  346. /**
  347. * @brief SCI I2C
  348. * @defgroup SCI_I2C
  349. * @{
  350. */
  351. #ifdef BSP_USING_SCIn_I2C
  352. void sci_i2c_irq_callback(i2c_master_callback_args_t *p_args)
  353. {
  354. rt_interrupt_enter();
  355. if (NULL != p_args)
  356. {
  357. /* capture callback event for validating the i2c transfer event*/
  358. struct ra_sci_object *obj = (struct ra_sci_object *)p_args->p_context;
  359. uint32_t event = 0;
  360. RT_ASSERT(obj != RT_NULL);
  361. switch (p_args->event)
  362. {
  363. case I2C_MASTER_EVENT_ABORTED:
  364. event |= RA_SCI_EVENT_ABORTED;
  365. break;
  366. case I2C_MASTER_EVENT_RX_COMPLETE:
  367. event |= RA_SCI_EVENT_RX_COMPLETE;
  368. break;
  369. case I2C_MASTER_EVENT_TX_COMPLETE:
  370. event |= RA_SCI_EVENT_TX_COMPLETE;
  371. break;
  372. }
  373. rt_event_send(&obj->event, event);
  374. LOG_D("event:%x", p_args->event);
  375. }
  376. rt_interrupt_leave();
  377. LOG_D("p_args:%p", p_args);
  378. }
  379. static rt_ssize_t ra_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
  380. struct rt_i2c_msg msgs[],
  381. rt_uint32_t num)
  382. {
  383. rt_size_t i;
  384. RT_ASSERT(bus != RT_NULL);
  385. struct ra_sci_object *obj = rt_container_of(bus, struct ra_sci_object, ibus);
  386. const struct ra_sci_param *param = obj->param;
  387. i2c_master_ctrl_t *master_ctrl = (i2c_master_ctrl_t *)param->sci_ctrl;
  388. int err = FSP_SUCCESS;
  389. bool restart = false;
  390. for (i = 0; i < num; i++)
  391. {
  392. struct rt_i2c_msg *msg = &msgs[i];
  393. if (msg->flags & RT_I2C_NO_STOP)
  394. {
  395. restart = true;
  396. }
  397. else
  398. {
  399. restart = false;
  400. }
  401. if (msg->flags & RT_I2C_ADDR_10BIT)
  402. {
  403. //LOG_E("10Bit not support");
  404. //break;
  405. #ifdef SOC_SERIES_R7FA8M85
  406. R_SCI_B_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_10BIT);
  407. #else
  408. R_SCI_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_10BIT);
  409. #endif
  410. }
  411. else
  412. {
  413. //master_ctrl->slave = msg->addr;
  414. #ifdef SOC_SERIES_R7FA8M85
  415. R_SCI_B_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_7BIT);
  416. #else
  417. R_SCI_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_7BIT);
  418. #endif
  419. }
  420. if (msg->flags & RT_I2C_RD)
  421. {
  422. #ifdef SOC_SERIES_R7FA8M85
  423. err = R_SCI_B_I2C_Read(master_ctrl, msg->buf, msg->len, restart);
  424. #else
  425. err = R_SCI_I2C_Read(master_ctrl, msg->buf, msg->len, restart);
  426. #endif
  427. }
  428. else
  429. {
  430. #ifdef SOC_SERIES_R7FA8M85
  431. err = R_SCI_B_I2C_Write(master_ctrl, msg->buf, msg->len, restart);
  432. #else
  433. err = R_SCI_I2C_Write(master_ctrl, msg->buf, msg->len, restart);
  434. #endif
  435. }
  436. if (FSP_SUCCESS == err)
  437. {
  438. /* handle error */
  439. err = ra_wait_complete(obj);
  440. if (RT_EOK != err)
  441. {
  442. //LOG_E("POWER_CTL reg I2C write failed,%d,%d", err, i);
  443. break;
  444. }
  445. }
  446. /* handle error */
  447. else
  448. {
  449. /* Write API returns itself is not successful */
  450. LOG_E("R_IIC_MASTER_Write/Read API failed,%d", i);
  451. break;
  452. }
  453. }
  454. return (rt_ssize_t)i;
  455. }
  456. const struct rt_i2c_bus_device_ops sci_ops_i2c =
  457. {
  458. .master_xfer = ra_i2c_mst_xfer,
  459. .slave_xfer = RT_NULL,
  460. .i2c_bus_control = RT_NULL
  461. };
  462. #endif
  463. /**
  464. * @}
  465. */
  466. /**
  467. * @brief SCI SPI
  468. * @defgroup SCI_SPI
  469. * @{
  470. */
  471. #ifdef BSP_USING_SCIn_SPI
  472. void sci_spi_irq_callback(spi_callback_args_t *p_args)
  473. {
  474. rt_interrupt_enter();
  475. if (NULL != p_args)
  476. {
  477. /* capture callback event for validating the i2c transfer event*/
  478. struct ra_sci_object *obj = (struct ra_sci_object *)p_args->p_context;
  479. uint32_t event = 0;
  480. switch (p_args->event)
  481. {
  482. case SPI_EVENT_ERR_MODE_FAULT :
  483. case SPI_EVENT_ERR_READ_OVERFLOW:
  484. case SPI_EVENT_ERR_PARITY :
  485. case SPI_EVENT_ERR_OVERRUN :
  486. case SPI_EVENT_ERR_FRAMING :
  487. case SPI_EVENT_ERR_MODE_UNDERRUN:
  488. event |= RA_SCI_EVENT_ERROR;
  489. break;
  490. case SPI_EVENT_TRANSFER_ABORTED :
  491. event |= RA_SCI_EVENT_ABORTED;
  492. break;
  493. case SPI_EVENT_TRANSFER_COMPLETE:
  494. event |= RA_SCI_EVENT_TX_COMPLETE;
  495. break;
  496. }
  497. rt_event_send(&obj->event, event);
  498. LOG_D("event:%x", p_args->event);
  499. }
  500. rt_interrupt_leave();
  501. LOG_D("p_args:%p", p_args);
  502. }
  503. static spi_bit_width_t ra_width_shift(rt_uint8_t data_width)
  504. {
  505. spi_bit_width_t bit_width = SPI_BIT_WIDTH_8_BITS;
  506. if (data_width == 1)
  507. bit_width = SPI_BIT_WIDTH_8_BITS;
  508. else if (data_width == 2)
  509. bit_width = SPI_BIT_WIDTH_16_BITS;
  510. else if (data_width == 4)
  511. bit_width = SPI_BIT_WIDTH_32_BITS;
  512. return bit_width;
  513. }
  514. static rt_err_t ra_write_message(struct rt_spi_device *device, const void *send_buf, const rt_size_t len)
  515. {
  516. RT_ASSERT(device != NULL);
  517. RT_ASSERT(send_buf != NULL);
  518. RT_ASSERT(len > 0);
  519. rt_err_t err = RT_EOK;
  520. struct ra_sci_object *obj = rt_container_of(device->bus, struct ra_sci_object, sbus);
  521. const struct ra_sci_param *param = obj->param;
  522. spi_bit_width_t bit_width = ra_width_shift(obj->spi_cfg->data_width);
  523. /**< send msessage */
  524. err = R_SCI_SPI_Write((spi_ctrl_t *)param->sci_ctrl, send_buf, len, bit_width);
  525. if (RT_EOK != err)
  526. {
  527. LOG_E("%s write failed. %d", param->bus_name, err);
  528. return -RT_ERROR;
  529. }
  530. /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
  531. ra_wait_complete(obj);
  532. return len;
  533. }
  534. static rt_err_t ra_read_message(struct rt_spi_device *device, void *recv_buf, const rt_size_t len)
  535. {
  536. RT_ASSERT(device != NULL);
  537. RT_ASSERT(recv_buf != NULL);
  538. RT_ASSERT(len > 0);
  539. rt_err_t err = RT_EOK;
  540. struct ra_sci_object *obj = rt_container_of(device->bus, struct ra_sci_object, sbus);
  541. const struct ra_sci_param *param = obj->param;
  542. spi_bit_width_t bit_width = ra_width_shift(obj->spi_cfg->data_width);
  543. /**< receive message */
  544. err = R_SCI_SPI_Read((spi_ctrl_t *)param->sci_ctrl, recv_buf, len, bit_width);
  545. if (RT_EOK != err)
  546. {
  547. LOG_E("%s write failed. %d", param->bus_name, err);
  548. return -RT_ERROR;
  549. }
  550. /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
  551. ra_wait_complete(obj);
  552. return len;
  553. }
  554. static rt_err_t ra_write_read_message(struct rt_spi_device *device, struct rt_spi_message *message)
  555. {
  556. RT_ASSERT(device != NULL);
  557. RT_ASSERT(message != NULL);
  558. RT_ASSERT(message->length > 0);
  559. rt_err_t err = RT_EOK;
  560. struct ra_sci_object *obj = rt_container_of(device->bus, struct ra_sci_object, sbus);
  561. const struct ra_sci_param *param = obj->param;
  562. spi_bit_width_t bit_width = ra_width_shift(obj->spi_cfg->data_width);
  563. /**< write and receive message */
  564. err = R_SCI_SPI_WriteRead((spi_ctrl_t *)param->sci_ctrl, message->send_buf, message->recv_buf, message->length, bit_width);
  565. if (RT_EOK != err)
  566. {
  567. LOG_E("%s write and read failed. %d", param->bus_name, err);
  568. return -RT_ERROR;
  569. }
  570. /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
  571. ra_wait_complete(obj);
  572. return message->length;
  573. }
  574. /**< init spi TODO : MSB does not support modification */
  575. static rt_err_t ra_hw_spi_configure(struct rt_spi_device *device,
  576. struct rt_spi_configuration *configuration)
  577. {
  578. RT_ASSERT(device != NULL);
  579. RT_ASSERT(configuration != NULL);
  580. rt_err_t err = RT_EOK;
  581. struct ra_sci_object *obj = rt_container_of(device->bus, struct ra_sci_object, sbus);
  582. const struct ra_sci_param *param = obj->param;
  583. const spi_cfg_t *cfg = (const spi_cfg_t *)param->sci_cfg;
  584. /**< data_width : 1 -> 8 bits , 2 -> 16 bits, 4 -> 32 bits, default 32 bits*/
  585. rt_uint8_t data_width = configuration->data_width / 8;
  586. RT_ASSERT(data_width == 1 || data_width == 2 || data_width == 4);
  587. configuration->data_width = configuration->data_width / 8;
  588. obj->spi_cfg = configuration;
  589. sci_spi_extended_cfg_t *cfg_ext = (sci_spi_extended_cfg_t *)cfg->p_extend;
  590. /**< Configure Select Line */
  591. rt_pin_write(device->cs_pin, PIN_HIGH);
  592. /**< config bitrate */
  593. R_SCI_SPI_CalculateBitrate(obj->spi_cfg->max_hz, &cfg_ext->clk_div, false);
  594. /**< init */
  595. err = R_SCI_SPI_Open((spi_ctrl_t *)param->sci_ctrl, cfg);
  596. /* handle error */
  597. if (err == FSP_ERR_IN_USE)
  598. {
  599. R_SCI_SPI_Close((spi_ctrl_t *)param->sci_ctrl);
  600. err = R_SCI_SPI_Open((spi_ctrl_t *)param->sci_ctrl, cfg);
  601. }
  602. if (RT_EOK != err)
  603. {
  604. LOG_E("%s init failed. %d", param->bus_name, err);
  605. return -RT_ERROR;
  606. }
  607. err = R_SCI_SPI_CallbackSet((spi_ctrl_t *)param->sci_ctrl, sci_spi_irq_callback, obj, NULL);
  608. if (FSP_SUCCESS != err)
  609. {
  610. LOG_E("R_SCI_I2C_CallbackSet API failed,%d", err);
  611. }
  612. return RT_EOK;
  613. }
  614. static rt_ssize_t ra_spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
  615. {
  616. RT_ASSERT(device != RT_NULL);
  617. RT_ASSERT(device->bus != RT_NULL);
  618. RT_ASSERT(message != RT_NULL);
  619. rt_err_t err = RT_EOK;
  620. if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
  621. {
  622. if (device->config.mode & RT_SPI_CS_HIGH)
  623. rt_pin_write(device->cs_pin, PIN_HIGH);
  624. else
  625. rt_pin_write(device->cs_pin, PIN_LOW);
  626. }
  627. if (message->length > 0)
  628. {
  629. if (message->send_buf == RT_NULL && message->recv_buf != RT_NULL)
  630. {
  631. /**< receive message */
  632. err = ra_read_message(device, (void *)message->recv_buf, (const rt_size_t)message->length);
  633. }
  634. else if (message->send_buf != RT_NULL && message->recv_buf == RT_NULL)
  635. {
  636. /**< send message */
  637. err = ra_write_message(device, (const void *)message->send_buf, (const rt_size_t)message->length);
  638. }
  639. else if (message->send_buf != RT_NULL && message->recv_buf != RT_NULL)
  640. {
  641. /**< send and receive message */
  642. err = ra_write_read_message(device, message);
  643. }
  644. }
  645. if (message->cs_release && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
  646. {
  647. if (device->config.mode & RT_SPI_CS_HIGH)
  648. rt_pin_write(device->cs_pin, PIN_LOW);
  649. else
  650. rt_pin_write(device->cs_pin, PIN_HIGH);
  651. }
  652. return err;
  653. }
  654. const struct rt_spi_ops sci_ops_spi =
  655. {
  656. .configure = ra_hw_spi_configure,
  657. .xfer = ra_spixfer,
  658. };
  659. #endif
  660. /**
  661. * @}
  662. */
  663. static int ra_hw_sci_init(void)
  664. {
  665. for (rt_uint8_t idx = 0; idx < RA_SCI_INDEX_MAX; idx++)
  666. {
  667. struct ra_sci_object *obj = &sci_obj[idx];
  668. const struct ra_sci_param *param = &sci_param[idx];
  669. obj->param = param;
  670. rt_err_t err;
  671. #ifdef BSP_USING_SCIn_SPI
  672. if ((uint32_t)param->ops == (uint32_t)&sci_ops_spi)
  673. {
  674. /**< register spi bus */
  675. err = rt_spi_bus_register(&obj->sbus, param->bus_name, param->ops);
  676. if (RT_EOK != err)
  677. {
  678. LOG_E("bus %s register failed. %d", param->bus_name, err);
  679. return -RT_ERROR;
  680. }
  681. }
  682. else
  683. #endif
  684. #ifdef BSP_USING_SCIn_I2C
  685. if ((uint32_t)param->ops == (uint32_t)&sci_ops_i2c)
  686. {
  687. obj->ibus.ops = param->ops;
  688. obj->ibus.priv = 0;
  689. /* opening IIC master module */
  690. #ifdef SOC_SERIES_R7FA8M85
  691. err = R_SCI_B_I2C_Open((i2c_master_ctrl_t *)param->sci_ctrl, param->sci_cfg);
  692. #else
  693. err = R_SCI_I2C_Open((i2c_master_ctrl_t *)param->sci_ctrl, param->sci_cfg);
  694. #endif
  695. if (err != FSP_SUCCESS)
  696. {
  697. LOG_E("R_IIC_MASTER_Open API failed,%d", err);
  698. continue;
  699. }
  700. #ifdef SOC_SERIES_R7FA8M85
  701. err = R_SCI_B_I2C_CallbackSet((i2c_master_ctrl_t *)param->sci_ctrl, sci_i2c_irq_callback, obj, NULL);
  702. #else
  703. err = R_SCI_I2C_CallbackSet((i2c_master_ctrl_t *)param->sci_ctrl, sci_i2c_irq_callback, obj, NULL);
  704. #endif
  705. /* handle error */
  706. if (FSP_SUCCESS != err)
  707. {
  708. LOG_E("R_SCI_I2C_CallbackSet API failed,%d", err);
  709. continue;
  710. }
  711. err = rt_i2c_bus_device_register(&obj->ibus, param->bus_name);
  712. if (RT_EOK != err)
  713. {
  714. LOG_E("i2c bus %s register failed,%d", param->bus_name, err);
  715. continue;
  716. }
  717. }
  718. else
  719. #endif
  720. #ifdef BSP_USING_SCIn_UART
  721. if ((uint32_t)param->ops == (uint32_t)&sci_ops_uart)
  722. {
  723. if (rt_device_find(param->bus_name) != RT_NULL)
  724. {
  725. continue;
  726. }
  727. struct rt_serial_device *serial = &obj->ubus;
  728. obj->ubus.ops = param->ops;
  729. serial->config.rx_bufsz = uart_buff_size[bufsz_idx][0];
  730. serial->config.tx_bufsz = uart_buff_size[bufsz_idx][1];
  731. bufsz_idx ++;
  732. err = rt_hw_serial_register(serial, param->bus_name, RT_DEVICE_FLAG_RDWR, RT_NULL);
  733. if (RT_EOK != err)
  734. {
  735. LOG_E("uart %s register failed,%d", param->bus_name, err);
  736. continue;
  737. }
  738. }
  739. #endif
  740. {
  741. }
  742. if (RT_EOK != rt_event_init(&obj->event, param->bus_name, RT_IPC_FLAG_PRIO))
  743. {
  744. LOG_E("sci event init fail!");
  745. return -RT_ERROR;
  746. }
  747. }
  748. return RT_EOK;
  749. }
  750. INIT_BOARD_EXPORT(ra_hw_sci_init);
  751. #ifdef BSP_USING_SCIn_UART
  752. rt_weak int rt_hw_usart_init(void)
  753. {
  754. int bufsz_idx = 0;
  755. for (rt_uint8_t idx = 0; idx < RA_SCI_INDEX_MAX; idx++)
  756. {
  757. struct ra_sci_object *obj = &sci_obj[idx];
  758. const struct ra_sci_param *param = &sci_param[idx];
  759. obj->param = param;
  760. rt_err_t err;
  761. if ((uint32_t)param->ops == (uint32_t)&sci_ops_uart)
  762. {
  763. if (rt_device_find(param->bus_name) != RT_NULL)
  764. {
  765. continue;
  766. }
  767. struct rt_serial_device *serial = &obj->ubus;
  768. obj->ubus.ops = param->ops;
  769. serial->config.rx_bufsz = uart_buff_size[bufsz_idx][0];
  770. serial->config.tx_bufsz = uart_buff_size[bufsz_idx][1];
  771. bufsz_idx ++;
  772. err = rt_hw_serial_register(serial, param->bus_name, RT_DEVICE_FLAG_RDWR, RT_NULL);
  773. if (RT_EOK != err)
  774. {
  775. continue;
  776. }
  777. if (RT_EOK != rt_event_init(&obj->event, param->bus_name, RT_IPC_FLAG_PRIO))
  778. {
  779. return -RT_ERROR;
  780. }
  781. }
  782. }
  783. return RT_EOK;
  784. }
  785. #endif
  786. /**
  787. * Attach the spi device to SPI bus, this function must be used after initialization.
  788. */
  789. #ifdef BSP_USING_SCIn_SPI
  790. rt_err_t drv_sci_spi_device_attach(const char *bus_name, const char *device_name, rt_base_t cs_pin)
  791. {
  792. RT_ASSERT(bus_name != RT_NULL);
  793. RT_ASSERT(device_name != RT_NULL);
  794. rt_err_t result;
  795. struct rt_spi_device *spi_device;
  796. /* attach the device to spi bus*/
  797. spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
  798. RT_ASSERT(spi_device != RT_NULL);
  799. result = rt_spi_bus_attach_device_cspin(spi_device, device_name, bus_name, cs_pin, RT_NULL);
  800. if (result != RT_EOK)
  801. {
  802. LOG_E("%s attach to %s faild, %d\n", device_name, bus_name, result);
  803. }
  804. LOG_D("%s attach to %s done", device_name, bus_name);
  805. return result;
  806. }
  807. #endif
  808. #endif /* BSP_USING_SCI */