drv_sci_i2c.c 6.2 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2023-06-04 vandoul first version
  9. */
  10. #include <rtdevice.h>
  11. #include <rtthread.h>
  12. #include "board.h"
  13. #include <stdlib.h>
  14. #ifdef BSP_USING_SCI_I2C
  15. #define DBG_TAG "drv.sci2c"
  16. #ifdef DRV_DEBUG
  17. #define DBG_LVL DBG_LOG
  18. #else
  19. #define DBG_LVL DBG_INFO
  20. #endif /* DRV_DEBUG */
  21. #include <rtdbg.h>
  22. #include <hal_data.h>
  23. struct ra_sci_i2c_handle
  24. {
  25. struct rt_i2c_bus_device bus;
  26. char bus_name[RT_NAME_MAX];
  27. const i2c_master_cfg_t *i2c_cfg;
  28. void *i2c_ctrl;
  29. struct rt_event event;
  30. };
  31. enum
  32. {
  33. I2C_EVENT_ABORTED = 1UL<<I2C_MASTER_EVENT_ABORTED , ///< A transfer was aborted
  34. I2C_EVENT_RX_COMPLETE = 1UL<<I2C_MASTER_EVENT_RX_COMPLETE, ///< A receive operation was completed successfully
  35. I2C_EVENT_TX_COMPLETE = 1UL<<I2C_MASTER_EVENT_TX_COMPLETE, ///< A transmit operation was completed successfully
  36. };
  37. #define I2C_EVENT_ALL (I2C_EVENT_ABORTED|I2C_EVENT_RX_COMPLETE|I2C_EVENT_TX_COMPLETE)
  38. //static volatile = I2C_MASTER_EVENT_ABORTED;
  39. static struct ra_sci_i2c_handle ra_sci_i2cs[] =
  40. {
  41. #ifdef BSP_USING_SCI_I2C0
  42. {.bus_name = "sci2c0", .i2c_cfg = &g_sci_i2c0_cfg, .i2c_ctrl = &g_sci_i2c0_ctrl,},
  43. #endif
  44. #ifdef BSP_USING_SCI_I2C1
  45. {.bus_name = "sci2c1", .i2c_cfg = &g_sci_i2c1_cfg, .i2c_ctrl = &g_sci_i2c1_ctrl,},
  46. #endif
  47. #ifdef BSP_USING_SCI_I2C2
  48. {.bus_name = "sci2c2", .i2c_cfg = &g_sci_i2c2_cfg, .i2c_ctrl = &g_sci_i2c2_ctrl,},
  49. #endif
  50. #ifdef BSP_USING_SCI_I2C3
  51. {.bus_name = "sci2c3", .i2c_cfg = &g_sci_i2c3_cfg, .i2c_ctrl = &g_sci_i2c3_ctrl,},
  52. #endif
  53. #ifdef BSP_USING_SCI_I2C4
  54. {.bus_name = "sci2c4", .i2c_cfg = &g_sci_i2c4_cfg, .i2c_ctrl = &g_sci_i2c4_ctrl,},
  55. #endif
  56. #ifdef BSP_USING_SCI_I2C5
  57. {.bus_name = "sci2c5", .i2c_cfg = &g_sci_i2c5_cfg, .i2c_ctrl = &g_sci_i2c5_ctrl,},
  58. #endif
  59. };
  60. void sci_i2c_master_callback(i2c_master_callback_args_t *p_args)
  61. {
  62. if (NULL != p_args)
  63. {
  64. /* capture callback event for validating the i2c transfer event*/
  65. struct ra_sci_i2c_handle *ra_sci_i2c = (struct ra_sci_i2c_handle *)p_args->p_context;
  66. rt_event_send(&ra_sci_i2c->event, 1UL << p_args->event);
  67. LOG_D("event:%x", p_args->event);
  68. }
  69. LOG_D("p_args:%p", p_args);
  70. }
  71. static rt_err_t validate_i2c_event(struct ra_sci_i2c_handle *handle)
  72. {
  73. rt_uint32_t event = 0;
  74. if(RT_EOK != rt_event_recv(&handle->event, I2C_EVENT_ALL, RT_EVENT_FLAG_OR|RT_EVENT_FLAG_CLEAR, (rt_int32_t)rt_tick_from_millisecond(10), &event))
  75. {
  76. return -RT_ETIMEOUT;
  77. }
  78. if(event != I2C_EVENT_ABORTED)
  79. {
  80. return RT_EOK;
  81. }
  82. return -RT_ERROR;
  83. }
  84. static rt_ssize_t ra_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
  85. struct rt_i2c_msg msgs[],
  86. rt_uint32_t num)
  87. {
  88. rt_size_t i;
  89. struct rt_i2c_msg *msg = msgs;
  90. RT_ASSERT(bus != RT_NULL);
  91. struct ra_sci_i2c_handle *ra_sci_i2c = rt_container_of(bus, struct ra_sci_i2c_handle, bus);
  92. i2c_master_ctrl_t *master_ctrl = ra_sci_i2c->i2c_ctrl;
  93. fsp_err_t err = FSP_SUCCESS;
  94. bool restart = false;
  95. for (i = 0; i < num; i++)
  96. {
  97. if (msg[i].flags & RT_I2C_NO_START)
  98. {
  99. restart = true;
  100. }
  101. if (msg[i].flags & RT_I2C_ADDR_10BIT)
  102. {
  103. //LOG_E("10Bit not support");
  104. //break;
  105. R_SCI_I2C_SlaveAddressSet(master_ctrl, msg[i].addr, I2C_MASTER_ADDR_MODE_10BIT);
  106. }
  107. else
  108. {
  109. //master_ctrl->slave = msg[i].addr;
  110. R_SCI_I2C_SlaveAddressSet(master_ctrl, msg[i].addr, I2C_MASTER_ADDR_MODE_7BIT);
  111. }
  112. if (msg[i].flags & RT_I2C_RD)
  113. {
  114. err = R_SCI_I2C_Read(master_ctrl, msg[i].buf, msg[i].len, restart);
  115. if (FSP_SUCCESS == err)
  116. {
  117. /* handle error */
  118. if(RT_EOK != validate_i2c_event(ra_sci_i2c))
  119. {
  120. //LOG_E("POWER_CTL reg I2C read failed,%d", ra_sci_i2c->event);
  121. break;
  122. }
  123. }
  124. /* handle error */
  125. else
  126. {
  127. /* Write API returns itself is not successful */
  128. //LOG_E("R_IIC_MASTER_Write API failed");
  129. break;
  130. }
  131. }
  132. else
  133. {
  134. err = R_SCI_I2C_Write(master_ctrl, msg[i].buf, msg[i].len, restart);
  135. if (FSP_SUCCESS == err)
  136. {
  137. if(RT_EOK != validate_i2c_event(ra_sci_i2c))
  138. {
  139. //LOG_E("POWER_CTL reg I2C write failed,%d", ra_sci_i2c->event);
  140. break;
  141. }
  142. }
  143. /* handle error */
  144. else
  145. {
  146. /* Write API returns itself is not successful */
  147. //LOG_E("R_IIC_MASTER_Write API failed");
  148. break;
  149. }
  150. }
  151. }
  152. return (rt_ssize_t)i;
  153. }
  154. static const struct rt_i2c_bus_device_ops ra_i2c_ops =
  155. {
  156. .master_xfer = ra_i2c_mst_xfer,
  157. .slave_xfer = RT_NULL,
  158. .i2c_bus_control = RT_NULL
  159. };
  160. int ra_hw_i2c_init(void)
  161. {
  162. fsp_err_t err = FSP_SUCCESS;
  163. for(rt_uint32_t i=0; i<sizeof(ra_sci_i2cs)/sizeof(ra_sci_i2cs[0]); i++)
  164. {
  165. ra_sci_i2cs[i].bus.ops = &ra_i2c_ops;
  166. ra_sci_i2cs[i].bus.priv = 0;
  167. if(RT_EOK != rt_event_init(&ra_sci_i2cs[i].event, ra_sci_i2cs[i].bus_name, RT_IPC_FLAG_FIFO))
  168. {
  169. LOG_E("init event failed");
  170. continue;
  171. }
  172. /* opening IIC master module */
  173. err = R_SCI_I2C_Open(ra_sci_i2cs[i].i2c_ctrl, ra_sci_i2cs[i].i2c_cfg);
  174. if(err != FSP_SUCCESS)
  175. {
  176. LOG_E("R_IIC_MASTER_Open API failed,%d", err);
  177. continue;
  178. }
  179. err = R_SCI_I2C_CallbackSet(ra_sci_i2cs[i].i2c_ctrl, sci_i2c_master_callback, &ra_sci_i2cs[i], RT_NULL);
  180. /* handle error */
  181. if (FSP_SUCCESS != err)
  182. {
  183. LOG_E("R_SCI_I2C_CallbackSet API failed,%d", err);
  184. continue;
  185. }
  186. rt_i2c_bus_device_register(&ra_sci_i2cs[i].bus, ra_sci_i2cs[i].bus_name);
  187. }
  188. return 0;
  189. }
  190. INIT_DEVICE_EXPORT(ra_hw_i2c_init);
  191. #endif /* BSP_USING_I2C */