startup.c 2.7 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2008-12-11 xuxinming first version
  9. * 2010-4-3 LiJin add init soft timer thread
  10. * 2013-05-24 Grissiom port to RM48x50
  11. */
  12. #include <rthw.h>
  13. #include <rtthread.h>
  14. #ifdef RT_USING_FINSH
  15. #include <finsh.h>
  16. extern int finsh_system_init(void);
  17. #endif
  18. #include <board.h>
  19. /**
  20. * @addtogroup LPC2478
  21. */
  22. /*@{*/
  23. extern int rt_application_init(void);
  24. #ifdef RT_USING_DEVICE
  25. extern rt_err_t rt_hw_serial_init(void);
  26. #endif
  27. #ifdef __CC_ARM
  28. extern int Image$$RW_IRAM1$$ZI$$Limit;
  29. #elif defined(__GNUC__)
  30. extern int __bss_end;
  31. #elif defined(__TI_COMPILER_VERSION__)
  32. extern unsigned char * const system_data_end;
  33. #endif
  34. #define MEMEND 0x08040000
  35. void rt_hw_pmu_enable_cnt(void)
  36. {
  37. unsigned long tmp;
  38. __asm (" MRC p15, #0, r0, c9, c12, #0");
  39. __asm (" ORR r0, r0, #0x09\n");
  40. __asm (" MCR p15, #0, r0, c9, c12, #0\n");
  41. __asm (" MOV r0, #1\n");
  42. __asm (" RBIT r0, r0\n");
  43. __asm (" MCR p15, #0, r0, c9, c12, #1\n");
  44. }
  45. void rt_hw_pmu_setcnt(unsigned long val)
  46. {
  47. __asm (" MCR p15, #0, r0, c9, c13, #0");
  48. }
  49. unsigned long rt_hw_pmu_getcnt(void)
  50. {
  51. __asm (" MRC p15, #0, r0, c9, c13, #0");
  52. }
  53. /**
  54. * This function will startup RT-Thread RTOS.
  55. */
  56. void rtthread_startup(void)
  57. {
  58. /*// RM48 does not have cache implemented
  59. *rt_hw_cpu_icache_enable();
  60. *rt_hw_cpu_dcache_enable();
  61. */
  62. /* init hardware interrupt */
  63. rt_hw_interrupt_init();
  64. /* init board */
  65. rt_hw_board_init();
  66. rt_show_version();
  67. /* init timer system */
  68. rt_system_timer_init();
  69. /* init memory system */
  70. #ifdef RT_USING_HEAP
  71. #ifdef __CC_ARM
  72. rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)MEMEND);
  73. #elif defined(__GNUC__)
  74. rt_system_heap_init((void*)&__bss_end, (void*)MEMEND);
  75. #elif defined(__TI_COMPILER_VERSION__)
  76. rt_system_heap_init((void*)&system_data_end, (void*)MEMEND);
  77. #else
  78. #error Unkown compiler
  79. #endif
  80. #endif
  81. /* init scheduler system */
  82. rt_system_scheduler_init();
  83. /* init application */
  84. rt_application_init();
  85. #ifdef RT_USING_FINSH
  86. /* init finsh */
  87. finsh_system_init();
  88. #if !defined(RT_USING_POSIX_STDIO) && defined(RT_USING_DEVICE)
  89. finsh_set_device("sci2");
  90. #endif
  91. #endif
  92. /* init soft timer thread */
  93. rt_system_timer_thread_init();
  94. /* init idle thread */
  95. rt_thread_idle_init();
  96. /* start scheduler */
  97. rt_system_scheduler_start();
  98. /* never reach here */
  99. return ;
  100. }
  101. int main(void)
  102. {
  103. /* disable interrupt first */
  104. rt_hw_interrupt_disable();
  105. /* invoke rtthread_startup */
  106. rtthread_startup();
  107. return 0;
  108. }
  109. /*@}*/