drv_mic.c 9.8 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Date Author Notes
  7. * 2019-07-31 Zero-Free first implementation
  8. */
  9. #include <board.h>
  10. #include "drv_es8388.h"
  11. #define DBG_TAG "drv.mic"
  12. #define DBG_LVL DBG_INFO
  13. #include <rtdbg.h>
  14. #define RX_FIFO_SIZE (1024)
  15. struct mic_device
  16. {
  17. struct rt_audio_device audio;
  18. struct rt_audio_configure record_config;
  19. rt_uint8_t *rx_fifo;
  20. rt_uint8_t volume;
  21. };
  22. static struct mic_device mic_dev = {0};
  23. static rt_uint16_t zero_frame[2] = {0};
  24. static I2S_HandleTypeDef I2S3_Handler = {0};
  25. static DMA_HandleTypeDef I2S3_RXDMA_Handler = {0};
  26. static void I2S3_Init(void)
  27. {
  28. RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
  29. PeriphClkInitStruct.PeriphClockSelection |= RCC_PERIPHCLK_I2S;
  30. PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
  31. PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
  32. if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
  33. {
  34. Error_Handler();
  35. }
  36. HAL_I2S_DeInit(&I2S3_Handler);
  37. I2S3_Handler.Instance = I2S3ext;
  38. I2S3_Handler.Init.Mode = I2S_MODE_SLAVE_RX;
  39. I2S3_Handler.Init.Standard = I2S_STANDARD_PHILIPS;
  40. I2S3_Handler.Init.DataFormat = I2S_DATAFORMAT_16B;
  41. I2S3_Handler.Init.MCLKOutput = I2S_MCLKOUTPUT_ENABLE;
  42. I2S3_Handler.Init.AudioFreq = I2S_AUDIOFREQ_DEFAULT;
  43. I2S3_Handler.Init.CPOL = I2S_CPOL_LOW;
  44. I2S3_Handler.Init.ClockSource = I2S_CLOCK_PLL;
  45. I2S3_Handler.Init.FullDuplexMode = I2S_FULLDUPLEXMODE_ENABLE;
  46. if (HAL_I2S_Init(&I2S3_Handler) != HAL_OK)
  47. {
  48. Error_Handler();
  49. }
  50. SET_BIT(I2S3_Handler.Instance->CR2, SPI_CR2_RXDMAEN);
  51. __HAL_I2S_ENABLE(&I2S3_Handler);
  52. /* Configure DMA used for I2S3 */
  53. __HAL_RCC_DMA1_CLK_ENABLE();
  54. I2S3_RXDMA_Handler.Instance = DMA1_Stream2;
  55. I2S3_RXDMA_Handler.Init.Channel = DMA_CHANNEL_2;
  56. I2S3_RXDMA_Handler.Init.Direction = DMA_PERIPH_TO_MEMORY;
  57. I2S3_RXDMA_Handler.Init.PeriphInc = DMA_PINC_DISABLE;
  58. I2S3_RXDMA_Handler.Init.MemInc = DMA_MINC_ENABLE;
  59. I2S3_RXDMA_Handler.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
  60. I2S3_RXDMA_Handler.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
  61. I2S3_RXDMA_Handler.Init.Mode = DMA_CIRCULAR;
  62. I2S3_RXDMA_Handler.Init.Priority = DMA_PRIORITY_MEDIUM;
  63. I2S3_RXDMA_Handler.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
  64. __HAL_LINKDMA(&I2S3_Handler,hdmarx,I2S3_RXDMA_Handler);
  65. HAL_DMA_DeInit(&I2S3_RXDMA_Handler);
  66. HAL_DMA_Init(&I2S3_RXDMA_Handler);
  67. __HAL_DMA_DISABLE(&I2S3_RXDMA_Handler);
  68. __HAL_DMA_ENABLE_IT(&I2S3_RXDMA_Handler, DMA_IT_TC); /* 开启传输完成中断 */
  69. __HAL_DMA_CLEAR_FLAG(&I2S3_RXDMA_Handler, DMA_FLAG_TCIF2_6);
  70. HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 0, 0);
  71. HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn);
  72. }
  73. void DMA1_Stream2_IRQHandler(void)
  74. {
  75. rt_audio_rx_done(&mic_dev.audio, &mic_dev.rx_fifo[0], RX_FIFO_SIZE);
  76. HAL_DMA_IRQHandler(&I2S3_RXDMA_Handler);
  77. }
  78. static rt_err_t mic_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps)
  79. {
  80. rt_err_t result = RT_EOK;
  81. struct mic_device *mic_dev;
  82. RT_ASSERT(audio != RT_NULL);
  83. mic_dev = (struct mic_device *)audio->parent.user_data;
  84. switch (caps->main_type)
  85. {
  86. case AUDIO_TYPE_QUERY: /* qurey the types of hw_codec device */
  87. {
  88. switch (caps->sub_type)
  89. {
  90. case AUDIO_TYPE_QUERY:
  91. caps->udata.mask = AUDIO_TYPE_INPUT | AUDIO_TYPE_MIXER;
  92. break;
  93. default:
  94. result = -RT_ERROR;
  95. break;
  96. }
  97. break;
  98. }
  99. case AUDIO_TYPE_INPUT: /* Provide capabilities of INPUT unit */
  100. {
  101. switch (caps->sub_type)
  102. {
  103. case AUDIO_DSP_PARAM:
  104. caps->udata.config.samplerate = mic_dev->record_config.samplerate;
  105. caps->udata.config.channels = mic_dev->record_config.channels;
  106. caps->udata.config.samplebits = mic_dev->record_config.samplebits;
  107. break;
  108. case AUDIO_DSP_SAMPLERATE:
  109. caps->udata.config.samplerate = mic_dev->record_config.samplerate;
  110. break;
  111. case AUDIO_DSP_CHANNELS:
  112. caps->udata.config.channels = mic_dev->record_config.channels;
  113. break;
  114. case AUDIO_DSP_SAMPLEBITS:
  115. caps->udata.config.samplebits = mic_dev->record_config.samplebits;
  116. break;
  117. default:
  118. result = -RT_ERROR;
  119. break;
  120. }
  121. break;
  122. }
  123. case AUDIO_TYPE_MIXER: /* report the Mixer Units */
  124. {
  125. switch (caps->sub_type)
  126. {
  127. case AUDIO_MIXER_QUERY:
  128. caps->udata.mask = AUDIO_MIXER_VOLUME | AUDIO_MIXER_LINE;
  129. break;
  130. case AUDIO_MIXER_VOLUME:
  131. caps->udata.value = mic_dev->volume;
  132. break;
  133. case AUDIO_MIXER_LINE:
  134. break;
  135. default:
  136. result = -RT_ERROR;
  137. break;
  138. }
  139. break;
  140. }
  141. default:
  142. result = -RT_ERROR;
  143. break;
  144. }
  145. return result;
  146. }
  147. static rt_err_t mic_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps)
  148. {
  149. rt_err_t result = RT_EOK;
  150. struct mic_device *mic_dev;
  151. RT_ASSERT(audio != RT_NULL);
  152. mic_dev = (struct mic_device *)audio->parent.user_data;
  153. switch (caps->main_type)
  154. {
  155. case AUDIO_TYPE_MIXER:
  156. {
  157. switch (caps->sub_type)
  158. {
  159. case AUDIO_MIXER_VOLUME:
  160. {
  161. rt_uint32_t volume = caps->udata.value;
  162. mic_dev->volume = volume;
  163. LOG_D("set volume %d", volume);
  164. break;
  165. }
  166. default:
  167. result = -RT_ERROR;
  168. break;
  169. }
  170. break;
  171. }
  172. case AUDIO_TYPE_INPUT:
  173. {
  174. switch (caps->sub_type)
  175. {
  176. case AUDIO_DSP_PARAM:
  177. {
  178. // SAIA_Frequency_Set(caps->udata.config.samplerate);
  179. HAL_I2S_DMAStop(&I2S3_Handler);
  180. // SAIB_Channels_Set(caps->udata.config.channels);
  181. HAL_I2S_Transmit(&I2S3_Handler, (uint16_t *)&zero_frame[0], 2, 0);
  182. HAL_I2S_Receive_DMA(&I2S3_Handler, (uint16_t *)mic_dev->rx_fifo, RX_FIFO_SIZE / 2);
  183. /* save configs */
  184. mic_dev->record_config.samplerate = caps->udata.config.samplerate;
  185. mic_dev->record_config.channels = caps->udata.config.channels;
  186. mic_dev->record_config.samplebits = caps->udata.config.samplebits;
  187. LOG_D("set samplerate %d", mic_dev->record_config.samplerate);
  188. LOG_D("set channels %d", mic_dev->record_config.channels);
  189. break;
  190. }
  191. case AUDIO_DSP_SAMPLERATE:
  192. {
  193. mic_dev->record_config.samplerate = caps->udata.config.samplerate;
  194. LOG_D("set channels %d", mic_dev->record_config.channels);
  195. break;
  196. }
  197. case AUDIO_DSP_CHANNELS:
  198. {
  199. mic_dev->record_config.channels = caps->udata.config.channels;
  200. LOG_D("set channels %d", mic_dev->record_config.channels);
  201. break;
  202. }
  203. default:
  204. break;
  205. }
  206. break;
  207. }
  208. default:
  209. break;
  210. }
  211. return result;
  212. }
  213. static rt_err_t mic_init(struct rt_audio_device *audio)
  214. {
  215. struct mic_device *mic_dev;
  216. RT_ASSERT(audio != RT_NULL);
  217. mic_dev = (struct mic_device *)audio->parent.user_data;
  218. es8388_init("i2c2", RT_NULL);
  219. I2S3_Init();
  220. LOG_I("ES8388 init success.");
  221. /* set default params */
  222. // SAIB_Channels_Set(mic_dev->record_config.channels);
  223. return RT_EOK;
  224. }
  225. static rt_err_t sound_init(struct rt_audio_device *audio)
  226. {
  227. rt_err_t result = RT_EOK;
  228. struct sound_device *snd_dev;
  229. RT_ASSERT(audio != RT_NULL);
  230. snd_dev = (struct sound_device *)audio->parent.user_data;
  231. I2S3_Init();
  232. es8388_init("i2c2", RT_NULL);
  233. /* set default params */
  234. // I2S_Frequency_Set(snd_dev->replay_config.samplerate);
  235. // SAIA_Channels_Set(snd_dev->replay_config.channels);
  236. return result;
  237. }
  238. static rt_err_t mic_start(struct rt_audio_device *audio, int stream)
  239. {
  240. struct mic_device *mic_dev;
  241. RT_ASSERT(audio != RT_NULL);
  242. mic_dev = (struct mic_device *)audio->parent.user_data;
  243. if (stream == AUDIO_STREAM_RECORD)
  244. {
  245. es8388_start(ES_MODE_ADC);
  246. HAL_I2S_Transmit(&I2S3_Handler, (uint16_t *)&zero_frame[0], 2, 0);
  247. // HAL_I2S_Receive_DMA(&I2S3_Handler, (uint16_t *)mic_dev->rx_fifo, RX_FIFO_SIZE / 2);
  248. while(1)
  249. {
  250. HAL_I2S_Receive(&I2S3_Handler, (uint16_t *)mic_dev->rx_fifo, RX_FIFO_SIZE / 2,10);
  251. for(int i=0;i<RX_FIFO_SIZE;i++)
  252. {
  253. rt_kprintf("%x",mic_dev->rx_fifo[i]);
  254. }
  255. }
  256. }
  257. return RT_EOK;
  258. }
  259. static rt_err_t mic_stop(struct rt_audio_device *audio, int stream)
  260. {
  261. if (stream == AUDIO_STREAM_RECORD)
  262. {
  263. HAL_I2S_DMAStop(&I2S3_Handler);
  264. es8388_stop(ES_MODE_ADC);
  265. LOG_D("mic stop.");
  266. }
  267. return RT_EOK;
  268. }
  269. static struct rt_audio_ops mic_ops =
  270. {
  271. .getcaps = mic_getcaps,
  272. .configure = mic_configure,
  273. .init = mic_init,
  274. .start = mic_start,
  275. .stop = mic_stop,
  276. .transmit = RT_NULL,
  277. .buffer_info = RT_NULL,
  278. };
  279. int rt_hw_mic_init(void)
  280. {
  281. rt_uint8_t *rx_fifo;
  282. if (mic_dev.rx_fifo)
  283. return RT_EOK;
  284. rx_fifo = rt_malloc(RX_FIFO_SIZE);
  285. if (rx_fifo == RT_NULL)
  286. return -RT_ENOMEM;
  287. rt_memset(rx_fifo, 0, RX_FIFO_SIZE);
  288. mic_dev.rx_fifo = rx_fifo;
  289. /* init default configuration */
  290. {
  291. mic_dev.record_config.samplerate = 44100;
  292. mic_dev.record_config.channels = 2;
  293. mic_dev.record_config.samplebits = 16;
  294. mic_dev.volume = 55;
  295. }
  296. /* register sound device */
  297. mic_dev.audio.ops = &mic_ops;
  298. rt_audio_register(&mic_dev.audio, "mic0", RT_DEVICE_FLAG_RDONLY, &mic_dev);
  299. return RT_EOK;
  300. }
  301. INIT_DEVICE_EXPORT(rt_hw_mic_init);