board.c 2.3 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-11-06 SummerGift first version
  9. * 2019-04-09 WillianChan add stm32f469-st-disco bsp
  10. */
  11. #include <board.h>
  12. #include <drv_common.h>
  13. void SystemClock_Config(void)
  14. {
  15. RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  16. RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  17. RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
  18. /** Configure the main internal regulator output voltage
  19. */
  20. __HAL_RCC_PWR_CLK_ENABLE();
  21. __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
  22. /** Initializes the CPU, AHB and APB busses clocks
  23. */
  24. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  25. RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  26. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  27. RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  28. RCC_OscInitStruct.PLL.PLLM = 8;
  29. RCC_OscInitStruct.PLL.PLLN = 360;
  30. RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  31. RCC_OscInitStruct.PLL.PLLQ = 9;
  32. RCC_OscInitStruct.PLL.PLLR = 6;
  33. if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  34. {
  35. Error_Handler();
  36. }
  37. /** Activate the Over-Drive mode
  38. */
  39. if (HAL_PWREx_EnableOverDrive() != HAL_OK)
  40. {
  41. Error_Handler();
  42. }
  43. /** Initializes the CPU, AHB and APB busses clocks
  44. */
  45. RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
  46. |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  47. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  48. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  49. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
  50. RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
  51. if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
  52. {
  53. Error_Handler();
  54. }
  55. PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S|RCC_PERIPHCLK_CLK48
  56. |RCC_PERIPHCLK_LTDC;
  57. PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
  58. PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
  59. PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
  60. PeriphClkInitStruct.PLLSAI.PLLSAIR = 2;
  61. PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV4;
  62. PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
  63. PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP;
  64. if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
  65. {
  66. Error_Handler();
  67. }
  68. }