board.h 1.2 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2021-12-05 supperthomas first version
  9. */
  10. #ifndef __BOARD_H__
  11. #define __BOARD_H__
  12. #include <stm32l4xx.h>
  13. #ifdef __cplusplus
  14. extern "C" {
  15. #endif
  16. #ifdef BSP_USING_GPIO
  17. #include "drv_gpio.h"
  18. /* Board Pin definitions */
  19. #endif /* BSP_USING_GPIO */
  20. /* Internal SRAM memory size[Kbytes] <8-64>, Default: 64*/
  21. #define STM32_SRAM_SIZE 64
  22. #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
  23. #define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000)
  24. #define STM32_FLASH_SIZE (256 * 1024)
  25. #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
  26. #if defined(__ARMCC_VERSION)
  27. extern int Image$$RW_IRAM1$$ZI$$Limit;
  28. #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
  29. #elif __ICCARM__
  30. #pragma section="CSTACK"
  31. #define HEAP_BEGIN (__segment_end("CSTACK"))
  32. #else
  33. extern int __bss_end;
  34. #define HEAP_BEGIN ((void *)&__bss_end)
  35. #endif
  36. #define HEAP_END STM32_SRAM_END
  37. void SystemClock_Config(void);
  38. #ifdef __cplusplus
  39. }
  40. #endif
  41. #endif