rom.h 519 KB

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  1. //*****************************************************************************
  2. //
  3. // rom.h - Macros to facilitate calling functions in the ROM.
  4. //
  5. // Copyright (c) 2007-2020 Texas Instruments Incorporated. All rights reserved.
  6. // Software License Agreement
  7. //
  8. // Redistribution and use in source and binary forms, with or without
  9. // modification, are permitted provided that the following conditions
  10. // are met:
  11. //
  12. // Redistributions of source code must retain the above copyright
  13. // notice, this list of conditions and the following disclaimer.
  14. //
  15. // Redistributions in binary form must reproduce the above copyright
  16. // notice, this list of conditions and the following disclaimer in the
  17. // documentation and/or other materials provided with the
  18. // distribution.
  19. //
  20. // Neither the name of Texas Instruments Incorporated nor the names of
  21. // its contributors may be used to endorse or promote products derived
  22. // from this software without specific prior written permission.
  23. //
  24. // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  25. // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  26. // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  27. // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  28. // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  29. // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  30. // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  31. // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  32. // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  33. // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  34. // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. //
  36. // This is part of revision 2.2.0.295 of the Tiva Peripheral Driver Library.
  37. //
  38. //*****************************************************************************
  39. #ifndef __DRIVERLIB_ROM_H__
  40. #define __DRIVERLIB_ROM_H__
  41. #ifndef DEPRECATED
  42. //*****************************************************************************
  43. //
  44. // ROM selection labels changed between TivaWare 2.0.1 and 2.1. The following
  45. // labels are intended to ensure backwards compatibility for applications
  46. // which have not yet been updated to use the replacement labels.
  47. //
  48. //*****************************************************************************
  49. #ifdef TARGET_IS_SNOWFLAKE_RA0
  50. #define TARGET_IS_TM4C129_RA0
  51. #endif
  52. #ifdef TARGET_IS_SNOWFLAKE_RA1
  53. #define TARGET_IS_TM4C129_RA1
  54. #endif
  55. #ifdef TARGET_IS_SNOWFLAKE_RA2
  56. #define TARGET_IS_TM4C129_RA2
  57. #endif
  58. #ifdef TARGET_IS_BLIZZARD_RA1
  59. #define TARGET_IS_TM4C123_RA1
  60. #endif
  61. #ifdef TARGET_IS_BLIZZARD_RA2
  62. #define TARGET_IS_TM4C123_RA2
  63. #endif
  64. #ifdef TARGET_IS_BLIZZARD_RA3
  65. #define TARGET_IS_TM4C123_RA3
  66. #endif
  67. #ifdef TARGET_IS_BLIZZARD_RB0
  68. #define TARGET_IS_TM4C123_RB0
  69. #endif
  70. #ifdef TARGET_IS_BLIZZARD_RB1
  71. #define TARGET_IS_TM4C123_RB1
  72. #endif
  73. #endif
  74. //*****************************************************************************
  75. //
  76. // Pointers to the main API tables.
  77. //
  78. //*****************************************************************************
  79. #define ROM_APITABLE ((uint32_t *)0x01000010)
  80. #define ROM_VERSION (ROM_APITABLE[0])
  81. #define ROM_UARTTABLE ((uint32_t *)(ROM_APITABLE[1]))
  82. #define ROM_SSITABLE ((uint32_t *)(ROM_APITABLE[2]))
  83. #define ROM_I2CTABLE ((uint32_t *)(ROM_APITABLE[3]))
  84. #define ROM_GPIOTABLE ((uint32_t *)(ROM_APITABLE[4]))
  85. #define ROM_ADCTABLE ((uint32_t *)(ROM_APITABLE[5]))
  86. #define ROM_COMPARATORTABLE ((uint32_t *)(ROM_APITABLE[6]))
  87. #define ROM_FLASHTABLE ((uint32_t *)(ROM_APITABLE[7]))
  88. #define ROM_PWMTABLE ((uint32_t *)(ROM_APITABLE[8]))
  89. #define ROM_QEITABLE ((uint32_t *)(ROM_APITABLE[9]))
  90. #define ROM_SYSTICKTABLE ((uint32_t *)(ROM_APITABLE[10]))
  91. #define ROM_TIMERTABLE ((uint32_t *)(ROM_APITABLE[11]))
  92. #define ROM_WATCHDOGTABLE ((uint32_t *)(ROM_APITABLE[12]))
  93. #define ROM_SYSCTLTABLE ((uint32_t *)(ROM_APITABLE[13]))
  94. #define ROM_INTERRUPTTABLE ((uint32_t *)(ROM_APITABLE[14]))
  95. #define ROM_USBTABLE ((uint32_t *)(ROM_APITABLE[16]))
  96. #define ROM_UDMATABLE ((uint32_t *)(ROM_APITABLE[17]))
  97. #define ROM_CANTABLE ((uint32_t *)(ROM_APITABLE[18]))
  98. #define ROM_HIBERNATETABLE ((uint32_t *)(ROM_APITABLE[19]))
  99. #define ROM_MPUTABLE ((uint32_t *)(ROM_APITABLE[20]))
  100. #define ROM_SOFTWARETABLE ((uint32_t *)(ROM_APITABLE[21]))
  101. #define ROM_EPITABLE ((uint32_t *)(ROM_APITABLE[23]))
  102. #define ROM_EEPROMTABLE ((uint32_t *)(ROM_APITABLE[24]))
  103. #define ROM_FPUTABLE ((uint32_t *)(ROM_APITABLE[26]))
  104. #define ROM_SMBUSTABLE ((uint32_t *)(ROM_APITABLE[29]))
  105. #define ROM_SYSEXCTABLE ((uint32_t *)(ROM_APITABLE[30]))
  106. #define ROM_ONEWIRETABLE ((uint32_t *)(ROM_APITABLE[34]))
  107. #define ROM_SPIFLASHTABLE ((uint32_t *)(ROM_APITABLE[38]))
  108. #define ROM_LCDTABLE ((uint32_t *)(ROM_APITABLE[41]))
  109. #define ROM_EMACTABLE ((uint32_t *)(ROM_APITABLE[42]))
  110. #define ROM_AESTABLE ((uint32_t *)(ROM_APITABLE[43]))
  111. #define ROM_CRCTABLE ((uint32_t *)(ROM_APITABLE[44]))
  112. #define ROM_DESTABLE ((uint32_t *)(ROM_APITABLE[45]))
  113. #define ROM_SHAMD5TABLE ((uint32_t *)(ROM_APITABLE[46]))
  114. //*****************************************************************************
  115. //
  116. // Macros for calling ROM functions in the ADC API.
  117. //
  118. //*****************************************************************************
  119. #if defined(TARGET_IS_TM4C123_RA1) || \
  120. defined(TARGET_IS_TM4C123_RA3) || \
  121. defined(TARGET_IS_TM4C123_RB1) || \
  122. defined(TARGET_IS_TM4C123_RB2) || \
  123. defined(TARGET_IS_TM4C129_RA0) || \
  124. defined(TARGET_IS_TM4C129_RA1) || \
  125. defined(TARGET_IS_TM4C129_RA2)
  126. #define ROM_ADCSequenceDataGet \
  127. ((int32_t (*)(uint32_t ui32Base, \
  128. uint32_t ui32SequenceNum, \
  129. uint32_t *pui32Buffer))ROM_ADCTABLE[0])
  130. #endif
  131. #if defined(TARGET_IS_TM4C123_RA1) || \
  132. defined(TARGET_IS_TM4C123_RA3) || \
  133. defined(TARGET_IS_TM4C123_RB1) || \
  134. defined(TARGET_IS_TM4C123_RB2) || \
  135. defined(TARGET_IS_TM4C129_RA0) || \
  136. defined(TARGET_IS_TM4C129_RA1) || \
  137. defined(TARGET_IS_TM4C129_RA2)
  138. #define ROM_ADCIntDisable \
  139. ((void (*)(uint32_t ui32Base, \
  140. uint32_t ui32SequenceNum))ROM_ADCTABLE[1])
  141. #endif
  142. #if defined(TARGET_IS_TM4C123_RA1) || \
  143. defined(TARGET_IS_TM4C123_RA3) || \
  144. defined(TARGET_IS_TM4C123_RB1) || \
  145. defined(TARGET_IS_TM4C123_RB2) || \
  146. defined(TARGET_IS_TM4C129_RA0) || \
  147. defined(TARGET_IS_TM4C129_RA1) || \
  148. defined(TARGET_IS_TM4C129_RA2)
  149. #define ROM_ADCIntEnable \
  150. ((void (*)(uint32_t ui32Base, \
  151. uint32_t ui32SequenceNum))ROM_ADCTABLE[2])
  152. #endif
  153. #if defined(TARGET_IS_TM4C123_RA1) || \
  154. defined(TARGET_IS_TM4C123_RA3) || \
  155. defined(TARGET_IS_TM4C123_RB1) || \
  156. defined(TARGET_IS_TM4C123_RB2) || \
  157. defined(TARGET_IS_TM4C129_RA0) || \
  158. defined(TARGET_IS_TM4C129_RA1) || \
  159. defined(TARGET_IS_TM4C129_RA2)
  160. #define ROM_ADCIntStatus \
  161. ((uint32_t (*)(uint32_t ui32Base, \
  162. uint32_t ui32SequenceNum, \
  163. bool bMasked))ROM_ADCTABLE[3])
  164. #endif
  165. #if defined(TARGET_IS_TM4C123_RA1) || \
  166. defined(TARGET_IS_TM4C123_RA3) || \
  167. defined(TARGET_IS_TM4C123_RB1) || \
  168. defined(TARGET_IS_TM4C123_RB2) || \
  169. defined(TARGET_IS_TM4C129_RA0) || \
  170. defined(TARGET_IS_TM4C129_RA1) || \
  171. defined(TARGET_IS_TM4C129_RA2)
  172. #define ROM_ADCIntClear \
  173. ((void (*)(uint32_t ui32Base, \
  174. uint32_t ui32SequenceNum))ROM_ADCTABLE[4])
  175. #endif
  176. #if defined(TARGET_IS_TM4C123_RA1) || \
  177. defined(TARGET_IS_TM4C123_RA3) || \
  178. defined(TARGET_IS_TM4C123_RB1) || \
  179. defined(TARGET_IS_TM4C123_RB2) || \
  180. defined(TARGET_IS_TM4C129_RA0) || \
  181. defined(TARGET_IS_TM4C129_RA1) || \
  182. defined(TARGET_IS_TM4C129_RA2)
  183. #define ROM_ADCSequenceEnable \
  184. ((void (*)(uint32_t ui32Base, \
  185. uint32_t ui32SequenceNum))ROM_ADCTABLE[5])
  186. #endif
  187. #if defined(TARGET_IS_TM4C123_RA1) || \
  188. defined(TARGET_IS_TM4C123_RA3) || \
  189. defined(TARGET_IS_TM4C123_RB1) || \
  190. defined(TARGET_IS_TM4C123_RB2) || \
  191. defined(TARGET_IS_TM4C129_RA0) || \
  192. defined(TARGET_IS_TM4C129_RA1) || \
  193. defined(TARGET_IS_TM4C129_RA2)
  194. #define ROM_ADCSequenceDisable \
  195. ((void (*)(uint32_t ui32Base, \
  196. uint32_t ui32SequenceNum))ROM_ADCTABLE[6])
  197. #endif
  198. #if defined(TARGET_IS_TM4C123_RA1) || \
  199. defined(TARGET_IS_TM4C123_RA3) || \
  200. defined(TARGET_IS_TM4C123_RB1) || \
  201. defined(TARGET_IS_TM4C123_RB2) || \
  202. defined(TARGET_IS_TM4C129_RA0) || \
  203. defined(TARGET_IS_TM4C129_RA1) || \
  204. defined(TARGET_IS_TM4C129_RA2)
  205. #define ROM_ADCSequenceConfigure \
  206. ((void (*)(uint32_t ui32Base, \
  207. uint32_t ui32SequenceNum, \
  208. uint32_t ui32Trigger, \
  209. uint32_t ui32Priority))ROM_ADCTABLE[7])
  210. #endif
  211. #if defined(TARGET_IS_TM4C123_RA1) || \
  212. defined(TARGET_IS_TM4C123_RA3) || \
  213. defined(TARGET_IS_TM4C123_RB1) || \
  214. defined(TARGET_IS_TM4C123_RB2) || \
  215. defined(TARGET_IS_TM4C129_RA0) || \
  216. defined(TARGET_IS_TM4C129_RA1) || \
  217. defined(TARGET_IS_TM4C129_RA2)
  218. #define ROM_ADCSequenceStepConfigure \
  219. ((void (*)(uint32_t ui32Base, \
  220. uint32_t ui32SequenceNum, \
  221. uint32_t ui32Step, \
  222. uint32_t ui32Config))ROM_ADCTABLE[8])
  223. #endif
  224. #if defined(TARGET_IS_TM4C123_RA1) || \
  225. defined(TARGET_IS_TM4C123_RA3) || \
  226. defined(TARGET_IS_TM4C123_RB1) || \
  227. defined(TARGET_IS_TM4C123_RB2) || \
  228. defined(TARGET_IS_TM4C129_RA0) || \
  229. defined(TARGET_IS_TM4C129_RA1) || \
  230. defined(TARGET_IS_TM4C129_RA2)
  231. #define ROM_ADCSequenceOverflow \
  232. ((int32_t (*)(uint32_t ui32Base, \
  233. uint32_t ui32SequenceNum))ROM_ADCTABLE[9])
  234. #endif
  235. #if defined(TARGET_IS_TM4C123_RA1) || \
  236. defined(TARGET_IS_TM4C123_RA3) || \
  237. defined(TARGET_IS_TM4C123_RB1) || \
  238. defined(TARGET_IS_TM4C123_RB2) || \
  239. defined(TARGET_IS_TM4C129_RA0) || \
  240. defined(TARGET_IS_TM4C129_RA1) || \
  241. defined(TARGET_IS_TM4C129_RA2)
  242. #define ROM_ADCSequenceOverflowClear \
  243. ((void (*)(uint32_t ui32Base, \
  244. uint32_t ui32SequenceNum))ROM_ADCTABLE[10])
  245. #endif
  246. #if defined(TARGET_IS_TM4C123_RA1) || \
  247. defined(TARGET_IS_TM4C123_RA3) || \
  248. defined(TARGET_IS_TM4C123_RB1) || \
  249. defined(TARGET_IS_TM4C123_RB2) || \
  250. defined(TARGET_IS_TM4C129_RA0) || \
  251. defined(TARGET_IS_TM4C129_RA1) || \
  252. defined(TARGET_IS_TM4C129_RA2)
  253. #define ROM_ADCSequenceUnderflow \
  254. ((int32_t (*)(uint32_t ui32Base, \
  255. uint32_t ui32SequenceNum))ROM_ADCTABLE[11])
  256. #endif
  257. #if defined(TARGET_IS_TM4C123_RA1) || \
  258. defined(TARGET_IS_TM4C123_RA3) || \
  259. defined(TARGET_IS_TM4C123_RB1) || \
  260. defined(TARGET_IS_TM4C123_RB2) || \
  261. defined(TARGET_IS_TM4C129_RA0) || \
  262. defined(TARGET_IS_TM4C129_RA1) || \
  263. defined(TARGET_IS_TM4C129_RA2)
  264. #define ROM_ADCSequenceUnderflowClear \
  265. ((void (*)(uint32_t ui32Base, \
  266. uint32_t ui32SequenceNum))ROM_ADCTABLE[12])
  267. #endif
  268. #if defined(TARGET_IS_TM4C123_RA1) || \
  269. defined(TARGET_IS_TM4C123_RA3) || \
  270. defined(TARGET_IS_TM4C123_RB1) || \
  271. defined(TARGET_IS_TM4C123_RB2) || \
  272. defined(TARGET_IS_TM4C129_RA0) || \
  273. defined(TARGET_IS_TM4C129_RA1) || \
  274. defined(TARGET_IS_TM4C129_RA2)
  275. #define ROM_ADCProcessorTrigger \
  276. ((void (*)(uint32_t ui32Base, \
  277. uint32_t ui32SequenceNum))ROM_ADCTABLE[13])
  278. #endif
  279. #if defined(TARGET_IS_TM4C123_RA1) || \
  280. defined(TARGET_IS_TM4C123_RA3) || \
  281. defined(TARGET_IS_TM4C123_RB1) || \
  282. defined(TARGET_IS_TM4C123_RB2) || \
  283. defined(TARGET_IS_TM4C129_RA0) || \
  284. defined(TARGET_IS_TM4C129_RA1) || \
  285. defined(TARGET_IS_TM4C129_RA2)
  286. #define ROM_ADCHardwareOversampleConfigure \
  287. ((void (*)(uint32_t ui32Base, \
  288. uint32_t ui32Factor))ROM_ADCTABLE[14])
  289. #endif
  290. #if defined(TARGET_IS_TM4C123_RA1) || \
  291. defined(TARGET_IS_TM4C123_RA3) || \
  292. defined(TARGET_IS_TM4C123_RB1) || \
  293. defined(TARGET_IS_TM4C123_RB2) || \
  294. defined(TARGET_IS_TM4C129_RA0) || \
  295. defined(TARGET_IS_TM4C129_RA1) || \
  296. defined(TARGET_IS_TM4C129_RA2)
  297. #define ROM_ADCComparatorConfigure \
  298. ((void (*)(uint32_t ui32Base, \
  299. uint32_t ui32Comp, \
  300. uint32_t ui32Config))ROM_ADCTABLE[15])
  301. #endif
  302. #if defined(TARGET_IS_TM4C123_RA1) || \
  303. defined(TARGET_IS_TM4C123_RA3) || \
  304. defined(TARGET_IS_TM4C123_RB1) || \
  305. defined(TARGET_IS_TM4C123_RB2) || \
  306. defined(TARGET_IS_TM4C129_RA0) || \
  307. defined(TARGET_IS_TM4C129_RA1) || \
  308. defined(TARGET_IS_TM4C129_RA2)
  309. #define ROM_ADCComparatorRegionSet \
  310. ((void (*)(uint32_t ui32Base, \
  311. uint32_t ui32Comp, \
  312. uint32_t ui32LowRef, \
  313. uint32_t ui32HighRef))ROM_ADCTABLE[16])
  314. #endif
  315. #if defined(TARGET_IS_TM4C123_RA1) || \
  316. defined(TARGET_IS_TM4C123_RA3) || \
  317. defined(TARGET_IS_TM4C123_RB1) || \
  318. defined(TARGET_IS_TM4C123_RB2) || \
  319. defined(TARGET_IS_TM4C129_RA0) || \
  320. defined(TARGET_IS_TM4C129_RA1) || \
  321. defined(TARGET_IS_TM4C129_RA2)
  322. #define ROM_ADCComparatorReset \
  323. ((void (*)(uint32_t ui32Base, \
  324. uint32_t ui32Comp, \
  325. bool bTrigger, \
  326. bool bInterrupt))ROM_ADCTABLE[17])
  327. #endif
  328. #if defined(TARGET_IS_TM4C123_RA1) || \
  329. defined(TARGET_IS_TM4C123_RA3) || \
  330. defined(TARGET_IS_TM4C123_RB1) || \
  331. defined(TARGET_IS_TM4C123_RB2) || \
  332. defined(TARGET_IS_TM4C129_RA0) || \
  333. defined(TARGET_IS_TM4C129_RA1) || \
  334. defined(TARGET_IS_TM4C129_RA2)
  335. #define ROM_ADCComparatorIntDisable \
  336. ((void (*)(uint32_t ui32Base, \
  337. uint32_t ui32SequenceNum))ROM_ADCTABLE[18])
  338. #endif
  339. #if defined(TARGET_IS_TM4C123_RA1) || \
  340. defined(TARGET_IS_TM4C123_RA3) || \
  341. defined(TARGET_IS_TM4C123_RB1) || \
  342. defined(TARGET_IS_TM4C123_RB2) || \
  343. defined(TARGET_IS_TM4C129_RA0) || \
  344. defined(TARGET_IS_TM4C129_RA1) || \
  345. defined(TARGET_IS_TM4C129_RA2)
  346. #define ROM_ADCComparatorIntEnable \
  347. ((void (*)(uint32_t ui32Base, \
  348. uint32_t ui32SequenceNum))ROM_ADCTABLE[19])
  349. #endif
  350. #if defined(TARGET_IS_TM4C123_RA1) || \
  351. defined(TARGET_IS_TM4C123_RA3) || \
  352. defined(TARGET_IS_TM4C123_RB1) || \
  353. defined(TARGET_IS_TM4C123_RB2) || \
  354. defined(TARGET_IS_TM4C129_RA0) || \
  355. defined(TARGET_IS_TM4C129_RA1) || \
  356. defined(TARGET_IS_TM4C129_RA2)
  357. #define ROM_ADCComparatorIntStatus \
  358. ((uint32_t (*)(uint32_t ui32Base))ROM_ADCTABLE[20])
  359. #endif
  360. #if defined(TARGET_IS_TM4C123_RA1) || \
  361. defined(TARGET_IS_TM4C123_RA3) || \
  362. defined(TARGET_IS_TM4C123_RB1) || \
  363. defined(TARGET_IS_TM4C123_RB2) || \
  364. defined(TARGET_IS_TM4C129_RA0) || \
  365. defined(TARGET_IS_TM4C129_RA1) || \
  366. defined(TARGET_IS_TM4C129_RA2)
  367. #define ROM_ADCComparatorIntClear \
  368. ((void (*)(uint32_t ui32Base, \
  369. uint32_t ui32Status))ROM_ADCTABLE[21])
  370. #endif
  371. #if defined(TARGET_IS_TM4C123_RA1) || \
  372. defined(TARGET_IS_TM4C123_RA3) || \
  373. defined(TARGET_IS_TM4C123_RB1) || \
  374. defined(TARGET_IS_TM4C123_RB2) || \
  375. defined(TARGET_IS_TM4C129_RA0) || \
  376. defined(TARGET_IS_TM4C129_RA1) || \
  377. defined(TARGET_IS_TM4C129_RA2)
  378. #define ROM_ADCReferenceSet \
  379. ((void (*)(uint32_t ui32Base, \
  380. uint32_t ui32Ref))ROM_ADCTABLE[22])
  381. #endif
  382. #if defined(TARGET_IS_TM4C123_RA1) || \
  383. defined(TARGET_IS_TM4C123_RA3) || \
  384. defined(TARGET_IS_TM4C123_RB1) || \
  385. defined(TARGET_IS_TM4C123_RB2) || \
  386. defined(TARGET_IS_TM4C129_RA0) || \
  387. defined(TARGET_IS_TM4C129_RA1) || \
  388. defined(TARGET_IS_TM4C129_RA2)
  389. #define ROM_ADCReferenceGet \
  390. ((uint32_t (*)(uint32_t ui32Base))ROM_ADCTABLE[23])
  391. #endif
  392. #if defined(TARGET_IS_TM4C123_RA1) || \
  393. defined(TARGET_IS_TM4C123_RA3) || \
  394. defined(TARGET_IS_TM4C123_RB1) || \
  395. defined(TARGET_IS_TM4C123_RB2) || \
  396. defined(TARGET_IS_TM4C129_RA0) || \
  397. defined(TARGET_IS_TM4C129_RA1) || \
  398. defined(TARGET_IS_TM4C129_RA2)
  399. #define ROM_ADCPhaseDelaySet \
  400. ((void (*)(uint32_t ui32Base, \
  401. uint32_t ui32Phase))ROM_ADCTABLE[24])
  402. #endif
  403. #if defined(TARGET_IS_TM4C123_RA1) || \
  404. defined(TARGET_IS_TM4C123_RA3) || \
  405. defined(TARGET_IS_TM4C123_RB1) || \
  406. defined(TARGET_IS_TM4C123_RB2) || \
  407. defined(TARGET_IS_TM4C129_RA0) || \
  408. defined(TARGET_IS_TM4C129_RA1) || \
  409. defined(TARGET_IS_TM4C129_RA2)
  410. #define ROM_ADCPhaseDelayGet \
  411. ((uint32_t (*)(uint32_t ui32Base))ROM_ADCTABLE[25])
  412. #endif
  413. #if defined(TARGET_IS_TM4C129_RA0) || \
  414. defined(TARGET_IS_TM4C129_RA1) || \
  415. defined(TARGET_IS_TM4C129_RA2)
  416. #define ROM_ADCIntDisableEx \
  417. ((void (*)(uint32_t ui32Base, \
  418. uint32_t ui32IntFlags))ROM_ADCTABLE[29])
  419. #endif
  420. #if defined(TARGET_IS_TM4C129_RA0) || \
  421. defined(TARGET_IS_TM4C129_RA1) || \
  422. defined(TARGET_IS_TM4C129_RA2)
  423. #define ROM_ADCIntEnableEx \
  424. ((void (*)(uint32_t ui32Base, \
  425. uint32_t ui32IntFlags))ROM_ADCTABLE[30])
  426. #endif
  427. #if defined(TARGET_IS_TM4C129_RA0) || \
  428. defined(TARGET_IS_TM4C129_RA1) || \
  429. defined(TARGET_IS_TM4C129_RA2)
  430. #define ROM_ADCIntStatusEx \
  431. ((uint32_t (*)(uint32_t ui32Base, \
  432. bool bMasked))ROM_ADCTABLE[31])
  433. #endif
  434. #if defined(TARGET_IS_TM4C129_RA0) || \
  435. defined(TARGET_IS_TM4C129_RA1) || \
  436. defined(TARGET_IS_TM4C129_RA2)
  437. #define ROM_ADCSequenceDMAEnable \
  438. ((void (*)(uint32_t ui32Base, \
  439. uint32_t ui32SequenceNum))ROM_ADCTABLE[32])
  440. #endif
  441. #if defined(TARGET_IS_TM4C129_RA0) || \
  442. defined(TARGET_IS_TM4C129_RA1) || \
  443. defined(TARGET_IS_TM4C129_RA2)
  444. #define ROM_ADCSequenceDMADisable \
  445. ((void (*)(uint32_t ui32Base, \
  446. uint32_t ui32SequenceNum))ROM_ADCTABLE[33])
  447. #endif
  448. #if defined(TARGET_IS_TM4C129_RA0) || \
  449. defined(TARGET_IS_TM4C129_RA1) || \
  450. defined(TARGET_IS_TM4C129_RA2)
  451. #define ROM_ADCBusy \
  452. ((bool (*)(uint32_t ui32Base))ROM_ADCTABLE[34])
  453. #endif
  454. //*****************************************************************************
  455. //
  456. // Macros for calling ROM functions in the AES API.
  457. //
  458. //*****************************************************************************
  459. #if defined(TARGET_IS_TM4C129_RA0) || \
  460. defined(TARGET_IS_TM4C129_RA1) || \
  461. defined(TARGET_IS_TM4C129_RA2)
  462. #define ROM_AESIntStatus \
  463. ((uint32_t (*)(uint32_t ui32Base, \
  464. bool bMasked))ROM_AESTABLE[0])
  465. #endif
  466. #if defined(TARGET_IS_TM4C129_RA0) || \
  467. defined(TARGET_IS_TM4C129_RA1) || \
  468. defined(TARGET_IS_TM4C129_RA2)
  469. #define ROM_AESAuthLengthSet \
  470. ((void (*)(uint32_t ui32Base, \
  471. uint32_t ui32Length))ROM_AESTABLE[1])
  472. #endif
  473. #if defined(TARGET_IS_TM4C129_RA0) || \
  474. defined(TARGET_IS_TM4C129_RA1) || \
  475. defined(TARGET_IS_TM4C129_RA2)
  476. #define ROM_AESConfigSet \
  477. ((void (*)(uint32_t ui32Base, \
  478. uint32_t ui32Config))ROM_AESTABLE[2])
  479. #endif
  480. #if defined(TARGET_IS_TM4C129_RA0) || \
  481. defined(TARGET_IS_TM4C129_RA1) || \
  482. defined(TARGET_IS_TM4C129_RA2)
  483. #define ROM_AESDataAuth \
  484. ((bool (*)(uint32_t ui32Base, \
  485. uint32_t *pui32Src, \
  486. uint32_t ui32Length, \
  487. uint32_t *pui32Tag))ROM_AESTABLE[3])
  488. #endif
  489. #if defined(TARGET_IS_TM4C129_RA0) || \
  490. defined(TARGET_IS_TM4C129_RA1) || \
  491. defined(TARGET_IS_TM4C129_RA2)
  492. #define ROM_AESDataProcess \
  493. ((bool (*)(uint32_t ui32Base, \
  494. uint32_t *pui32Src, \
  495. uint32_t *pui32Dest, \
  496. uint32_t ui32Length))ROM_AESTABLE[4])
  497. #endif
  498. #if defined(TARGET_IS_TM4C129_RA0) || \
  499. defined(TARGET_IS_TM4C129_RA1) || \
  500. defined(TARGET_IS_TM4C129_RA2)
  501. #define ROM_AESDataProcessAuth \
  502. ((bool (*)(uint32_t ui32Base, \
  503. uint32_t *pui32Src, \
  504. uint32_t *pui32Dest, \
  505. uint32_t ui32Length, \
  506. uint32_t *pui32AuthSrc, \
  507. uint32_t ui32AuthLength, \
  508. uint32_t *pui32Tag))ROM_AESTABLE[5])
  509. #endif
  510. #if defined(TARGET_IS_TM4C129_RA0) || \
  511. defined(TARGET_IS_TM4C129_RA1) || \
  512. defined(TARGET_IS_TM4C129_RA2)
  513. #define ROM_AESDataRead \
  514. ((void (*)(uint32_t ui32Base, \
  515. uint32_t *pui32Dest))ROM_AESTABLE[6])
  516. #endif
  517. #if defined(TARGET_IS_TM4C129_RA0) || \
  518. defined(TARGET_IS_TM4C129_RA1) || \
  519. defined(TARGET_IS_TM4C129_RA2)
  520. #define ROM_AESDataReadNonBlocking \
  521. ((bool (*)(uint32_t ui32Base, \
  522. uint32_t *pui32Dest))ROM_AESTABLE[7])
  523. #endif
  524. #if defined(TARGET_IS_TM4C129_RA0) || \
  525. defined(TARGET_IS_TM4C129_RA1) || \
  526. defined(TARGET_IS_TM4C129_RA2)
  527. #define ROM_AESDataWrite \
  528. ((void (*)(uint32_t ui32Base, \
  529. uint32_t *pui32Src))ROM_AESTABLE[8])
  530. #endif
  531. #if defined(TARGET_IS_TM4C129_RA0) || \
  532. defined(TARGET_IS_TM4C129_RA1) || \
  533. defined(TARGET_IS_TM4C129_RA2)
  534. #define ROM_AESDataWriteNonBlocking \
  535. ((bool (*)(uint32_t ui32Base, \
  536. uint32_t *pui32Src))ROM_AESTABLE[9])
  537. #endif
  538. #if defined(TARGET_IS_TM4C129_RA0) || \
  539. defined(TARGET_IS_TM4C129_RA1) || \
  540. defined(TARGET_IS_TM4C129_RA2)
  541. #define ROM_AESDMADisable \
  542. ((void (*)(uint32_t ui32Base, \
  543. uint32_t ui32Flags))ROM_AESTABLE[10])
  544. #endif
  545. #if defined(TARGET_IS_TM4C129_RA0) || \
  546. defined(TARGET_IS_TM4C129_RA1) || \
  547. defined(TARGET_IS_TM4C129_RA2)
  548. #define ROM_AESDMAEnable \
  549. ((void (*)(uint32_t ui32Base, \
  550. uint32_t ui32Flags))ROM_AESTABLE[11])
  551. #endif
  552. #if defined(TARGET_IS_TM4C129_RA0) || \
  553. defined(TARGET_IS_TM4C129_RA1) || \
  554. defined(TARGET_IS_TM4C129_RA2)
  555. #define ROM_AESIntClear \
  556. ((void (*)(uint32_t ui32Base, \
  557. uint32_t ui32IntFlags))ROM_AESTABLE[12])
  558. #endif
  559. #if defined(TARGET_IS_TM4C129_RA0) || \
  560. defined(TARGET_IS_TM4C129_RA1) || \
  561. defined(TARGET_IS_TM4C129_RA2)
  562. #define ROM_AESIntDisable \
  563. ((void (*)(uint32_t ui32Base, \
  564. uint32_t ui32IntFlags))ROM_AESTABLE[13])
  565. #endif
  566. #if defined(TARGET_IS_TM4C129_RA0) || \
  567. defined(TARGET_IS_TM4C129_RA1) || \
  568. defined(TARGET_IS_TM4C129_RA2)
  569. #define ROM_AESIntEnable \
  570. ((void (*)(uint32_t ui32Base, \
  571. uint32_t ui32IntFlags))ROM_AESTABLE[14])
  572. #endif
  573. #if defined(TARGET_IS_TM4C129_RA0) || \
  574. defined(TARGET_IS_TM4C129_RA1) || \
  575. defined(TARGET_IS_TM4C129_RA2)
  576. #define ROM_AESIVSet \
  577. ((void (*)(uint32_t ui32Base, \
  578. uint32_t *pui32IVdata))ROM_AESTABLE[15])
  579. #endif
  580. #if defined(TARGET_IS_TM4C129_RA0) || \
  581. defined(TARGET_IS_TM4C129_RA1) || \
  582. defined(TARGET_IS_TM4C129_RA2)
  583. #define ROM_AESKey1Set \
  584. ((void (*)(uint32_t ui32Base, \
  585. uint32_t *pui32Key, \
  586. uint32_t ui32Keysize))ROM_AESTABLE[16])
  587. #endif
  588. #if defined(TARGET_IS_TM4C129_RA0) || \
  589. defined(TARGET_IS_TM4C129_RA1) || \
  590. defined(TARGET_IS_TM4C129_RA2)
  591. #define ROM_AESKey2Set \
  592. ((void (*)(uint32_t ui32Base, \
  593. uint32_t *pui32Key, \
  594. uint32_t ui32Keysize))ROM_AESTABLE[17])
  595. #endif
  596. #if defined(TARGET_IS_TM4C129_RA0) || \
  597. defined(TARGET_IS_TM4C129_RA1) || \
  598. defined(TARGET_IS_TM4C129_RA2)
  599. #define ROM_AESKey3Set \
  600. ((void (*)(uint32_t ui32Base, \
  601. uint32_t *pui32Key))ROM_AESTABLE[18])
  602. #endif
  603. #if defined(TARGET_IS_TM4C129_RA0) || \
  604. defined(TARGET_IS_TM4C129_RA1) || \
  605. defined(TARGET_IS_TM4C129_RA2)
  606. #define ROM_AESLengthSet \
  607. ((void (*)(uint32_t ui32Base, \
  608. uint64_t ui64Length))ROM_AESTABLE[19])
  609. #endif
  610. #if defined(TARGET_IS_TM4C129_RA0) || \
  611. defined(TARGET_IS_TM4C129_RA1) || \
  612. defined(TARGET_IS_TM4C129_RA2)
  613. #define ROM_AESReset \
  614. ((void (*)(uint32_t ui32Base))ROM_AESTABLE[20])
  615. #endif
  616. #if defined(TARGET_IS_TM4C129_RA0) || \
  617. defined(TARGET_IS_TM4C129_RA1) || \
  618. defined(TARGET_IS_TM4C129_RA2)
  619. #define ROM_AESTagRead \
  620. ((void (*)(uint32_t ui32Base, \
  621. uint32_t *pui32TagData))ROM_AESTABLE[21])
  622. #endif
  623. #if defined(TARGET_IS_TM4C129_RA1) || \
  624. defined(TARGET_IS_TM4C129_RA2)
  625. #define ROM_AESIVRead \
  626. ((void (*)(uint32_t ui32Base, \
  627. uint32_t *pui32IVdata))ROM_AESTABLE[22])
  628. #endif
  629. //*****************************************************************************
  630. //
  631. // Macros for calling ROM functions in the CAN API.
  632. //
  633. //*****************************************************************************
  634. #if defined(TARGET_IS_TM4C123_RA1) || \
  635. defined(TARGET_IS_TM4C123_RA3) || \
  636. defined(TARGET_IS_TM4C123_RB1) || \
  637. defined(TARGET_IS_TM4C123_RB2) || \
  638. defined(TARGET_IS_TM4C129_RA0) || \
  639. defined(TARGET_IS_TM4C129_RA1) || \
  640. defined(TARGET_IS_TM4C129_RA2)
  641. #define ROM_CANIntClear \
  642. ((void (*)(uint32_t ui32Base, \
  643. uint32_t ui32IntClr))ROM_CANTABLE[0])
  644. #endif
  645. #if defined(TARGET_IS_TM4C123_RA1) || \
  646. defined(TARGET_IS_TM4C123_RA3) || \
  647. defined(TARGET_IS_TM4C123_RB1) || \
  648. defined(TARGET_IS_TM4C123_RB2) || \
  649. defined(TARGET_IS_TM4C129_RA0) || \
  650. defined(TARGET_IS_TM4C129_RA1) || \
  651. defined(TARGET_IS_TM4C129_RA2)
  652. #define ROM_CANInit \
  653. ((void (*)(uint32_t ui32Base))ROM_CANTABLE[1])
  654. #endif
  655. #if defined(TARGET_IS_TM4C123_RA1) || \
  656. defined(TARGET_IS_TM4C123_RA3) || \
  657. defined(TARGET_IS_TM4C123_RB1) || \
  658. defined(TARGET_IS_TM4C123_RB2) || \
  659. defined(TARGET_IS_TM4C129_RA0) || \
  660. defined(TARGET_IS_TM4C129_RA1) || \
  661. defined(TARGET_IS_TM4C129_RA2)
  662. #define ROM_CANEnable \
  663. ((void (*)(uint32_t ui32Base))ROM_CANTABLE[2])
  664. #endif
  665. #if defined(TARGET_IS_TM4C123_RA1) || \
  666. defined(TARGET_IS_TM4C123_RA3) || \
  667. defined(TARGET_IS_TM4C123_RB1) || \
  668. defined(TARGET_IS_TM4C123_RB2) || \
  669. defined(TARGET_IS_TM4C129_RA0) || \
  670. defined(TARGET_IS_TM4C129_RA1) || \
  671. defined(TARGET_IS_TM4C129_RA2)
  672. #define ROM_CANDisable \
  673. ((void (*)(uint32_t ui32Base))ROM_CANTABLE[3])
  674. #endif
  675. #if defined(TARGET_IS_TM4C123_RA1) || \
  676. defined(TARGET_IS_TM4C123_RA3) || \
  677. defined(TARGET_IS_TM4C123_RB1) || \
  678. defined(TARGET_IS_TM4C123_RB2) || \
  679. defined(TARGET_IS_TM4C129_RA0) || \
  680. defined(TARGET_IS_TM4C129_RA1) || \
  681. defined(TARGET_IS_TM4C129_RA2)
  682. #define ROM_CANBitTimingSet \
  683. ((void (*)(uint32_t ui32Base, \
  684. tCANBitClkParms *psClkParms))ROM_CANTABLE[4])
  685. #endif
  686. #if defined(TARGET_IS_TM4C123_RA1) || \
  687. defined(TARGET_IS_TM4C123_RA3) || \
  688. defined(TARGET_IS_TM4C123_RB1) || \
  689. defined(TARGET_IS_TM4C123_RB2) || \
  690. defined(TARGET_IS_TM4C129_RA0) || \
  691. defined(TARGET_IS_TM4C129_RA1) || \
  692. defined(TARGET_IS_TM4C129_RA2)
  693. #define ROM_CANBitTimingGet \
  694. ((void (*)(uint32_t ui32Base, \
  695. tCANBitClkParms *psClkParms))ROM_CANTABLE[5])
  696. #endif
  697. #if defined(TARGET_IS_TM4C123_RA1) || \
  698. defined(TARGET_IS_TM4C123_RA3) || \
  699. defined(TARGET_IS_TM4C123_RB1) || \
  700. defined(TARGET_IS_TM4C123_RB2) || \
  701. defined(TARGET_IS_TM4C129_RA0) || \
  702. defined(TARGET_IS_TM4C129_RA1) || \
  703. defined(TARGET_IS_TM4C129_RA2)
  704. #define ROM_CANMessageSet \
  705. ((void (*)(uint32_t ui32Base, \
  706. uint32_t ui32ObjID, \
  707. tCANMsgObject *psMsgObject, \
  708. tMsgObjType eMsgType))ROM_CANTABLE[6])
  709. #endif
  710. #if defined(TARGET_IS_TM4C123_RA1) || \
  711. defined(TARGET_IS_TM4C123_RA3) || \
  712. defined(TARGET_IS_TM4C123_RB1) || \
  713. defined(TARGET_IS_TM4C123_RB2) || \
  714. defined(TARGET_IS_TM4C129_RA0) || \
  715. defined(TARGET_IS_TM4C129_RA1) || \
  716. defined(TARGET_IS_TM4C129_RA2)
  717. #define ROM_CANMessageGet \
  718. ((void (*)(uint32_t ui32Base, \
  719. uint32_t ui32ObjID, \
  720. tCANMsgObject *psMsgObject, \
  721. bool bClrPendingInt))ROM_CANTABLE[7])
  722. #endif
  723. #if defined(TARGET_IS_TM4C123_RA1) || \
  724. defined(TARGET_IS_TM4C123_RA3) || \
  725. defined(TARGET_IS_TM4C123_RB1) || \
  726. defined(TARGET_IS_TM4C123_RB2) || \
  727. defined(TARGET_IS_TM4C129_RA0) || \
  728. defined(TARGET_IS_TM4C129_RA1) || \
  729. defined(TARGET_IS_TM4C129_RA2)
  730. #define ROM_CANStatusGet \
  731. ((uint32_t (*)(uint32_t ui32Base, \
  732. tCANStsReg eStatusReg))ROM_CANTABLE[8])
  733. #endif
  734. #if defined(TARGET_IS_TM4C123_RA1) || \
  735. defined(TARGET_IS_TM4C123_RA3) || \
  736. defined(TARGET_IS_TM4C123_RB1) || \
  737. defined(TARGET_IS_TM4C123_RB2) || \
  738. defined(TARGET_IS_TM4C129_RA0) || \
  739. defined(TARGET_IS_TM4C129_RA1) || \
  740. defined(TARGET_IS_TM4C129_RA2)
  741. #define ROM_CANMessageClear \
  742. ((void (*)(uint32_t ui32Base, \
  743. uint32_t ui32ObjID))ROM_CANTABLE[9])
  744. #endif
  745. #if defined(TARGET_IS_TM4C123_RA1) || \
  746. defined(TARGET_IS_TM4C123_RA3) || \
  747. defined(TARGET_IS_TM4C123_RB1) || \
  748. defined(TARGET_IS_TM4C123_RB2) || \
  749. defined(TARGET_IS_TM4C129_RA0) || \
  750. defined(TARGET_IS_TM4C129_RA1) || \
  751. defined(TARGET_IS_TM4C129_RA2)
  752. #define ROM_CANIntEnable \
  753. ((void (*)(uint32_t ui32Base, \
  754. uint32_t ui32IntFlags))ROM_CANTABLE[10])
  755. #endif
  756. #if defined(TARGET_IS_TM4C123_RA1) || \
  757. defined(TARGET_IS_TM4C123_RA3) || \
  758. defined(TARGET_IS_TM4C123_RB1) || \
  759. defined(TARGET_IS_TM4C123_RB2) || \
  760. defined(TARGET_IS_TM4C129_RA0) || \
  761. defined(TARGET_IS_TM4C129_RA1) || \
  762. defined(TARGET_IS_TM4C129_RA2)
  763. #define ROM_CANIntDisable \
  764. ((void (*)(uint32_t ui32Base, \
  765. uint32_t ui32IntFlags))ROM_CANTABLE[11])
  766. #endif
  767. #if defined(TARGET_IS_TM4C123_RA1) || \
  768. defined(TARGET_IS_TM4C123_RA3) || \
  769. defined(TARGET_IS_TM4C123_RB1) || \
  770. defined(TARGET_IS_TM4C123_RB2) || \
  771. defined(TARGET_IS_TM4C129_RA0) || \
  772. defined(TARGET_IS_TM4C129_RA1) || \
  773. defined(TARGET_IS_TM4C129_RA2)
  774. #define ROM_CANIntStatus \
  775. ((uint32_t (*)(uint32_t ui32Base, \
  776. tCANIntStsReg eIntStsReg))ROM_CANTABLE[12])
  777. #endif
  778. #if defined(TARGET_IS_TM4C123_RA1) || \
  779. defined(TARGET_IS_TM4C123_RA3) || \
  780. defined(TARGET_IS_TM4C123_RB1) || \
  781. defined(TARGET_IS_TM4C123_RB2) || \
  782. defined(TARGET_IS_TM4C129_RA0) || \
  783. defined(TARGET_IS_TM4C129_RA1) || \
  784. defined(TARGET_IS_TM4C129_RA2)
  785. #define ROM_CANRetryGet \
  786. ((bool (*)(uint32_t ui32Base))ROM_CANTABLE[13])
  787. #endif
  788. #if defined(TARGET_IS_TM4C123_RA1) || \
  789. defined(TARGET_IS_TM4C123_RA3) || \
  790. defined(TARGET_IS_TM4C123_RB1) || \
  791. defined(TARGET_IS_TM4C123_RB2) || \
  792. defined(TARGET_IS_TM4C129_RA0) || \
  793. defined(TARGET_IS_TM4C129_RA1) || \
  794. defined(TARGET_IS_TM4C129_RA2)
  795. #define ROM_CANRetrySet \
  796. ((void (*)(uint32_t ui32Base, \
  797. bool bAutoRetry))ROM_CANTABLE[14])
  798. #endif
  799. #if defined(TARGET_IS_TM4C123_RA1) || \
  800. defined(TARGET_IS_TM4C123_RA3) || \
  801. defined(TARGET_IS_TM4C123_RB1) || \
  802. defined(TARGET_IS_TM4C123_RB2) || \
  803. defined(TARGET_IS_TM4C129_RA0) || \
  804. defined(TARGET_IS_TM4C129_RA1) || \
  805. defined(TARGET_IS_TM4C129_RA2)
  806. #define ROM_CANErrCntrGet \
  807. ((bool (*)(uint32_t ui32Base, \
  808. uint32_t *pui32RxCount, \
  809. uint32_t *pui32TxCount))ROM_CANTABLE[15])
  810. #endif
  811. #if defined(TARGET_IS_TM4C123_RA1) || \
  812. defined(TARGET_IS_TM4C123_RA3) || \
  813. defined(TARGET_IS_TM4C123_RB1) || \
  814. defined(TARGET_IS_TM4C123_RB2) || \
  815. defined(TARGET_IS_TM4C129_RA0) || \
  816. defined(TARGET_IS_TM4C129_RA1) || \
  817. defined(TARGET_IS_TM4C129_RA2)
  818. #define ROM_CANBitRateSet \
  819. ((uint32_t (*)(uint32_t ui32Base, \
  820. uint32_t ui32SourceClock, \
  821. uint32_t ui32BitRate))ROM_CANTABLE[16])
  822. #endif
  823. //*****************************************************************************
  824. //
  825. // Macros for calling ROM functions in the Comparator API.
  826. //
  827. //*****************************************************************************
  828. #if defined(TARGET_IS_TM4C123_RA1) || \
  829. defined(TARGET_IS_TM4C123_RA3) || \
  830. defined(TARGET_IS_TM4C123_RB1) || \
  831. defined(TARGET_IS_TM4C123_RB2) || \
  832. defined(TARGET_IS_TM4C129_RA0) || \
  833. defined(TARGET_IS_TM4C129_RA1) || \
  834. defined(TARGET_IS_TM4C129_RA2)
  835. #define ROM_ComparatorIntClear \
  836. ((void (*)(uint32_t ui32Base, \
  837. uint32_t ui32Comp))ROM_COMPARATORTABLE[0])
  838. #endif
  839. #if defined(TARGET_IS_TM4C123_RA1) || \
  840. defined(TARGET_IS_TM4C123_RA3) || \
  841. defined(TARGET_IS_TM4C123_RB1) || \
  842. defined(TARGET_IS_TM4C123_RB2) || \
  843. defined(TARGET_IS_TM4C129_RA0) || \
  844. defined(TARGET_IS_TM4C129_RA1) || \
  845. defined(TARGET_IS_TM4C129_RA2)
  846. #define ROM_ComparatorConfigure \
  847. ((void (*)(uint32_t ui32Base, \
  848. uint32_t ui32Comp, \
  849. uint32_t ui32Config))ROM_COMPARATORTABLE[1])
  850. #endif
  851. #if defined(TARGET_IS_TM4C123_RA1) || \
  852. defined(TARGET_IS_TM4C123_RA3) || \
  853. defined(TARGET_IS_TM4C123_RB1) || \
  854. defined(TARGET_IS_TM4C123_RB2) || \
  855. defined(TARGET_IS_TM4C129_RA0) || \
  856. defined(TARGET_IS_TM4C129_RA1) || \
  857. defined(TARGET_IS_TM4C129_RA2)
  858. #define ROM_ComparatorRefSet \
  859. ((void (*)(uint32_t ui32Base, \
  860. uint32_t ui32Ref))ROM_COMPARATORTABLE[2])
  861. #endif
  862. #if defined(TARGET_IS_TM4C123_RA1) || \
  863. defined(TARGET_IS_TM4C123_RA3) || \
  864. defined(TARGET_IS_TM4C123_RB1) || \
  865. defined(TARGET_IS_TM4C123_RB2) || \
  866. defined(TARGET_IS_TM4C129_RA0) || \
  867. defined(TARGET_IS_TM4C129_RA1) || \
  868. defined(TARGET_IS_TM4C129_RA2)
  869. #define ROM_ComparatorValueGet \
  870. ((bool (*)(uint32_t ui32Base, \
  871. uint32_t ui32Comp))ROM_COMPARATORTABLE[3])
  872. #endif
  873. #if defined(TARGET_IS_TM4C123_RA1) || \
  874. defined(TARGET_IS_TM4C123_RA3) || \
  875. defined(TARGET_IS_TM4C123_RB1) || \
  876. defined(TARGET_IS_TM4C123_RB2) || \
  877. defined(TARGET_IS_TM4C129_RA0) || \
  878. defined(TARGET_IS_TM4C129_RA1) || \
  879. defined(TARGET_IS_TM4C129_RA2)
  880. #define ROM_ComparatorIntEnable \
  881. ((void (*)(uint32_t ui32Base, \
  882. uint32_t ui32Comp))ROM_COMPARATORTABLE[4])
  883. #endif
  884. #if defined(TARGET_IS_TM4C123_RA1) || \
  885. defined(TARGET_IS_TM4C123_RA3) || \
  886. defined(TARGET_IS_TM4C123_RB1) || \
  887. defined(TARGET_IS_TM4C123_RB2) || \
  888. defined(TARGET_IS_TM4C129_RA0) || \
  889. defined(TARGET_IS_TM4C129_RA1) || \
  890. defined(TARGET_IS_TM4C129_RA2)
  891. #define ROM_ComparatorIntDisable \
  892. ((void (*)(uint32_t ui32Base, \
  893. uint32_t ui32Comp))ROM_COMPARATORTABLE[5])
  894. #endif
  895. #if defined(TARGET_IS_TM4C123_RA1) || \
  896. defined(TARGET_IS_TM4C123_RA3) || \
  897. defined(TARGET_IS_TM4C123_RB1) || \
  898. defined(TARGET_IS_TM4C123_RB2) || \
  899. defined(TARGET_IS_TM4C129_RA0) || \
  900. defined(TARGET_IS_TM4C129_RA1) || \
  901. defined(TARGET_IS_TM4C129_RA2)
  902. #define ROM_ComparatorIntStatus \
  903. ((bool (*)(uint32_t ui32Base, \
  904. uint32_t ui32Comp, \
  905. bool bMasked))ROM_COMPARATORTABLE[6])
  906. #endif
  907. //*****************************************************************************
  908. //
  909. // Macros for calling ROM functions in the CRC API.
  910. //
  911. //*****************************************************************************
  912. #if defined(TARGET_IS_TM4C129_RA0) || \
  913. defined(TARGET_IS_TM4C129_RA1) || \
  914. defined(TARGET_IS_TM4C129_RA2)
  915. #define ROM_CRCConfigSet \
  916. ((void (*)(uint32_t ui32Base, \
  917. uint32_t ui32CRCConfig))ROM_CRCTABLE[0])
  918. #endif
  919. #if defined(TARGET_IS_TM4C129_RA0) || \
  920. defined(TARGET_IS_TM4C129_RA1) || \
  921. defined(TARGET_IS_TM4C129_RA2)
  922. #define ROM_CRCDataProcess \
  923. ((uint32_t (*)(uint32_t ui32Base, \
  924. uint32_t *pui32DataIn, \
  925. uint32_t ui32DataLength, \
  926. bool bPPResult))ROM_CRCTABLE[1])
  927. #endif
  928. #if defined(TARGET_IS_TM4C129_RA0) || \
  929. defined(TARGET_IS_TM4C129_RA1) || \
  930. defined(TARGET_IS_TM4C129_RA2)
  931. #define ROM_CRCDataWrite \
  932. ((void (*)(uint32_t ui32Base, \
  933. uint32_t ui32Data))ROM_CRCTABLE[2])
  934. #endif
  935. #if defined(TARGET_IS_TM4C129_RA0) || \
  936. defined(TARGET_IS_TM4C129_RA1) || \
  937. defined(TARGET_IS_TM4C129_RA2)
  938. #define ROM_CRCResultRead \
  939. ((uint32_t (*)(uint32_t ui32Base, \
  940. bool bPPResult))ROM_CRCTABLE[3])
  941. #endif
  942. #if defined(TARGET_IS_TM4C129_RA0) || \
  943. defined(TARGET_IS_TM4C129_RA1) || \
  944. defined(TARGET_IS_TM4C129_RA2)
  945. #define ROM_CRCSeedSet \
  946. ((void (*)(uint32_t ui32Base, \
  947. uint32_t ui32Seed))ROM_CRCTABLE[4])
  948. #endif
  949. //*****************************************************************************
  950. //
  951. // Macros for calling ROM functions in the DES API.
  952. //
  953. //*****************************************************************************
  954. #if defined(TARGET_IS_TM4C129_RA0) || \
  955. defined(TARGET_IS_TM4C129_RA1) || \
  956. defined(TARGET_IS_TM4C129_RA2)
  957. #define ROM_DESIntStatus \
  958. ((uint32_t (*)(uint32_t ui32Base, \
  959. bool bMasked))ROM_DESTABLE[0])
  960. #endif
  961. #if defined(TARGET_IS_TM4C129_RA0) || \
  962. defined(TARGET_IS_TM4C129_RA1) || \
  963. defined(TARGET_IS_TM4C129_RA2)
  964. #define ROM_DESConfigSet \
  965. ((void (*)(uint32_t ui32Base, \
  966. uint32_t ui32Config))ROM_DESTABLE[1])
  967. #endif
  968. #if defined(TARGET_IS_TM4C129_RA0) || \
  969. defined(TARGET_IS_TM4C129_RA1) || \
  970. defined(TARGET_IS_TM4C129_RA2)
  971. #define ROM_DESDataRead \
  972. ((void (*)(uint32_t ui32Base, \
  973. uint32_t *pui32Dest))ROM_DESTABLE[2])
  974. #endif
  975. #if defined(TARGET_IS_TM4C129_RA0) || \
  976. defined(TARGET_IS_TM4C129_RA1) || \
  977. defined(TARGET_IS_TM4C129_RA2)
  978. #define ROM_DESDataReadNonBlocking \
  979. ((bool (*)(uint32_t ui32Base, \
  980. uint32_t *pui32Dest))ROM_DESTABLE[3])
  981. #endif
  982. #if defined(TARGET_IS_TM4C129_RA0) || \
  983. defined(TARGET_IS_TM4C129_RA1) || \
  984. defined(TARGET_IS_TM4C129_RA2)
  985. #define ROM_DESDataProcess \
  986. ((bool (*)(uint32_t ui32Base, \
  987. uint32_t *pui32Src, \
  988. uint32_t *pui32Dest, \
  989. uint32_t ui32Length))ROM_DESTABLE[4])
  990. #endif
  991. #if defined(TARGET_IS_TM4C129_RA0) || \
  992. defined(TARGET_IS_TM4C129_RA1) || \
  993. defined(TARGET_IS_TM4C129_RA2)
  994. #define ROM_DESDataWrite \
  995. ((void (*)(uint32_t ui32Base, \
  996. uint32_t *pui32Src))ROM_DESTABLE[5])
  997. #endif
  998. #if defined(TARGET_IS_TM4C129_RA0) || \
  999. defined(TARGET_IS_TM4C129_RA1) || \
  1000. defined(TARGET_IS_TM4C129_RA2)
  1001. #define ROM_DESDataWriteNonBlocking \
  1002. ((bool (*)(uint32_t ui32Base, \
  1003. uint32_t *pui32Src))ROM_DESTABLE[6])
  1004. #endif
  1005. #if defined(TARGET_IS_TM4C129_RA0) || \
  1006. defined(TARGET_IS_TM4C129_RA1) || \
  1007. defined(TARGET_IS_TM4C129_RA2)
  1008. #define ROM_DESDMADisable \
  1009. ((void (*)(uint32_t ui32Base, \
  1010. uint32_t ui32Flags))ROM_DESTABLE[7])
  1011. #endif
  1012. #if defined(TARGET_IS_TM4C129_RA0) || \
  1013. defined(TARGET_IS_TM4C129_RA1) || \
  1014. defined(TARGET_IS_TM4C129_RA2)
  1015. #define ROM_DESDMAEnable \
  1016. ((void (*)(uint32_t ui32Base, \
  1017. uint32_t ui32Flags))ROM_DESTABLE[8])
  1018. #endif
  1019. #if defined(TARGET_IS_TM4C129_RA0) || \
  1020. defined(TARGET_IS_TM4C129_RA1) || \
  1021. defined(TARGET_IS_TM4C129_RA2)
  1022. #define ROM_DESIntClear \
  1023. ((void (*)(uint32_t ui32Base, \
  1024. uint32_t ui32IntFlags))ROM_DESTABLE[9])
  1025. #endif
  1026. #if defined(TARGET_IS_TM4C129_RA0) || \
  1027. defined(TARGET_IS_TM4C129_RA1) || \
  1028. defined(TARGET_IS_TM4C129_RA2)
  1029. #define ROM_DESIntDisable \
  1030. ((void (*)(uint32_t ui32Base, \
  1031. uint32_t ui32IntFlags))ROM_DESTABLE[10])
  1032. #endif
  1033. #if defined(TARGET_IS_TM4C129_RA0) || \
  1034. defined(TARGET_IS_TM4C129_RA1) || \
  1035. defined(TARGET_IS_TM4C129_RA2)
  1036. #define ROM_DESIntEnable \
  1037. ((void (*)(uint32_t ui32Base, \
  1038. uint32_t ui32IntFlags))ROM_DESTABLE[11])
  1039. #endif
  1040. #if defined(TARGET_IS_TM4C129_RA0) || \
  1041. defined(TARGET_IS_TM4C129_RA1) || \
  1042. defined(TARGET_IS_TM4C129_RA2)
  1043. #define ROM_DESIVSet \
  1044. ((bool (*)(uint32_t ui32Base, \
  1045. uint32_t *pui32IVdata))ROM_DESTABLE[12])
  1046. #endif
  1047. #if defined(TARGET_IS_TM4C129_RA0) || \
  1048. defined(TARGET_IS_TM4C129_RA1) || \
  1049. defined(TARGET_IS_TM4C129_RA2)
  1050. #define ROM_DESKeySet \
  1051. ((void (*)(uint32_t ui32Base, \
  1052. uint32_t *pui32Key))ROM_DESTABLE[13])
  1053. #endif
  1054. #if defined(TARGET_IS_TM4C129_RA0) || \
  1055. defined(TARGET_IS_TM4C129_RA1) || \
  1056. defined(TARGET_IS_TM4C129_RA2)
  1057. #define ROM_DESLengthSet \
  1058. ((void (*)(uint32_t ui32Base, \
  1059. uint32_t ui32Length))ROM_DESTABLE[14])
  1060. #endif
  1061. #if defined(TARGET_IS_TM4C129_RA0) || \
  1062. defined(TARGET_IS_TM4C129_RA1) || \
  1063. defined(TARGET_IS_TM4C129_RA2)
  1064. #define ROM_DESReset \
  1065. ((void (*)(uint32_t ui32Base))ROM_DESTABLE[15])
  1066. #endif
  1067. //*****************************************************************************
  1068. //
  1069. // Macros for calling ROM functions in the EEPROM API.
  1070. //
  1071. //*****************************************************************************
  1072. #if defined(TARGET_IS_TM4C123_RA3) || \
  1073. defined(TARGET_IS_TM4C123_RB1) || \
  1074. defined(TARGET_IS_TM4C123_RB2) || \
  1075. defined(TARGET_IS_TM4C129_RA0) || \
  1076. defined(TARGET_IS_TM4C129_RA1) || \
  1077. defined(TARGET_IS_TM4C129_RA2)
  1078. #define ROM_EEPROMRead \
  1079. ((void (*)(uint32_t *pui32Data, \
  1080. uint32_t ui32Address, \
  1081. uint32_t ui32Count))ROM_EEPROMTABLE[0])
  1082. #endif
  1083. #if defined(TARGET_IS_TM4C123_RA3) || \
  1084. defined(TARGET_IS_TM4C123_RB1) || \
  1085. defined(TARGET_IS_TM4C123_RB2) || \
  1086. defined(TARGET_IS_TM4C129_RA0) || \
  1087. defined(TARGET_IS_TM4C129_RA1) || \
  1088. defined(TARGET_IS_TM4C129_RA2)
  1089. #define ROM_EEPROMBlockCountGet \
  1090. ((uint32_t (*)(void))ROM_EEPROMTABLE[1])
  1091. #endif
  1092. #if defined(TARGET_IS_TM4C123_RA3) || \
  1093. defined(TARGET_IS_TM4C123_RB1) || \
  1094. defined(TARGET_IS_TM4C123_RB2) || \
  1095. defined(TARGET_IS_TM4C129_RA0) || \
  1096. defined(TARGET_IS_TM4C129_RA1) || \
  1097. defined(TARGET_IS_TM4C129_RA2)
  1098. #define ROM_EEPROMBlockHide \
  1099. ((void (*)(uint32_t ui32Block))ROM_EEPROMTABLE[2])
  1100. #endif
  1101. #if defined(TARGET_IS_TM4C123_RA3) || \
  1102. defined(TARGET_IS_TM4C123_RB1) || \
  1103. defined(TARGET_IS_TM4C123_RB2) || \
  1104. defined(TARGET_IS_TM4C129_RA0) || \
  1105. defined(TARGET_IS_TM4C129_RA1) || \
  1106. defined(TARGET_IS_TM4C129_RA2)
  1107. #define ROM_EEPROMBlockLock \
  1108. ((uint32_t (*)(uint32_t ui32Block))ROM_EEPROMTABLE[3])
  1109. #endif
  1110. #if defined(TARGET_IS_TM4C123_RA3) || \
  1111. defined(TARGET_IS_TM4C123_RB1) || \
  1112. defined(TARGET_IS_TM4C123_RB2) || \
  1113. defined(TARGET_IS_TM4C129_RA0) || \
  1114. defined(TARGET_IS_TM4C129_RA1) || \
  1115. defined(TARGET_IS_TM4C129_RA2)
  1116. #define ROM_EEPROMBlockPasswordSet \
  1117. ((uint32_t (*)(uint32_t ui32Block, \
  1118. uint32_t *pui32Password, \
  1119. uint32_t ui32Count))ROM_EEPROMTABLE[4])
  1120. #endif
  1121. #if defined(TARGET_IS_TM4C123_RA3) || \
  1122. defined(TARGET_IS_TM4C123_RB1) || \
  1123. defined(TARGET_IS_TM4C123_RB2) || \
  1124. defined(TARGET_IS_TM4C129_RA0) || \
  1125. defined(TARGET_IS_TM4C129_RA1) || \
  1126. defined(TARGET_IS_TM4C129_RA2)
  1127. #define ROM_EEPROMBlockProtectGet \
  1128. ((uint32_t (*)(uint32_t ui32Block))ROM_EEPROMTABLE[5])
  1129. #endif
  1130. #if defined(TARGET_IS_TM4C123_RA3) || \
  1131. defined(TARGET_IS_TM4C123_RB1) || \
  1132. defined(TARGET_IS_TM4C123_RB2) || \
  1133. defined(TARGET_IS_TM4C129_RA0) || \
  1134. defined(TARGET_IS_TM4C129_RA1) || \
  1135. defined(TARGET_IS_TM4C129_RA2)
  1136. #define ROM_EEPROMBlockProtectSet \
  1137. ((uint32_t (*)(uint32_t ui32Block, \
  1138. uint32_t ui32Protect))ROM_EEPROMTABLE[6])
  1139. #endif
  1140. #if defined(TARGET_IS_TM4C123_RA3) || \
  1141. defined(TARGET_IS_TM4C123_RB1) || \
  1142. defined(TARGET_IS_TM4C123_RB2) || \
  1143. defined(TARGET_IS_TM4C129_RA0) || \
  1144. defined(TARGET_IS_TM4C129_RA1) || \
  1145. defined(TARGET_IS_TM4C129_RA2)
  1146. #define ROM_EEPROMBlockUnlock \
  1147. ((uint32_t (*)(uint32_t ui32Block, \
  1148. uint32_t *pui32Password, \
  1149. uint32_t ui32Count))ROM_EEPROMTABLE[7])
  1150. #endif
  1151. #if defined(TARGET_IS_TM4C123_RA3) || \
  1152. defined(TARGET_IS_TM4C123_RB1) || \
  1153. defined(TARGET_IS_TM4C123_RB2) || \
  1154. defined(TARGET_IS_TM4C129_RA0) || \
  1155. defined(TARGET_IS_TM4C129_RA1) || \
  1156. defined(TARGET_IS_TM4C129_RA2)
  1157. #define ROM_EEPROMIntClear \
  1158. ((void (*)(uint32_t ui32IntFlags))ROM_EEPROMTABLE[8])
  1159. #endif
  1160. #if defined(TARGET_IS_TM4C123_RA3) || \
  1161. defined(TARGET_IS_TM4C123_RB1) || \
  1162. defined(TARGET_IS_TM4C123_RB2) || \
  1163. defined(TARGET_IS_TM4C129_RA0) || \
  1164. defined(TARGET_IS_TM4C129_RA1) || \
  1165. defined(TARGET_IS_TM4C129_RA2)
  1166. #define ROM_EEPROMIntDisable \
  1167. ((void (*)(uint32_t ui32IntFlags))ROM_EEPROMTABLE[9])
  1168. #endif
  1169. #if defined(TARGET_IS_TM4C123_RA3) || \
  1170. defined(TARGET_IS_TM4C123_RB1) || \
  1171. defined(TARGET_IS_TM4C123_RB2) || \
  1172. defined(TARGET_IS_TM4C129_RA0) || \
  1173. defined(TARGET_IS_TM4C129_RA1) || \
  1174. defined(TARGET_IS_TM4C129_RA2)
  1175. #define ROM_EEPROMIntEnable \
  1176. ((void (*)(uint32_t ui32IntFlags))ROM_EEPROMTABLE[10])
  1177. #endif
  1178. #if defined(TARGET_IS_TM4C123_RA3) || \
  1179. defined(TARGET_IS_TM4C123_RB1) || \
  1180. defined(TARGET_IS_TM4C123_RB2) || \
  1181. defined(TARGET_IS_TM4C129_RA0) || \
  1182. defined(TARGET_IS_TM4C129_RA1) || \
  1183. defined(TARGET_IS_TM4C129_RA2)
  1184. #define ROM_EEPROMIntStatus \
  1185. ((uint32_t (*)(bool bMasked))ROM_EEPROMTABLE[11])
  1186. #endif
  1187. #if defined(TARGET_IS_TM4C123_RA3) || \
  1188. defined(TARGET_IS_TM4C123_RB1)
  1189. #define ROM_EEPROMMassErase \
  1190. ((uint32_t (*)(void))ROM_EEPROMTABLE[12])
  1191. #endif
  1192. #if defined(TARGET_IS_TM4C123_RA3) || \
  1193. defined(TARGET_IS_TM4C123_RB1) || \
  1194. defined(TARGET_IS_TM4C123_RB2) || \
  1195. defined(TARGET_IS_TM4C129_RA0) || \
  1196. defined(TARGET_IS_TM4C129_RA1) || \
  1197. defined(TARGET_IS_TM4C129_RA2)
  1198. #define ROM_EEPROMProgram \
  1199. ((uint32_t (*)(uint32_t *pui32Data, \
  1200. uint32_t ui32Address, \
  1201. uint32_t ui32Count))ROM_EEPROMTABLE[13])
  1202. #endif
  1203. #if defined(TARGET_IS_TM4C123_RA3) || \
  1204. defined(TARGET_IS_TM4C123_RB1) || \
  1205. defined(TARGET_IS_TM4C123_RB2) || \
  1206. defined(TARGET_IS_TM4C129_RA0) || \
  1207. defined(TARGET_IS_TM4C129_RA1) || \
  1208. defined(TARGET_IS_TM4C129_RA2)
  1209. #define ROM_EEPROMProgramNonBlocking \
  1210. ((uint32_t (*)(uint32_t ui32Data, \
  1211. uint32_t ui32Address))ROM_EEPROMTABLE[14])
  1212. #endif
  1213. #if defined(TARGET_IS_TM4C123_RA3) || \
  1214. defined(TARGET_IS_TM4C123_RB1) || \
  1215. defined(TARGET_IS_TM4C123_RB2) || \
  1216. defined(TARGET_IS_TM4C129_RA0) || \
  1217. defined(TARGET_IS_TM4C129_RA1) || \
  1218. defined(TARGET_IS_TM4C129_RA2)
  1219. #define ROM_EEPROMSizeGet \
  1220. ((uint32_t (*)(void))ROM_EEPROMTABLE[15])
  1221. #endif
  1222. #if defined(TARGET_IS_TM4C123_RA3) || \
  1223. defined(TARGET_IS_TM4C123_RB1) || \
  1224. defined(TARGET_IS_TM4C123_RB2) || \
  1225. defined(TARGET_IS_TM4C129_RA0) || \
  1226. defined(TARGET_IS_TM4C129_RA1) || \
  1227. defined(TARGET_IS_TM4C129_RA2)
  1228. #define ROM_EEPROMStatusGet \
  1229. ((uint32_t (*)(void))ROM_EEPROMTABLE[16])
  1230. #endif
  1231. #if defined(TARGET_IS_TM4C123_RA3) || \
  1232. defined(TARGET_IS_TM4C123_RB1) || \
  1233. defined(TARGET_IS_TM4C123_RB2) || \
  1234. defined(TARGET_IS_TM4C129_RA0) || \
  1235. defined(TARGET_IS_TM4C129_RA1) || \
  1236. defined(TARGET_IS_TM4C129_RA2)
  1237. #define ROM_EEPROMInit \
  1238. ((uint32_t (*)(void))ROM_EEPROMTABLE[17])
  1239. #endif
  1240. //*****************************************************************************
  1241. //
  1242. // Macros for calling ROM functions in the EPI API.
  1243. //
  1244. //*****************************************************************************
  1245. #if defined(TARGET_IS_TM4C129_RA0) || \
  1246. defined(TARGET_IS_TM4C129_RA1) || \
  1247. defined(TARGET_IS_TM4C129_RA2)
  1248. #define ROM_EPIIntStatus \
  1249. ((uint32_t (*)(uint32_t ui32Base, \
  1250. bool bMasked))ROM_EPITABLE[0])
  1251. #endif
  1252. #if defined(TARGET_IS_TM4C129_RA0) || \
  1253. defined(TARGET_IS_TM4C129_RA1) || \
  1254. defined(TARGET_IS_TM4C129_RA2)
  1255. #define ROM_EPIModeSet \
  1256. ((void (*)(uint32_t ui32Base, \
  1257. uint32_t ui32Mode))ROM_EPITABLE[1])
  1258. #endif
  1259. #if defined(TARGET_IS_TM4C129_RA0) || \
  1260. defined(TARGET_IS_TM4C129_RA1) || \
  1261. defined(TARGET_IS_TM4C129_RA2)
  1262. #define ROM_EPIDividerSet \
  1263. ((void (*)(uint32_t ui32Base, \
  1264. uint32_t ui32Divider))ROM_EPITABLE[2])
  1265. #endif
  1266. #if defined(TARGET_IS_TM4C129_RA0) || \
  1267. defined(TARGET_IS_TM4C129_RA1) || \
  1268. defined(TARGET_IS_TM4C129_RA2)
  1269. #define ROM_EPIConfigSDRAMSet \
  1270. ((void (*)(uint32_t ui32Base, \
  1271. uint32_t ui32Config, \
  1272. uint32_t ui32Refresh))ROM_EPITABLE[3])
  1273. #endif
  1274. #if defined(TARGET_IS_TM4C129_RA0) || \
  1275. defined(TARGET_IS_TM4C129_RA1) || \
  1276. defined(TARGET_IS_TM4C129_RA2)
  1277. #define ROM_EPIConfigGPModeSet \
  1278. ((void (*)(uint32_t ui32Base, \
  1279. uint32_t ui32Config, \
  1280. uint32_t ui32FrameCount, \
  1281. uint32_t ui32MaxWait))ROM_EPITABLE[4])
  1282. #endif
  1283. #if defined(TARGET_IS_TM4C129_RA0) || \
  1284. defined(TARGET_IS_TM4C129_RA1) || \
  1285. defined(TARGET_IS_TM4C129_RA2)
  1286. #define ROM_EPIConfigHB8Set \
  1287. ((void (*)(uint32_t ui32Base, \
  1288. uint32_t ui32Config, \
  1289. uint32_t ui32MaxWait))ROM_EPITABLE[5])
  1290. #endif
  1291. #if defined(TARGET_IS_TM4C129_RA0) || \
  1292. defined(TARGET_IS_TM4C129_RA1) || \
  1293. defined(TARGET_IS_TM4C129_RA2)
  1294. #define ROM_EPIConfigHB16Set \
  1295. ((void (*)(uint32_t ui32Base, \
  1296. uint32_t ui32Config, \
  1297. uint32_t ui32MaxWait))ROM_EPITABLE[6])
  1298. #endif
  1299. #if defined(TARGET_IS_TM4C129_RA0) || \
  1300. defined(TARGET_IS_TM4C129_RA1) || \
  1301. defined(TARGET_IS_TM4C129_RA2)
  1302. #define ROM_EPIAddressMapSet \
  1303. ((void (*)(uint32_t ui32Base, \
  1304. uint32_t ui32Map))ROM_EPITABLE[7])
  1305. #endif
  1306. #if defined(TARGET_IS_TM4C129_RA0) || \
  1307. defined(TARGET_IS_TM4C129_RA1) || \
  1308. defined(TARGET_IS_TM4C129_RA2)
  1309. #define ROM_EPINonBlockingReadConfigure \
  1310. ((void (*)(uint32_t ui32Base, \
  1311. uint32_t ui32Channel, \
  1312. uint32_t ui32DataSize, \
  1313. uint32_t ui32Address))ROM_EPITABLE[8])
  1314. #endif
  1315. #if defined(TARGET_IS_TM4C129_RA0) || \
  1316. defined(TARGET_IS_TM4C129_RA1) || \
  1317. defined(TARGET_IS_TM4C129_RA2)
  1318. #define ROM_EPINonBlockingReadStart \
  1319. ((void (*)(uint32_t ui32Base, \
  1320. uint32_t ui32Channel, \
  1321. uint32_t ui32Count))ROM_EPITABLE[9])
  1322. #endif
  1323. #if defined(TARGET_IS_TM4C129_RA0) || \
  1324. defined(TARGET_IS_TM4C129_RA1) || \
  1325. defined(TARGET_IS_TM4C129_RA2)
  1326. #define ROM_EPINonBlockingReadStop \
  1327. ((void (*)(uint32_t ui32Base, \
  1328. uint32_t ui32Channel))ROM_EPITABLE[10])
  1329. #endif
  1330. #if defined(TARGET_IS_TM4C129_RA0) || \
  1331. defined(TARGET_IS_TM4C129_RA1) || \
  1332. defined(TARGET_IS_TM4C129_RA2)
  1333. #define ROM_EPINonBlockingReadCount \
  1334. ((uint32_t (*)(uint32_t ui32Base, \
  1335. uint32_t ui32Channel))ROM_EPITABLE[11])
  1336. #endif
  1337. #if defined(TARGET_IS_TM4C129_RA0) || \
  1338. defined(TARGET_IS_TM4C129_RA1) || \
  1339. defined(TARGET_IS_TM4C129_RA2)
  1340. #define ROM_EPINonBlockingReadAvail \
  1341. ((uint32_t (*)(uint32_t ui32Base))ROM_EPITABLE[12])
  1342. #endif
  1343. #if defined(TARGET_IS_TM4C129_RA0) || \
  1344. defined(TARGET_IS_TM4C129_RA1) || \
  1345. defined(TARGET_IS_TM4C129_RA2)
  1346. #define ROM_EPINonBlockingReadGet32 \
  1347. ((uint32_t (*)(uint32_t ui32Base, \
  1348. uint32_t ui32Count, \
  1349. uint32_t *pui32Buf))ROM_EPITABLE[13])
  1350. #endif
  1351. #if defined(TARGET_IS_TM4C129_RA0) || \
  1352. defined(TARGET_IS_TM4C129_RA1) || \
  1353. defined(TARGET_IS_TM4C129_RA2)
  1354. #define ROM_EPINonBlockingReadGet16 \
  1355. ((uint32_t (*)(uint32_t ui32Base, \
  1356. uint32_t ui32Count, \
  1357. uint16_t *pui16Buf))ROM_EPITABLE[14])
  1358. #endif
  1359. #if defined(TARGET_IS_TM4C129_RA0) || \
  1360. defined(TARGET_IS_TM4C129_RA1) || \
  1361. defined(TARGET_IS_TM4C129_RA2)
  1362. #define ROM_EPINonBlockingReadGet8 \
  1363. ((uint32_t (*)(uint32_t ui32Base, \
  1364. uint32_t ui32Count, \
  1365. uint8_t *pui8Buf))ROM_EPITABLE[15])
  1366. #endif
  1367. #if defined(TARGET_IS_TM4C129_RA0) || \
  1368. defined(TARGET_IS_TM4C129_RA1) || \
  1369. defined(TARGET_IS_TM4C129_RA2)
  1370. #define ROM_EPIFIFOConfig \
  1371. ((void (*)(uint32_t ui32Base, \
  1372. uint32_t ui32Config))ROM_EPITABLE[16])
  1373. #endif
  1374. #if defined(TARGET_IS_TM4C129_RA0) || \
  1375. defined(TARGET_IS_TM4C129_RA1) || \
  1376. defined(TARGET_IS_TM4C129_RA2)
  1377. #define ROM_EPIWriteFIFOCountGet \
  1378. ((uint32_t (*)(uint32_t ui32Base))ROM_EPITABLE[17])
  1379. #endif
  1380. #if defined(TARGET_IS_TM4C129_RA0) || \
  1381. defined(TARGET_IS_TM4C129_RA1) || \
  1382. defined(TARGET_IS_TM4C129_RA2)
  1383. #define ROM_EPIIntEnable \
  1384. ((void (*)(uint32_t ui32Base, \
  1385. uint32_t ui32IntFlags))ROM_EPITABLE[18])
  1386. #endif
  1387. #if defined(TARGET_IS_TM4C129_RA0) || \
  1388. defined(TARGET_IS_TM4C129_RA1) || \
  1389. defined(TARGET_IS_TM4C129_RA2)
  1390. #define ROM_EPIIntDisable \
  1391. ((void (*)(uint32_t ui32Base, \
  1392. uint32_t ui32IntFlags))ROM_EPITABLE[19])
  1393. #endif
  1394. #if defined(TARGET_IS_TM4C129_RA0) || \
  1395. defined(TARGET_IS_TM4C129_RA1) || \
  1396. defined(TARGET_IS_TM4C129_RA2)
  1397. #define ROM_EPIIntErrorStatus \
  1398. ((uint32_t (*)(uint32_t ui32Base))ROM_EPITABLE[20])
  1399. #endif
  1400. #if defined(TARGET_IS_TM4C129_RA0) || \
  1401. defined(TARGET_IS_TM4C129_RA1) || \
  1402. defined(TARGET_IS_TM4C129_RA2)
  1403. #define ROM_EPIIntErrorClear \
  1404. ((void (*)(uint32_t ui32Base, \
  1405. uint32_t ui32ErrFlags))ROM_EPITABLE[21])
  1406. #endif
  1407. #if defined(TARGET_IS_TM4C129_RA0) || \
  1408. defined(TARGET_IS_TM4C129_RA1) || \
  1409. defined(TARGET_IS_TM4C129_RA2)
  1410. #define ROM_EPIDividerCSSet \
  1411. ((void (*)(uint32_t ui32Base, \
  1412. uint32_t ui32CS, \
  1413. uint32_t ui32Divider))ROM_EPITABLE[22])
  1414. #endif
  1415. #if defined(TARGET_IS_TM4C129_RA0) || \
  1416. defined(TARGET_IS_TM4C129_RA1) || \
  1417. defined(TARGET_IS_TM4C129_RA2)
  1418. #define ROM_EPIDMATxCount \
  1419. ((void (*)(uint32_t ui32Base, \
  1420. uint32_t ui32Count))ROM_EPITABLE[23])
  1421. #endif
  1422. #if defined(TARGET_IS_TM4C129_RA0) || \
  1423. defined(TARGET_IS_TM4C129_RA1) || \
  1424. defined(TARGET_IS_TM4C129_RA2)
  1425. #define ROM_EPIConfigHB8CSSet \
  1426. ((void (*)(uint32_t ui32Base, \
  1427. uint32_t ui32CS, \
  1428. uint32_t ui32Config))ROM_EPITABLE[24])
  1429. #endif
  1430. #if defined(TARGET_IS_TM4C129_RA0) || \
  1431. defined(TARGET_IS_TM4C129_RA1) || \
  1432. defined(TARGET_IS_TM4C129_RA2)
  1433. #define ROM_EPIConfigHB16CSSet \
  1434. ((void (*)(uint32_t ui32Base, \
  1435. uint32_t ui32CS, \
  1436. uint32_t ui32Config))ROM_EPITABLE[25])
  1437. #endif
  1438. #if defined(TARGET_IS_TM4C129_RA0) || \
  1439. defined(TARGET_IS_TM4C129_RA1) || \
  1440. defined(TARGET_IS_TM4C129_RA2)
  1441. #define ROM_EPIConfigHB8TimingSet \
  1442. ((void (*)(uint32_t ui32Base, \
  1443. uint32_t ui32CS, \
  1444. uint32_t ui32Config))ROM_EPITABLE[26])
  1445. #endif
  1446. #if defined(TARGET_IS_TM4C129_RA0) || \
  1447. defined(TARGET_IS_TM4C129_RA1) || \
  1448. defined(TARGET_IS_TM4C129_RA2)
  1449. #define ROM_EPIConfigHB16TimingSet \
  1450. ((void (*)(uint32_t ui32Base, \
  1451. uint32_t ui32CS, \
  1452. uint32_t ui32Config))ROM_EPITABLE[27])
  1453. #endif
  1454. #if defined(TARGET_IS_TM4C129_RA0) || \
  1455. defined(TARGET_IS_TM4C129_RA1) || \
  1456. defined(TARGET_IS_TM4C129_RA2)
  1457. #define ROM_EPIPSRAMConfigRegSet \
  1458. ((void (*)(uint32_t ui32Base, \
  1459. uint32_t ui32CS, \
  1460. uint32_t ui32CR))ROM_EPITABLE[28])
  1461. #endif
  1462. #if defined(TARGET_IS_TM4C129_RA0) || \
  1463. defined(TARGET_IS_TM4C129_RA1) || \
  1464. defined(TARGET_IS_TM4C129_RA2)
  1465. #define ROM_EPIPSRAMConfigRegRead \
  1466. ((void (*)(uint32_t ui32Base, \
  1467. uint32_t ui32CS))ROM_EPITABLE[29])
  1468. #endif
  1469. #if defined(TARGET_IS_TM4C129_RA0) || \
  1470. defined(TARGET_IS_TM4C129_RA1) || \
  1471. defined(TARGET_IS_TM4C129_RA2)
  1472. #define ROM_EPIPSRAMConfigRegGetNonBlocking \
  1473. ((bool (*)(uint32_t ui32Base, \
  1474. uint32_t ui32CS, \
  1475. uint32_t *pui32CR))ROM_EPITABLE[30])
  1476. #endif
  1477. #if defined(TARGET_IS_TM4C129_RA0) || \
  1478. defined(TARGET_IS_TM4C129_RA1) || \
  1479. defined(TARGET_IS_TM4C129_RA2)
  1480. #define ROM_EPIPSRAMConfigRegGet \
  1481. ((uint32_t (*)(uint32_t ui32Base, \
  1482. uint32_t ui32CS))ROM_EPITABLE[31])
  1483. #endif
  1484. //*****************************************************************************
  1485. //
  1486. // Macros for calling ROM functions in the EMAC API.
  1487. //
  1488. //*****************************************************************************
  1489. #if defined(TARGET_IS_TM4C129_RA0) || \
  1490. defined(TARGET_IS_TM4C129_RA1) || \
  1491. defined(TARGET_IS_TM4C129_RA2)
  1492. #define ROM_EMACIntStatus \
  1493. ((uint32_t (*)(uint32_t ui32Base, \
  1494. bool bMasked))ROM_EMACTABLE[0])
  1495. #endif
  1496. #if defined(TARGET_IS_TM4C129_RA0) || \
  1497. defined(TARGET_IS_TM4C129_RA1) || \
  1498. defined(TARGET_IS_TM4C129_RA2)
  1499. #define ROM_EMACAddrGet \
  1500. ((void (*)(uint32_t ui32Base, \
  1501. uint32_t ui32Index, \
  1502. uint8_t *pui8MACAddr))ROM_EMACTABLE[1])
  1503. #endif
  1504. #if defined(TARGET_IS_TM4C129_RA0) || \
  1505. defined(TARGET_IS_TM4C129_RA1) || \
  1506. defined(TARGET_IS_TM4C129_RA2)
  1507. #define ROM_EMACAddrSet \
  1508. ((void (*)(uint32_t ui32Base, \
  1509. uint32_t ui32Index, \
  1510. const uint8_t *pui8MACAddr))ROM_EMACTABLE[2])
  1511. #endif
  1512. #if defined(TARGET_IS_TM4C129_RA0) || \
  1513. defined(TARGET_IS_TM4C129_RA1) || \
  1514. defined(TARGET_IS_TM4C129_RA2)
  1515. #define ROM_EMACConfigGet \
  1516. ((void (*)(uint32_t ui32Base, \
  1517. uint32_t *pui32Config, \
  1518. uint32_t *pui32Mode, \
  1519. uint32_t *pui32RxMaxFrameSize))ROM_EMACTABLE[3])
  1520. #endif
  1521. #if defined(TARGET_IS_TM4C129_RA0) || \
  1522. defined(TARGET_IS_TM4C129_RA1) || \
  1523. defined(TARGET_IS_TM4C129_RA2)
  1524. #define ROM_EMACConfigSet \
  1525. ((void (*)(uint32_t ui32Base, \
  1526. uint32_t ui32Config, \
  1527. uint32_t ui32ModeFlags, \
  1528. uint32_t ui32RxMaxFrameSize))ROM_EMACTABLE[4])
  1529. #endif
  1530. #if defined(TARGET_IS_TM4C129_RA0) || \
  1531. defined(TARGET_IS_TM4C129_RA1) || \
  1532. defined(TARGET_IS_TM4C129_RA2)
  1533. #define ROM_EMACDMAStateGet \
  1534. ((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[5])
  1535. #endif
  1536. #if defined(TARGET_IS_TM4C129_RA0) || \
  1537. defined(TARGET_IS_TM4C129_RA1) || \
  1538. defined(TARGET_IS_TM4C129_RA2)
  1539. #define ROM_EMACFrameFilterGet \
  1540. ((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[6])
  1541. #endif
  1542. #if defined(TARGET_IS_TM4C129_RA0) || \
  1543. defined(TARGET_IS_TM4C129_RA1) || \
  1544. defined(TARGET_IS_TM4C129_RA2)
  1545. #define ROM_EMACFrameFilterSet \
  1546. ((void (*)(uint32_t ui32Base, \
  1547. uint32_t ui32FilterOpts))ROM_EMACTABLE[7])
  1548. #endif
  1549. #if defined(TARGET_IS_TM4C129_RA1) || \
  1550. defined(TARGET_IS_TM4C129_RA2)
  1551. #define ROM_EMACInit \
  1552. ((void (*)(uint32_t ui32Base, \
  1553. uint32_t ui32SysClk, \
  1554. uint32_t ui32BusConfig, \
  1555. uint32_t ui32RxBurst, \
  1556. uint32_t ui32TxBurst, \
  1557. uint32_t ui32DescSkipSize))ROM_EMACTABLE[8])
  1558. #endif
  1559. #if defined(TARGET_IS_TM4C129_RA0) || \
  1560. defined(TARGET_IS_TM4C129_RA1) || \
  1561. defined(TARGET_IS_TM4C129_RA2)
  1562. #define ROM_EMACIntClear \
  1563. ((void (*)(uint32_t ui32Base, \
  1564. uint32_t ui32IntFlags))ROM_EMACTABLE[9])
  1565. #endif
  1566. #if defined(TARGET_IS_TM4C129_RA0) || \
  1567. defined(TARGET_IS_TM4C129_RA1) || \
  1568. defined(TARGET_IS_TM4C129_RA2)
  1569. #define ROM_EMACIntDisable \
  1570. ((void (*)(uint32_t ui32Base, \
  1571. uint32_t ui32IntFlags))ROM_EMACTABLE[10])
  1572. #endif
  1573. #if defined(TARGET_IS_TM4C129_RA0) || \
  1574. defined(TARGET_IS_TM4C129_RA1) || \
  1575. defined(TARGET_IS_TM4C129_RA2)
  1576. #define ROM_EMACIntEnable \
  1577. ((void (*)(uint32_t ui32Base, \
  1578. uint32_t ui32IntFlags))ROM_EMACTABLE[11])
  1579. #endif
  1580. #if defined(TARGET_IS_TM4C129_RA1) || \
  1581. defined(TARGET_IS_TM4C129_RA2)
  1582. #define ROM_EMACPHYConfigSet \
  1583. ((void (*)(uint32_t ui32Base, \
  1584. uint32_t ui32Config))ROM_EMACTABLE[12])
  1585. #endif
  1586. #if defined(TARGET_IS_TM4C129_RA0) || \
  1587. defined(TARGET_IS_TM4C129_RA1) || \
  1588. defined(TARGET_IS_TM4C129_RA2)
  1589. #define ROM_EMACPHYPowerOff \
  1590. ((void (*)(uint32_t ui32Base, \
  1591. uint8_t ui8PhyAddr))ROM_EMACTABLE[13])
  1592. #endif
  1593. #if defined(TARGET_IS_TM4C129_RA0) || \
  1594. defined(TARGET_IS_TM4C129_RA1) || \
  1595. defined(TARGET_IS_TM4C129_RA2)
  1596. #define ROM_EMACPHYPowerOn \
  1597. ((void (*)(uint32_t ui32Base, \
  1598. uint8_t ui8PhyAddr))ROM_EMACTABLE[14])
  1599. #endif
  1600. #if defined(TARGET_IS_TM4C129_RA0) || \
  1601. defined(TARGET_IS_TM4C129_RA1) || \
  1602. defined(TARGET_IS_TM4C129_RA2)
  1603. #define ROM_EMACPHYRead \
  1604. ((uint16_t (*)(uint32_t ui32Base, \
  1605. uint8_t ui8PhyAddr, \
  1606. uint8_t ui8RegAddr))ROM_EMACTABLE[15])
  1607. #endif
  1608. #if defined(TARGET_IS_TM4C129_RA0) || \
  1609. defined(TARGET_IS_TM4C129_RA1) || \
  1610. defined(TARGET_IS_TM4C129_RA2)
  1611. #define ROM_EMACPHYWrite \
  1612. ((void (*)(uint32_t ui32Base, \
  1613. uint8_t ui8PhyAddr, \
  1614. uint8_t ui8RegAddr, \
  1615. uint16_t ui16Data))ROM_EMACTABLE[16])
  1616. #endif
  1617. #if defined(TARGET_IS_TM4C129_RA0) || \
  1618. defined(TARGET_IS_TM4C129_RA1) || \
  1619. defined(TARGET_IS_TM4C129_RA2)
  1620. #define ROM_EMACReset \
  1621. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[17])
  1622. #endif
  1623. #if defined(TARGET_IS_TM4C129_RA0) || \
  1624. defined(TARGET_IS_TM4C129_RA1) || \
  1625. defined(TARGET_IS_TM4C129_RA2)
  1626. #define ROM_EMACRxDisable \
  1627. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[18])
  1628. #endif
  1629. #if defined(TARGET_IS_TM4C129_RA0) || \
  1630. defined(TARGET_IS_TM4C129_RA1) || \
  1631. defined(TARGET_IS_TM4C129_RA2)
  1632. #define ROM_EMACRxDMACurrentBufferGet \
  1633. ((uint8_t * (*)(uint32_t ui32Base))ROM_EMACTABLE[19])
  1634. #endif
  1635. #if defined(TARGET_IS_TM4C129_RA0) || \
  1636. defined(TARGET_IS_TM4C129_RA1) || \
  1637. defined(TARGET_IS_TM4C129_RA2)
  1638. #define ROM_EMACRxDMACurrentDescriptorGet \
  1639. ((tEMACDMADescriptor * (*)(uint32_t ui32Base))ROM_EMACTABLE[20])
  1640. #endif
  1641. #if defined(TARGET_IS_TM4C129_RA0) || \
  1642. defined(TARGET_IS_TM4C129_RA1) || \
  1643. defined(TARGET_IS_TM4C129_RA2)
  1644. #define ROM_EMACRxDMADescriptorListGet \
  1645. ((tEMACDMADescriptor * (*)(uint32_t ui32Base))ROM_EMACTABLE[21])
  1646. #endif
  1647. #if defined(TARGET_IS_TM4C129_RA0) || \
  1648. defined(TARGET_IS_TM4C129_RA1) || \
  1649. defined(TARGET_IS_TM4C129_RA2)
  1650. #define ROM_EMACRxDMADescriptorListSet \
  1651. ((void (*)(uint32_t ui32Base, \
  1652. tEMACDMADescriptor *pDescriptor))ROM_EMACTABLE[22])
  1653. #endif
  1654. #if defined(TARGET_IS_TM4C129_RA0) || \
  1655. defined(TARGET_IS_TM4C129_RA1) || \
  1656. defined(TARGET_IS_TM4C129_RA2)
  1657. #define ROM_EMACRxDMAPollDemand \
  1658. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[23])
  1659. #endif
  1660. #if defined(TARGET_IS_TM4C129_RA0) || \
  1661. defined(TARGET_IS_TM4C129_RA1) || \
  1662. defined(TARGET_IS_TM4C129_RA2)
  1663. #define ROM_EMACRxEnable \
  1664. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[24])
  1665. #endif
  1666. #if defined(TARGET_IS_TM4C129_RA0) || \
  1667. defined(TARGET_IS_TM4C129_RA1) || \
  1668. defined(TARGET_IS_TM4C129_RA2)
  1669. #define ROM_EMACRxWatchdogTimerSet \
  1670. ((void (*)(uint32_t ui32Base, \
  1671. uint8_t ui8Timeout))ROM_EMACTABLE[25])
  1672. #endif
  1673. #if defined(TARGET_IS_TM4C129_RA0) || \
  1674. defined(TARGET_IS_TM4C129_RA1) || \
  1675. defined(TARGET_IS_TM4C129_RA2)
  1676. #define ROM_EMACStatusGet \
  1677. ((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[26])
  1678. #endif
  1679. #if defined(TARGET_IS_TM4C129_RA0) || \
  1680. defined(TARGET_IS_TM4C129_RA1) || \
  1681. defined(TARGET_IS_TM4C129_RA2)
  1682. #define ROM_EMACTxDisable \
  1683. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[27])
  1684. #endif
  1685. #if defined(TARGET_IS_TM4C129_RA0) || \
  1686. defined(TARGET_IS_TM4C129_RA1) || \
  1687. defined(TARGET_IS_TM4C129_RA2)
  1688. #define ROM_EMACTxDMACurrentBufferGet \
  1689. ((uint8_t * (*)(uint32_t ui32Base))ROM_EMACTABLE[28])
  1690. #endif
  1691. #if defined(TARGET_IS_TM4C129_RA0) || \
  1692. defined(TARGET_IS_TM4C129_RA1) || \
  1693. defined(TARGET_IS_TM4C129_RA2)
  1694. #define ROM_EMACTxDMACurrentDescriptorGet \
  1695. ((tEMACDMADescriptor * (*)(uint32_t ui32Base))ROM_EMACTABLE[29])
  1696. #endif
  1697. #if defined(TARGET_IS_TM4C129_RA0) || \
  1698. defined(TARGET_IS_TM4C129_RA1) || \
  1699. defined(TARGET_IS_TM4C129_RA2)
  1700. #define ROM_EMACTxDMADescriptorListGet \
  1701. ((tEMACDMADescriptor * (*)(uint32_t ui32Base))ROM_EMACTABLE[30])
  1702. #endif
  1703. #if defined(TARGET_IS_TM4C129_RA0) || \
  1704. defined(TARGET_IS_TM4C129_RA1) || \
  1705. defined(TARGET_IS_TM4C129_RA2)
  1706. #define ROM_EMACTxDMADescriptorListSet \
  1707. ((void (*)(uint32_t ui32Base, \
  1708. tEMACDMADescriptor *pDescriptor))ROM_EMACTABLE[31])
  1709. #endif
  1710. #if defined(TARGET_IS_TM4C129_RA0) || \
  1711. defined(TARGET_IS_TM4C129_RA1) || \
  1712. defined(TARGET_IS_TM4C129_RA2)
  1713. #define ROM_EMACTxDMAPollDemand \
  1714. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[32])
  1715. #endif
  1716. #if defined(TARGET_IS_TM4C129_RA0) || \
  1717. defined(TARGET_IS_TM4C129_RA1) || \
  1718. defined(TARGET_IS_TM4C129_RA2)
  1719. #define ROM_EMACTxEnable \
  1720. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[33])
  1721. #endif
  1722. #if defined(TARGET_IS_TM4C129_RA0) || \
  1723. defined(TARGET_IS_TM4C129_RA1) || \
  1724. defined(TARGET_IS_TM4C129_RA2)
  1725. #define ROM_EMACTxFlush \
  1726. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[34])
  1727. #endif
  1728. #if defined(TARGET_IS_TM4C129_RA1) || \
  1729. defined(TARGET_IS_TM4C129_RA2)
  1730. #define ROM_EMACAddrFilterGet \
  1731. ((uint32_t (*)(uint32_t ui32Base, \
  1732. uint32_t ui32Index))ROM_EMACTABLE[35])
  1733. #endif
  1734. #if defined(TARGET_IS_TM4C129_RA1) || \
  1735. defined(TARGET_IS_TM4C129_RA2)
  1736. #define ROM_EMACAddrFilterSet \
  1737. ((void (*)(uint32_t ui32Base, \
  1738. uint32_t ui32Index, \
  1739. uint32_t ui32Config))ROM_EMACTABLE[36])
  1740. #endif
  1741. #if defined(TARGET_IS_TM4C129_RA1) || \
  1742. defined(TARGET_IS_TM4C129_RA2)
  1743. #define ROM_EMACHashFilterBitCalculate \
  1744. ((uint32_t (*)(uint8_t *pui8MACAddr))ROM_EMACTABLE[37])
  1745. #endif
  1746. #if defined(TARGET_IS_TM4C129_RA1) || \
  1747. defined(TARGET_IS_TM4C129_RA2)
  1748. #define ROM_EMACHashFilterGet \
  1749. ((void (*)(uint32_t ui32Base, \
  1750. uint32_t *pui32HashHi, \
  1751. uint32_t *pui32HashLo))ROM_EMACTABLE[38])
  1752. #endif
  1753. #if defined(TARGET_IS_TM4C129_RA0) || \
  1754. defined(TARGET_IS_TM4C129_RA1) || \
  1755. defined(TARGET_IS_TM4C129_RA2)
  1756. #define ROM_EMACHashFilterSet \
  1757. ((void (*)(uint32_t ui32Base, \
  1758. uint32_t ui32HashHi, \
  1759. uint32_t ui32HashLo))ROM_EMACTABLE[39])
  1760. #endif
  1761. #if defined(TARGET_IS_TM4C129_RA1) || \
  1762. defined(TARGET_IS_TM4C129_RA2)
  1763. #define ROM_EMACNumAddrGet \
  1764. ((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[40])
  1765. #endif
  1766. #if defined(TARGET_IS_TM4C129_RA1) || \
  1767. defined(TARGET_IS_TM4C129_RA2)
  1768. #define ROM_EMACPHYExtendedRead \
  1769. ((uint16_t (*)(uint32_t ui32Base, \
  1770. uint8_t ui8PhyAddr, \
  1771. uint16_t ui16RegAddr))ROM_EMACTABLE[41])
  1772. #endif
  1773. #if defined(TARGET_IS_TM4C129_RA1) || \
  1774. defined(TARGET_IS_TM4C129_RA2)
  1775. #define ROM_EMACPHYExtendedWrite \
  1776. ((void (*)(uint32_t ui32Base, \
  1777. uint8_t ui8PhyAddr, \
  1778. uint16_t ui16RegAddr, \
  1779. uint16_t ui16Data))ROM_EMACTABLE[42])
  1780. #endif
  1781. #if defined(TARGET_IS_TM4C129_RA1) || \
  1782. defined(TARGET_IS_TM4C129_RA2)
  1783. #define ROM_EMACPowerManagementControlGet \
  1784. ((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[43])
  1785. #endif
  1786. #if defined(TARGET_IS_TM4C129_RA1) || \
  1787. defined(TARGET_IS_TM4C129_RA2)
  1788. #define ROM_EMACPowerManagementControlSet \
  1789. ((void (*)(uint32_t ui32Base, \
  1790. uint32_t ui32Flags))ROM_EMACTABLE[44])
  1791. #endif
  1792. #if defined(TARGET_IS_TM4C129_RA1) || \
  1793. defined(TARGET_IS_TM4C129_RA2)
  1794. #define ROM_EMACPowerManagementStatusGet \
  1795. ((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[45])
  1796. #endif
  1797. #if defined(TARGET_IS_TM4C129_RA1) || \
  1798. defined(TARGET_IS_TM4C129_RA2)
  1799. #define ROM_EMACRemoteWakeUpFrameFilterGet \
  1800. ((void (*)(uint32_t ui32Base, \
  1801. tEMACWakeUpFrameFilter *pFilter))ROM_EMACTABLE[46])
  1802. #endif
  1803. #if defined(TARGET_IS_TM4C129_RA1) || \
  1804. defined(TARGET_IS_TM4C129_RA2)
  1805. #define ROM_EMACRemoteWakeUpFrameFilterSet \
  1806. ((void (*)(uint32_t ui32Base, \
  1807. const tEMACWakeUpFrameFilter *pFilter))ROM_EMACTABLE[47])
  1808. #endif
  1809. #if defined(TARGET_IS_TM4C129_RA1) || \
  1810. defined(TARGET_IS_TM4C129_RA2)
  1811. #define ROM_EMACTimestampAddendSet \
  1812. ((void (*)(uint32_t ui32Base, \
  1813. uint32_t ui32Seconds))ROM_EMACTABLE[48])
  1814. #endif
  1815. #if defined(TARGET_IS_TM4C129_RA1) || \
  1816. defined(TARGET_IS_TM4C129_RA2)
  1817. #define ROM_EMACTimestampConfigGet \
  1818. ((uint32_t (*)(uint32_t ui32Base, \
  1819. uint32_t *pui32SubSecondInc))ROM_EMACTABLE[49])
  1820. #endif
  1821. #if defined(TARGET_IS_TM4C129_RA1) || \
  1822. defined(TARGET_IS_TM4C129_RA2)
  1823. #define ROM_EMACTimestampConfigSet \
  1824. ((void (*)(uint32_t ui32Base, \
  1825. uint32_t ui32Config, \
  1826. uint32_t ui32SubSecondInc))ROM_EMACTABLE[50])
  1827. #endif
  1828. #if defined(TARGET_IS_TM4C129_RA1) || \
  1829. defined(TARGET_IS_TM4C129_RA2)
  1830. #define ROM_EMACTimestampDisable \
  1831. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[51])
  1832. #endif
  1833. #if defined(TARGET_IS_TM4C129_RA1) || \
  1834. defined(TARGET_IS_TM4C129_RA2)
  1835. #define ROM_EMACTimestampEnable \
  1836. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[52])
  1837. #endif
  1838. #if defined(TARGET_IS_TM4C129_RA1) || \
  1839. defined(TARGET_IS_TM4C129_RA2)
  1840. #define ROM_EMACTimestampIntStatus \
  1841. ((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[53])
  1842. #endif
  1843. #if defined(TARGET_IS_TM4C129_RA1) || \
  1844. defined(TARGET_IS_TM4C129_RA2)
  1845. #define ROM_EMACTimestampPPSCommand \
  1846. ((void (*)(uint32_t ui32Base, \
  1847. uint8_t ui8Cmd))ROM_EMACTABLE[54])
  1848. #endif
  1849. #if defined(TARGET_IS_TM4C129_RA1) || \
  1850. defined(TARGET_IS_TM4C129_RA2)
  1851. #define ROM_EMACTimestampPPSCommandModeSet \
  1852. ((void (*)(uint32_t ui32Base, \
  1853. uint32_t ui32Config))ROM_EMACTABLE[55])
  1854. #endif
  1855. #if defined(TARGET_IS_TM4C129_RA1) || \
  1856. defined(TARGET_IS_TM4C129_RA2)
  1857. #define ROM_EMACTimestampPPSPeriodSet \
  1858. ((void (*)(uint32_t ui32Base, \
  1859. uint32_t ui32Period, \
  1860. uint32_t ui32Width))ROM_EMACTABLE[56])
  1861. #endif
  1862. #if defined(TARGET_IS_TM4C129_RA1) || \
  1863. defined(TARGET_IS_TM4C129_RA2)
  1864. #define ROM_EMACTimestampPPSSimpleModeSet \
  1865. ((void (*)(uint32_t ui32Base, \
  1866. uint32_t ui32FreqConfig))ROM_EMACTABLE[57])
  1867. #endif
  1868. #if defined(TARGET_IS_TM4C129_RA1) || \
  1869. defined(TARGET_IS_TM4C129_RA2)
  1870. #define ROM_EMACTimestampSysTimeGet \
  1871. ((void (*)(uint32_t ui32Base, \
  1872. uint32_t *pui32Seconds, \
  1873. uint32_t *pui32SubSeconds))ROM_EMACTABLE[58])
  1874. #endif
  1875. #if defined(TARGET_IS_TM4C129_RA1) || \
  1876. defined(TARGET_IS_TM4C129_RA2)
  1877. #define ROM_EMACTimestampSysTimeSet \
  1878. ((void (*)(uint32_t ui32Base, \
  1879. uint32_t ui32Seconds, \
  1880. uint32_t ui32SubSeconds))ROM_EMACTABLE[59])
  1881. #endif
  1882. #if defined(TARGET_IS_TM4C129_RA1) || \
  1883. defined(TARGET_IS_TM4C129_RA2)
  1884. #define ROM_EMACTimestampSysTimeUpdate \
  1885. ((void (*)(uint32_t ui32Base, \
  1886. uint32_t ui32Seconds, \
  1887. uint32_t ui32SubSeconds, \
  1888. bool bInc))ROM_EMACTABLE[60])
  1889. #endif
  1890. #if defined(TARGET_IS_TM4C129_RA1) || \
  1891. defined(TARGET_IS_TM4C129_RA2)
  1892. #define ROM_EMACTimestampTargetIntDisable \
  1893. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[61])
  1894. #endif
  1895. #if defined(TARGET_IS_TM4C129_RA1) || \
  1896. defined(TARGET_IS_TM4C129_RA2)
  1897. #define ROM_EMACTimestampTargetIntEnable \
  1898. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[62])
  1899. #endif
  1900. #if defined(TARGET_IS_TM4C129_RA1) || \
  1901. defined(TARGET_IS_TM4C129_RA2)
  1902. #define ROM_EMACTimestampTargetSet \
  1903. ((void (*)(uint32_t ui32Base, \
  1904. uint32_t ui32Seconds, \
  1905. uint32_t ui32Nanoseconds))ROM_EMACTABLE[63])
  1906. #endif
  1907. #if defined(TARGET_IS_TM4C129_RA1) || \
  1908. defined(TARGET_IS_TM4C129_RA2)
  1909. #define ROM_EMACVLANHashFilterBitCalculate \
  1910. ((uint32_t (*)(uint16_t ui16Tag))ROM_EMACTABLE[64])
  1911. #endif
  1912. #if defined(TARGET_IS_TM4C129_RA1) || \
  1913. defined(TARGET_IS_TM4C129_RA2)
  1914. #define ROM_EMACVLANHashFilterGet \
  1915. ((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[65])
  1916. #endif
  1917. #if defined(TARGET_IS_TM4C129_RA1) || \
  1918. defined(TARGET_IS_TM4C129_RA2)
  1919. #define ROM_EMACVLANHashFilterSet \
  1920. ((void (*)(uint32_t ui32Base, \
  1921. uint32_t ui32Hash))ROM_EMACTABLE[66])
  1922. #endif
  1923. #if defined(TARGET_IS_TM4C129_RA1) || \
  1924. defined(TARGET_IS_TM4C129_RA2)
  1925. #define ROM_EMACVLANRxConfigGet \
  1926. ((uint32_t (*)(uint32_t ui32Base, \
  1927. uint16_t *pui16Tag))ROM_EMACTABLE[67])
  1928. #endif
  1929. #if defined(TARGET_IS_TM4C129_RA1) || \
  1930. defined(TARGET_IS_TM4C129_RA2)
  1931. #define ROM_EMACVLANRxConfigSet \
  1932. ((void (*)(uint32_t ui32Base, \
  1933. uint16_t ui16Tag, \
  1934. uint32_t ui32Config))ROM_EMACTABLE[68])
  1935. #endif
  1936. #if defined(TARGET_IS_TM4C129_RA1) || \
  1937. defined(TARGET_IS_TM4C129_RA2)
  1938. #define ROM_EMACVLANTxConfigGet \
  1939. ((uint32_t (*)(uint32_t ui32Base, \
  1940. uint16_t *pui16Tag))ROM_EMACTABLE[69])
  1941. #endif
  1942. #if defined(TARGET_IS_TM4C129_RA1) || \
  1943. defined(TARGET_IS_TM4C129_RA2)
  1944. #define ROM_EMACVLANTxConfigSet \
  1945. ((void (*)(uint32_t ui32Base, \
  1946. uint16_t ui16Tag, \
  1947. uint32_t ui32Config))ROM_EMACTABLE[70])
  1948. #endif
  1949. #if defined(TARGET_IS_TM4C129_RA1) || \
  1950. defined(TARGET_IS_TM4C129_RA2)
  1951. #define ROM_UpdateEMAC \
  1952. ((void (*)(uint32_t ui32Clock))ROM_EMACTABLE[71])
  1953. #endif
  1954. //*****************************************************************************
  1955. //
  1956. // Macros for calling ROM functions in the Flash API.
  1957. //
  1958. //*****************************************************************************
  1959. #if defined(TARGET_IS_TM4C123_RA1) || \
  1960. defined(TARGET_IS_TM4C123_RA3) || \
  1961. defined(TARGET_IS_TM4C123_RB1) || \
  1962. defined(TARGET_IS_TM4C123_RB2) || \
  1963. defined(TARGET_IS_TM4C129_RA0) || \
  1964. defined(TARGET_IS_TM4C129_RA1) || \
  1965. defined(TARGET_IS_TM4C129_RA2)
  1966. #define ROM_FlashProgram \
  1967. ((int32_t (*)(uint32_t *pui32Data, \
  1968. uint32_t ui32Address, \
  1969. uint32_t ui32Count))ROM_FLASHTABLE[0])
  1970. #endif
  1971. #if defined(TARGET_IS_TM4C123_RA1) || \
  1972. defined(TARGET_IS_TM4C123_RA3) || \
  1973. defined(TARGET_IS_TM4C123_RB1) || \
  1974. defined(TARGET_IS_TM4C123_RB2) || \
  1975. defined(TARGET_IS_TM4C129_RA0) || \
  1976. defined(TARGET_IS_TM4C129_RA1) || \
  1977. defined(TARGET_IS_TM4C129_RA2)
  1978. #define ROM_FlashErase \
  1979. ((int32_t (*)(uint32_t ui32Address))ROM_FLASHTABLE[3])
  1980. #endif
  1981. #if defined(TARGET_IS_TM4C123_RA1) || \
  1982. defined(TARGET_IS_TM4C123_RA3) || \
  1983. defined(TARGET_IS_TM4C123_RB1) || \
  1984. defined(TARGET_IS_TM4C123_RB2) || \
  1985. defined(TARGET_IS_TM4C129_RA0) || \
  1986. defined(TARGET_IS_TM4C129_RA1) || \
  1987. defined(TARGET_IS_TM4C129_RA2)
  1988. #define ROM_FlashProtectGet \
  1989. ((tFlashProtection (*)(uint32_t ui32Address))ROM_FLASHTABLE[4])
  1990. #endif
  1991. #if defined(TARGET_IS_TM4C123_RA1) || \
  1992. defined(TARGET_IS_TM4C123_RA3) || \
  1993. defined(TARGET_IS_TM4C123_RB1) || \
  1994. defined(TARGET_IS_TM4C123_RB2) || \
  1995. defined(TARGET_IS_TM4C129_RA0) || \
  1996. defined(TARGET_IS_TM4C129_RA1) || \
  1997. defined(TARGET_IS_TM4C129_RA2)
  1998. #define ROM_FlashProtectSet \
  1999. ((int32_t (*)(uint32_t ui32Address, \
  2000. tFlashProtection eProtect))ROM_FLASHTABLE[5])
  2001. #endif
  2002. #if defined(TARGET_IS_TM4C123_RA1) || \
  2003. defined(TARGET_IS_TM4C123_RA3) || \
  2004. defined(TARGET_IS_TM4C123_RB1) || \
  2005. defined(TARGET_IS_TM4C123_RB2) || \
  2006. defined(TARGET_IS_TM4C129_RA0) || \
  2007. defined(TARGET_IS_TM4C129_RA1) || \
  2008. defined(TARGET_IS_TM4C129_RA2)
  2009. #define ROM_FlashProtectSave \
  2010. ((int32_t (*)(void))ROM_FLASHTABLE[6])
  2011. #endif
  2012. #if defined(TARGET_IS_TM4C123_RA1) || \
  2013. defined(TARGET_IS_TM4C123_RA3) || \
  2014. defined(TARGET_IS_TM4C123_RB1) || \
  2015. defined(TARGET_IS_TM4C123_RB2) || \
  2016. defined(TARGET_IS_TM4C129_RA0) || \
  2017. defined(TARGET_IS_TM4C129_RA1) || \
  2018. defined(TARGET_IS_TM4C129_RA2)
  2019. #define ROM_FlashUserGet \
  2020. ((int32_t (*)(uint32_t *pui32User0, \
  2021. uint32_t *pui32User1))ROM_FLASHTABLE[7])
  2022. #endif
  2023. #if defined(TARGET_IS_TM4C123_RA1) || \
  2024. defined(TARGET_IS_TM4C123_RA3) || \
  2025. defined(TARGET_IS_TM4C123_RB1) || \
  2026. defined(TARGET_IS_TM4C123_RB2) || \
  2027. defined(TARGET_IS_TM4C129_RA0) || \
  2028. defined(TARGET_IS_TM4C129_RA1) || \
  2029. defined(TARGET_IS_TM4C129_RA2)
  2030. #define ROM_FlashUserSet \
  2031. ((int32_t (*)(uint32_t ui32User0, \
  2032. uint32_t ui32User1))ROM_FLASHTABLE[8])
  2033. #endif
  2034. #if defined(TARGET_IS_TM4C123_RA1) || \
  2035. defined(TARGET_IS_TM4C123_RA3) || \
  2036. defined(TARGET_IS_TM4C123_RB1) || \
  2037. defined(TARGET_IS_TM4C123_RB2) || \
  2038. defined(TARGET_IS_TM4C129_RA0) || \
  2039. defined(TARGET_IS_TM4C129_RA1) || \
  2040. defined(TARGET_IS_TM4C129_RA2)
  2041. #define ROM_FlashUserSave \
  2042. ((int32_t (*)(void))ROM_FLASHTABLE[9])
  2043. #endif
  2044. #if defined(TARGET_IS_TM4C123_RA1) || \
  2045. defined(TARGET_IS_TM4C123_RA3) || \
  2046. defined(TARGET_IS_TM4C123_RB1) || \
  2047. defined(TARGET_IS_TM4C123_RB2) || \
  2048. defined(TARGET_IS_TM4C129_RA0) || \
  2049. defined(TARGET_IS_TM4C129_RA1) || \
  2050. defined(TARGET_IS_TM4C129_RA2)
  2051. #define ROM_FlashIntEnable \
  2052. ((void (*)(uint32_t ui32IntFlags))ROM_FLASHTABLE[10])
  2053. #endif
  2054. #if defined(TARGET_IS_TM4C123_RA1) || \
  2055. defined(TARGET_IS_TM4C123_RA3) || \
  2056. defined(TARGET_IS_TM4C123_RB1) || \
  2057. defined(TARGET_IS_TM4C123_RB2) || \
  2058. defined(TARGET_IS_TM4C129_RA0) || \
  2059. defined(TARGET_IS_TM4C129_RA1) || \
  2060. defined(TARGET_IS_TM4C129_RA2)
  2061. #define ROM_FlashIntDisable \
  2062. ((void (*)(uint32_t ui32IntFlags))ROM_FLASHTABLE[11])
  2063. #endif
  2064. #if defined(TARGET_IS_TM4C123_RA1) || \
  2065. defined(TARGET_IS_TM4C123_RA3) || \
  2066. defined(TARGET_IS_TM4C123_RB1) || \
  2067. defined(TARGET_IS_TM4C123_RB2) || \
  2068. defined(TARGET_IS_TM4C129_RA0) || \
  2069. defined(TARGET_IS_TM4C129_RA1) || \
  2070. defined(TARGET_IS_TM4C129_RA2)
  2071. #define ROM_FlashIntStatus \
  2072. ((uint32_t (*)(bool bMasked))ROM_FLASHTABLE[12])
  2073. #endif
  2074. #if defined(TARGET_IS_TM4C123_RA1) || \
  2075. defined(TARGET_IS_TM4C123_RA3) || \
  2076. defined(TARGET_IS_TM4C123_RB1) || \
  2077. defined(TARGET_IS_TM4C123_RB2) || \
  2078. defined(TARGET_IS_TM4C129_RA0) || \
  2079. defined(TARGET_IS_TM4C129_RA1) || \
  2080. defined(TARGET_IS_TM4C129_RA2)
  2081. #define ROM_FlashIntClear \
  2082. ((void (*)(uint32_t ui32IntFlags))ROM_FLASHTABLE[13])
  2083. #endif
  2084. //*****************************************************************************
  2085. //
  2086. // Macros for calling ROM functions in the FPU API.
  2087. //
  2088. //*****************************************************************************
  2089. #if defined(TARGET_IS_TM4C123_RA1) || \
  2090. defined(TARGET_IS_TM4C123_RA3) || \
  2091. defined(TARGET_IS_TM4C123_RB1) || \
  2092. defined(TARGET_IS_TM4C123_RB2) || \
  2093. defined(TARGET_IS_TM4C129_RA0) || \
  2094. defined(TARGET_IS_TM4C129_RA1) || \
  2095. defined(TARGET_IS_TM4C129_RA2)
  2096. #define ROM_FPUEnable \
  2097. ((void (*)(void))ROM_FPUTABLE[0])
  2098. #endif
  2099. #if defined(TARGET_IS_TM4C123_RA1) || \
  2100. defined(TARGET_IS_TM4C123_RA3) || \
  2101. defined(TARGET_IS_TM4C123_RB1) || \
  2102. defined(TARGET_IS_TM4C123_RB2) || \
  2103. defined(TARGET_IS_TM4C129_RA0) || \
  2104. defined(TARGET_IS_TM4C129_RA1) || \
  2105. defined(TARGET_IS_TM4C129_RA2)
  2106. #define ROM_FPUDisable \
  2107. ((void (*)(void))ROM_FPUTABLE[1])
  2108. #endif
  2109. #if defined(TARGET_IS_TM4C123_RA1) || \
  2110. defined(TARGET_IS_TM4C123_RA3) || \
  2111. defined(TARGET_IS_TM4C123_RB1) || \
  2112. defined(TARGET_IS_TM4C123_RB2) || \
  2113. defined(TARGET_IS_TM4C129_RA0) || \
  2114. defined(TARGET_IS_TM4C129_RA1) || \
  2115. defined(TARGET_IS_TM4C129_RA2)
  2116. #define ROM_FPUFlushToZeroModeSet \
  2117. ((void (*)(uint32_t ui32Mode))ROM_FPUTABLE[2])
  2118. #endif
  2119. #if defined(TARGET_IS_TM4C123_RA1) || \
  2120. defined(TARGET_IS_TM4C123_RA3) || \
  2121. defined(TARGET_IS_TM4C123_RB1) || \
  2122. defined(TARGET_IS_TM4C123_RB2) || \
  2123. defined(TARGET_IS_TM4C129_RA0) || \
  2124. defined(TARGET_IS_TM4C129_RA1) || \
  2125. defined(TARGET_IS_TM4C129_RA2)
  2126. #define ROM_FPUHalfPrecisionModeSet \
  2127. ((void (*)(uint32_t ui32Mode))ROM_FPUTABLE[3])
  2128. #endif
  2129. #if defined(TARGET_IS_TM4C123_RA1) || \
  2130. defined(TARGET_IS_TM4C123_RA3) || \
  2131. defined(TARGET_IS_TM4C123_RB1) || \
  2132. defined(TARGET_IS_TM4C123_RB2) || \
  2133. defined(TARGET_IS_TM4C129_RA0) || \
  2134. defined(TARGET_IS_TM4C129_RA1) || \
  2135. defined(TARGET_IS_TM4C129_RA2)
  2136. #define ROM_FPULazyStackingEnable \
  2137. ((void (*)(void))ROM_FPUTABLE[4])
  2138. #endif
  2139. #if defined(TARGET_IS_TM4C123_RA1) || \
  2140. defined(TARGET_IS_TM4C123_RA3) || \
  2141. defined(TARGET_IS_TM4C123_RB1) || \
  2142. defined(TARGET_IS_TM4C123_RB2) || \
  2143. defined(TARGET_IS_TM4C129_RA0) || \
  2144. defined(TARGET_IS_TM4C129_RA1) || \
  2145. defined(TARGET_IS_TM4C129_RA2)
  2146. #define ROM_FPUNaNModeSet \
  2147. ((void (*)(uint32_t ui32Mode))ROM_FPUTABLE[5])
  2148. #endif
  2149. #if defined(TARGET_IS_TM4C123_RA1) || \
  2150. defined(TARGET_IS_TM4C123_RA3) || \
  2151. defined(TARGET_IS_TM4C123_RB1) || \
  2152. defined(TARGET_IS_TM4C123_RB2) || \
  2153. defined(TARGET_IS_TM4C129_RA0) || \
  2154. defined(TARGET_IS_TM4C129_RA1) || \
  2155. defined(TARGET_IS_TM4C129_RA2)
  2156. #define ROM_FPURoundingModeSet \
  2157. ((void (*)(uint32_t ui32Mode))ROM_FPUTABLE[6])
  2158. #endif
  2159. #if defined(TARGET_IS_TM4C123_RA1) || \
  2160. defined(TARGET_IS_TM4C123_RA3) || \
  2161. defined(TARGET_IS_TM4C123_RB1) || \
  2162. defined(TARGET_IS_TM4C123_RB2) || \
  2163. defined(TARGET_IS_TM4C129_RA0) || \
  2164. defined(TARGET_IS_TM4C129_RA1) || \
  2165. defined(TARGET_IS_TM4C129_RA2)
  2166. #define ROM_FPUStackingDisable \
  2167. ((void (*)(void))ROM_FPUTABLE[7])
  2168. #endif
  2169. #if defined(TARGET_IS_TM4C123_RA1) || \
  2170. defined(TARGET_IS_TM4C123_RA3) || \
  2171. defined(TARGET_IS_TM4C123_RB1) || \
  2172. defined(TARGET_IS_TM4C123_RB2) || \
  2173. defined(TARGET_IS_TM4C129_RA0) || \
  2174. defined(TARGET_IS_TM4C129_RA1) || \
  2175. defined(TARGET_IS_TM4C129_RA2)
  2176. #define ROM_FPUStackingEnable \
  2177. ((void (*)(void))ROM_FPUTABLE[8])
  2178. #endif
  2179. //*****************************************************************************
  2180. //
  2181. // Macros for calling ROM functions in the GPIO API.
  2182. //
  2183. //*****************************************************************************
  2184. #if defined(TARGET_IS_TM4C123_RA1) || \
  2185. defined(TARGET_IS_TM4C123_RA3) || \
  2186. defined(TARGET_IS_TM4C123_RB1) || \
  2187. defined(TARGET_IS_TM4C123_RB2) || \
  2188. defined(TARGET_IS_TM4C129_RA0) || \
  2189. defined(TARGET_IS_TM4C129_RA1) || \
  2190. defined(TARGET_IS_TM4C129_RA2)
  2191. #define ROM_GPIOPinWrite \
  2192. ((void (*)(uint32_t ui32Port, \
  2193. uint8_t ui8Pins, \
  2194. uint8_t ui8Val))ROM_GPIOTABLE[0])
  2195. #endif
  2196. #if defined(TARGET_IS_TM4C123_RA1) || \
  2197. defined(TARGET_IS_TM4C123_RA3) || \
  2198. defined(TARGET_IS_TM4C123_RB1) || \
  2199. defined(TARGET_IS_TM4C123_RB2) || \
  2200. defined(TARGET_IS_TM4C129_RA0) || \
  2201. defined(TARGET_IS_TM4C129_RA1) || \
  2202. defined(TARGET_IS_TM4C129_RA2)
  2203. #define ROM_GPIODirModeSet \
  2204. ((void (*)(uint32_t ui32Port, \
  2205. uint8_t ui8Pins, \
  2206. uint32_t ui32PinIO))ROM_GPIOTABLE[1])
  2207. #endif
  2208. #if defined(TARGET_IS_TM4C123_RA1) || \
  2209. defined(TARGET_IS_TM4C123_RA3) || \
  2210. defined(TARGET_IS_TM4C123_RB1) || \
  2211. defined(TARGET_IS_TM4C123_RB2) || \
  2212. defined(TARGET_IS_TM4C129_RA0) || \
  2213. defined(TARGET_IS_TM4C129_RA1) || \
  2214. defined(TARGET_IS_TM4C129_RA2)
  2215. #define ROM_GPIODirModeGet \
  2216. ((uint32_t (*)(uint32_t ui32Port, \
  2217. uint8_t ui8Pin))ROM_GPIOTABLE[2])
  2218. #endif
  2219. #if defined(TARGET_IS_TM4C123_RA1) || \
  2220. defined(TARGET_IS_TM4C123_RA3) || \
  2221. defined(TARGET_IS_TM4C123_RB1) || \
  2222. defined(TARGET_IS_TM4C123_RB2) || \
  2223. defined(TARGET_IS_TM4C129_RA0) || \
  2224. defined(TARGET_IS_TM4C129_RA1) || \
  2225. defined(TARGET_IS_TM4C129_RA2)
  2226. #define ROM_GPIOIntTypeSet \
  2227. ((void (*)(uint32_t ui32Port, \
  2228. uint8_t ui8Pins, \
  2229. uint32_t ui32IntType))ROM_GPIOTABLE[3])
  2230. #endif
  2231. #if defined(TARGET_IS_TM4C123_RA1) || \
  2232. defined(TARGET_IS_TM4C123_RA3) || \
  2233. defined(TARGET_IS_TM4C123_RB1) || \
  2234. defined(TARGET_IS_TM4C123_RB2) || \
  2235. defined(TARGET_IS_TM4C129_RA0) || \
  2236. defined(TARGET_IS_TM4C129_RA1) || \
  2237. defined(TARGET_IS_TM4C129_RA2)
  2238. #define ROM_GPIOIntTypeGet \
  2239. ((uint32_t (*)(uint32_t ui32Port, \
  2240. uint8_t ui8Pin))ROM_GPIOTABLE[4])
  2241. #endif
  2242. #if defined(TARGET_IS_TM4C123_RA1) || \
  2243. defined(TARGET_IS_TM4C123_RA3) || \
  2244. defined(TARGET_IS_TM4C123_RB1) || \
  2245. defined(TARGET_IS_TM4C123_RB2)
  2246. #define ROM_GPIOPadConfigSet \
  2247. ((void (*)(uint32_t ui32Port, \
  2248. uint8_t ui8Pins, \
  2249. uint32_t ui32Strength, \
  2250. uint32_t ui32PadType))ROM_GPIOTABLE[5])
  2251. #endif
  2252. #if defined(TARGET_IS_TM4C123_RA1) || \
  2253. defined(TARGET_IS_TM4C123_RA3) || \
  2254. defined(TARGET_IS_TM4C123_RB1) || \
  2255. defined(TARGET_IS_TM4C123_RB2) || \
  2256. defined(TARGET_IS_TM4C129_RA0) || \
  2257. defined(TARGET_IS_TM4C129_RA1) || \
  2258. defined(TARGET_IS_TM4C129_RA2)
  2259. #define ROM_GPIOPadConfigGet \
  2260. ((void (*)(uint32_t ui32Port, \
  2261. uint8_t ui8Pin, \
  2262. uint32_t *pui32Strength, \
  2263. uint32_t *pui32PadType))ROM_GPIOTABLE[6])
  2264. #endif
  2265. #if defined(TARGET_IS_TM4C123_RA1) || \
  2266. defined(TARGET_IS_TM4C123_RA3) || \
  2267. defined(TARGET_IS_TM4C123_RB1) || \
  2268. defined(TARGET_IS_TM4C123_RB2) || \
  2269. defined(TARGET_IS_TM4C129_RA0) || \
  2270. defined(TARGET_IS_TM4C129_RA1) || \
  2271. defined(TARGET_IS_TM4C129_RA2)
  2272. #define ROM_GPIOPinRead \
  2273. ((int32_t (*)(uint32_t ui32Port, \
  2274. uint8_t ui8Pins))ROM_GPIOTABLE[11])
  2275. #endif
  2276. #if defined(TARGET_IS_TM4C123_RA1) || \
  2277. defined(TARGET_IS_TM4C123_RA3) || \
  2278. defined(TARGET_IS_TM4C123_RB1) || \
  2279. defined(TARGET_IS_TM4C123_RB2)
  2280. #define ROM_GPIOPinTypeCAN \
  2281. ((void (*)(uint32_t ui32Port, \
  2282. uint8_t ui8Pins))ROM_GPIOTABLE[12])
  2283. #endif
  2284. #if defined(TARGET_IS_TM4C123_RA1) || \
  2285. defined(TARGET_IS_TM4C123_RA3) || \
  2286. defined(TARGET_IS_TM4C123_RB1) || \
  2287. defined(TARGET_IS_TM4C123_RB2) || \
  2288. defined(TARGET_IS_TM4C129_RA0) || \
  2289. defined(TARGET_IS_TM4C129_RA1) || \
  2290. defined(TARGET_IS_TM4C129_RA2)
  2291. #define ROM_GPIOPinTypeComparator \
  2292. ((void (*)(uint32_t ui32Port, \
  2293. uint8_t ui8Pins))ROM_GPIOTABLE[13])
  2294. #endif
  2295. #if defined(TARGET_IS_TM4C123_RA1) || \
  2296. defined(TARGET_IS_TM4C123_RA3) || \
  2297. defined(TARGET_IS_TM4C123_RB1) || \
  2298. defined(TARGET_IS_TM4C123_RB2) || \
  2299. defined(TARGET_IS_TM4C129_RA0) || \
  2300. defined(TARGET_IS_TM4C129_RA1) || \
  2301. defined(TARGET_IS_TM4C129_RA2)
  2302. #define ROM_GPIOPinTypeGPIOInput \
  2303. ((void (*)(uint32_t ui32Port, \
  2304. uint8_t ui8Pins))ROM_GPIOTABLE[14])
  2305. #endif
  2306. #if defined(TARGET_IS_TM4C123_RA1) || \
  2307. defined(TARGET_IS_TM4C123_RA3) || \
  2308. defined(TARGET_IS_TM4C123_RB1) || \
  2309. defined(TARGET_IS_TM4C123_RB2) || \
  2310. defined(TARGET_IS_TM4C129_RA0) || \
  2311. defined(TARGET_IS_TM4C129_RA1) || \
  2312. defined(TARGET_IS_TM4C129_RA2)
  2313. #define ROM_GPIOPinTypeGPIOOutput \
  2314. ((void (*)(uint32_t ui32Port, \
  2315. uint8_t ui8Pins))ROM_GPIOTABLE[15])
  2316. #endif
  2317. #if defined(TARGET_IS_TM4C123_RA1) || \
  2318. defined(TARGET_IS_TM4C123_RA3) || \
  2319. defined(TARGET_IS_TM4C123_RB1) || \
  2320. defined(TARGET_IS_TM4C123_RB2) || \
  2321. defined(TARGET_IS_TM4C129_RA0) || \
  2322. defined(TARGET_IS_TM4C129_RA1) || \
  2323. defined(TARGET_IS_TM4C129_RA2)
  2324. #define ROM_GPIOPinTypeI2C \
  2325. ((void (*)(uint32_t ui32Port, \
  2326. uint8_t ui8Pins))ROM_GPIOTABLE[16])
  2327. #endif
  2328. #if defined(TARGET_IS_TM4C123_RA1) || \
  2329. defined(TARGET_IS_TM4C123_RA3) || \
  2330. defined(TARGET_IS_TM4C123_RB1) || \
  2331. defined(TARGET_IS_TM4C123_RB2) || \
  2332. defined(TARGET_IS_TM4C129_RA0) || \
  2333. defined(TARGET_IS_TM4C129_RA1) || \
  2334. defined(TARGET_IS_TM4C129_RA2)
  2335. #define ROM_GPIOPinTypePWM \
  2336. ((void (*)(uint32_t ui32Port, \
  2337. uint8_t ui8Pins))ROM_GPIOTABLE[17])
  2338. #endif
  2339. #if defined(TARGET_IS_TM4C123_RA1) || \
  2340. defined(TARGET_IS_TM4C123_RA3) || \
  2341. defined(TARGET_IS_TM4C123_RB1) || \
  2342. defined(TARGET_IS_TM4C123_RB2) || \
  2343. defined(TARGET_IS_TM4C129_RA0) || \
  2344. defined(TARGET_IS_TM4C129_RA1) || \
  2345. defined(TARGET_IS_TM4C129_RA2)
  2346. #define ROM_GPIOPinTypeQEI \
  2347. ((void (*)(uint32_t ui32Port, \
  2348. uint8_t ui8Pins))ROM_GPIOTABLE[18])
  2349. #endif
  2350. #if defined(TARGET_IS_TM4C123_RA1) || \
  2351. defined(TARGET_IS_TM4C123_RA3) || \
  2352. defined(TARGET_IS_TM4C123_RB1) || \
  2353. defined(TARGET_IS_TM4C123_RB2) || \
  2354. defined(TARGET_IS_TM4C129_RA0) || \
  2355. defined(TARGET_IS_TM4C129_RA1) || \
  2356. defined(TARGET_IS_TM4C129_RA2)
  2357. #define ROM_GPIOPinTypeSSI \
  2358. ((void (*)(uint32_t ui32Port, \
  2359. uint8_t ui8Pins))ROM_GPIOTABLE[19])
  2360. #endif
  2361. #if defined(TARGET_IS_TM4C123_RA1) || \
  2362. defined(TARGET_IS_TM4C123_RA3) || \
  2363. defined(TARGET_IS_TM4C123_RB1) || \
  2364. defined(TARGET_IS_TM4C123_RB2) || \
  2365. defined(TARGET_IS_TM4C129_RA0) || \
  2366. defined(TARGET_IS_TM4C129_RA1) || \
  2367. defined(TARGET_IS_TM4C129_RA2)
  2368. #define ROM_GPIOPinTypeTimer \
  2369. ((void (*)(uint32_t ui32Port, \
  2370. uint8_t ui8Pins))ROM_GPIOTABLE[20])
  2371. #endif
  2372. #if defined(TARGET_IS_TM4C123_RA1) || \
  2373. defined(TARGET_IS_TM4C123_RA3) || \
  2374. defined(TARGET_IS_TM4C123_RB1) || \
  2375. defined(TARGET_IS_TM4C123_RB2) || \
  2376. defined(TARGET_IS_TM4C129_RA0) || \
  2377. defined(TARGET_IS_TM4C129_RA1) || \
  2378. defined(TARGET_IS_TM4C129_RA2)
  2379. #define ROM_GPIOPinTypeUART \
  2380. ((void (*)(uint32_t ui32Port, \
  2381. uint8_t ui8Pins))ROM_GPIOTABLE[21])
  2382. #endif
  2383. #if defined(TARGET_IS_TM4C123_RA1) || \
  2384. defined(TARGET_IS_TM4C123_RA3) || \
  2385. defined(TARGET_IS_TM4C123_RB1) || \
  2386. defined(TARGET_IS_TM4C123_RB2) || \
  2387. defined(TARGET_IS_TM4C129_RA0) || \
  2388. defined(TARGET_IS_TM4C129_RA1) || \
  2389. defined(TARGET_IS_TM4C129_RA2)
  2390. #define ROM_GPIOPinTypeGPIOOutputOD \
  2391. ((void (*)(uint32_t ui32Port, \
  2392. uint8_t ui8Pins))ROM_GPIOTABLE[22])
  2393. #endif
  2394. #if defined(TARGET_IS_TM4C123_RA1) || \
  2395. defined(TARGET_IS_TM4C123_RA3) || \
  2396. defined(TARGET_IS_TM4C123_RB1) || \
  2397. defined(TARGET_IS_TM4C123_RB2) || \
  2398. defined(TARGET_IS_TM4C129_RA0) || \
  2399. defined(TARGET_IS_TM4C129_RA1) || \
  2400. defined(TARGET_IS_TM4C129_RA2)
  2401. #define ROM_GPIOPinTypeADC \
  2402. ((void (*)(uint32_t ui32Port, \
  2403. uint8_t ui8Pins))ROM_GPIOTABLE[23])
  2404. #endif
  2405. #if defined(TARGET_IS_TM4C123_RA1) || \
  2406. defined(TARGET_IS_TM4C123_RA3) || \
  2407. defined(TARGET_IS_TM4C123_RB1) || \
  2408. defined(TARGET_IS_TM4C123_RB2) || \
  2409. defined(TARGET_IS_TM4C129_RA0) || \
  2410. defined(TARGET_IS_TM4C129_RA1) || \
  2411. defined(TARGET_IS_TM4C129_RA2)
  2412. #define ROM_GPIOPinTypeUSBDigital \
  2413. ((void (*)(uint32_t ui32Port, \
  2414. uint8_t ui8Pins))ROM_GPIOTABLE[24])
  2415. #endif
  2416. #if defined(TARGET_IS_TM4C123_RA1) || \
  2417. defined(TARGET_IS_TM4C123_RA3) || \
  2418. defined(TARGET_IS_TM4C123_RB1) || \
  2419. defined(TARGET_IS_TM4C123_RB2) || \
  2420. defined(TARGET_IS_TM4C129_RA0) || \
  2421. defined(TARGET_IS_TM4C129_RA1) || \
  2422. defined(TARGET_IS_TM4C129_RA2)
  2423. #define ROM_GPIOPinConfigure \
  2424. ((void (*)(uint32_t ui32PinConfig))ROM_GPIOTABLE[26])
  2425. #endif
  2426. #if defined(TARGET_IS_TM4C123_RA1) || \
  2427. defined(TARGET_IS_TM4C123_RA3) || \
  2428. defined(TARGET_IS_TM4C123_RB1) || \
  2429. defined(TARGET_IS_TM4C123_RB2) || \
  2430. defined(TARGET_IS_TM4C129_RA0) || \
  2431. defined(TARGET_IS_TM4C129_RA1) || \
  2432. defined(TARGET_IS_TM4C129_RA2)
  2433. #define ROM_GPIOPinTypeUSBAnalog \
  2434. ((void (*)(uint32_t ui32Port, \
  2435. uint8_t ui8Pins))ROM_GPIOTABLE[28])
  2436. #endif
  2437. #if defined(TARGET_IS_TM4C123_RA1) || \
  2438. defined(TARGET_IS_TM4C123_RA3) || \
  2439. defined(TARGET_IS_TM4C123_RB1) || \
  2440. defined(TARGET_IS_TM4C123_RB2) || \
  2441. defined(TARGET_IS_TM4C129_RA0) || \
  2442. defined(TARGET_IS_TM4C129_RA1) || \
  2443. defined(TARGET_IS_TM4C129_RA2)
  2444. #define ROM_GPIODMATriggerEnable \
  2445. ((void (*)(uint32_t ui32Port, \
  2446. uint8_t ui8Pins))ROM_GPIOTABLE[31])
  2447. #endif
  2448. #if defined(TARGET_IS_TM4C123_RA1) || \
  2449. defined(TARGET_IS_TM4C123_RA3) || \
  2450. defined(TARGET_IS_TM4C123_RB1) || \
  2451. defined(TARGET_IS_TM4C123_RB2) || \
  2452. defined(TARGET_IS_TM4C129_RA0) || \
  2453. defined(TARGET_IS_TM4C129_RA1) || \
  2454. defined(TARGET_IS_TM4C129_RA2)
  2455. #define ROM_GPIODMATriggerDisable \
  2456. ((void (*)(uint32_t ui32Port, \
  2457. uint8_t ui8Pins))ROM_GPIOTABLE[32])
  2458. #endif
  2459. #if defined(TARGET_IS_TM4C123_RA1) || \
  2460. defined(TARGET_IS_TM4C123_RA3) || \
  2461. defined(TARGET_IS_TM4C123_RB1) || \
  2462. defined(TARGET_IS_TM4C123_RB2) || \
  2463. defined(TARGET_IS_TM4C129_RA0) || \
  2464. defined(TARGET_IS_TM4C129_RA1) || \
  2465. defined(TARGET_IS_TM4C129_RA2)
  2466. #define ROM_GPIOADCTriggerEnable \
  2467. ((void (*)(uint32_t ui32Port, \
  2468. uint8_t ui8Pins))ROM_GPIOTABLE[33])
  2469. #endif
  2470. #if defined(TARGET_IS_TM4C123_RA1) || \
  2471. defined(TARGET_IS_TM4C123_RA3) || \
  2472. defined(TARGET_IS_TM4C123_RB1) || \
  2473. defined(TARGET_IS_TM4C123_RB2) || \
  2474. defined(TARGET_IS_TM4C129_RA0) || \
  2475. defined(TARGET_IS_TM4C129_RA1) || \
  2476. defined(TARGET_IS_TM4C129_RA2)
  2477. #define ROM_GPIOADCTriggerDisable \
  2478. ((void (*)(uint32_t ui32Port, \
  2479. uint8_t ui8Pins))ROM_GPIOTABLE[34])
  2480. #endif
  2481. #if defined(TARGET_IS_TM4C123_RA3) || \
  2482. defined(TARGET_IS_TM4C123_RB1) || \
  2483. defined(TARGET_IS_TM4C123_RB2) || \
  2484. defined(TARGET_IS_TM4C129_RA0) || \
  2485. defined(TARGET_IS_TM4C129_RA1) || \
  2486. defined(TARGET_IS_TM4C129_RA2)
  2487. #define ROM_GPIOPinTypeI2CSCL \
  2488. ((void (*)(uint32_t ui32Port, \
  2489. uint8_t ui8Pins))ROM_GPIOTABLE[39])
  2490. #endif
  2491. #if defined(TARGET_IS_TM4C129_RA0) || \
  2492. defined(TARGET_IS_TM4C129_RA1) || \
  2493. defined(TARGET_IS_TM4C129_RA2)
  2494. #define ROM_GPIOPinTypeOneWire \
  2495. ((void (*)(uint32_t ui32Port, \
  2496. uint8_t ui8Pins))ROM_GPIOTABLE[44])
  2497. #endif
  2498. #if defined(TARGET_IS_TM4C129_RA0) || \
  2499. defined(TARGET_IS_TM4C129_RA1) || \
  2500. defined(TARGET_IS_TM4C129_RA2)
  2501. #define ROM_GPIOPinTypeWakeHigh \
  2502. ((void (*)(uint32_t ui32Port, \
  2503. uint8_t ui8Pins))ROM_GPIOTABLE[48])
  2504. #endif
  2505. #if defined(TARGET_IS_TM4C129_RA0) || \
  2506. defined(TARGET_IS_TM4C129_RA1) || \
  2507. defined(TARGET_IS_TM4C129_RA2)
  2508. #define ROM_GPIOPinTypeWakeLow \
  2509. ((void (*)(uint32_t ui32Port, \
  2510. uint8_t ui8Pins))ROM_GPIOTABLE[49])
  2511. #endif
  2512. #if defined(TARGET_IS_TM4C129_RA0) || \
  2513. defined(TARGET_IS_TM4C129_RA1) || \
  2514. defined(TARGET_IS_TM4C129_RA2)
  2515. #define ROM_GPIOIntClear \
  2516. ((void (*)(uint32_t ui32Port, \
  2517. uint32_t ui32IntFlags))ROM_GPIOTABLE[51])
  2518. #endif
  2519. #if defined(TARGET_IS_TM4C129_RA0) || \
  2520. defined(TARGET_IS_TM4C129_RA1) || \
  2521. defined(TARGET_IS_TM4C129_RA2)
  2522. #define ROM_GPIOIntDisable \
  2523. ((void (*)(uint32_t ui32Port, \
  2524. uint32_t ui32IntFlags))ROM_GPIOTABLE[52])
  2525. #endif
  2526. #if defined(TARGET_IS_TM4C129_RA0) || \
  2527. defined(TARGET_IS_TM4C129_RA1) || \
  2528. defined(TARGET_IS_TM4C129_RA2)
  2529. #define ROM_GPIOIntEnable \
  2530. ((void (*)(uint32_t ui32Port, \
  2531. uint32_t ui32IntFlags))ROM_GPIOTABLE[53])
  2532. #endif
  2533. #if defined(TARGET_IS_TM4C129_RA0) || \
  2534. defined(TARGET_IS_TM4C129_RA1) || \
  2535. defined(TARGET_IS_TM4C129_RA2)
  2536. #define ROM_GPIOIntStatus \
  2537. ((uint32_t (*)(uint32_t ui32Port, \
  2538. bool bMasked))ROM_GPIOTABLE[54])
  2539. #endif
  2540. //*****************************************************************************
  2541. //
  2542. // Macros for calling ROM functions in the Hibernate API.
  2543. //
  2544. //*****************************************************************************
  2545. #if defined(TARGET_IS_TM4C123_RA1) || \
  2546. defined(TARGET_IS_TM4C123_RA3) || \
  2547. defined(TARGET_IS_TM4C123_RB1) || \
  2548. defined(TARGET_IS_TM4C123_RB2) || \
  2549. defined(TARGET_IS_TM4C129_RA0) || \
  2550. defined(TARGET_IS_TM4C129_RA1) || \
  2551. defined(TARGET_IS_TM4C129_RA2)
  2552. #define ROM_HibernateIntClear \
  2553. ((void (*)(uint32_t ui32IntFlags))ROM_HIBERNATETABLE[0])
  2554. #endif
  2555. #if defined(TARGET_IS_TM4C123_RA1) || \
  2556. defined(TARGET_IS_TM4C123_RA3) || \
  2557. defined(TARGET_IS_TM4C123_RB1) || \
  2558. defined(TARGET_IS_TM4C123_RB2) || \
  2559. defined(TARGET_IS_TM4C129_RA0) || \
  2560. defined(TARGET_IS_TM4C129_RA1) || \
  2561. defined(TARGET_IS_TM4C129_RA2)
  2562. #define ROM_HibernateEnableExpClk \
  2563. ((void (*)(uint32_t ui32HibClk))ROM_HIBERNATETABLE[1])
  2564. #endif
  2565. #if defined(TARGET_IS_TM4C123_RA1) || \
  2566. defined(TARGET_IS_TM4C123_RA3) || \
  2567. defined(TARGET_IS_TM4C123_RB1) || \
  2568. defined(TARGET_IS_TM4C123_RB2) || \
  2569. defined(TARGET_IS_TM4C129_RA0) || \
  2570. defined(TARGET_IS_TM4C129_RA1) || \
  2571. defined(TARGET_IS_TM4C129_RA2)
  2572. #define ROM_HibernateDisable \
  2573. ((void (*)(void))ROM_HIBERNATETABLE[2])
  2574. #endif
  2575. #if defined(TARGET_IS_TM4C123_RA1) || \
  2576. defined(TARGET_IS_TM4C123_RA3) || \
  2577. defined(TARGET_IS_TM4C123_RB1) || \
  2578. defined(TARGET_IS_TM4C123_RB2) || \
  2579. defined(TARGET_IS_TM4C129_RA0) || \
  2580. defined(TARGET_IS_TM4C129_RA1) || \
  2581. defined(TARGET_IS_TM4C129_RA2)
  2582. #define ROM_HibernateRTCEnable \
  2583. ((void (*)(void))ROM_HIBERNATETABLE[4])
  2584. #endif
  2585. #if defined(TARGET_IS_TM4C123_RA1) || \
  2586. defined(TARGET_IS_TM4C123_RA3) || \
  2587. defined(TARGET_IS_TM4C123_RB1) || \
  2588. defined(TARGET_IS_TM4C123_RB2) || \
  2589. defined(TARGET_IS_TM4C129_RA0) || \
  2590. defined(TARGET_IS_TM4C129_RA1) || \
  2591. defined(TARGET_IS_TM4C129_RA2)
  2592. #define ROM_HibernateRTCDisable \
  2593. ((void (*)(void))ROM_HIBERNATETABLE[5])
  2594. #endif
  2595. #if defined(TARGET_IS_TM4C123_RA1) || \
  2596. defined(TARGET_IS_TM4C123_RA3) || \
  2597. defined(TARGET_IS_TM4C123_RB1) || \
  2598. defined(TARGET_IS_TM4C123_RB2) || \
  2599. defined(TARGET_IS_TM4C129_RA0) || \
  2600. defined(TARGET_IS_TM4C129_RA1) || \
  2601. defined(TARGET_IS_TM4C129_RA2)
  2602. #define ROM_HibernateWakeSet \
  2603. ((void (*)(uint32_t ui32WakeFlags))ROM_HIBERNATETABLE[6])
  2604. #endif
  2605. #if defined(TARGET_IS_TM4C123_RA1) || \
  2606. defined(TARGET_IS_TM4C123_RA3) || \
  2607. defined(TARGET_IS_TM4C123_RB1) || \
  2608. defined(TARGET_IS_TM4C123_RB2) || \
  2609. defined(TARGET_IS_TM4C129_RA0) || \
  2610. defined(TARGET_IS_TM4C129_RA1) || \
  2611. defined(TARGET_IS_TM4C129_RA2)
  2612. #define ROM_HibernateWakeGet \
  2613. ((uint32_t (*)(void))ROM_HIBERNATETABLE[7])
  2614. #endif
  2615. #if defined(TARGET_IS_TM4C123_RA1) || \
  2616. defined(TARGET_IS_TM4C123_RA3) || \
  2617. defined(TARGET_IS_TM4C123_RB1) || \
  2618. defined(TARGET_IS_TM4C123_RB2) || \
  2619. defined(TARGET_IS_TM4C129_RA0) || \
  2620. defined(TARGET_IS_TM4C129_RA1) || \
  2621. defined(TARGET_IS_TM4C129_RA2)
  2622. #define ROM_HibernateLowBatSet \
  2623. ((void (*)(uint32_t ui32LowBatFlags))ROM_HIBERNATETABLE[8])
  2624. #endif
  2625. #if defined(TARGET_IS_TM4C123_RA1) || \
  2626. defined(TARGET_IS_TM4C123_RA3) || \
  2627. defined(TARGET_IS_TM4C123_RB1) || \
  2628. defined(TARGET_IS_TM4C123_RB2) || \
  2629. defined(TARGET_IS_TM4C129_RA0) || \
  2630. defined(TARGET_IS_TM4C129_RA1) || \
  2631. defined(TARGET_IS_TM4C129_RA2)
  2632. #define ROM_HibernateLowBatGet \
  2633. ((uint32_t (*)(void))ROM_HIBERNATETABLE[9])
  2634. #endif
  2635. #if defined(TARGET_IS_TM4C123_RA1) || \
  2636. defined(TARGET_IS_TM4C123_RA3) || \
  2637. defined(TARGET_IS_TM4C123_RB1) || \
  2638. defined(TARGET_IS_TM4C123_RB2) || \
  2639. defined(TARGET_IS_TM4C129_RA0) || \
  2640. defined(TARGET_IS_TM4C129_RA1) || \
  2641. defined(TARGET_IS_TM4C129_RA2)
  2642. #define ROM_HibernateRTCSet \
  2643. ((void (*)(uint32_t ui32RTCValue))ROM_HIBERNATETABLE[10])
  2644. #endif
  2645. #if defined(TARGET_IS_TM4C123_RA1) || \
  2646. defined(TARGET_IS_TM4C123_RA3) || \
  2647. defined(TARGET_IS_TM4C123_RB1) || \
  2648. defined(TARGET_IS_TM4C123_RB2) || \
  2649. defined(TARGET_IS_TM4C129_RA0) || \
  2650. defined(TARGET_IS_TM4C129_RA1) || \
  2651. defined(TARGET_IS_TM4C129_RA2)
  2652. #define ROM_HibernateRTCGet \
  2653. ((uint32_t (*)(void))ROM_HIBERNATETABLE[11])
  2654. #endif
  2655. #if defined(TARGET_IS_TM4C123_RA1) || \
  2656. defined(TARGET_IS_TM4C123_RA3) || \
  2657. defined(TARGET_IS_TM4C123_RB1) || \
  2658. defined(TARGET_IS_TM4C123_RB2) || \
  2659. defined(TARGET_IS_TM4C129_RA0) || \
  2660. defined(TARGET_IS_TM4C129_RA1) || \
  2661. defined(TARGET_IS_TM4C129_RA2)
  2662. #define ROM_HibernateRTCTrimSet \
  2663. ((void (*)(uint32_t ui32Trim))ROM_HIBERNATETABLE[16])
  2664. #endif
  2665. #if defined(TARGET_IS_TM4C123_RA1) || \
  2666. defined(TARGET_IS_TM4C123_RA3) || \
  2667. defined(TARGET_IS_TM4C123_RB1) || \
  2668. defined(TARGET_IS_TM4C123_RB2) || \
  2669. defined(TARGET_IS_TM4C129_RA0) || \
  2670. defined(TARGET_IS_TM4C129_RA1) || \
  2671. defined(TARGET_IS_TM4C129_RA2)
  2672. #define ROM_HibernateRTCTrimGet \
  2673. ((uint32_t (*)(void))ROM_HIBERNATETABLE[17])
  2674. #endif
  2675. #if defined(TARGET_IS_TM4C123_RA1) || \
  2676. defined(TARGET_IS_TM4C123_RA3) || \
  2677. defined(TARGET_IS_TM4C123_RB1) || \
  2678. defined(TARGET_IS_TM4C123_RB2) || \
  2679. defined(TARGET_IS_TM4C129_RA0) || \
  2680. defined(TARGET_IS_TM4C129_RA1) || \
  2681. defined(TARGET_IS_TM4C129_RA2)
  2682. #define ROM_HibernateDataSet \
  2683. ((void (*)(uint32_t *pui32Data, \
  2684. uint32_t ui32Count))ROM_HIBERNATETABLE[18])
  2685. #endif
  2686. #if defined(TARGET_IS_TM4C123_RA1) || \
  2687. defined(TARGET_IS_TM4C123_RA3) || \
  2688. defined(TARGET_IS_TM4C123_RB1) || \
  2689. defined(TARGET_IS_TM4C123_RB2) || \
  2690. defined(TARGET_IS_TM4C129_RA0) || \
  2691. defined(TARGET_IS_TM4C129_RA1) || \
  2692. defined(TARGET_IS_TM4C129_RA2)
  2693. #define ROM_HibernateDataGet \
  2694. ((void (*)(uint32_t *pui32Data, \
  2695. uint32_t ui32Count))ROM_HIBERNATETABLE[19])
  2696. #endif
  2697. #if defined(TARGET_IS_TM4C123_RA1) || \
  2698. defined(TARGET_IS_TM4C123_RA3) || \
  2699. defined(TARGET_IS_TM4C123_RB1) || \
  2700. defined(TARGET_IS_TM4C123_RB2) || \
  2701. defined(TARGET_IS_TM4C129_RA0) || \
  2702. defined(TARGET_IS_TM4C129_RA1) || \
  2703. defined(TARGET_IS_TM4C129_RA2)
  2704. #define ROM_HibernateRequest \
  2705. ((void (*)(void))ROM_HIBERNATETABLE[20])
  2706. #endif
  2707. #if defined(TARGET_IS_TM4C123_RA1) || \
  2708. defined(TARGET_IS_TM4C123_RA3) || \
  2709. defined(TARGET_IS_TM4C123_RB1) || \
  2710. defined(TARGET_IS_TM4C123_RB2) || \
  2711. defined(TARGET_IS_TM4C129_RA0) || \
  2712. defined(TARGET_IS_TM4C129_RA1) || \
  2713. defined(TARGET_IS_TM4C129_RA2)
  2714. #define ROM_HibernateIntEnable \
  2715. ((void (*)(uint32_t ui32IntFlags))ROM_HIBERNATETABLE[21])
  2716. #endif
  2717. #if defined(TARGET_IS_TM4C123_RA1) || \
  2718. defined(TARGET_IS_TM4C123_RA3) || \
  2719. defined(TARGET_IS_TM4C123_RB1) || \
  2720. defined(TARGET_IS_TM4C123_RB2) || \
  2721. defined(TARGET_IS_TM4C129_RA0) || \
  2722. defined(TARGET_IS_TM4C129_RA1) || \
  2723. defined(TARGET_IS_TM4C129_RA2)
  2724. #define ROM_HibernateIntDisable \
  2725. ((void (*)(uint32_t ui32IntFlags))ROM_HIBERNATETABLE[22])
  2726. #endif
  2727. #if defined(TARGET_IS_TM4C123_RA1) || \
  2728. defined(TARGET_IS_TM4C123_RA3) || \
  2729. defined(TARGET_IS_TM4C123_RB1) || \
  2730. defined(TARGET_IS_TM4C123_RB2) || \
  2731. defined(TARGET_IS_TM4C129_RA0) || \
  2732. defined(TARGET_IS_TM4C129_RA1) || \
  2733. defined(TARGET_IS_TM4C129_RA2)
  2734. #define ROM_HibernateIntStatus \
  2735. ((uint32_t (*)(bool bMasked))ROM_HIBERNATETABLE[23])
  2736. #endif
  2737. #if defined(TARGET_IS_TM4C123_RA1) || \
  2738. defined(TARGET_IS_TM4C123_RA3) || \
  2739. defined(TARGET_IS_TM4C123_RB1) || \
  2740. defined(TARGET_IS_TM4C123_RB2) || \
  2741. defined(TARGET_IS_TM4C129_RA0) || \
  2742. defined(TARGET_IS_TM4C129_RA1) || \
  2743. defined(TARGET_IS_TM4C129_RA2)
  2744. #define ROM_HibernateIsActive \
  2745. ((uint32_t (*)(void))ROM_HIBERNATETABLE[24])
  2746. #endif
  2747. #if defined(TARGET_IS_TM4C123_RA1) || \
  2748. defined(TARGET_IS_TM4C123_RA3) || \
  2749. defined(TARGET_IS_TM4C123_RB1) || \
  2750. defined(TARGET_IS_TM4C123_RB2) || \
  2751. defined(TARGET_IS_TM4C129_RA0) || \
  2752. defined(TARGET_IS_TM4C129_RA1) || \
  2753. defined(TARGET_IS_TM4C129_RA2)
  2754. #define ROM_HibernateRTCSSGet \
  2755. ((uint32_t (*)(void))ROM_HIBERNATETABLE[27])
  2756. #endif
  2757. #if defined(TARGET_IS_TM4C123_RA1) || \
  2758. defined(TARGET_IS_TM4C123_RA3) || \
  2759. defined(TARGET_IS_TM4C123_RB1) || \
  2760. defined(TARGET_IS_TM4C123_RB2) || \
  2761. defined(TARGET_IS_TM4C129_RA0) || \
  2762. defined(TARGET_IS_TM4C129_RA1) || \
  2763. defined(TARGET_IS_TM4C129_RA2)
  2764. #define ROM_HibernateClockConfig \
  2765. ((void (*)(uint32_t ui32Config))ROM_HIBERNATETABLE[28])
  2766. #endif
  2767. #if defined(TARGET_IS_TM4C123_RA1) || \
  2768. defined(TARGET_IS_TM4C123_RA3) || \
  2769. defined(TARGET_IS_TM4C123_RB1) || \
  2770. defined(TARGET_IS_TM4C123_RB2) || \
  2771. defined(TARGET_IS_TM4C129_RA0) || \
  2772. defined(TARGET_IS_TM4C129_RA1) || \
  2773. defined(TARGET_IS_TM4C129_RA2)
  2774. #define ROM_HibernateBatCheckStart \
  2775. ((void (*)(void))ROM_HIBERNATETABLE[29])
  2776. #endif
  2777. #if defined(TARGET_IS_TM4C123_RA1) || \
  2778. defined(TARGET_IS_TM4C123_RA3) || \
  2779. defined(TARGET_IS_TM4C123_RB1) || \
  2780. defined(TARGET_IS_TM4C123_RB2) || \
  2781. defined(TARGET_IS_TM4C129_RA0) || \
  2782. defined(TARGET_IS_TM4C129_RA1) || \
  2783. defined(TARGET_IS_TM4C129_RA2)
  2784. #define ROM_HibernateBatCheckDone \
  2785. ((uint32_t (*)(void))ROM_HIBERNATETABLE[30])
  2786. #endif
  2787. #if defined(TARGET_IS_TM4C129_RA0) || \
  2788. defined(TARGET_IS_TM4C129_RA1) || \
  2789. defined(TARGET_IS_TM4C129_RA2)
  2790. #define ROM_HibernateGPIORetentionEnable \
  2791. ((void (*)(void))ROM_HIBERNATETABLE[31])
  2792. #endif
  2793. #if defined(TARGET_IS_TM4C129_RA0) || \
  2794. defined(TARGET_IS_TM4C129_RA1) || \
  2795. defined(TARGET_IS_TM4C129_RA2)
  2796. #define ROM_HibernateGPIORetentionDisable \
  2797. ((void (*)(void))ROM_HIBERNATETABLE[32])
  2798. #endif
  2799. #if defined(TARGET_IS_TM4C129_RA0) || \
  2800. defined(TARGET_IS_TM4C129_RA1) || \
  2801. defined(TARGET_IS_TM4C129_RA2)
  2802. #define ROM_HibernateGPIORetentionGet \
  2803. ((bool (*)(void))ROM_HIBERNATETABLE[33])
  2804. #endif
  2805. #if defined(TARGET_IS_TM4C129_RA0) || \
  2806. defined(TARGET_IS_TM4C129_RA1) || \
  2807. defined(TARGET_IS_TM4C129_RA2)
  2808. #define ROM_HibernateCounterMode \
  2809. ((void (*)(uint32_t ui32Config))ROM_HIBERNATETABLE[34])
  2810. #endif
  2811. #if defined(TARGET_IS_TM4C123_RB1) || \
  2812. defined(TARGET_IS_TM4C129_RA0) || \
  2813. defined(TARGET_IS_TM4C129_RA1) || \
  2814. defined(TARGET_IS_TM4C129_RA2)
  2815. #define ROM_HibernateCalendarSet \
  2816. ((void (*)(struct tm *psTime))ROM_HIBERNATETABLE[35])
  2817. #endif
  2818. #if defined(TARGET_IS_TM4C129_RA0) || \
  2819. defined(TARGET_IS_TM4C129_RA1) || \
  2820. defined(TARGET_IS_TM4C129_RA2)
  2821. #define ROM_HibernateCalendarGet \
  2822. ((int (*)(struct tm *psTime))ROM_HIBERNATETABLE[36])
  2823. #endif
  2824. #if defined(TARGET_IS_TM4C129_RA0) || \
  2825. defined(TARGET_IS_TM4C129_RA1) || \
  2826. defined(TARGET_IS_TM4C129_RA2)
  2827. #define ROM_HibernateCalendarMatchSet \
  2828. ((void (*)(uint32_t ui32Index, \
  2829. struct tm *psTime))ROM_HIBERNATETABLE[37])
  2830. #endif
  2831. #if defined(TARGET_IS_TM4C129_RA0) || \
  2832. defined(TARGET_IS_TM4C129_RA1) || \
  2833. defined(TARGET_IS_TM4C129_RA2)
  2834. #define ROM_HibernateCalendarMatchGet \
  2835. ((void (*)(uint32_t ui32Index, \
  2836. struct tm *psTime))ROM_HIBERNATETABLE[38])
  2837. #endif
  2838. #if defined(TARGET_IS_TM4C129_RA0) || \
  2839. defined(TARGET_IS_TM4C129_RA1) || \
  2840. defined(TARGET_IS_TM4C129_RA2)
  2841. #define ROM_HibernateTamperDisable \
  2842. ((void (*)(void))ROM_HIBERNATETABLE[39])
  2843. #endif
  2844. #if defined(TARGET_IS_TM4C129_RA0) || \
  2845. defined(TARGET_IS_TM4C129_RA1) || \
  2846. defined(TARGET_IS_TM4C129_RA2)
  2847. #define ROM_HibernateTamperEnable \
  2848. ((void (*)(void))ROM_HIBERNATETABLE[40])
  2849. #endif
  2850. #if defined(TARGET_IS_TM4C129_RA0) || \
  2851. defined(TARGET_IS_TM4C129_RA1) || \
  2852. defined(TARGET_IS_TM4C129_RA2)
  2853. #define ROM_HibernateTamperEventsClear \
  2854. ((void (*)(void))ROM_HIBERNATETABLE[41])
  2855. #endif
  2856. #if defined(TARGET_IS_TM4C129_RA0) || \
  2857. defined(TARGET_IS_TM4C129_RA1) || \
  2858. defined(TARGET_IS_TM4C129_RA2)
  2859. #define ROM_HibernateTamperEventsConfig \
  2860. ((void (*)(uint32_t ui32Config))ROM_HIBERNATETABLE[42])
  2861. #endif
  2862. #if defined(TARGET_IS_TM4C129_RA0) || \
  2863. defined(TARGET_IS_TM4C129_RA1) || \
  2864. defined(TARGET_IS_TM4C129_RA2)
  2865. #define ROM_HibernateTamperEventsGet \
  2866. ((bool (*)(uint32_t ui32Index, \
  2867. uint32_t *pui32RTC, \
  2868. uint32_t *pui32Event))ROM_HIBERNATETABLE[43])
  2869. #endif
  2870. #if defined(TARGET_IS_TM4C129_RA0) || \
  2871. defined(TARGET_IS_TM4C129_RA1) || \
  2872. defined(TARGET_IS_TM4C129_RA2)
  2873. #define ROM_HibernateTamperExtOscValid \
  2874. ((bool (*)(void))ROM_HIBERNATETABLE[44])
  2875. #endif
  2876. #if defined(TARGET_IS_TM4C129_RA0) || \
  2877. defined(TARGET_IS_TM4C129_RA1) || \
  2878. defined(TARGET_IS_TM4C129_RA2)
  2879. #define ROM_HibernateTamperExtOscRecover \
  2880. ((void (*)(void))ROM_HIBERNATETABLE[45])
  2881. #endif
  2882. #if defined(TARGET_IS_TM4C129_RA0) || \
  2883. defined(TARGET_IS_TM4C129_RA1) || \
  2884. defined(TARGET_IS_TM4C129_RA2)
  2885. #define ROM_HibernateTamperIODisable \
  2886. ((void (*)(uint32_t ui32Input))ROM_HIBERNATETABLE[46])
  2887. #endif
  2888. #if defined(TARGET_IS_TM4C129_RA0) || \
  2889. defined(TARGET_IS_TM4C129_RA1) || \
  2890. defined(TARGET_IS_TM4C129_RA2)
  2891. #define ROM_HibernateTamperIOEnable \
  2892. ((void (*)(uint32_t ui32Input, \
  2893. uint32_t ui32Config))ROM_HIBERNATETABLE[47])
  2894. #endif
  2895. #if defined(TARGET_IS_TM4C129_RA0) || \
  2896. defined(TARGET_IS_TM4C129_RA1) || \
  2897. defined(TARGET_IS_TM4C129_RA2)
  2898. #define ROM_HibernateTamperStatusGet \
  2899. ((uint32_t (*)(void))ROM_HIBERNATETABLE[48])
  2900. #endif
  2901. #if defined(TARGET_IS_TM4C129_RA1) || \
  2902. defined(TARGET_IS_TM4C129_RA2)
  2903. #define ROM_HibernateRTCMatchGet \
  2904. ((uint32_t (*)(uint32_t ui32Match))ROM_HIBERNATETABLE[49])
  2905. #endif
  2906. #if defined(TARGET_IS_TM4C129_RA1) || \
  2907. defined(TARGET_IS_TM4C129_RA2)
  2908. #define ROM_HibernateRTCMatchSet \
  2909. ((void (*)(uint32_t ui32Match, \
  2910. uint32_t ui32Value))ROM_HIBERNATETABLE[50])
  2911. #endif
  2912. #if defined(TARGET_IS_TM4C129_RA0) || \
  2913. defined(TARGET_IS_TM4C129_RA1) || \
  2914. defined(TARGET_IS_TM4C129_RA2)
  2915. #define ROM_HibernateRTCSSMatchGet \
  2916. ((uint32_t (*)(uint32_t ui32Match))ROM_HIBERNATETABLE[51])
  2917. #endif
  2918. #if defined(TARGET_IS_TM4C129_RA1) || \
  2919. defined(TARGET_IS_TM4C129_RA2)
  2920. #define ROM_HibernateRTCSSMatchSet \
  2921. ((void (*)(uint32_t ui32Match, \
  2922. uint32_t ui32Value))ROM_HIBERNATETABLE[52])
  2923. #endif
  2924. //*****************************************************************************
  2925. //
  2926. // Macros for calling ROM functions in the I2C API.
  2927. //
  2928. //*****************************************************************************
  2929. #if defined(TARGET_IS_TM4C123_RA1) || \
  2930. defined(TARGET_IS_TM4C123_RA3) || \
  2931. defined(TARGET_IS_TM4C123_RB1) || \
  2932. defined(TARGET_IS_TM4C123_RB2) || \
  2933. defined(TARGET_IS_TM4C129_RA0) || \
  2934. defined(TARGET_IS_TM4C129_RA1) || \
  2935. defined(TARGET_IS_TM4C129_RA2)
  2936. #define ROM_I2CMasterDataPut \
  2937. ((void (*)(uint32_t ui32Base, \
  2938. uint8_t ui8Data))ROM_I2CTABLE[0])
  2939. #endif
  2940. #if defined(TARGET_IS_TM4C123_RA1) || \
  2941. defined(TARGET_IS_TM4C123_RA3) || \
  2942. defined(TARGET_IS_TM4C123_RB1) || \
  2943. defined(TARGET_IS_TM4C123_RB2) || \
  2944. defined(TARGET_IS_TM4C129_RA0) || \
  2945. defined(TARGET_IS_TM4C129_RA1) || \
  2946. defined(TARGET_IS_TM4C129_RA2)
  2947. #define ROM_I2CMasterInitExpClk \
  2948. ((void (*)(uint32_t ui32Base, \
  2949. uint32_t ui32I2CClk, \
  2950. bool bFast))ROM_I2CTABLE[1])
  2951. #endif
  2952. #if defined(TARGET_IS_TM4C129_RA1) || \
  2953. defined(TARGET_IS_TM4C129_RA2)
  2954. #define ROM_I2CSlaveInit \
  2955. ((void (*)(uint32_t ui32Base, \
  2956. uint8_t ui8SlaveAddr))ROM_I2CTABLE[2])
  2957. #endif
  2958. #if defined(TARGET_IS_TM4C123_RA1) || \
  2959. defined(TARGET_IS_TM4C123_RA3) || \
  2960. defined(TARGET_IS_TM4C123_RB1) || \
  2961. defined(TARGET_IS_TM4C123_RB2) || \
  2962. defined(TARGET_IS_TM4C129_RA0) || \
  2963. defined(TARGET_IS_TM4C129_RA1) || \
  2964. defined(TARGET_IS_TM4C129_RA2)
  2965. #define ROM_I2CMasterEnable \
  2966. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[3])
  2967. #endif
  2968. #if defined(TARGET_IS_TM4C129_RA1) || \
  2969. defined(TARGET_IS_TM4C129_RA2)
  2970. #define ROM_I2CSlaveEnable \
  2971. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[4])
  2972. #endif
  2973. #if defined(TARGET_IS_TM4C123_RA1) || \
  2974. defined(TARGET_IS_TM4C123_RA3) || \
  2975. defined(TARGET_IS_TM4C123_RB1) || \
  2976. defined(TARGET_IS_TM4C123_RB2) || \
  2977. defined(TARGET_IS_TM4C129_RA0) || \
  2978. defined(TARGET_IS_TM4C129_RA1) || \
  2979. defined(TARGET_IS_TM4C129_RA2)
  2980. #define ROM_I2CMasterDisable \
  2981. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[5])
  2982. #endif
  2983. #if defined(TARGET_IS_TM4C129_RA1) || \
  2984. defined(TARGET_IS_TM4C129_RA2)
  2985. #define ROM_I2CSlaveDisable \
  2986. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[6])
  2987. #endif
  2988. #if defined(TARGET_IS_TM4C123_RA1) || \
  2989. defined(TARGET_IS_TM4C123_RA3) || \
  2990. defined(TARGET_IS_TM4C123_RB1) || \
  2991. defined(TARGET_IS_TM4C123_RB2) || \
  2992. defined(TARGET_IS_TM4C129_RA0) || \
  2993. defined(TARGET_IS_TM4C129_RA1) || \
  2994. defined(TARGET_IS_TM4C129_RA2)
  2995. #define ROM_I2CMasterIntEnable \
  2996. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[7])
  2997. #endif
  2998. #if defined(TARGET_IS_TM4C129_RA1) || \
  2999. defined(TARGET_IS_TM4C129_RA2)
  3000. #define ROM_I2CSlaveIntEnable \
  3001. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[8])
  3002. #endif
  3003. #if defined(TARGET_IS_TM4C123_RA1) || \
  3004. defined(TARGET_IS_TM4C123_RA3) || \
  3005. defined(TARGET_IS_TM4C123_RB1) || \
  3006. defined(TARGET_IS_TM4C123_RB2) || \
  3007. defined(TARGET_IS_TM4C129_RA0) || \
  3008. defined(TARGET_IS_TM4C129_RA1) || \
  3009. defined(TARGET_IS_TM4C129_RA2)
  3010. #define ROM_I2CMasterIntDisable \
  3011. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[9])
  3012. #endif
  3013. #if defined(TARGET_IS_TM4C129_RA1) || \
  3014. defined(TARGET_IS_TM4C129_RA2)
  3015. #define ROM_I2CSlaveIntDisable \
  3016. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[10])
  3017. #endif
  3018. #if defined(TARGET_IS_TM4C123_RA1) || \
  3019. defined(TARGET_IS_TM4C123_RA3) || \
  3020. defined(TARGET_IS_TM4C123_RB1) || \
  3021. defined(TARGET_IS_TM4C123_RB2) || \
  3022. defined(TARGET_IS_TM4C129_RA0) || \
  3023. defined(TARGET_IS_TM4C129_RA1) || \
  3024. defined(TARGET_IS_TM4C129_RA2)
  3025. #define ROM_I2CMasterIntStatus \
  3026. ((bool (*)(uint32_t ui32Base, \
  3027. bool bMasked))ROM_I2CTABLE[11])
  3028. #endif
  3029. #if defined(TARGET_IS_TM4C129_RA1) || \
  3030. defined(TARGET_IS_TM4C129_RA2)
  3031. #define ROM_I2CSlaveIntStatus \
  3032. ((bool (*)(uint32_t ui32Base, \
  3033. bool bMasked))ROM_I2CTABLE[12])
  3034. #endif
  3035. #if defined(TARGET_IS_TM4C123_RA1) || \
  3036. defined(TARGET_IS_TM4C123_RA3) || \
  3037. defined(TARGET_IS_TM4C123_RB1) || \
  3038. defined(TARGET_IS_TM4C123_RB2) || \
  3039. defined(TARGET_IS_TM4C129_RA0) || \
  3040. defined(TARGET_IS_TM4C129_RA1) || \
  3041. defined(TARGET_IS_TM4C129_RA2)
  3042. #define ROM_I2CMasterIntClear \
  3043. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[13])
  3044. #endif
  3045. #if defined(TARGET_IS_TM4C129_RA1) || \
  3046. defined(TARGET_IS_TM4C129_RA2)
  3047. #define ROM_I2CSlaveIntClear \
  3048. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[14])
  3049. #endif
  3050. #if defined(TARGET_IS_TM4C123_RA1) || \
  3051. defined(TARGET_IS_TM4C123_RA3) || \
  3052. defined(TARGET_IS_TM4C123_RB1) || \
  3053. defined(TARGET_IS_TM4C123_RB2) || \
  3054. defined(TARGET_IS_TM4C129_RA0) || \
  3055. defined(TARGET_IS_TM4C129_RA1) || \
  3056. defined(TARGET_IS_TM4C129_RA2)
  3057. #define ROM_I2CMasterSlaveAddrSet \
  3058. ((void (*)(uint32_t ui32Base, \
  3059. uint8_t ui8SlaveAddr, \
  3060. bool bReceive))ROM_I2CTABLE[15])
  3061. #endif
  3062. #if defined(TARGET_IS_TM4C123_RA1) || \
  3063. defined(TARGET_IS_TM4C123_RA3) || \
  3064. defined(TARGET_IS_TM4C123_RB1) || \
  3065. defined(TARGET_IS_TM4C123_RB2) || \
  3066. defined(TARGET_IS_TM4C129_RA0) || \
  3067. defined(TARGET_IS_TM4C129_RA1) || \
  3068. defined(TARGET_IS_TM4C129_RA2)
  3069. #define ROM_I2CMasterBusy \
  3070. ((bool (*)(uint32_t ui32Base))ROM_I2CTABLE[16])
  3071. #endif
  3072. #if defined(TARGET_IS_TM4C123_RA1) || \
  3073. defined(TARGET_IS_TM4C123_RA3) || \
  3074. defined(TARGET_IS_TM4C123_RB1) || \
  3075. defined(TARGET_IS_TM4C123_RB2) || \
  3076. defined(TARGET_IS_TM4C129_RA0) || \
  3077. defined(TARGET_IS_TM4C129_RA1) || \
  3078. defined(TARGET_IS_TM4C129_RA2)
  3079. #define ROM_I2CMasterBusBusy \
  3080. ((bool (*)(uint32_t ui32Base))ROM_I2CTABLE[17])
  3081. #endif
  3082. #if defined(TARGET_IS_TM4C123_RA1) || \
  3083. defined(TARGET_IS_TM4C123_RA3) || \
  3084. defined(TARGET_IS_TM4C123_RB1) || \
  3085. defined(TARGET_IS_TM4C123_RB2) || \
  3086. defined(TARGET_IS_TM4C129_RA0) || \
  3087. defined(TARGET_IS_TM4C129_RA1) || \
  3088. defined(TARGET_IS_TM4C129_RA2)
  3089. #define ROM_I2CMasterControl \
  3090. ((void (*)(uint32_t ui32Base, \
  3091. uint32_t ui32Cmd))ROM_I2CTABLE[18])
  3092. #endif
  3093. #if defined(TARGET_IS_TM4C123_RA1) || \
  3094. defined(TARGET_IS_TM4C123_RA3) || \
  3095. defined(TARGET_IS_TM4C123_RB1) || \
  3096. defined(TARGET_IS_TM4C123_RB2) || \
  3097. defined(TARGET_IS_TM4C129_RA0) || \
  3098. defined(TARGET_IS_TM4C129_RA1) || \
  3099. defined(TARGET_IS_TM4C129_RA2)
  3100. #define ROM_I2CMasterErr \
  3101. ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[19])
  3102. #endif
  3103. #if defined(TARGET_IS_TM4C123_RA1) || \
  3104. defined(TARGET_IS_TM4C123_RA3) || \
  3105. defined(TARGET_IS_TM4C123_RB1) || \
  3106. defined(TARGET_IS_TM4C123_RB2) || \
  3107. defined(TARGET_IS_TM4C129_RA0) || \
  3108. defined(TARGET_IS_TM4C129_RA1) || \
  3109. defined(TARGET_IS_TM4C129_RA2)
  3110. #define ROM_I2CMasterDataGet \
  3111. ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[20])
  3112. #endif
  3113. #if defined(TARGET_IS_TM4C129_RA1) || \
  3114. defined(TARGET_IS_TM4C129_RA2)
  3115. #define ROM_I2CSlaveStatus \
  3116. ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[21])
  3117. #endif
  3118. #if defined(TARGET_IS_TM4C129_RA1) || \
  3119. defined(TARGET_IS_TM4C129_RA2)
  3120. #define ROM_I2CSlaveDataPut \
  3121. ((void (*)(uint32_t ui32Base, \
  3122. uint8_t ui8Data))ROM_I2CTABLE[22])
  3123. #endif
  3124. #if defined(TARGET_IS_TM4C129_RA1) || \
  3125. defined(TARGET_IS_TM4C129_RA2)
  3126. #define ROM_I2CSlaveDataGet \
  3127. ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[23])
  3128. #endif
  3129. #if defined(TARGET_IS_TM4C123_RA1) || \
  3130. defined(TARGET_IS_TM4C123_RA3) || \
  3131. defined(TARGET_IS_TM4C123_RB1) || \
  3132. defined(TARGET_IS_TM4C123_RB2) || \
  3133. defined(TARGET_IS_TM4C129_RA0) || \
  3134. defined(TARGET_IS_TM4C129_RA1) || \
  3135. defined(TARGET_IS_TM4C129_RA2)
  3136. #define ROM_UpdateI2C \
  3137. ((void (*)(void))ROM_I2CTABLE[24])
  3138. #endif
  3139. #if defined(TARGET_IS_TM4C129_RA1) || \
  3140. defined(TARGET_IS_TM4C129_RA2)
  3141. #define ROM_I2CSlaveIntEnableEx \
  3142. ((void (*)(uint32_t ui32Base, \
  3143. uint32_t ui32IntFlags))ROM_I2CTABLE[25])
  3144. #endif
  3145. #if defined(TARGET_IS_TM4C129_RA1) || \
  3146. defined(TARGET_IS_TM4C129_RA2)
  3147. #define ROM_I2CSlaveIntDisableEx \
  3148. ((void (*)(uint32_t ui32Base, \
  3149. uint32_t ui32IntFlags))ROM_I2CTABLE[26])
  3150. #endif
  3151. #if defined(TARGET_IS_TM4C129_RA1) || \
  3152. defined(TARGET_IS_TM4C129_RA2)
  3153. #define ROM_I2CSlaveIntStatusEx \
  3154. ((uint32_t (*)(uint32_t ui32Base, \
  3155. bool bMasked))ROM_I2CTABLE[27])
  3156. #endif
  3157. #if defined(TARGET_IS_TM4C129_RA1) || \
  3158. defined(TARGET_IS_TM4C129_RA2)
  3159. #define ROM_I2CSlaveIntClearEx \
  3160. ((void (*)(uint32_t ui32Base, \
  3161. uint32_t ui32IntFlags))ROM_I2CTABLE[28])
  3162. #endif
  3163. #if defined(TARGET_IS_TM4C123_RA1) || \
  3164. defined(TARGET_IS_TM4C123_RA3) || \
  3165. defined(TARGET_IS_TM4C123_RB1) || \
  3166. defined(TARGET_IS_TM4C123_RB2) || \
  3167. defined(TARGET_IS_TM4C129_RA0) || \
  3168. defined(TARGET_IS_TM4C129_RA1) || \
  3169. defined(TARGET_IS_TM4C129_RA2)
  3170. #define ROM_I2CMasterIntEnableEx \
  3171. ((void (*)(uint32_t ui32Base, \
  3172. uint32_t ui32IntFlags))ROM_I2CTABLE[29])
  3173. #endif
  3174. #if defined(TARGET_IS_TM4C123_RA1) || \
  3175. defined(TARGET_IS_TM4C123_RA3) || \
  3176. defined(TARGET_IS_TM4C123_RB1) || \
  3177. defined(TARGET_IS_TM4C123_RB2) || \
  3178. defined(TARGET_IS_TM4C129_RA0) || \
  3179. defined(TARGET_IS_TM4C129_RA1) || \
  3180. defined(TARGET_IS_TM4C129_RA2)
  3181. #define ROM_I2CMasterIntDisableEx \
  3182. ((void (*)(uint32_t ui32Base, \
  3183. uint32_t ui32IntFlags))ROM_I2CTABLE[30])
  3184. #endif
  3185. #if defined(TARGET_IS_TM4C123_RA1) || \
  3186. defined(TARGET_IS_TM4C123_RA3) || \
  3187. defined(TARGET_IS_TM4C123_RB1) || \
  3188. defined(TARGET_IS_TM4C123_RB2) || \
  3189. defined(TARGET_IS_TM4C129_RA0) || \
  3190. defined(TARGET_IS_TM4C129_RA1) || \
  3191. defined(TARGET_IS_TM4C129_RA2)
  3192. #define ROM_I2CMasterIntStatusEx \
  3193. ((uint32_t (*)(uint32_t ui32Base, \
  3194. bool bMasked))ROM_I2CTABLE[31])
  3195. #endif
  3196. #if defined(TARGET_IS_TM4C123_RA1) || \
  3197. defined(TARGET_IS_TM4C123_RA3) || \
  3198. defined(TARGET_IS_TM4C123_RB1) || \
  3199. defined(TARGET_IS_TM4C123_RB2) || \
  3200. defined(TARGET_IS_TM4C129_RA0) || \
  3201. defined(TARGET_IS_TM4C129_RA1) || \
  3202. defined(TARGET_IS_TM4C129_RA2)
  3203. #define ROM_I2CMasterIntClearEx \
  3204. ((void (*)(uint32_t ui32Base, \
  3205. uint32_t ui32IntFlags))ROM_I2CTABLE[32])
  3206. #endif
  3207. #if defined(TARGET_IS_TM4C123_RA1) || \
  3208. defined(TARGET_IS_TM4C123_RA3) || \
  3209. defined(TARGET_IS_TM4C123_RB1) || \
  3210. defined(TARGET_IS_TM4C123_RB2) || \
  3211. defined(TARGET_IS_TM4C129_RA0) || \
  3212. defined(TARGET_IS_TM4C129_RA1) || \
  3213. defined(TARGET_IS_TM4C129_RA2)
  3214. #define ROM_I2CMasterTimeoutSet \
  3215. ((void (*)(uint32_t ui32Base, \
  3216. uint32_t ui32Value))ROM_I2CTABLE[33])
  3217. #endif
  3218. #if defined(TARGET_IS_TM4C129_RA1) || \
  3219. defined(TARGET_IS_TM4C129_RA2)
  3220. #define ROM_I2CSlaveACKOverride \
  3221. ((void (*)(uint32_t ui32Base, \
  3222. bool bEnable))ROM_I2CTABLE[34])
  3223. #endif
  3224. #if defined(TARGET_IS_TM4C129_RA1) || \
  3225. defined(TARGET_IS_TM4C129_RA2)
  3226. #define ROM_I2CSlaveACKValueSet \
  3227. ((void (*)(uint32_t ui32Base, \
  3228. bool bACK))ROM_I2CTABLE[35])
  3229. #endif
  3230. #if defined(TARGET_IS_TM4C129_RA1) || \
  3231. defined(TARGET_IS_TM4C129_RA2)
  3232. #define ROM_I2CSlaveAddressSet \
  3233. ((void (*)(uint32_t ui32Base, \
  3234. uint8_t ui8AddrNum, \
  3235. uint8_t ui8SlaveAddr))ROM_I2CTABLE[37])
  3236. #endif
  3237. #if defined(TARGET_IS_TM4C123_RA1) || \
  3238. defined(TARGET_IS_TM4C123_RA3) || \
  3239. defined(TARGET_IS_TM4C123_RB1) || \
  3240. defined(TARGET_IS_TM4C123_RB2) || \
  3241. defined(TARGET_IS_TM4C129_RA0) || \
  3242. defined(TARGET_IS_TM4C129_RA1) || \
  3243. defined(TARGET_IS_TM4C129_RA2)
  3244. #define ROM_I2CMasterLineStateGet \
  3245. ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[38])
  3246. #endif
  3247. #if defined(TARGET_IS_TM4C129_RA0) || \
  3248. defined(TARGET_IS_TM4C129_RA1) || \
  3249. defined(TARGET_IS_TM4C129_RA2)
  3250. #define ROM_I2CTxFIFOConfigSet \
  3251. ((void (*)(uint32_t ui32Base, \
  3252. uint32_t ui32Config))ROM_I2CTABLE[39])
  3253. #endif
  3254. #if defined(TARGET_IS_TM4C129_RA0) || \
  3255. defined(TARGET_IS_TM4C129_RA1) || \
  3256. defined(TARGET_IS_TM4C129_RA2)
  3257. #define ROM_I2CTxFIFOFlush \
  3258. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[40])
  3259. #endif
  3260. #if defined(TARGET_IS_TM4C129_RA0) || \
  3261. defined(TARGET_IS_TM4C129_RA1) || \
  3262. defined(TARGET_IS_TM4C129_RA2)
  3263. #define ROM_I2CRxFIFOConfigSet \
  3264. ((void (*)(uint32_t ui32Base, \
  3265. uint32_t ui32Config))ROM_I2CTABLE[41])
  3266. #endif
  3267. #if defined(TARGET_IS_TM4C129_RA0) || \
  3268. defined(TARGET_IS_TM4C129_RA1) || \
  3269. defined(TARGET_IS_TM4C129_RA2)
  3270. #define ROM_I2CRxFIFOFlush \
  3271. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[42])
  3272. #endif
  3273. #if defined(TARGET_IS_TM4C129_RA0) || \
  3274. defined(TARGET_IS_TM4C129_RA1) || \
  3275. defined(TARGET_IS_TM4C129_RA2)
  3276. #define ROM_I2CFIFOStatus \
  3277. ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[43])
  3278. #endif
  3279. #if defined(TARGET_IS_TM4C129_RA0) || \
  3280. defined(TARGET_IS_TM4C129_RA1) || \
  3281. defined(TARGET_IS_TM4C129_RA2)
  3282. #define ROM_I2CFIFODataPut \
  3283. ((void (*)(uint32_t ui32Base, \
  3284. uint8_t ui8Data))ROM_I2CTABLE[44])
  3285. #endif
  3286. #if defined(TARGET_IS_TM4C129_RA0) || \
  3287. defined(TARGET_IS_TM4C129_RA1) || \
  3288. defined(TARGET_IS_TM4C129_RA2)
  3289. #define ROM_I2CFIFODataPutNonBlocking \
  3290. ((uint32_t (*)(uint32_t ui32Base, \
  3291. uint8_t ui8Data))ROM_I2CTABLE[45])
  3292. #endif
  3293. #if defined(TARGET_IS_TM4C129_RA0) || \
  3294. defined(TARGET_IS_TM4C129_RA1) || \
  3295. defined(TARGET_IS_TM4C129_RA2)
  3296. #define ROM_I2CFIFODataGet \
  3297. ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[46])
  3298. #endif
  3299. #if defined(TARGET_IS_TM4C129_RA0) || \
  3300. defined(TARGET_IS_TM4C129_RA1) || \
  3301. defined(TARGET_IS_TM4C129_RA2)
  3302. #define ROM_I2CFIFODataGetNonBlocking \
  3303. ((uint32_t (*)(uint32_t ui32Base, \
  3304. uint8_t *pui8Data))ROM_I2CTABLE[47])
  3305. #endif
  3306. #if defined(TARGET_IS_TM4C129_RA0) || \
  3307. defined(TARGET_IS_TM4C129_RA1) || \
  3308. defined(TARGET_IS_TM4C129_RA2)
  3309. #define ROM_I2CMasterBurstLengthSet \
  3310. ((void (*)(uint32_t ui32Base, \
  3311. uint8_t ui8Length))ROM_I2CTABLE[48])
  3312. #endif
  3313. #if defined(TARGET_IS_TM4C129_RA0) || \
  3314. defined(TARGET_IS_TM4C129_RA1) || \
  3315. defined(TARGET_IS_TM4C129_RA2)
  3316. #define ROM_I2CMasterBurstCountGet \
  3317. ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[49])
  3318. #endif
  3319. #if defined(TARGET_IS_TM4C129_RA1) || \
  3320. defined(TARGET_IS_TM4C129_RA2)
  3321. #define ROM_I2CSlaveFIFODisable \
  3322. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[50])
  3323. #endif
  3324. #if defined(TARGET_IS_TM4C129_RA1) || \
  3325. defined(TARGET_IS_TM4C129_RA2)
  3326. #define ROM_I2CSlaveFIFOEnable \
  3327. ((void (*)(uint32_t ui32Base, \
  3328. uint32_t ui32Config))ROM_I2CTABLE[51])
  3329. #endif
  3330. #if defined(TARGET_IS_TM4C129_RA0) || \
  3331. defined(TARGET_IS_TM4C129_RA1) || \
  3332. defined(TARGET_IS_TM4C129_RA2)
  3333. #define ROM_I2CMasterGlitchFilterConfigSet \
  3334. ((void (*)(uint32_t ui32Base, \
  3335. uint32_t ui32Config))ROM_I2CTABLE[54])
  3336. #endif
  3337. //*****************************************************************************
  3338. //
  3339. // Macros for calling ROM functions in the Interrupt API.
  3340. //
  3341. //*****************************************************************************
  3342. #if defined(TARGET_IS_TM4C123_RA1) || \
  3343. defined(TARGET_IS_TM4C123_RA3) || \
  3344. defined(TARGET_IS_TM4C123_RB1) || \
  3345. defined(TARGET_IS_TM4C123_RB2) || \
  3346. defined(TARGET_IS_TM4C129_RA0) || \
  3347. defined(TARGET_IS_TM4C129_RA1) || \
  3348. defined(TARGET_IS_TM4C129_RA2)
  3349. #define ROM_IntEnable \
  3350. ((void (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[0])
  3351. #endif
  3352. #if defined(TARGET_IS_TM4C123_RA1) || \
  3353. defined(TARGET_IS_TM4C123_RA3) || \
  3354. defined(TARGET_IS_TM4C123_RB1) || \
  3355. defined(TARGET_IS_TM4C123_RB2) || \
  3356. defined(TARGET_IS_TM4C129_RA0) || \
  3357. defined(TARGET_IS_TM4C129_RA1) || \
  3358. defined(TARGET_IS_TM4C129_RA2)
  3359. #define ROM_IntMasterEnable \
  3360. ((bool (*)(void))ROM_INTERRUPTTABLE[1])
  3361. #endif
  3362. #if defined(TARGET_IS_TM4C123_RA1) || \
  3363. defined(TARGET_IS_TM4C123_RA3) || \
  3364. defined(TARGET_IS_TM4C123_RB1) || \
  3365. defined(TARGET_IS_TM4C123_RB2) || \
  3366. defined(TARGET_IS_TM4C129_RA0) || \
  3367. defined(TARGET_IS_TM4C129_RA1) || \
  3368. defined(TARGET_IS_TM4C129_RA2)
  3369. #define ROM_IntMasterDisable \
  3370. ((bool (*)(void))ROM_INTERRUPTTABLE[2])
  3371. #endif
  3372. #if defined(TARGET_IS_TM4C123_RA1) || \
  3373. defined(TARGET_IS_TM4C123_RA3) || \
  3374. defined(TARGET_IS_TM4C123_RB1) || \
  3375. defined(TARGET_IS_TM4C123_RB2) || \
  3376. defined(TARGET_IS_TM4C129_RA0) || \
  3377. defined(TARGET_IS_TM4C129_RA1) || \
  3378. defined(TARGET_IS_TM4C129_RA2)
  3379. #define ROM_IntDisable \
  3380. ((void (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[3])
  3381. #endif
  3382. #if defined(TARGET_IS_TM4C123_RA1) || \
  3383. defined(TARGET_IS_TM4C123_RA3) || \
  3384. defined(TARGET_IS_TM4C123_RB1) || \
  3385. defined(TARGET_IS_TM4C123_RB2) || \
  3386. defined(TARGET_IS_TM4C129_RA0) || \
  3387. defined(TARGET_IS_TM4C129_RA1) || \
  3388. defined(TARGET_IS_TM4C129_RA2)
  3389. #define ROM_IntPriorityGroupingSet \
  3390. ((void (*)(uint32_t ui32Bits))ROM_INTERRUPTTABLE[4])
  3391. #endif
  3392. #if defined(TARGET_IS_TM4C123_RA1) || \
  3393. defined(TARGET_IS_TM4C123_RA3) || \
  3394. defined(TARGET_IS_TM4C123_RB1) || \
  3395. defined(TARGET_IS_TM4C123_RB2) || \
  3396. defined(TARGET_IS_TM4C129_RA0) || \
  3397. defined(TARGET_IS_TM4C129_RA1) || \
  3398. defined(TARGET_IS_TM4C129_RA2)
  3399. #define ROM_IntPriorityGroupingGet \
  3400. ((uint32_t (*)(void))ROM_INTERRUPTTABLE[5])
  3401. #endif
  3402. #if defined(TARGET_IS_TM4C123_RA1) || \
  3403. defined(TARGET_IS_TM4C123_RA3) || \
  3404. defined(TARGET_IS_TM4C123_RB1) || \
  3405. defined(TARGET_IS_TM4C123_RB2) || \
  3406. defined(TARGET_IS_TM4C129_RA0) || \
  3407. defined(TARGET_IS_TM4C129_RA1) || \
  3408. defined(TARGET_IS_TM4C129_RA2)
  3409. #define ROM_IntPrioritySet \
  3410. ((void (*)(uint32_t ui32Interrupt, \
  3411. uint8_t ui8Priority))ROM_INTERRUPTTABLE[6])
  3412. #endif
  3413. #if defined(TARGET_IS_TM4C123_RA1) || \
  3414. defined(TARGET_IS_TM4C123_RA3) || \
  3415. defined(TARGET_IS_TM4C123_RB1) || \
  3416. defined(TARGET_IS_TM4C123_RB2) || \
  3417. defined(TARGET_IS_TM4C129_RA0) || \
  3418. defined(TARGET_IS_TM4C129_RA1) || \
  3419. defined(TARGET_IS_TM4C129_RA2)
  3420. #define ROM_IntPriorityGet \
  3421. ((int32_t (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[7])
  3422. #endif
  3423. #if defined(TARGET_IS_TM4C123_RA1) || \
  3424. defined(TARGET_IS_TM4C123_RA3) || \
  3425. defined(TARGET_IS_TM4C123_RB1) || \
  3426. defined(TARGET_IS_TM4C123_RB2) || \
  3427. defined(TARGET_IS_TM4C129_RA0) || \
  3428. defined(TARGET_IS_TM4C129_RA1) || \
  3429. defined(TARGET_IS_TM4C129_RA2)
  3430. #define ROM_IntPendSet \
  3431. ((void (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[8])
  3432. #endif
  3433. #if defined(TARGET_IS_TM4C123_RA1) || \
  3434. defined(TARGET_IS_TM4C123_RA3) || \
  3435. defined(TARGET_IS_TM4C123_RB1) || \
  3436. defined(TARGET_IS_TM4C123_RB2) || \
  3437. defined(TARGET_IS_TM4C129_RA0) || \
  3438. defined(TARGET_IS_TM4C129_RA1) || \
  3439. defined(TARGET_IS_TM4C129_RA2)
  3440. #define ROM_IntPendClear \
  3441. ((void (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[9])
  3442. #endif
  3443. #if defined(TARGET_IS_TM4C123_RA1) || \
  3444. defined(TARGET_IS_TM4C123_RA3) || \
  3445. defined(TARGET_IS_TM4C123_RB1) || \
  3446. defined(TARGET_IS_TM4C123_RB2) || \
  3447. defined(TARGET_IS_TM4C129_RA0) || \
  3448. defined(TARGET_IS_TM4C129_RA1) || \
  3449. defined(TARGET_IS_TM4C129_RA2)
  3450. #define ROM_IntPriorityMaskSet \
  3451. ((void (*)(uint32_t ui32PriorityMask))ROM_INTERRUPTTABLE[10])
  3452. #endif
  3453. #if defined(TARGET_IS_TM4C123_RA1) || \
  3454. defined(TARGET_IS_TM4C123_RA3) || \
  3455. defined(TARGET_IS_TM4C123_RB1) || \
  3456. defined(TARGET_IS_TM4C123_RB2) || \
  3457. defined(TARGET_IS_TM4C129_RA0) || \
  3458. defined(TARGET_IS_TM4C129_RA1) || \
  3459. defined(TARGET_IS_TM4C129_RA2)
  3460. #define ROM_IntPriorityMaskGet \
  3461. ((uint32_t (*)(void))ROM_INTERRUPTTABLE[11])
  3462. #endif
  3463. #if defined(TARGET_IS_TM4C123_RB1) || \
  3464. defined(TARGET_IS_TM4C129_RA0) || \
  3465. defined(TARGET_IS_TM4C129_RA1) || \
  3466. defined(TARGET_IS_TM4C129_RA2)
  3467. #define ROM_IntIsEnabled \
  3468. ((uint32_t (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[12])
  3469. #endif
  3470. #if defined(TARGET_IS_TM4C129_RA1) || \
  3471. defined(TARGET_IS_TM4C129_RA2)
  3472. #define ROM_IntTrigger \
  3473. ((void (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[13])
  3474. #endif
  3475. //*****************************************************************************
  3476. //
  3477. // Macros for calling ROM functions in the LCD API.
  3478. //
  3479. //*****************************************************************************
  3480. #if defined(TARGET_IS_TM4C129_RA0) || \
  3481. defined(TARGET_IS_TM4C129_RA1) || \
  3482. defined(TARGET_IS_TM4C129_RA2)
  3483. #define ROM_LCDIntStatus \
  3484. ((uint32_t (*)(uint32_t ui32Base, \
  3485. bool bMasked))ROM_LCDTABLE[0])
  3486. #endif
  3487. #if defined(TARGET_IS_TM4C129_RA0) || \
  3488. defined(TARGET_IS_TM4C129_RA1) || \
  3489. defined(TARGET_IS_TM4C129_RA2)
  3490. #define ROM_LCDClockReset \
  3491. ((void (*)(uint32_t ui32Base, \
  3492. uint32_t ui32Clocks))ROM_LCDTABLE[1])
  3493. #endif
  3494. #if defined(TARGET_IS_TM4C129_RA0) || \
  3495. defined(TARGET_IS_TM4C129_RA1) || \
  3496. defined(TARGET_IS_TM4C129_RA2)
  3497. #define ROM_LCDDMAConfigSet \
  3498. ((void (*)(uint32_t ui32Base, \
  3499. uint32_t ui32Config))ROM_LCDTABLE[2])
  3500. #endif
  3501. #if defined(TARGET_IS_TM4C129_RA0) || \
  3502. defined(TARGET_IS_TM4C129_RA1) || \
  3503. defined(TARGET_IS_TM4C129_RA2)
  3504. #define ROM_LCDIDDCommandWrite \
  3505. ((void (*)(uint32_t ui32Base, \
  3506. uint32_t ui32CS, \
  3507. uint16_t ui16Cmd))ROM_LCDTABLE[3])
  3508. #endif
  3509. #if defined(TARGET_IS_TM4C129_RA0) || \
  3510. defined(TARGET_IS_TM4C129_RA1) || \
  3511. defined(TARGET_IS_TM4C129_RA2)
  3512. #define ROM_LCDIDDConfigSet \
  3513. ((void (*)(uint32_t ui32Base, \
  3514. uint32_t ui32Config))ROM_LCDTABLE[4])
  3515. #endif
  3516. #if defined(TARGET_IS_TM4C129_RA0) || \
  3517. defined(TARGET_IS_TM4C129_RA1) || \
  3518. defined(TARGET_IS_TM4C129_RA2)
  3519. #define ROM_LCDIDDDataRead \
  3520. ((uint16_t (*)(uint32_t ui32Base, \
  3521. uint32_t ui32CS))ROM_LCDTABLE[5])
  3522. #endif
  3523. #if defined(TARGET_IS_TM4C129_RA0) || \
  3524. defined(TARGET_IS_TM4C129_RA1) || \
  3525. defined(TARGET_IS_TM4C129_RA2)
  3526. #define ROM_LCDIDDDataWrite \
  3527. ((void (*)(uint32_t ui32Base, \
  3528. uint32_t ui32CS, \
  3529. uint16_t ui16Data))ROM_LCDTABLE[6])
  3530. #endif
  3531. #if defined(TARGET_IS_TM4C129_RA0) || \
  3532. defined(TARGET_IS_TM4C129_RA1) || \
  3533. defined(TARGET_IS_TM4C129_RA2)
  3534. #define ROM_LCDIDDDMADisable \
  3535. ((void (*)(uint32_t ui32Base))ROM_LCDTABLE[7])
  3536. #endif
  3537. #if defined(TARGET_IS_TM4C129_RA0) || \
  3538. defined(TARGET_IS_TM4C129_RA1) || \
  3539. defined(TARGET_IS_TM4C129_RA2)
  3540. #define ROM_LCDIDDDMAWrite \
  3541. ((void (*)(uint32_t ui32Base, \
  3542. uint32_t ui32CS, \
  3543. const uint32_t *pui32Data, \
  3544. uint32_t ui32Count))ROM_LCDTABLE[8])
  3545. #endif
  3546. #if defined(TARGET_IS_TM4C129_RA0) || \
  3547. defined(TARGET_IS_TM4C129_RA1) || \
  3548. defined(TARGET_IS_TM4C129_RA2)
  3549. #define ROM_LCDIDDIndexedRead \
  3550. ((uint16_t (*)(uint32_t ui32Base, \
  3551. uint32_t ui32CS, \
  3552. uint16_t ui16Addr))ROM_LCDTABLE[9])
  3553. #endif
  3554. #if defined(TARGET_IS_TM4C129_RA0) || \
  3555. defined(TARGET_IS_TM4C129_RA1) || \
  3556. defined(TARGET_IS_TM4C129_RA2)
  3557. #define ROM_LCDIDDIndexedWrite \
  3558. ((void (*)(uint32_t ui32Base, \
  3559. uint32_t ui32CS, \
  3560. uint16_t ui16Addr, \
  3561. uint16_t ui16Data))ROM_LCDTABLE[10])
  3562. #endif
  3563. #if defined(TARGET_IS_TM4C129_RA0) || \
  3564. defined(TARGET_IS_TM4C129_RA1) || \
  3565. defined(TARGET_IS_TM4C129_RA2)
  3566. #define ROM_LCDIDDStatusRead \
  3567. ((uint16_t (*)(uint32_t ui32Base, \
  3568. uint32_t ui32CS))ROM_LCDTABLE[11])
  3569. #endif
  3570. #if defined(TARGET_IS_TM4C129_RA0) || \
  3571. defined(TARGET_IS_TM4C129_RA1) || \
  3572. defined(TARGET_IS_TM4C129_RA2)
  3573. #define ROM_LCDIDDTimingSet \
  3574. ((void (*)(uint32_t ui32Base, \
  3575. uint32_t ui32CS, \
  3576. const tLCDIDDTiming *pTiming))ROM_LCDTABLE[12])
  3577. #endif
  3578. #if defined(TARGET_IS_TM4C129_RA0) || \
  3579. defined(TARGET_IS_TM4C129_RA1) || \
  3580. defined(TARGET_IS_TM4C129_RA2)
  3581. #define ROM_LCDIntClear \
  3582. ((void (*)(uint32_t ui32Base, \
  3583. uint32_t ui32IntFlags))ROM_LCDTABLE[13])
  3584. #endif
  3585. #if defined(TARGET_IS_TM4C129_RA0) || \
  3586. defined(TARGET_IS_TM4C129_RA1) || \
  3587. defined(TARGET_IS_TM4C129_RA2)
  3588. #define ROM_LCDIntDisable \
  3589. ((void (*)(uint32_t ui32Base, \
  3590. uint32_t ui32IntFlags))ROM_LCDTABLE[14])
  3591. #endif
  3592. #if defined(TARGET_IS_TM4C129_RA0) || \
  3593. defined(TARGET_IS_TM4C129_RA1) || \
  3594. defined(TARGET_IS_TM4C129_RA2)
  3595. #define ROM_LCDIntEnable \
  3596. ((void (*)(uint32_t ui32Base, \
  3597. uint32_t ui32IntFlags))ROM_LCDTABLE[15])
  3598. #endif
  3599. #if defined(TARGET_IS_TM4C129_RA0) || \
  3600. defined(TARGET_IS_TM4C129_RA1) || \
  3601. defined(TARGET_IS_TM4C129_RA2)
  3602. #define ROM_LCDModeSet \
  3603. ((uint32_t (*)(uint32_t ui32Base, \
  3604. uint8_t ui8Mode, \
  3605. uint32_t ui32PixClk, \
  3606. uint32_t ui32SysClk))ROM_LCDTABLE[16])
  3607. #endif
  3608. #if defined(TARGET_IS_TM4C129_RA0) || \
  3609. defined(TARGET_IS_TM4C129_RA1) || \
  3610. defined(TARGET_IS_TM4C129_RA2)
  3611. #define ROM_LCDRasterACBiasIntCountSet \
  3612. ((void (*)(uint32_t ui32Base, \
  3613. uint8_t ui8Count))ROM_LCDTABLE[17])
  3614. #endif
  3615. #if defined(TARGET_IS_TM4C129_RA0) || \
  3616. defined(TARGET_IS_TM4C129_RA1) || \
  3617. defined(TARGET_IS_TM4C129_RA2)
  3618. #define ROM_LCDRasterConfigSet \
  3619. ((void (*)(uint32_t ui32Base, \
  3620. uint32_t ui32Config, \
  3621. uint8_t ui8PalLoadDelay))ROM_LCDTABLE[18])
  3622. #endif
  3623. #if defined(TARGET_IS_TM4C129_RA0) || \
  3624. defined(TARGET_IS_TM4C129_RA1) || \
  3625. defined(TARGET_IS_TM4C129_RA2)
  3626. #define ROM_LCDRasterDisable \
  3627. ((void (*)(uint32_t ui32Base))ROM_LCDTABLE[19])
  3628. #endif
  3629. #if defined(TARGET_IS_TM4C129_RA0) || \
  3630. defined(TARGET_IS_TM4C129_RA1) || \
  3631. defined(TARGET_IS_TM4C129_RA2)
  3632. #define ROM_LCDRasterEnable \
  3633. ((void (*)(uint32_t ui32Base))ROM_LCDTABLE[20])
  3634. #endif
  3635. #if defined(TARGET_IS_TM4C129_RA0) || \
  3636. defined(TARGET_IS_TM4C129_RA1) || \
  3637. defined(TARGET_IS_TM4C129_RA2)
  3638. #define ROM_LCDRasterFrameBufferSet \
  3639. ((void (*)(uint32_t ui32Base, \
  3640. uint8_t ui8Buffer, \
  3641. uint32_t *pui32Addr, \
  3642. uint32_t ui32NumBytes))ROM_LCDTABLE[21])
  3643. #endif
  3644. #if defined(TARGET_IS_TM4C129_RA0) || \
  3645. defined(TARGET_IS_TM4C129_RA1) || \
  3646. defined(TARGET_IS_TM4C129_RA2)
  3647. #define ROM_LCDRasterPaletteSet \
  3648. ((void (*)(uint32_t ui32Base, \
  3649. uint32_t ui32Type, \
  3650. uint32_t *pui32PalAddr, \
  3651. const uint32_t *pui32SrcColors, \
  3652. uint32_t ui32Start, \
  3653. uint32_t ui32Count))ROM_LCDTABLE[22])
  3654. #endif
  3655. #if defined(TARGET_IS_TM4C129_RA0) || \
  3656. defined(TARGET_IS_TM4C129_RA1) || \
  3657. defined(TARGET_IS_TM4C129_RA2)
  3658. #define ROM_LCDRasterSubPanelConfigSet \
  3659. ((void (*)(uint32_t ui32Base, \
  3660. uint32_t ui32Flags, \
  3661. uint32_t ui32BottomLines, \
  3662. uint32_t ui32DefaultPixel))ROM_LCDTABLE[23])
  3663. #endif
  3664. #if defined(TARGET_IS_TM4C129_RA0) || \
  3665. defined(TARGET_IS_TM4C129_RA1) || \
  3666. defined(TARGET_IS_TM4C129_RA2)
  3667. #define ROM_LCDRasterSubPanelDisable \
  3668. ((void (*)(uint32_t ui32Base))ROM_LCDTABLE[24])
  3669. #endif
  3670. #if defined(TARGET_IS_TM4C129_RA0) || \
  3671. defined(TARGET_IS_TM4C129_RA1) || \
  3672. defined(TARGET_IS_TM4C129_RA2)
  3673. #define ROM_LCDRasterSubPanelEnable \
  3674. ((void (*)(uint32_t ui32Base))ROM_LCDTABLE[25])
  3675. #endif
  3676. #if defined(TARGET_IS_TM4C129_RA0) || \
  3677. defined(TARGET_IS_TM4C129_RA1) || \
  3678. defined(TARGET_IS_TM4C129_RA2)
  3679. #define ROM_LCDRasterTimingSet \
  3680. ((void (*)(uint32_t ui32Base, \
  3681. const tLCDRasterTiming *pTiming))ROM_LCDTABLE[26])
  3682. #endif
  3683. #if defined(TARGET_IS_TM4C129_RA1) || \
  3684. defined(TARGET_IS_TM4C129_RA2)
  3685. #define ROM_LCDRasterEnabled \
  3686. ((bool (*)(uint32_t ui32Base))ROM_LCDTABLE[27])
  3687. #endif
  3688. //*****************************************************************************
  3689. //
  3690. // Macros for calling ROM functions in the MPU API.
  3691. //
  3692. //*****************************************************************************
  3693. #if defined(TARGET_IS_TM4C123_RA1) || \
  3694. defined(TARGET_IS_TM4C123_RA3) || \
  3695. defined(TARGET_IS_TM4C123_RB1) || \
  3696. defined(TARGET_IS_TM4C123_RB2) || \
  3697. defined(TARGET_IS_TM4C129_RA0) || \
  3698. defined(TARGET_IS_TM4C129_RA1) || \
  3699. defined(TARGET_IS_TM4C129_RA2)
  3700. #define ROM_MPUEnable \
  3701. ((void (*)(uint32_t ui32MPUConfig))ROM_MPUTABLE[0])
  3702. #endif
  3703. #if defined(TARGET_IS_TM4C123_RA1) || \
  3704. defined(TARGET_IS_TM4C123_RA3) || \
  3705. defined(TARGET_IS_TM4C123_RB1) || \
  3706. defined(TARGET_IS_TM4C123_RB2) || \
  3707. defined(TARGET_IS_TM4C129_RA0) || \
  3708. defined(TARGET_IS_TM4C129_RA1) || \
  3709. defined(TARGET_IS_TM4C129_RA2)
  3710. #define ROM_MPUDisable \
  3711. ((void (*)(void))ROM_MPUTABLE[1])
  3712. #endif
  3713. #if defined(TARGET_IS_TM4C123_RA1) || \
  3714. defined(TARGET_IS_TM4C123_RA3) || \
  3715. defined(TARGET_IS_TM4C123_RB1) || \
  3716. defined(TARGET_IS_TM4C123_RB2) || \
  3717. defined(TARGET_IS_TM4C129_RA0) || \
  3718. defined(TARGET_IS_TM4C129_RA1) || \
  3719. defined(TARGET_IS_TM4C129_RA2)
  3720. #define ROM_MPURegionCountGet \
  3721. ((uint32_t (*)(void))ROM_MPUTABLE[2])
  3722. #endif
  3723. #if defined(TARGET_IS_TM4C123_RA1) || \
  3724. defined(TARGET_IS_TM4C123_RA3) || \
  3725. defined(TARGET_IS_TM4C123_RB1) || \
  3726. defined(TARGET_IS_TM4C123_RB2) || \
  3727. defined(TARGET_IS_TM4C129_RA0) || \
  3728. defined(TARGET_IS_TM4C129_RA1) || \
  3729. defined(TARGET_IS_TM4C129_RA2)
  3730. #define ROM_MPURegionEnable \
  3731. ((void (*)(uint32_t ui32Region))ROM_MPUTABLE[3])
  3732. #endif
  3733. #if defined(TARGET_IS_TM4C123_RA1) || \
  3734. defined(TARGET_IS_TM4C123_RA3) || \
  3735. defined(TARGET_IS_TM4C123_RB1) || \
  3736. defined(TARGET_IS_TM4C123_RB2) || \
  3737. defined(TARGET_IS_TM4C129_RA0) || \
  3738. defined(TARGET_IS_TM4C129_RA1) || \
  3739. defined(TARGET_IS_TM4C129_RA2)
  3740. #define ROM_MPURegionDisable \
  3741. ((void (*)(uint32_t ui32Region))ROM_MPUTABLE[4])
  3742. #endif
  3743. #if defined(TARGET_IS_TM4C123_RA1) || \
  3744. defined(TARGET_IS_TM4C123_RA3) || \
  3745. defined(TARGET_IS_TM4C123_RB1) || \
  3746. defined(TARGET_IS_TM4C123_RB2) || \
  3747. defined(TARGET_IS_TM4C129_RA0) || \
  3748. defined(TARGET_IS_TM4C129_RA1) || \
  3749. defined(TARGET_IS_TM4C129_RA2)
  3750. #define ROM_MPURegionSet \
  3751. ((void (*)(uint32_t ui32Region, \
  3752. uint32_t ui32Addr, \
  3753. uint32_t ui32Flags))ROM_MPUTABLE[5])
  3754. #endif
  3755. #if defined(TARGET_IS_TM4C123_RA1) || \
  3756. defined(TARGET_IS_TM4C123_RA3) || \
  3757. defined(TARGET_IS_TM4C123_RB1) || \
  3758. defined(TARGET_IS_TM4C123_RB2) || \
  3759. defined(TARGET_IS_TM4C129_RA0) || \
  3760. defined(TARGET_IS_TM4C129_RA1) || \
  3761. defined(TARGET_IS_TM4C129_RA2)
  3762. #define ROM_MPURegionGet \
  3763. ((void (*)(uint32_t ui32Region, \
  3764. uint32_t *pui32Addr, \
  3765. uint32_t *pui32Flags))ROM_MPUTABLE[6])
  3766. #endif
  3767. //*****************************************************************************
  3768. //
  3769. // Macros for calling ROM functions in the OneWire API.
  3770. //
  3771. //*****************************************************************************
  3772. #if defined(TARGET_IS_TM4C129_RA0) || \
  3773. defined(TARGET_IS_TM4C129_RA1) || \
  3774. defined(TARGET_IS_TM4C129_RA2)
  3775. #define ROM_OneWireIntStatus \
  3776. ((uint32_t (*)(uint32_t ui32Base, \
  3777. bool bMasked))ROM_ONEWIRETABLE[0])
  3778. #endif
  3779. #if defined(TARGET_IS_TM4C129_RA0) || \
  3780. defined(TARGET_IS_TM4C129_RA1) || \
  3781. defined(TARGET_IS_TM4C129_RA2)
  3782. #define ROM_OneWireBusReset \
  3783. ((void (*)(uint32_t ui32Base))ROM_ONEWIRETABLE[1])
  3784. #endif
  3785. #if defined(TARGET_IS_TM4C129_RA0) || \
  3786. defined(TARGET_IS_TM4C129_RA1) || \
  3787. defined(TARGET_IS_TM4C129_RA2)
  3788. #define ROM_OneWireBusStatus \
  3789. ((uint32_t (*)(uint32_t ui32Base))ROM_ONEWIRETABLE[2])
  3790. #endif
  3791. #if defined(TARGET_IS_TM4C129_RA0) || \
  3792. defined(TARGET_IS_TM4C129_RA1) || \
  3793. defined(TARGET_IS_TM4C129_RA2)
  3794. #define ROM_OneWireDataGet \
  3795. ((void (*)(uint32_t u3i2Base, \
  3796. uint32_t *pui32Data))ROM_ONEWIRETABLE[3])
  3797. #endif
  3798. #if defined(TARGET_IS_TM4C129_RA0) || \
  3799. defined(TARGET_IS_TM4C129_RA1) || \
  3800. defined(TARGET_IS_TM4C129_RA2)
  3801. #define ROM_OneWireDataGetNonBlocking \
  3802. ((bool (*)(uint32_t ui32Base, \
  3803. uint32_t *pui32Data))ROM_ONEWIRETABLE[4])
  3804. #endif
  3805. #if defined(TARGET_IS_TM4C129_RA0) || \
  3806. defined(TARGET_IS_TM4C129_RA1) || \
  3807. defined(TARGET_IS_TM4C129_RA2)
  3808. #define ROM_OneWireInit \
  3809. ((void (*)(uint32_t ui32Base, \
  3810. uint32_t ui32InitFlags))ROM_ONEWIRETABLE[5])
  3811. #endif
  3812. #if defined(TARGET_IS_TM4C129_RA0) || \
  3813. defined(TARGET_IS_TM4C129_RA1) || \
  3814. defined(TARGET_IS_TM4C129_RA2)
  3815. #define ROM_OneWireIntClear \
  3816. ((void (*)(uint32_t ui32Base, \
  3817. uint32_t ui32IntFlags))ROM_ONEWIRETABLE[6])
  3818. #endif
  3819. #if defined(TARGET_IS_TM4C129_RA0) || \
  3820. defined(TARGET_IS_TM4C129_RA1) || \
  3821. defined(TARGET_IS_TM4C129_RA2)
  3822. #define ROM_OneWireIntDisable \
  3823. ((void (*)(uint32_t ui32Base, \
  3824. uint32_t ui32IntFlags))ROM_ONEWIRETABLE[7])
  3825. #endif
  3826. #if defined(TARGET_IS_TM4C129_RA0) || \
  3827. defined(TARGET_IS_TM4C129_RA1) || \
  3828. defined(TARGET_IS_TM4C129_RA2)
  3829. #define ROM_OneWireIntEnable \
  3830. ((void (*)(uint32_t ui32Base, \
  3831. uint32_t ui32IntFlags))ROM_ONEWIRETABLE[8])
  3832. #endif
  3833. #if defined(TARGET_IS_TM4C129_RA0) || \
  3834. defined(TARGET_IS_TM4C129_RA1) || \
  3835. defined(TARGET_IS_TM4C129_RA2)
  3836. #define ROM_OneWireTransaction \
  3837. ((void (*)(uint32_t ui32Base, \
  3838. uint32_t ui32OpFlags, \
  3839. uint32_t ui32Data, \
  3840. uint32_t ui32BitCnt))ROM_ONEWIRETABLE[9])
  3841. #endif
  3842. #if defined(TARGET_IS_TM4C129_RA0) || \
  3843. defined(TARGET_IS_TM4C129_RA1) || \
  3844. defined(TARGET_IS_TM4C129_RA2)
  3845. #define ROM_OneWireDMADisable \
  3846. ((void (*)(uint32_t ui32Base, \
  3847. uint32_t ui32DMAFlags))ROM_ONEWIRETABLE[10])
  3848. #endif
  3849. #if defined(TARGET_IS_TM4C129_RA0) || \
  3850. defined(TARGET_IS_TM4C129_RA1) || \
  3851. defined(TARGET_IS_TM4C129_RA2)
  3852. #define ROM_OneWireDMAEnable \
  3853. ((void (*)(uint32_t ui32Base, \
  3854. uint32_t ui32DMAFlags))ROM_ONEWIRETABLE[11])
  3855. #endif
  3856. //*****************************************************************************
  3857. //
  3858. // Macros for calling ROM functions in the PWM API.
  3859. //
  3860. //*****************************************************************************
  3861. #if defined(TARGET_IS_TM4C123_RA1) || \
  3862. defined(TARGET_IS_TM4C123_RA3) || \
  3863. defined(TARGET_IS_TM4C123_RB1) || \
  3864. defined(TARGET_IS_TM4C123_RB2) || \
  3865. defined(TARGET_IS_TM4C129_RA0) || \
  3866. defined(TARGET_IS_TM4C129_RA1) || \
  3867. defined(TARGET_IS_TM4C129_RA2)
  3868. #define ROM_PWMPulseWidthSet \
  3869. ((void (*)(uint32_t ui32Base, \
  3870. uint32_t ui32PWMOut, \
  3871. uint32_t ui32Width))ROM_PWMTABLE[0])
  3872. #endif
  3873. #if defined(TARGET_IS_TM4C123_RA1) || \
  3874. defined(TARGET_IS_TM4C123_RA3) || \
  3875. defined(TARGET_IS_TM4C123_RB1) || \
  3876. defined(TARGET_IS_TM4C123_RB2) || \
  3877. defined(TARGET_IS_TM4C129_RA0) || \
  3878. defined(TARGET_IS_TM4C129_RA1) || \
  3879. defined(TARGET_IS_TM4C129_RA2)
  3880. #define ROM_PWMGenConfigure \
  3881. ((void (*)(uint32_t ui32Base, \
  3882. uint32_t ui32Gen, \
  3883. uint32_t ui32Config))ROM_PWMTABLE[1])
  3884. #endif
  3885. #if defined(TARGET_IS_TM4C123_RA1) || \
  3886. defined(TARGET_IS_TM4C123_RA3) || \
  3887. defined(TARGET_IS_TM4C123_RB1) || \
  3888. defined(TARGET_IS_TM4C123_RB2) || \
  3889. defined(TARGET_IS_TM4C129_RA0) || \
  3890. defined(TARGET_IS_TM4C129_RA1) || \
  3891. defined(TARGET_IS_TM4C129_RA2)
  3892. #define ROM_PWMGenPeriodSet \
  3893. ((void (*)(uint32_t ui32Base, \
  3894. uint32_t ui32Gen, \
  3895. uint32_t ui32Period))ROM_PWMTABLE[2])
  3896. #endif
  3897. #if defined(TARGET_IS_TM4C123_RA1) || \
  3898. defined(TARGET_IS_TM4C123_RA3) || \
  3899. defined(TARGET_IS_TM4C123_RB1) || \
  3900. defined(TARGET_IS_TM4C123_RB2) || \
  3901. defined(TARGET_IS_TM4C129_RA0) || \
  3902. defined(TARGET_IS_TM4C129_RA1) || \
  3903. defined(TARGET_IS_TM4C129_RA2)
  3904. #define ROM_PWMGenPeriodGet \
  3905. ((uint32_t (*)(uint32_t ui32Base, \
  3906. uint32_t ui32Gen))ROM_PWMTABLE[3])
  3907. #endif
  3908. #if defined(TARGET_IS_TM4C123_RA1) || \
  3909. defined(TARGET_IS_TM4C123_RA3) || \
  3910. defined(TARGET_IS_TM4C123_RB1) || \
  3911. defined(TARGET_IS_TM4C123_RB2) || \
  3912. defined(TARGET_IS_TM4C129_RA0) || \
  3913. defined(TARGET_IS_TM4C129_RA1) || \
  3914. defined(TARGET_IS_TM4C129_RA2)
  3915. #define ROM_PWMGenEnable \
  3916. ((void (*)(uint32_t ui32Base, \
  3917. uint32_t ui32Gen))ROM_PWMTABLE[4])
  3918. #endif
  3919. #if defined(TARGET_IS_TM4C123_RA1) || \
  3920. defined(TARGET_IS_TM4C123_RA3) || \
  3921. defined(TARGET_IS_TM4C123_RB1) || \
  3922. defined(TARGET_IS_TM4C123_RB2) || \
  3923. defined(TARGET_IS_TM4C129_RA0) || \
  3924. defined(TARGET_IS_TM4C129_RA1) || \
  3925. defined(TARGET_IS_TM4C129_RA2)
  3926. #define ROM_PWMGenDisable \
  3927. ((void (*)(uint32_t ui32Base, \
  3928. uint32_t ui32Gen))ROM_PWMTABLE[5])
  3929. #endif
  3930. #if defined(TARGET_IS_TM4C123_RA1) || \
  3931. defined(TARGET_IS_TM4C123_RA3) || \
  3932. defined(TARGET_IS_TM4C123_RB1) || \
  3933. defined(TARGET_IS_TM4C123_RB2) || \
  3934. defined(TARGET_IS_TM4C129_RA0) || \
  3935. defined(TARGET_IS_TM4C129_RA1) || \
  3936. defined(TARGET_IS_TM4C129_RA2)
  3937. #define ROM_PWMPulseWidthGet \
  3938. ((uint32_t (*)(uint32_t ui32Base, \
  3939. uint32_t ui32PWMOut))ROM_PWMTABLE[6])
  3940. #endif
  3941. #if defined(TARGET_IS_TM4C123_RA1) || \
  3942. defined(TARGET_IS_TM4C123_RA3) || \
  3943. defined(TARGET_IS_TM4C123_RB1) || \
  3944. defined(TARGET_IS_TM4C123_RB2) || \
  3945. defined(TARGET_IS_TM4C129_RA0) || \
  3946. defined(TARGET_IS_TM4C129_RA1) || \
  3947. defined(TARGET_IS_TM4C129_RA2)
  3948. #define ROM_PWMDeadBandEnable \
  3949. ((void (*)(uint32_t ui32Base, \
  3950. uint32_t ui32Gen, \
  3951. uint16_t ui16Rise, \
  3952. uint16_t ui16Fall))ROM_PWMTABLE[7])
  3953. #endif
  3954. #if defined(TARGET_IS_TM4C123_RA1) || \
  3955. defined(TARGET_IS_TM4C123_RA3) || \
  3956. defined(TARGET_IS_TM4C123_RB1) || \
  3957. defined(TARGET_IS_TM4C123_RB2) || \
  3958. defined(TARGET_IS_TM4C129_RA0) || \
  3959. defined(TARGET_IS_TM4C129_RA1) || \
  3960. defined(TARGET_IS_TM4C129_RA2)
  3961. #define ROM_PWMDeadBandDisable \
  3962. ((void (*)(uint32_t ui32Base, \
  3963. uint32_t ui32Gen))ROM_PWMTABLE[8])
  3964. #endif
  3965. #if defined(TARGET_IS_TM4C123_RA1) || \
  3966. defined(TARGET_IS_TM4C123_RA3) || \
  3967. defined(TARGET_IS_TM4C123_RB1) || \
  3968. defined(TARGET_IS_TM4C123_RB2) || \
  3969. defined(TARGET_IS_TM4C129_RA0) || \
  3970. defined(TARGET_IS_TM4C129_RA1) || \
  3971. defined(TARGET_IS_TM4C129_RA2)
  3972. #define ROM_PWMSyncUpdate \
  3973. ((void (*)(uint32_t ui32Base, \
  3974. uint32_t ui32GenBits))ROM_PWMTABLE[9])
  3975. #endif
  3976. #if defined(TARGET_IS_TM4C123_RA1) || \
  3977. defined(TARGET_IS_TM4C123_RA3) || \
  3978. defined(TARGET_IS_TM4C123_RB1) || \
  3979. defined(TARGET_IS_TM4C123_RB2) || \
  3980. defined(TARGET_IS_TM4C129_RA0) || \
  3981. defined(TARGET_IS_TM4C129_RA1) || \
  3982. defined(TARGET_IS_TM4C129_RA2)
  3983. #define ROM_PWMSyncTimeBase \
  3984. ((void (*)(uint32_t ui32Base, \
  3985. uint32_t ui32GenBits))ROM_PWMTABLE[10])
  3986. #endif
  3987. #if defined(TARGET_IS_TM4C123_RA1) || \
  3988. defined(TARGET_IS_TM4C123_RA3) || \
  3989. defined(TARGET_IS_TM4C123_RB1) || \
  3990. defined(TARGET_IS_TM4C123_RB2) || \
  3991. defined(TARGET_IS_TM4C129_RA0) || \
  3992. defined(TARGET_IS_TM4C129_RA1) || \
  3993. defined(TARGET_IS_TM4C129_RA2)
  3994. #define ROM_PWMOutputState \
  3995. ((void (*)(uint32_t ui32Base, \
  3996. uint32_t ui32PWMOutBits, \
  3997. bool bEnable))ROM_PWMTABLE[11])
  3998. #endif
  3999. #if defined(TARGET_IS_TM4C123_RA1) || \
  4000. defined(TARGET_IS_TM4C123_RA3) || \
  4001. defined(TARGET_IS_TM4C123_RB1) || \
  4002. defined(TARGET_IS_TM4C123_RB2) || \
  4003. defined(TARGET_IS_TM4C129_RA0) || \
  4004. defined(TARGET_IS_TM4C129_RA1) || \
  4005. defined(TARGET_IS_TM4C129_RA2)
  4006. #define ROM_PWMOutputInvert \
  4007. ((void (*)(uint32_t ui32Base, \
  4008. uint32_t ui32PWMOutBits, \
  4009. bool bInvert))ROM_PWMTABLE[12])
  4010. #endif
  4011. #if defined(TARGET_IS_TM4C123_RA1) || \
  4012. defined(TARGET_IS_TM4C123_RA3) || \
  4013. defined(TARGET_IS_TM4C123_RB1) || \
  4014. defined(TARGET_IS_TM4C123_RB2) || \
  4015. defined(TARGET_IS_TM4C129_RA0) || \
  4016. defined(TARGET_IS_TM4C129_RA1) || \
  4017. defined(TARGET_IS_TM4C129_RA2)
  4018. #define ROM_PWMOutputFault \
  4019. ((void (*)(uint32_t ui32Base, \
  4020. uint32_t ui32PWMOutBits, \
  4021. bool bFaultSuppress))ROM_PWMTABLE[13])
  4022. #endif
  4023. #if defined(TARGET_IS_TM4C123_RA1) || \
  4024. defined(TARGET_IS_TM4C123_RA3) || \
  4025. defined(TARGET_IS_TM4C123_RB1) || \
  4026. defined(TARGET_IS_TM4C123_RB2) || \
  4027. defined(TARGET_IS_TM4C129_RA0) || \
  4028. defined(TARGET_IS_TM4C129_RA1) || \
  4029. defined(TARGET_IS_TM4C129_RA2)
  4030. #define ROM_PWMGenIntTrigEnable \
  4031. ((void (*)(uint32_t ui32Base, \
  4032. uint32_t ui32Gen, \
  4033. uint32_t ui32IntTrig))ROM_PWMTABLE[14])
  4034. #endif
  4035. #if defined(TARGET_IS_TM4C123_RA1) || \
  4036. defined(TARGET_IS_TM4C123_RA3) || \
  4037. defined(TARGET_IS_TM4C123_RB1) || \
  4038. defined(TARGET_IS_TM4C123_RB2) || \
  4039. defined(TARGET_IS_TM4C129_RA0) || \
  4040. defined(TARGET_IS_TM4C129_RA1) || \
  4041. defined(TARGET_IS_TM4C129_RA2)
  4042. #define ROM_PWMGenIntTrigDisable \
  4043. ((void (*)(uint32_t ui32Base, \
  4044. uint32_t ui32Gen, \
  4045. uint32_t ui32IntTrig))ROM_PWMTABLE[15])
  4046. #endif
  4047. #if defined(TARGET_IS_TM4C123_RA1) || \
  4048. defined(TARGET_IS_TM4C123_RA3) || \
  4049. defined(TARGET_IS_TM4C123_RB1) || \
  4050. defined(TARGET_IS_TM4C123_RB2) || \
  4051. defined(TARGET_IS_TM4C129_RA0) || \
  4052. defined(TARGET_IS_TM4C129_RA1) || \
  4053. defined(TARGET_IS_TM4C129_RA2)
  4054. #define ROM_PWMGenIntStatus \
  4055. ((uint32_t (*)(uint32_t ui32Base, \
  4056. uint32_t ui32Gen, \
  4057. bool bMasked))ROM_PWMTABLE[16])
  4058. #endif
  4059. #if defined(TARGET_IS_TM4C123_RA1) || \
  4060. defined(TARGET_IS_TM4C123_RA3) || \
  4061. defined(TARGET_IS_TM4C123_RB1) || \
  4062. defined(TARGET_IS_TM4C123_RB2) || \
  4063. defined(TARGET_IS_TM4C129_RA0) || \
  4064. defined(TARGET_IS_TM4C129_RA1) || \
  4065. defined(TARGET_IS_TM4C129_RA2)
  4066. #define ROM_PWMGenIntClear \
  4067. ((void (*)(uint32_t ui32Base, \
  4068. uint32_t ui32Gen, \
  4069. uint32_t ui32Ints))ROM_PWMTABLE[17])
  4070. #endif
  4071. #if defined(TARGET_IS_TM4C123_RA1) || \
  4072. defined(TARGET_IS_TM4C123_RA3) || \
  4073. defined(TARGET_IS_TM4C123_RB1) || \
  4074. defined(TARGET_IS_TM4C123_RB2) || \
  4075. defined(TARGET_IS_TM4C129_RA0) || \
  4076. defined(TARGET_IS_TM4C129_RA1) || \
  4077. defined(TARGET_IS_TM4C129_RA2)
  4078. #define ROM_PWMIntEnable \
  4079. ((void (*)(uint32_t ui32Base, \
  4080. uint32_t ui32GenFault))ROM_PWMTABLE[18])
  4081. #endif
  4082. #if defined(TARGET_IS_TM4C123_RA1) || \
  4083. defined(TARGET_IS_TM4C123_RA3) || \
  4084. defined(TARGET_IS_TM4C123_RB1) || \
  4085. defined(TARGET_IS_TM4C123_RB2) || \
  4086. defined(TARGET_IS_TM4C129_RA0) || \
  4087. defined(TARGET_IS_TM4C129_RA1) || \
  4088. defined(TARGET_IS_TM4C129_RA2)
  4089. #define ROM_PWMIntDisable \
  4090. ((void (*)(uint32_t ui32Base, \
  4091. uint32_t ui32GenFault))ROM_PWMTABLE[19])
  4092. #endif
  4093. #if defined(TARGET_IS_TM4C123_RA1) || \
  4094. defined(TARGET_IS_TM4C123_RA3) || \
  4095. defined(TARGET_IS_TM4C123_RB1) || \
  4096. defined(TARGET_IS_TM4C123_RB2) || \
  4097. defined(TARGET_IS_TM4C129_RA0) || \
  4098. defined(TARGET_IS_TM4C129_RA1) || \
  4099. defined(TARGET_IS_TM4C129_RA2)
  4100. #define ROM_PWMFaultIntClear \
  4101. ((void (*)(uint32_t ui32Base))ROM_PWMTABLE[20])
  4102. #endif
  4103. #if defined(TARGET_IS_TM4C123_RA1) || \
  4104. defined(TARGET_IS_TM4C123_RA3) || \
  4105. defined(TARGET_IS_TM4C123_RB1) || \
  4106. defined(TARGET_IS_TM4C123_RB2) || \
  4107. defined(TARGET_IS_TM4C129_RA0) || \
  4108. defined(TARGET_IS_TM4C129_RA1) || \
  4109. defined(TARGET_IS_TM4C129_RA2)
  4110. #define ROM_PWMIntStatus \
  4111. ((uint32_t (*)(uint32_t ui32Base, \
  4112. bool bMasked))ROM_PWMTABLE[21])
  4113. #endif
  4114. #if defined(TARGET_IS_TM4C123_RA1) || \
  4115. defined(TARGET_IS_TM4C123_RA3) || \
  4116. defined(TARGET_IS_TM4C123_RB1) || \
  4117. defined(TARGET_IS_TM4C123_RB2) || \
  4118. defined(TARGET_IS_TM4C129_RA0) || \
  4119. defined(TARGET_IS_TM4C129_RA1) || \
  4120. defined(TARGET_IS_TM4C129_RA2)
  4121. #define ROM_PWMOutputFaultLevel \
  4122. ((void (*)(uint32_t ui32Base, \
  4123. uint32_t ui32PWMOutBits, \
  4124. bool bDriveHigh))ROM_PWMTABLE[22])
  4125. #endif
  4126. #if defined(TARGET_IS_TM4C123_RA1) || \
  4127. defined(TARGET_IS_TM4C123_RA3) || \
  4128. defined(TARGET_IS_TM4C123_RB1) || \
  4129. defined(TARGET_IS_TM4C123_RB2) || \
  4130. defined(TARGET_IS_TM4C129_RA0) || \
  4131. defined(TARGET_IS_TM4C129_RA1) || \
  4132. defined(TARGET_IS_TM4C129_RA2)
  4133. #define ROM_PWMFaultIntClearExt \
  4134. ((void (*)(uint32_t ui32Base, \
  4135. uint32_t ui32FaultInts))ROM_PWMTABLE[23])
  4136. #endif
  4137. #if defined(TARGET_IS_TM4C123_RA1) || \
  4138. defined(TARGET_IS_TM4C123_RA3) || \
  4139. defined(TARGET_IS_TM4C123_RB1) || \
  4140. defined(TARGET_IS_TM4C123_RB2) || \
  4141. defined(TARGET_IS_TM4C129_RA0) || \
  4142. defined(TARGET_IS_TM4C129_RA1) || \
  4143. defined(TARGET_IS_TM4C129_RA2)
  4144. #define ROM_PWMGenFaultConfigure \
  4145. ((void (*)(uint32_t ui32Base, \
  4146. uint32_t ui32Gen, \
  4147. uint32_t ui32MinFaultPeriod, \
  4148. uint32_t ui32FaultSenses))ROM_PWMTABLE[24])
  4149. #endif
  4150. #if defined(TARGET_IS_TM4C123_RA1) || \
  4151. defined(TARGET_IS_TM4C123_RA3) || \
  4152. defined(TARGET_IS_TM4C123_RB1) || \
  4153. defined(TARGET_IS_TM4C123_RB2) || \
  4154. defined(TARGET_IS_TM4C129_RA0) || \
  4155. defined(TARGET_IS_TM4C129_RA1) || \
  4156. defined(TARGET_IS_TM4C129_RA2)
  4157. #define ROM_PWMGenFaultTriggerSet \
  4158. ((void (*)(uint32_t ui32Base, \
  4159. uint32_t ui32Gen, \
  4160. uint32_t ui32Group, \
  4161. uint32_t ui32FaultTriggers))ROM_PWMTABLE[25])
  4162. #endif
  4163. #if defined(TARGET_IS_TM4C123_RA1) || \
  4164. defined(TARGET_IS_TM4C123_RA3) || \
  4165. defined(TARGET_IS_TM4C123_RB1) || \
  4166. defined(TARGET_IS_TM4C123_RB2) || \
  4167. defined(TARGET_IS_TM4C129_RA0) || \
  4168. defined(TARGET_IS_TM4C129_RA1) || \
  4169. defined(TARGET_IS_TM4C129_RA2)
  4170. #define ROM_PWMGenFaultTriggerGet \
  4171. ((uint32_t (*)(uint32_t ui32Base, \
  4172. uint32_t ui32Gen, \
  4173. uint32_t ui32Group))ROM_PWMTABLE[26])
  4174. #endif
  4175. #if defined(TARGET_IS_TM4C123_RA1) || \
  4176. defined(TARGET_IS_TM4C123_RA3) || \
  4177. defined(TARGET_IS_TM4C123_RB1) || \
  4178. defined(TARGET_IS_TM4C123_RB2) || \
  4179. defined(TARGET_IS_TM4C129_RA0) || \
  4180. defined(TARGET_IS_TM4C129_RA1) || \
  4181. defined(TARGET_IS_TM4C129_RA2)
  4182. #define ROM_PWMGenFaultStatus \
  4183. ((uint32_t (*)(uint32_t ui32Base, \
  4184. uint32_t ui32Gen, \
  4185. uint32_t ui32Group))ROM_PWMTABLE[27])
  4186. #endif
  4187. #if defined(TARGET_IS_TM4C123_RA1) || \
  4188. defined(TARGET_IS_TM4C123_RA3) || \
  4189. defined(TARGET_IS_TM4C123_RB1) || \
  4190. defined(TARGET_IS_TM4C123_RB2) || \
  4191. defined(TARGET_IS_TM4C129_RA0) || \
  4192. defined(TARGET_IS_TM4C129_RA1) || \
  4193. defined(TARGET_IS_TM4C129_RA2)
  4194. #define ROM_PWMGenFaultClear \
  4195. ((void (*)(uint32_t ui32Base, \
  4196. uint32_t ui32Gen, \
  4197. uint32_t ui32Group, \
  4198. uint32_t ui32FaultTriggers))ROM_PWMTABLE[28])
  4199. #endif
  4200. #if defined(TARGET_IS_TM4C129_RA0) || \
  4201. defined(TARGET_IS_TM4C129_RA1) || \
  4202. defined(TARGET_IS_TM4C129_RA2)
  4203. #define ROM_PWMClockSet \
  4204. ((void (*)(uint32_t ui32Base, \
  4205. uint32_t ui32Config))ROM_PWMTABLE[29])
  4206. #endif
  4207. #if defined(TARGET_IS_TM4C129_RA0) || \
  4208. defined(TARGET_IS_TM4C129_RA1) || \
  4209. defined(TARGET_IS_TM4C129_RA2)
  4210. #define ROM_PWMClockGet \
  4211. ((uint32_t (*)(uint32_t ui32Base))ROM_PWMTABLE[30])
  4212. #endif
  4213. #if defined(TARGET_IS_TM4C123_RB1) || \
  4214. defined(TARGET_IS_TM4C129_RA0) || \
  4215. defined(TARGET_IS_TM4C129_RA1) || \
  4216. defined(TARGET_IS_TM4C129_RA2)
  4217. #define ROM_PWMOutputUpdateMode \
  4218. ((void (*)(uint32_t ui32Base, \
  4219. uint32_t ui32PWMOutBits, \
  4220. uint32_t ui32Mode))ROM_PWMTABLE[31])
  4221. #endif
  4222. //*****************************************************************************
  4223. //
  4224. // Macros for calling ROM functions in the QEI API.
  4225. //
  4226. //*****************************************************************************
  4227. #if defined(TARGET_IS_TM4C123_RA1) || \
  4228. defined(TARGET_IS_TM4C123_RA3) || \
  4229. defined(TARGET_IS_TM4C123_RB1) || \
  4230. defined(TARGET_IS_TM4C123_RB2) || \
  4231. defined(TARGET_IS_TM4C129_RA0) || \
  4232. defined(TARGET_IS_TM4C129_RA1) || \
  4233. defined(TARGET_IS_TM4C129_RA2)
  4234. #define ROM_QEIPositionGet \
  4235. ((uint32_t (*)(uint32_t ui32Base))ROM_QEITABLE[0])
  4236. #endif
  4237. #if defined(TARGET_IS_TM4C123_RA1) || \
  4238. defined(TARGET_IS_TM4C123_RA3) || \
  4239. defined(TARGET_IS_TM4C123_RB1) || \
  4240. defined(TARGET_IS_TM4C123_RB2) || \
  4241. defined(TARGET_IS_TM4C129_RA0) || \
  4242. defined(TARGET_IS_TM4C129_RA1) || \
  4243. defined(TARGET_IS_TM4C129_RA2)
  4244. #define ROM_QEIEnable \
  4245. ((void (*)(uint32_t ui32Base))ROM_QEITABLE[1])
  4246. #endif
  4247. #if defined(TARGET_IS_TM4C123_RA1) || \
  4248. defined(TARGET_IS_TM4C123_RA3) || \
  4249. defined(TARGET_IS_TM4C123_RB1) || \
  4250. defined(TARGET_IS_TM4C123_RB2) || \
  4251. defined(TARGET_IS_TM4C129_RA0) || \
  4252. defined(TARGET_IS_TM4C129_RA1) || \
  4253. defined(TARGET_IS_TM4C129_RA2)
  4254. #define ROM_QEIDisable \
  4255. ((void (*)(uint32_t ui32Base))ROM_QEITABLE[2])
  4256. #endif
  4257. #if defined(TARGET_IS_TM4C123_RA1) || \
  4258. defined(TARGET_IS_TM4C123_RA3) || \
  4259. defined(TARGET_IS_TM4C123_RB1) || \
  4260. defined(TARGET_IS_TM4C123_RB2) || \
  4261. defined(TARGET_IS_TM4C129_RA0) || \
  4262. defined(TARGET_IS_TM4C129_RA1) || \
  4263. defined(TARGET_IS_TM4C129_RA2)
  4264. #define ROM_QEIConfigure \
  4265. ((void (*)(uint32_t ui32Base, \
  4266. uint32_t ui32Config, \
  4267. uint32_t ui32MaxPosition))ROM_QEITABLE[3])
  4268. #endif
  4269. #if defined(TARGET_IS_TM4C123_RA1) || \
  4270. defined(TARGET_IS_TM4C123_RA3) || \
  4271. defined(TARGET_IS_TM4C123_RB1) || \
  4272. defined(TARGET_IS_TM4C123_RB2) || \
  4273. defined(TARGET_IS_TM4C129_RA0) || \
  4274. defined(TARGET_IS_TM4C129_RA1) || \
  4275. defined(TARGET_IS_TM4C129_RA2)
  4276. #define ROM_QEIPositionSet \
  4277. ((void (*)(uint32_t ui32Base, \
  4278. uint32_t ui32Position))ROM_QEITABLE[4])
  4279. #endif
  4280. #if defined(TARGET_IS_TM4C123_RA1) || \
  4281. defined(TARGET_IS_TM4C123_RA3) || \
  4282. defined(TARGET_IS_TM4C123_RB1) || \
  4283. defined(TARGET_IS_TM4C123_RB2) || \
  4284. defined(TARGET_IS_TM4C129_RA0) || \
  4285. defined(TARGET_IS_TM4C129_RA1) || \
  4286. defined(TARGET_IS_TM4C129_RA2)
  4287. #define ROM_QEIDirectionGet \
  4288. ((int32_t (*)(uint32_t ui32Base))ROM_QEITABLE[5])
  4289. #endif
  4290. #if defined(TARGET_IS_TM4C123_RA1) || \
  4291. defined(TARGET_IS_TM4C123_RA3) || \
  4292. defined(TARGET_IS_TM4C123_RB1) || \
  4293. defined(TARGET_IS_TM4C123_RB2) || \
  4294. defined(TARGET_IS_TM4C129_RA0) || \
  4295. defined(TARGET_IS_TM4C129_RA1) || \
  4296. defined(TARGET_IS_TM4C129_RA2)
  4297. #define ROM_QEIErrorGet \
  4298. ((bool (*)(uint32_t ui32Base))ROM_QEITABLE[6])
  4299. #endif
  4300. #if defined(TARGET_IS_TM4C123_RA1) || \
  4301. defined(TARGET_IS_TM4C123_RA3) || \
  4302. defined(TARGET_IS_TM4C123_RB1) || \
  4303. defined(TARGET_IS_TM4C123_RB2) || \
  4304. defined(TARGET_IS_TM4C129_RA0) || \
  4305. defined(TARGET_IS_TM4C129_RA1) || \
  4306. defined(TARGET_IS_TM4C129_RA2)
  4307. #define ROM_QEIVelocityEnable \
  4308. ((void (*)(uint32_t ui32Base))ROM_QEITABLE[7])
  4309. #endif
  4310. #if defined(TARGET_IS_TM4C123_RA1) || \
  4311. defined(TARGET_IS_TM4C123_RA3) || \
  4312. defined(TARGET_IS_TM4C123_RB1) || \
  4313. defined(TARGET_IS_TM4C123_RB2) || \
  4314. defined(TARGET_IS_TM4C129_RA0) || \
  4315. defined(TARGET_IS_TM4C129_RA1) || \
  4316. defined(TARGET_IS_TM4C129_RA2)
  4317. #define ROM_QEIVelocityDisable \
  4318. ((void (*)(uint32_t ui32Base))ROM_QEITABLE[8])
  4319. #endif
  4320. #if defined(TARGET_IS_TM4C123_RA1) || \
  4321. defined(TARGET_IS_TM4C123_RA3) || \
  4322. defined(TARGET_IS_TM4C123_RB1) || \
  4323. defined(TARGET_IS_TM4C123_RB2) || \
  4324. defined(TARGET_IS_TM4C129_RA0) || \
  4325. defined(TARGET_IS_TM4C129_RA1) || \
  4326. defined(TARGET_IS_TM4C129_RA2)
  4327. #define ROM_QEIVelocityConfigure \
  4328. ((void (*)(uint32_t ui32Base, \
  4329. uint32_t ui32PreDiv, \
  4330. uint32_t ui32Period))ROM_QEITABLE[9])
  4331. #endif
  4332. #if defined(TARGET_IS_TM4C123_RA1) || \
  4333. defined(TARGET_IS_TM4C123_RA3) || \
  4334. defined(TARGET_IS_TM4C123_RB1) || \
  4335. defined(TARGET_IS_TM4C123_RB2) || \
  4336. defined(TARGET_IS_TM4C129_RA0) || \
  4337. defined(TARGET_IS_TM4C129_RA1) || \
  4338. defined(TARGET_IS_TM4C129_RA2)
  4339. #define ROM_QEIVelocityGet \
  4340. ((uint32_t (*)(uint32_t ui32Base))ROM_QEITABLE[10])
  4341. #endif
  4342. #if defined(TARGET_IS_TM4C123_RA1) || \
  4343. defined(TARGET_IS_TM4C123_RA3) || \
  4344. defined(TARGET_IS_TM4C123_RB1) || \
  4345. defined(TARGET_IS_TM4C123_RB2) || \
  4346. defined(TARGET_IS_TM4C129_RA0) || \
  4347. defined(TARGET_IS_TM4C129_RA1) || \
  4348. defined(TARGET_IS_TM4C129_RA2)
  4349. #define ROM_QEIIntEnable \
  4350. ((void (*)(uint32_t ui32Base, \
  4351. uint32_t ui32IntFlags))ROM_QEITABLE[11])
  4352. #endif
  4353. #if defined(TARGET_IS_TM4C123_RA1) || \
  4354. defined(TARGET_IS_TM4C123_RA3) || \
  4355. defined(TARGET_IS_TM4C123_RB1) || \
  4356. defined(TARGET_IS_TM4C123_RB2) || \
  4357. defined(TARGET_IS_TM4C129_RA0) || \
  4358. defined(TARGET_IS_TM4C129_RA1) || \
  4359. defined(TARGET_IS_TM4C129_RA2)
  4360. #define ROM_QEIIntDisable \
  4361. ((void (*)(uint32_t ui32Base, \
  4362. uint32_t ui32IntFlags))ROM_QEITABLE[12])
  4363. #endif
  4364. #if defined(TARGET_IS_TM4C123_RA1) || \
  4365. defined(TARGET_IS_TM4C123_RA3) || \
  4366. defined(TARGET_IS_TM4C123_RB1) || \
  4367. defined(TARGET_IS_TM4C123_RB2) || \
  4368. defined(TARGET_IS_TM4C129_RA0) || \
  4369. defined(TARGET_IS_TM4C129_RA1) || \
  4370. defined(TARGET_IS_TM4C129_RA2)
  4371. #define ROM_QEIIntStatus \
  4372. ((uint32_t (*)(uint32_t ui32Base, \
  4373. bool bMasked))ROM_QEITABLE[13])
  4374. #endif
  4375. #if defined(TARGET_IS_TM4C123_RA1) || \
  4376. defined(TARGET_IS_TM4C123_RA3) || \
  4377. defined(TARGET_IS_TM4C123_RB1) || \
  4378. defined(TARGET_IS_TM4C123_RB2) || \
  4379. defined(TARGET_IS_TM4C129_RA0) || \
  4380. defined(TARGET_IS_TM4C129_RA1) || \
  4381. defined(TARGET_IS_TM4C129_RA2)
  4382. #define ROM_QEIIntClear \
  4383. ((void (*)(uint32_t ui32Base, \
  4384. uint32_t ui32IntFlags))ROM_QEITABLE[14])
  4385. #endif
  4386. //*****************************************************************************
  4387. //
  4388. // Macros for calling ROM functions in the SHAMD5 API.
  4389. //
  4390. //*****************************************************************************
  4391. #if defined(TARGET_IS_TM4C129_RA0) || \
  4392. defined(TARGET_IS_TM4C129_RA1) || \
  4393. defined(TARGET_IS_TM4C129_RA2)
  4394. #define ROM_SHAMD5IntStatus \
  4395. ((uint32_t (*)(uint32_t ui32Base, \
  4396. bool bMasked))ROM_SHAMD5TABLE[0])
  4397. #endif
  4398. #if defined(TARGET_IS_TM4C129_RA0) || \
  4399. defined(TARGET_IS_TM4C129_RA1) || \
  4400. defined(TARGET_IS_TM4C129_RA2)
  4401. #define ROM_SHAMD5ConfigSet \
  4402. ((void (*)(uint32_t ui32Base, \
  4403. uint32_t ui32Mode))ROM_SHAMD5TABLE[1])
  4404. #endif
  4405. #if defined(TARGET_IS_TM4C129_RA0) || \
  4406. defined(TARGET_IS_TM4C129_RA1) || \
  4407. defined(TARGET_IS_TM4C129_RA2)
  4408. #define ROM_SHAMD5DataProcess \
  4409. ((void (*)(uint32_t ui32Base, \
  4410. uint32_t *pui32DataSrc, \
  4411. uint32_t ui32DataLength, \
  4412. uint32_t *pui32HashResult))ROM_SHAMD5TABLE[2])
  4413. #endif
  4414. #if defined(TARGET_IS_TM4C129_RA0) || \
  4415. defined(TARGET_IS_TM4C129_RA1) || \
  4416. defined(TARGET_IS_TM4C129_RA2)
  4417. #define ROM_SHAMD5DataWrite \
  4418. ((void (*)(uint32_t ui32Base, \
  4419. uint32_t *pui32Src))ROM_SHAMD5TABLE[3])
  4420. #endif
  4421. #if defined(TARGET_IS_TM4C129_RA0) || \
  4422. defined(TARGET_IS_TM4C129_RA1) || \
  4423. defined(TARGET_IS_TM4C129_RA2)
  4424. #define ROM_SHAMD5DataWriteNonBlocking \
  4425. ((bool (*)(uint32_t ui32Base, \
  4426. uint32_t *pui32Src))ROM_SHAMD5TABLE[4])
  4427. #endif
  4428. #if defined(TARGET_IS_TM4C129_RA0) || \
  4429. defined(TARGET_IS_TM4C129_RA1) || \
  4430. defined(TARGET_IS_TM4C129_RA2)
  4431. #define ROM_SHAMD5DMADisable \
  4432. ((void (*)(uint32_t ui32Base))ROM_SHAMD5TABLE[5])
  4433. #endif
  4434. #if defined(TARGET_IS_TM4C129_RA0) || \
  4435. defined(TARGET_IS_TM4C129_RA1) || \
  4436. defined(TARGET_IS_TM4C129_RA2)
  4437. #define ROM_SHAMD5DMAEnable \
  4438. ((void (*)(uint32_t ui32Base))ROM_SHAMD5TABLE[6])
  4439. #endif
  4440. #if defined(TARGET_IS_TM4C129_RA0) || \
  4441. defined(TARGET_IS_TM4C129_RA1) || \
  4442. defined(TARGET_IS_TM4C129_RA2)
  4443. #define ROM_SHAMD5HashLengthSet \
  4444. ((void (*)(uint32_t ui32Base, \
  4445. uint32_t ui32Length))ROM_SHAMD5TABLE[7])
  4446. #endif
  4447. #if defined(TARGET_IS_TM4C129_RA0) || \
  4448. defined(TARGET_IS_TM4C129_RA1) || \
  4449. defined(TARGET_IS_TM4C129_RA2)
  4450. #define ROM_SHAMD5HMACKeySet \
  4451. ((void (*)(uint32_t ui32Base, \
  4452. uint32_t *pui32Src))ROM_SHAMD5TABLE[8])
  4453. #endif
  4454. #if defined(TARGET_IS_TM4C129_RA0) || \
  4455. defined(TARGET_IS_TM4C129_RA1) || \
  4456. defined(TARGET_IS_TM4C129_RA2)
  4457. #define ROM_SHAMD5HMACPPKeyGenerate \
  4458. ((void (*)(uint32_t ui32Base, \
  4459. uint32_t *pui32Key, \
  4460. uint32_t *pui32PPKey))ROM_SHAMD5TABLE[9])
  4461. #endif
  4462. #if defined(TARGET_IS_TM4C129_RA0) || \
  4463. defined(TARGET_IS_TM4C129_RA1) || \
  4464. defined(TARGET_IS_TM4C129_RA2)
  4465. #define ROM_SHAMD5HMACPPKeySet \
  4466. ((void (*)(uint32_t ui32Base, \
  4467. uint32_t *pui32Src))ROM_SHAMD5TABLE[10])
  4468. #endif
  4469. #if defined(TARGET_IS_TM4C129_RA0) || \
  4470. defined(TARGET_IS_TM4C129_RA1) || \
  4471. defined(TARGET_IS_TM4C129_RA2)
  4472. #define ROM_SHAMD5HMACProcess \
  4473. ((void (*)(uint32_t ui32Base, \
  4474. uint32_t *pui32DataSrc, \
  4475. uint32_t ui32DataLength, \
  4476. uint32_t *pui32HashResult))ROM_SHAMD5TABLE[11])
  4477. #endif
  4478. #if defined(TARGET_IS_TM4C129_RA0) || \
  4479. defined(TARGET_IS_TM4C129_RA1) || \
  4480. defined(TARGET_IS_TM4C129_RA2)
  4481. #define ROM_SHAMD5IntClear \
  4482. ((void (*)(uint32_t ui32Base, \
  4483. uint32_t ui32IntFlags))ROM_SHAMD5TABLE[12])
  4484. #endif
  4485. #if defined(TARGET_IS_TM4C129_RA0) || \
  4486. defined(TARGET_IS_TM4C129_RA1) || \
  4487. defined(TARGET_IS_TM4C129_RA2)
  4488. #define ROM_SHAMD5IntDisable \
  4489. ((void (*)(uint32_t ui32Base, \
  4490. uint32_t ui32IntFlags))ROM_SHAMD5TABLE[13])
  4491. #endif
  4492. #if defined(TARGET_IS_TM4C129_RA0) || \
  4493. defined(TARGET_IS_TM4C129_RA1) || \
  4494. defined(TARGET_IS_TM4C129_RA2)
  4495. #define ROM_SHAMD5IntEnable \
  4496. ((void (*)(uint32_t ui32Base, \
  4497. uint32_t ui32IntFlags))ROM_SHAMD5TABLE[14])
  4498. #endif
  4499. #if defined(TARGET_IS_TM4C129_RA0) || \
  4500. defined(TARGET_IS_TM4C129_RA1) || \
  4501. defined(TARGET_IS_TM4C129_RA2)
  4502. #define ROM_SHAMD5Reset \
  4503. ((void (*)(uint32_t ui32Base))ROM_SHAMD5TABLE[15])
  4504. #endif
  4505. #if defined(TARGET_IS_TM4C129_RA0) || \
  4506. defined(TARGET_IS_TM4C129_RA1) || \
  4507. defined(TARGET_IS_TM4C129_RA2)
  4508. #define ROM_SHAMD5ResultRead \
  4509. ((void (*)(uint32_t ui32Base, \
  4510. uint32_t *pui32Dest))ROM_SHAMD5TABLE[16])
  4511. #endif
  4512. //*****************************************************************************
  4513. //
  4514. // Macros for calling ROM functions in the SMBus API.
  4515. //
  4516. //*****************************************************************************
  4517. #if defined(TARGET_IS_TM4C123_RA1) || \
  4518. defined(TARGET_IS_TM4C123_RA3) || \
  4519. defined(TARGET_IS_TM4C123_RB1) || \
  4520. defined(TARGET_IS_TM4C123_RB2) || \
  4521. defined(TARGET_IS_TM4C129_RA0) || \
  4522. defined(TARGET_IS_TM4C129_RA1) || \
  4523. defined(TARGET_IS_TM4C129_RA2)
  4524. #define ROM_SMBusMasterIntProcess \
  4525. ((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[0])
  4526. #endif
  4527. #if defined(TARGET_IS_TM4C123_RA1) || \
  4528. defined(TARGET_IS_TM4C123_RA3) || \
  4529. defined(TARGET_IS_TM4C123_RB1) || \
  4530. defined(TARGET_IS_TM4C123_RB2) || \
  4531. defined(TARGET_IS_TM4C129_RA0) || \
  4532. defined(TARGET_IS_TM4C129_RA1) || \
  4533. defined(TARGET_IS_TM4C129_RA2)
  4534. #define ROM_SMBusARPDisable \
  4535. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[1])
  4536. #endif
  4537. #if defined(TARGET_IS_TM4C123_RA1) || \
  4538. defined(TARGET_IS_TM4C123_RA3) || \
  4539. defined(TARGET_IS_TM4C123_RB1) || \
  4540. defined(TARGET_IS_TM4C123_RB2) || \
  4541. defined(TARGET_IS_TM4C129_RA0) || \
  4542. defined(TARGET_IS_TM4C129_RA1) || \
  4543. defined(TARGET_IS_TM4C129_RA2)
  4544. #define ROM_SMBusARPEnable \
  4545. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[2])
  4546. #endif
  4547. #if defined(TARGET_IS_TM4C123_RA1) || \
  4548. defined(TARGET_IS_TM4C123_RA3) || \
  4549. defined(TARGET_IS_TM4C123_RB1) || \
  4550. defined(TARGET_IS_TM4C123_RB2) || \
  4551. defined(TARGET_IS_TM4C129_RA0) || \
  4552. defined(TARGET_IS_TM4C129_RA1) || \
  4553. defined(TARGET_IS_TM4C129_RA2)
  4554. #define ROM_SMBusARPUDIDPacketDecode \
  4555. ((void (*)(tSMBusUDID *pUDID, \
  4556. uint8_t *pui8Address, \
  4557. uint8_t *pui8Data))ROM_SMBUSTABLE[3])
  4558. #endif
  4559. #if defined(TARGET_IS_TM4C123_RA1) || \
  4560. defined(TARGET_IS_TM4C123_RA3) || \
  4561. defined(TARGET_IS_TM4C123_RB1) || \
  4562. defined(TARGET_IS_TM4C123_RB2) || \
  4563. defined(TARGET_IS_TM4C129_RA0) || \
  4564. defined(TARGET_IS_TM4C129_RA1) || \
  4565. defined(TARGET_IS_TM4C129_RA2)
  4566. #define ROM_SMBusARPUDIDPacketEncode \
  4567. ((void (*)(tSMBusUDID *pUDID, \
  4568. uint8_t ui8Address, \
  4569. uint8_t *pui8Data))ROM_SMBUSTABLE[4])
  4570. #endif
  4571. #if defined(TARGET_IS_TM4C123_RA1) || \
  4572. defined(TARGET_IS_TM4C123_RA3) || \
  4573. defined(TARGET_IS_TM4C123_RB1) || \
  4574. defined(TARGET_IS_TM4C123_RB2) || \
  4575. defined(TARGET_IS_TM4C129_RA0) || \
  4576. defined(TARGET_IS_TM4C129_RA1) || \
  4577. defined(TARGET_IS_TM4C129_RA2)
  4578. #define ROM_SMBusMasterARPAssignAddress \
  4579. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4580. uint8_t *pui8Data))ROM_SMBUSTABLE[5])
  4581. #endif
  4582. #if defined(TARGET_IS_TM4C123_RA1) || \
  4583. defined(TARGET_IS_TM4C123_RA3) || \
  4584. defined(TARGET_IS_TM4C123_RB1) || \
  4585. defined(TARGET_IS_TM4C123_RB2) || \
  4586. defined(TARGET_IS_TM4C129_RA0) || \
  4587. defined(TARGET_IS_TM4C129_RA1) || \
  4588. defined(TARGET_IS_TM4C129_RA2)
  4589. #define ROM_SMBusMasterARPGetUDIDDir \
  4590. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4591. uint8_t ui8TargetAddress, \
  4592. uint8_t *pui8Data))ROM_SMBUSTABLE[6])
  4593. #endif
  4594. #if defined(TARGET_IS_TM4C123_RA1) || \
  4595. defined(TARGET_IS_TM4C123_RA3) || \
  4596. defined(TARGET_IS_TM4C123_RB1) || \
  4597. defined(TARGET_IS_TM4C123_RB2) || \
  4598. defined(TARGET_IS_TM4C129_RA0) || \
  4599. defined(TARGET_IS_TM4C129_RA1) || \
  4600. defined(TARGET_IS_TM4C129_RA2)
  4601. #define ROM_SMBusMasterARPGetUDIDGen \
  4602. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4603. uint8_t *pui8Data))ROM_SMBUSTABLE[7])
  4604. #endif
  4605. #if defined(TARGET_IS_TM4C123_RA1) || \
  4606. defined(TARGET_IS_TM4C123_RA3) || \
  4607. defined(TARGET_IS_TM4C123_RB1) || \
  4608. defined(TARGET_IS_TM4C123_RB2) || \
  4609. defined(TARGET_IS_TM4C129_RA0) || \
  4610. defined(TARGET_IS_TM4C129_RA1) || \
  4611. defined(TARGET_IS_TM4C129_RA2)
  4612. #define ROM_SMBusMasterARPNotifyMaster \
  4613. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4614. uint8_t *pui8Data))ROM_SMBUSTABLE[8])
  4615. #endif
  4616. #if defined(TARGET_IS_TM4C123_RA1) || \
  4617. defined(TARGET_IS_TM4C123_RA3) || \
  4618. defined(TARGET_IS_TM4C123_RB1) || \
  4619. defined(TARGET_IS_TM4C123_RB2) || \
  4620. defined(TARGET_IS_TM4C129_RA0) || \
  4621. defined(TARGET_IS_TM4C129_RA1) || \
  4622. defined(TARGET_IS_TM4C129_RA2)
  4623. #define ROM_SMBusMasterARPPrepareToARP \
  4624. ((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[9])
  4625. #endif
  4626. #if defined(TARGET_IS_TM4C123_RA1) || \
  4627. defined(TARGET_IS_TM4C123_RA3) || \
  4628. defined(TARGET_IS_TM4C123_RB1) || \
  4629. defined(TARGET_IS_TM4C123_RB2) || \
  4630. defined(TARGET_IS_TM4C129_RA0) || \
  4631. defined(TARGET_IS_TM4C129_RA1) || \
  4632. defined(TARGET_IS_TM4C129_RA2)
  4633. #define ROM_SMBusMasterARPResetDeviceDir \
  4634. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4635. uint8_t ui8TargetAddress))ROM_SMBUSTABLE[10])
  4636. #endif
  4637. #if defined(TARGET_IS_TM4C123_RA1) || \
  4638. defined(TARGET_IS_TM4C123_RA3) || \
  4639. defined(TARGET_IS_TM4C123_RB1) || \
  4640. defined(TARGET_IS_TM4C123_RB2) || \
  4641. defined(TARGET_IS_TM4C129_RA0) || \
  4642. defined(TARGET_IS_TM4C129_RA1) || \
  4643. defined(TARGET_IS_TM4C129_RA2)
  4644. #define ROM_SMBusMasterARPResetDeviceGen \
  4645. ((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[11])
  4646. #endif
  4647. #if defined(TARGET_IS_TM4C123_RA1) || \
  4648. defined(TARGET_IS_TM4C123_RA3) || \
  4649. defined(TARGET_IS_TM4C123_RB1) || \
  4650. defined(TARGET_IS_TM4C123_RB2) || \
  4651. defined(TARGET_IS_TM4C129_RA0) || \
  4652. defined(TARGET_IS_TM4C129_RA1) || \
  4653. defined(TARGET_IS_TM4C129_RA2)
  4654. #define ROM_SMBusMasterBlockProcessCall \
  4655. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4656. uint8_t ui8TargetAddress, \
  4657. uint8_t ui8Command, \
  4658. uint8_t *pui8TxData, \
  4659. uint8_t ui8TxSize, \
  4660. uint8_t *pui8RxData))ROM_SMBUSTABLE[12])
  4661. #endif
  4662. #if defined(TARGET_IS_TM4C123_RA3) || \
  4663. defined(TARGET_IS_TM4C123_RB1) || \
  4664. defined(TARGET_IS_TM4C123_RB2) || \
  4665. defined(TARGET_IS_TM4C129_RA0) || \
  4666. defined(TARGET_IS_TM4C129_RA1) || \
  4667. defined(TARGET_IS_TM4C129_RA2)
  4668. #define ROM_SMBusMasterBlockRead \
  4669. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4670. uint8_t ui8TargetAddress, \
  4671. uint8_t ui8Command, \
  4672. uint8_t *pui8Data))ROM_SMBUSTABLE[13])
  4673. #endif
  4674. #if defined(TARGET_IS_TM4C123_RA1) || \
  4675. defined(TARGET_IS_TM4C123_RA3) || \
  4676. defined(TARGET_IS_TM4C123_RB1) || \
  4677. defined(TARGET_IS_TM4C123_RB2) || \
  4678. defined(TARGET_IS_TM4C129_RA0) || \
  4679. defined(TARGET_IS_TM4C129_RA1) || \
  4680. defined(TARGET_IS_TM4C129_RA2)
  4681. #define ROM_SMBusMasterBlockWrite \
  4682. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4683. uint8_t ui8TargetAddress, \
  4684. uint8_t ui8Command, \
  4685. uint8_t *pui8Data, \
  4686. uint8_t ui8Size))ROM_SMBUSTABLE[14])
  4687. #endif
  4688. #if defined(TARGET_IS_TM4C123_RA1) || \
  4689. defined(TARGET_IS_TM4C123_RA3) || \
  4690. defined(TARGET_IS_TM4C123_RB1) || \
  4691. defined(TARGET_IS_TM4C123_RB2) || \
  4692. defined(TARGET_IS_TM4C129_RA0) || \
  4693. defined(TARGET_IS_TM4C129_RA1) || \
  4694. defined(TARGET_IS_TM4C129_RA2)
  4695. #define ROM_SMBusMasterByteReceive \
  4696. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4697. uint8_t ui8TargetAddress, \
  4698. uint8_t *pui8Data))ROM_SMBUSTABLE[15])
  4699. #endif
  4700. #if defined(TARGET_IS_TM4C123_RA1) || \
  4701. defined(TARGET_IS_TM4C123_RA3) || \
  4702. defined(TARGET_IS_TM4C123_RB1) || \
  4703. defined(TARGET_IS_TM4C123_RB2) || \
  4704. defined(TARGET_IS_TM4C129_RA0) || \
  4705. defined(TARGET_IS_TM4C129_RA1) || \
  4706. defined(TARGET_IS_TM4C129_RA2)
  4707. #define ROM_SMBusMasterByteSend \
  4708. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4709. uint8_t ui8TargetAddress, \
  4710. uint8_t ui8Data))ROM_SMBUSTABLE[16])
  4711. #endif
  4712. #if defined(TARGET_IS_TM4C123_RA1) || \
  4713. defined(TARGET_IS_TM4C123_RA3) || \
  4714. defined(TARGET_IS_TM4C123_RB1) || \
  4715. defined(TARGET_IS_TM4C123_RB2) || \
  4716. defined(TARGET_IS_TM4C129_RA0) || \
  4717. defined(TARGET_IS_TM4C129_RA1) || \
  4718. defined(TARGET_IS_TM4C129_RA2)
  4719. #define ROM_SMBusMasterByteWordRead \
  4720. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4721. uint8_t ui8TargetAddress, \
  4722. uint8_t ui8Command, \
  4723. uint8_t *pui8Data, \
  4724. uint8_t ui8Size))ROM_SMBUSTABLE[17])
  4725. #endif
  4726. #if defined(TARGET_IS_TM4C123_RA1) || \
  4727. defined(TARGET_IS_TM4C123_RA3) || \
  4728. defined(TARGET_IS_TM4C123_RB1) || \
  4729. defined(TARGET_IS_TM4C123_RB2) || \
  4730. defined(TARGET_IS_TM4C129_RA0) || \
  4731. defined(TARGET_IS_TM4C129_RA1) || \
  4732. defined(TARGET_IS_TM4C129_RA2)
  4733. #define ROM_SMBusMasterByteWordWrite \
  4734. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4735. uint8_t ui8TargetAddress, \
  4736. uint8_t ui8Command, \
  4737. uint8_t *pui8Data, \
  4738. uint8_t ui8Size))ROM_SMBUSTABLE[18])
  4739. #endif
  4740. #if defined(TARGET_IS_TM4C123_RA1) || \
  4741. defined(TARGET_IS_TM4C123_RA3) || \
  4742. defined(TARGET_IS_TM4C123_RB1) || \
  4743. defined(TARGET_IS_TM4C123_RB2) || \
  4744. defined(TARGET_IS_TM4C129_RA0) || \
  4745. defined(TARGET_IS_TM4C129_RA1) || \
  4746. defined(TARGET_IS_TM4C129_RA2)
  4747. #define ROM_SMBusMasterHostNotify \
  4748. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4749. uint8_t ui8OwnSlaveAddress, \
  4750. uint8_t *pui8Data))ROM_SMBUSTABLE[19])
  4751. #endif
  4752. #if defined(TARGET_IS_TM4C123_RA1) || \
  4753. defined(TARGET_IS_TM4C123_RA3) || \
  4754. defined(TARGET_IS_TM4C123_RB1) || \
  4755. defined(TARGET_IS_TM4C123_RB2) || \
  4756. defined(TARGET_IS_TM4C129_RA0) || \
  4757. defined(TARGET_IS_TM4C129_RA1) || \
  4758. defined(TARGET_IS_TM4C129_RA2)
  4759. #define ROM_SMBusMasterI2CRead \
  4760. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4761. uint8_t ui8TargetAddress, \
  4762. uint8_t *pui8Data, \
  4763. uint8_t ui8Size))ROM_SMBUSTABLE[20])
  4764. #endif
  4765. #if defined(TARGET_IS_TM4C123_RA1) || \
  4766. defined(TARGET_IS_TM4C123_RA3) || \
  4767. defined(TARGET_IS_TM4C123_RB1) || \
  4768. defined(TARGET_IS_TM4C123_RB2) || \
  4769. defined(TARGET_IS_TM4C129_RA0) || \
  4770. defined(TARGET_IS_TM4C129_RA1) || \
  4771. defined(TARGET_IS_TM4C129_RA2)
  4772. #define ROM_SMBusMasterI2CWrite \
  4773. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4774. uint8_t ui8TargetAddress, \
  4775. uint8_t *pui8Data, \
  4776. uint8_t ui8Size))ROM_SMBUSTABLE[21])
  4777. #endif
  4778. #if defined(TARGET_IS_TM4C123_RA1) || \
  4779. defined(TARGET_IS_TM4C123_RA3) || \
  4780. defined(TARGET_IS_TM4C123_RB1) || \
  4781. defined(TARGET_IS_TM4C123_RB2) || \
  4782. defined(TARGET_IS_TM4C129_RA0) || \
  4783. defined(TARGET_IS_TM4C129_RA1) || \
  4784. defined(TARGET_IS_TM4C129_RA2)
  4785. #define ROM_SMBusMasterI2CWriteRead \
  4786. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4787. uint8_t ui8TargetAddress, \
  4788. uint8_t *pui8TxData, \
  4789. uint8_t ui8TxSize, \
  4790. uint8_t *pui8RxData, \
  4791. uint8_t ui8RxSize))ROM_SMBUSTABLE[22])
  4792. #endif
  4793. #if defined(TARGET_IS_TM4C123_RA1) || \
  4794. defined(TARGET_IS_TM4C123_RA3) || \
  4795. defined(TARGET_IS_TM4C123_RB1) || \
  4796. defined(TARGET_IS_TM4C123_RB2) || \
  4797. defined(TARGET_IS_TM4C129_RA0) || \
  4798. defined(TARGET_IS_TM4C129_RA1) || \
  4799. defined(TARGET_IS_TM4C129_RA2)
  4800. #define ROM_SMBusMasterInit \
  4801. ((void (*)(tSMBus *psSMBus, \
  4802. uint32_t ui32I2CBase, \
  4803. uint32_t ui32SMBusClock))ROM_SMBUSTABLE[23])
  4804. #endif
  4805. #if defined(TARGET_IS_TM4C123_RA1) || \
  4806. defined(TARGET_IS_TM4C123_RA3) || \
  4807. defined(TARGET_IS_TM4C123_RB1) || \
  4808. defined(TARGET_IS_TM4C123_RB2) || \
  4809. defined(TARGET_IS_TM4C129_RA0) || \
  4810. defined(TARGET_IS_TM4C129_RA1) || \
  4811. defined(TARGET_IS_TM4C129_RA2)
  4812. #define ROM_SMBusMasterIntEnable \
  4813. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[24])
  4814. #endif
  4815. #if defined(TARGET_IS_TM4C123_RA1) || \
  4816. defined(TARGET_IS_TM4C123_RA3) || \
  4817. defined(TARGET_IS_TM4C123_RB1) || \
  4818. defined(TARGET_IS_TM4C123_RB2) || \
  4819. defined(TARGET_IS_TM4C129_RA0) || \
  4820. defined(TARGET_IS_TM4C129_RA1) || \
  4821. defined(TARGET_IS_TM4C129_RA2)
  4822. #define ROM_SMBusMasterProcessCall \
  4823. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4824. uint8_t ui8TargetAddress, \
  4825. uint8_t ui8Command, \
  4826. uint8_t *pui8TxData, \
  4827. uint8_t *pui8RxData))ROM_SMBUSTABLE[25])
  4828. #endif
  4829. #if defined(TARGET_IS_TM4C123_RA1) || \
  4830. defined(TARGET_IS_TM4C123_RA3) || \
  4831. defined(TARGET_IS_TM4C123_RB1) || \
  4832. defined(TARGET_IS_TM4C123_RB2) || \
  4833. defined(TARGET_IS_TM4C129_RA0) || \
  4834. defined(TARGET_IS_TM4C129_RA1) || \
  4835. defined(TARGET_IS_TM4C129_RA2)
  4836. #define ROM_SMBusMasterQuickCommand \
  4837. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4838. uint8_t ui8TargetAddress, \
  4839. bool bData))ROM_SMBUSTABLE[26])
  4840. #endif
  4841. #if defined(TARGET_IS_TM4C123_RA1) || \
  4842. defined(TARGET_IS_TM4C123_RA3) || \
  4843. defined(TARGET_IS_TM4C123_RB1) || \
  4844. defined(TARGET_IS_TM4C123_RB2) || \
  4845. defined(TARGET_IS_TM4C129_RA0) || \
  4846. defined(TARGET_IS_TM4C129_RA1) || \
  4847. defined(TARGET_IS_TM4C129_RA2)
  4848. #define ROM_SMBusPECDisable \
  4849. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[27])
  4850. #endif
  4851. #if defined(TARGET_IS_TM4C123_RA1) || \
  4852. defined(TARGET_IS_TM4C123_RA3) || \
  4853. defined(TARGET_IS_TM4C123_RB1) || \
  4854. defined(TARGET_IS_TM4C123_RB2) || \
  4855. defined(TARGET_IS_TM4C129_RA0) || \
  4856. defined(TARGET_IS_TM4C129_RA1) || \
  4857. defined(TARGET_IS_TM4C129_RA2)
  4858. #define ROM_SMBusPECEnable \
  4859. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[28])
  4860. #endif
  4861. #if defined(TARGET_IS_TM4C123_RA1) || \
  4862. defined(TARGET_IS_TM4C123_RA3) || \
  4863. defined(TARGET_IS_TM4C123_RB1) || \
  4864. defined(TARGET_IS_TM4C123_RB2) || \
  4865. defined(TARGET_IS_TM4C129_RA0) || \
  4866. defined(TARGET_IS_TM4C129_RA1) || \
  4867. defined(TARGET_IS_TM4C129_RA2)
  4868. #define ROM_SMBusRxPacketSizeGet \
  4869. ((uint8_t (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[29])
  4870. #endif
  4871. #if defined(TARGET_IS_TM4C123_RA1) || \
  4872. defined(TARGET_IS_TM4C123_RA3) || \
  4873. defined(TARGET_IS_TM4C123_RB1) || \
  4874. defined(TARGET_IS_TM4C123_RB2) || \
  4875. defined(TARGET_IS_TM4C129_RA0) || \
  4876. defined(TARGET_IS_TM4C129_RA1) || \
  4877. defined(TARGET_IS_TM4C129_RA2)
  4878. #define ROM_SMBusSlaveACKSend \
  4879. ((void (*)(tSMBus *psSMBus, \
  4880. bool bACK))ROM_SMBUSTABLE[30])
  4881. #endif
  4882. #if defined(TARGET_IS_TM4C123_RA1) || \
  4883. defined(TARGET_IS_TM4C123_RA3) || \
  4884. defined(TARGET_IS_TM4C123_RB1) || \
  4885. defined(TARGET_IS_TM4C123_RB2) || \
  4886. defined(TARGET_IS_TM4C129_RA0) || \
  4887. defined(TARGET_IS_TM4C129_RA1) || \
  4888. defined(TARGET_IS_TM4C129_RA2)
  4889. #define ROM_SMBusSlaveAddressSet \
  4890. ((void (*)(tSMBus *psSMBus, \
  4891. uint8_t ui8AddressNum, \
  4892. uint8_t ui8SlaveAddress))ROM_SMBUSTABLE[31])
  4893. #endif
  4894. #if defined(TARGET_IS_TM4C123_RA1) || \
  4895. defined(TARGET_IS_TM4C123_RA3) || \
  4896. defined(TARGET_IS_TM4C123_RB1) || \
  4897. defined(TARGET_IS_TM4C123_RB2) || \
  4898. defined(TARGET_IS_TM4C129_RA0) || \
  4899. defined(TARGET_IS_TM4C129_RA1) || \
  4900. defined(TARGET_IS_TM4C129_RA2)
  4901. #define ROM_SMBusSlaveARPFlagARGet \
  4902. ((bool (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[32])
  4903. #endif
  4904. #if defined(TARGET_IS_TM4C123_RA1) || \
  4905. defined(TARGET_IS_TM4C123_RA3) || \
  4906. defined(TARGET_IS_TM4C123_RB1) || \
  4907. defined(TARGET_IS_TM4C123_RB2) || \
  4908. defined(TARGET_IS_TM4C129_RA0) || \
  4909. defined(TARGET_IS_TM4C129_RA1) || \
  4910. defined(TARGET_IS_TM4C129_RA2)
  4911. #define ROM_SMBusSlaveARPFlagARSet \
  4912. ((void (*)(tSMBus *psSMBus, \
  4913. bool bValue))ROM_SMBUSTABLE[33])
  4914. #endif
  4915. #if defined(TARGET_IS_TM4C123_RA1) || \
  4916. defined(TARGET_IS_TM4C123_RA3) || \
  4917. defined(TARGET_IS_TM4C123_RB1) || \
  4918. defined(TARGET_IS_TM4C123_RB2) || \
  4919. defined(TARGET_IS_TM4C129_RA0) || \
  4920. defined(TARGET_IS_TM4C129_RA1) || \
  4921. defined(TARGET_IS_TM4C129_RA2)
  4922. #define ROM_SMBusSlaveARPFlagAVGet \
  4923. ((bool (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[34])
  4924. #endif
  4925. #if defined(TARGET_IS_TM4C123_RA1) || \
  4926. defined(TARGET_IS_TM4C123_RA3) || \
  4927. defined(TARGET_IS_TM4C123_RB1) || \
  4928. defined(TARGET_IS_TM4C123_RB2) || \
  4929. defined(TARGET_IS_TM4C129_RA0) || \
  4930. defined(TARGET_IS_TM4C129_RA1) || \
  4931. defined(TARGET_IS_TM4C129_RA2)
  4932. #define ROM_SMBusSlaveARPFlagAVSet \
  4933. ((void (*)(tSMBus *psSMBus, \
  4934. bool bValue))ROM_SMBUSTABLE[35])
  4935. #endif
  4936. #if defined(TARGET_IS_TM4C123_RA1) || \
  4937. defined(TARGET_IS_TM4C123_RA3) || \
  4938. defined(TARGET_IS_TM4C123_RB1) || \
  4939. defined(TARGET_IS_TM4C123_RB2) || \
  4940. defined(TARGET_IS_TM4C129_RA0) || \
  4941. defined(TARGET_IS_TM4C129_RA1) || \
  4942. defined(TARGET_IS_TM4C129_RA2)
  4943. #define ROM_SMBusSlaveBlockTransferDisable \
  4944. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[36])
  4945. #endif
  4946. #if defined(TARGET_IS_TM4C123_RA1) || \
  4947. defined(TARGET_IS_TM4C123_RA3) || \
  4948. defined(TARGET_IS_TM4C123_RB1) || \
  4949. defined(TARGET_IS_TM4C123_RB2) || \
  4950. defined(TARGET_IS_TM4C129_RA0) || \
  4951. defined(TARGET_IS_TM4C129_RA1) || \
  4952. defined(TARGET_IS_TM4C129_RA2)
  4953. #define ROM_SMBusSlaveBlockTransferEnable \
  4954. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[37])
  4955. #endif
  4956. #if defined(TARGET_IS_TM4C123_RA1) || \
  4957. defined(TARGET_IS_TM4C123_RA3) || \
  4958. defined(TARGET_IS_TM4C123_RB1) || \
  4959. defined(TARGET_IS_TM4C123_RB2) || \
  4960. defined(TARGET_IS_TM4C129_RA0) || \
  4961. defined(TARGET_IS_TM4C129_RA1) || \
  4962. defined(TARGET_IS_TM4C129_RA2)
  4963. #define ROM_SMBusSlaveCommandGet \
  4964. ((uint8_t (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[38])
  4965. #endif
  4966. #if defined(TARGET_IS_TM4C123_RA1) || \
  4967. defined(TARGET_IS_TM4C123_RA3) || \
  4968. defined(TARGET_IS_TM4C123_RB1) || \
  4969. defined(TARGET_IS_TM4C123_RB2) || \
  4970. defined(TARGET_IS_TM4C129_RA0) || \
  4971. defined(TARGET_IS_TM4C129_RA1) || \
  4972. defined(TARGET_IS_TM4C129_RA2)
  4973. #define ROM_SMBusSlaveI2CDisable \
  4974. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[39])
  4975. #endif
  4976. #if defined(TARGET_IS_TM4C123_RA1) || \
  4977. defined(TARGET_IS_TM4C123_RA3) || \
  4978. defined(TARGET_IS_TM4C123_RB1) || \
  4979. defined(TARGET_IS_TM4C123_RB2) || \
  4980. defined(TARGET_IS_TM4C129_RA0) || \
  4981. defined(TARGET_IS_TM4C129_RA1) || \
  4982. defined(TARGET_IS_TM4C129_RA2)
  4983. #define ROM_SMBusSlaveI2CEnable \
  4984. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[40])
  4985. #endif
  4986. #if defined(TARGET_IS_TM4C123_RA1) || \
  4987. defined(TARGET_IS_TM4C123_RA3) || \
  4988. defined(TARGET_IS_TM4C123_RB1) || \
  4989. defined(TARGET_IS_TM4C123_RB2) || \
  4990. defined(TARGET_IS_TM4C129_RA0) || \
  4991. defined(TARGET_IS_TM4C129_RA1) || \
  4992. defined(TARGET_IS_TM4C129_RA2)
  4993. #define ROM_SMBusSlaveInit \
  4994. ((void (*)(tSMBus *psSMBus, \
  4995. uint32_t ui32I2CBase))ROM_SMBUSTABLE[41])
  4996. #endif
  4997. #if defined(TARGET_IS_TM4C123_RA1) || \
  4998. defined(TARGET_IS_TM4C123_RA3) || \
  4999. defined(TARGET_IS_TM4C123_RB1) || \
  5000. defined(TARGET_IS_TM4C123_RB2) || \
  5001. defined(TARGET_IS_TM4C129_RA0) || \
  5002. defined(TARGET_IS_TM4C129_RA1) || \
  5003. defined(TARGET_IS_TM4C129_RA2)
  5004. #define ROM_SMBusSlaveIntAddressGet \
  5005. ((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[42])
  5006. #endif
  5007. #if defined(TARGET_IS_TM4C123_RA1) || \
  5008. defined(TARGET_IS_TM4C123_RA3) || \
  5009. defined(TARGET_IS_TM4C123_RB1) || \
  5010. defined(TARGET_IS_TM4C123_RB2) || \
  5011. defined(TARGET_IS_TM4C129_RA0) || \
  5012. defined(TARGET_IS_TM4C129_RA1) || \
  5013. defined(TARGET_IS_TM4C129_RA2)
  5014. #define ROM_SMBusSlaveIntEnable \
  5015. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[43])
  5016. #endif
  5017. #if defined(TARGET_IS_TM4C123_RA1) || \
  5018. defined(TARGET_IS_TM4C123_RA3) || \
  5019. defined(TARGET_IS_TM4C123_RB1) || \
  5020. defined(TARGET_IS_TM4C123_RB2) || \
  5021. defined(TARGET_IS_TM4C129_RA0) || \
  5022. defined(TARGET_IS_TM4C129_RA1) || \
  5023. defined(TARGET_IS_TM4C129_RA2)
  5024. #define ROM_SMBusSlaveIntProcess \
  5025. ((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[44])
  5026. #endif
  5027. #if defined(TARGET_IS_TM4C123_RA1) || \
  5028. defined(TARGET_IS_TM4C123_RA3) || \
  5029. defined(TARGET_IS_TM4C123_RB1) || \
  5030. defined(TARGET_IS_TM4C123_RB2) || \
  5031. defined(TARGET_IS_TM4C129_RA0) || \
  5032. defined(TARGET_IS_TM4C129_RA1) || \
  5033. defined(TARGET_IS_TM4C129_RA2)
  5034. #define ROM_SMBusSlaveManualACKDisable \
  5035. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[45])
  5036. #endif
  5037. #if defined(TARGET_IS_TM4C123_RA1) || \
  5038. defined(TARGET_IS_TM4C123_RA3) || \
  5039. defined(TARGET_IS_TM4C123_RB1) || \
  5040. defined(TARGET_IS_TM4C123_RB2) || \
  5041. defined(TARGET_IS_TM4C129_RA0) || \
  5042. defined(TARGET_IS_TM4C129_RA1) || \
  5043. defined(TARGET_IS_TM4C129_RA2)
  5044. #define ROM_SMBusSlaveManualACKEnable \
  5045. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[46])
  5046. #endif
  5047. #if defined(TARGET_IS_TM4C123_RA1) || \
  5048. defined(TARGET_IS_TM4C123_RA3) || \
  5049. defined(TARGET_IS_TM4C123_RB1) || \
  5050. defined(TARGET_IS_TM4C123_RB2) || \
  5051. defined(TARGET_IS_TM4C129_RA0) || \
  5052. defined(TARGET_IS_TM4C129_RA1) || \
  5053. defined(TARGET_IS_TM4C129_RA2)
  5054. #define ROM_SMBusSlaveManualACKStatusGet \
  5055. ((bool (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[47])
  5056. #endif
  5057. #if defined(TARGET_IS_TM4C123_RA1) || \
  5058. defined(TARGET_IS_TM4C123_RA3) || \
  5059. defined(TARGET_IS_TM4C123_RB1) || \
  5060. defined(TARGET_IS_TM4C123_RB2) || \
  5061. defined(TARGET_IS_TM4C129_RA0) || \
  5062. defined(TARGET_IS_TM4C129_RA1) || \
  5063. defined(TARGET_IS_TM4C129_RA2)
  5064. #define ROM_SMBusSlaveProcessCallDisable \
  5065. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[48])
  5066. #endif
  5067. #if defined(TARGET_IS_TM4C123_RA1) || \
  5068. defined(TARGET_IS_TM4C123_RA3) || \
  5069. defined(TARGET_IS_TM4C123_RB1) || \
  5070. defined(TARGET_IS_TM4C123_RB2) || \
  5071. defined(TARGET_IS_TM4C129_RA0) || \
  5072. defined(TARGET_IS_TM4C129_RA1) || \
  5073. defined(TARGET_IS_TM4C129_RA2)
  5074. #define ROM_SMBusSlaveProcessCallEnable \
  5075. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[49])
  5076. #endif
  5077. #if defined(TARGET_IS_TM4C123_RA1) || \
  5078. defined(TARGET_IS_TM4C123_RA3) || \
  5079. defined(TARGET_IS_TM4C123_RB1) || \
  5080. defined(TARGET_IS_TM4C123_RB2) || \
  5081. defined(TARGET_IS_TM4C129_RA0) || \
  5082. defined(TARGET_IS_TM4C129_RA1) || \
  5083. defined(TARGET_IS_TM4C129_RA2)
  5084. #define ROM_SMBusSlaveRxBufferSet \
  5085. ((void (*)(tSMBus *psSMBus, \
  5086. uint8_t *pui8Data, \
  5087. uint8_t ui8Size))ROM_SMBUSTABLE[50])
  5088. #endif
  5089. #if defined(TARGET_IS_TM4C123_RA1) || \
  5090. defined(TARGET_IS_TM4C123_RA3) || \
  5091. defined(TARGET_IS_TM4C123_RB1) || \
  5092. defined(TARGET_IS_TM4C123_RB2) || \
  5093. defined(TARGET_IS_TM4C129_RA0) || \
  5094. defined(TARGET_IS_TM4C129_RA1) || \
  5095. defined(TARGET_IS_TM4C129_RA2)
  5096. #define ROM_SMBusSlaveTransferInit \
  5097. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[51])
  5098. #endif
  5099. #if defined(TARGET_IS_TM4C123_RA1) || \
  5100. defined(TARGET_IS_TM4C123_RA3) || \
  5101. defined(TARGET_IS_TM4C123_RB1) || \
  5102. defined(TARGET_IS_TM4C123_RB2) || \
  5103. defined(TARGET_IS_TM4C129_RA0) || \
  5104. defined(TARGET_IS_TM4C129_RA1) || \
  5105. defined(TARGET_IS_TM4C129_RA2)
  5106. #define ROM_SMBusSlaveTxBufferSet \
  5107. ((void (*)(tSMBus *psSMBus, \
  5108. uint8_t *pui8Data, \
  5109. uint8_t ui8Size))ROM_SMBUSTABLE[52])
  5110. #endif
  5111. #if defined(TARGET_IS_TM4C123_RA1) || \
  5112. defined(TARGET_IS_TM4C123_RA3) || \
  5113. defined(TARGET_IS_TM4C123_RB1) || \
  5114. defined(TARGET_IS_TM4C123_RB2) || \
  5115. defined(TARGET_IS_TM4C129_RA0) || \
  5116. defined(TARGET_IS_TM4C129_RA1) || \
  5117. defined(TARGET_IS_TM4C129_RA2)
  5118. #define ROM_SMBusSlaveUDIDSet \
  5119. ((void (*)(tSMBus *psSMBus, \
  5120. tSMBusUDID *pUDID))ROM_SMBUSTABLE[53])
  5121. #endif
  5122. #if defined(TARGET_IS_TM4C123_RA1) || \
  5123. defined(TARGET_IS_TM4C123_RA3) || \
  5124. defined(TARGET_IS_TM4C123_RB1) || \
  5125. defined(TARGET_IS_TM4C123_RB2) || \
  5126. defined(TARGET_IS_TM4C129_RA0) || \
  5127. defined(TARGET_IS_TM4C129_RA1) || \
  5128. defined(TARGET_IS_TM4C129_RA2)
  5129. #define ROM_SMBusStatusGet \
  5130. ((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[54])
  5131. #endif
  5132. #if defined(TARGET_IS_TM4C123_RA3) || \
  5133. defined(TARGET_IS_TM4C123_RB1) || \
  5134. defined(TARGET_IS_TM4C123_RB2) || \
  5135. defined(TARGET_IS_TM4C129_RA0) || \
  5136. defined(TARGET_IS_TM4C129_RA1) || \
  5137. defined(TARGET_IS_TM4C129_RA2)
  5138. #define ROM_SMBusSlaveDataSend \
  5139. ((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[55])
  5140. #endif
  5141. #if defined(TARGET_IS_TM4C129_RA0) || \
  5142. defined(TARGET_IS_TM4C129_RA1) || \
  5143. defined(TARGET_IS_TM4C129_RA2)
  5144. #define ROM_SMBusFIFOEnable \
  5145. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[56])
  5146. #endif
  5147. #if defined(TARGET_IS_TM4C129_RA0) || \
  5148. defined(TARGET_IS_TM4C129_RA1) || \
  5149. defined(TARGET_IS_TM4C129_RA2)
  5150. #define ROM_SMBusFIFODisable \
  5151. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[57])
  5152. #endif
  5153. #if defined(TARGET_IS_TM4C129_RA0) || \
  5154. defined(TARGET_IS_TM4C129_RA1) || \
  5155. defined(TARGET_IS_TM4C129_RA2)
  5156. #define ROM_SMBusDMAEnable \
  5157. ((void (*)(tSMBus *psSMBus, \
  5158. uint8_t ui8TxChannel, \
  5159. uint8_t ui8RxChannel))ROM_SMBUSTABLE[58])
  5160. #endif
  5161. #if defined(TARGET_IS_TM4C129_RA0) || \
  5162. defined(TARGET_IS_TM4C129_RA1) || \
  5163. defined(TARGET_IS_TM4C129_RA2)
  5164. #define ROM_SMBusDMADisable \
  5165. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[59])
  5166. #endif
  5167. //*****************************************************************************
  5168. //
  5169. // Macros for calling ROM functions in the SPIFlash API.
  5170. //
  5171. //*****************************************************************************
  5172. #if defined(TARGET_IS_TM4C129_RA0) || \
  5173. defined(TARGET_IS_TM4C129_RA1) || \
  5174. defined(TARGET_IS_TM4C129_RA2)
  5175. #define ROM_SPIFlashIntHandler \
  5176. ((uint32_t (*)(tSPIFlashState *pState))ROM_SPIFLASHTABLE[0])
  5177. #endif
  5178. #if defined(TARGET_IS_TM4C129_RA0) || \
  5179. defined(TARGET_IS_TM4C129_RA1) || \
  5180. defined(TARGET_IS_TM4C129_RA2)
  5181. #define ROM_SPIFlashInit \
  5182. ((void (*)(uint32_t ui32Base, \
  5183. uint32_t ui32Clock, \
  5184. uint32_t ui32BitRate))ROM_SPIFLASHTABLE[1])
  5185. #endif
  5186. #if defined(TARGET_IS_TM4C129_RA0) || \
  5187. defined(TARGET_IS_TM4C129_RA1) || \
  5188. defined(TARGET_IS_TM4C129_RA2)
  5189. #define ROM_SPIFlashWriteStatus \
  5190. ((void (*)(uint32_t ui32Base, \
  5191. uint8_t ui8Status))ROM_SPIFLASHTABLE[2])
  5192. #endif
  5193. #if defined(TARGET_IS_TM4C129_RA0) || \
  5194. defined(TARGET_IS_TM4C129_RA1) || \
  5195. defined(TARGET_IS_TM4C129_RA2)
  5196. #define ROM_SPIFlashPageProgram \
  5197. ((void (*)(uint32_t ui32Base, \
  5198. uint32_t ui32Addr, \
  5199. const uint8_t *pui8Data, \
  5200. uint32_t ui32Count))ROM_SPIFLASHTABLE[3])
  5201. #endif
  5202. #if defined(TARGET_IS_TM4C129_RA0) || \
  5203. defined(TARGET_IS_TM4C129_RA1) || \
  5204. defined(TARGET_IS_TM4C129_RA2)
  5205. #define ROM_SPIFlashPageProgramNonBlocking \
  5206. ((void (*)(tSPIFlashState *pState, \
  5207. uint32_t ui32Base, \
  5208. uint32_t ui32Addr, \
  5209. const uint8_t *pui8Data, \
  5210. uint32_t ui32Count, \
  5211. bool bUseDMA, \
  5212. uint32_t ui32TxChannel))ROM_SPIFLASHTABLE[4])
  5213. #endif
  5214. #if defined(TARGET_IS_TM4C129_RA0) || \
  5215. defined(TARGET_IS_TM4C129_RA1) || \
  5216. defined(TARGET_IS_TM4C129_RA2)
  5217. #define ROM_SPIFlashRead \
  5218. ((void (*)(uint32_t ui32Base, \
  5219. uint32_t ui32Addr, \
  5220. uint8_t *pui8Data, \
  5221. uint32_t ui32Count))ROM_SPIFLASHTABLE[5])
  5222. #endif
  5223. #if defined(TARGET_IS_TM4C129_RA0) || \
  5224. defined(TARGET_IS_TM4C129_RA1) || \
  5225. defined(TARGET_IS_TM4C129_RA2)
  5226. #define ROM_SPIFlashReadNonBlocking \
  5227. ((void (*)(tSPIFlashState *pState, \
  5228. uint32_t ui32Base, \
  5229. uint32_t ui32Addr, \
  5230. uint8_t *pui8Data, \
  5231. uint32_t ui32Count, \
  5232. bool bUseDMA, \
  5233. uint32_t ui32TxChannel, \
  5234. uint32_t ui32RxChannel))ROM_SPIFLASHTABLE[6])
  5235. #endif
  5236. #if defined(TARGET_IS_TM4C129_RA0) || \
  5237. defined(TARGET_IS_TM4C129_RA1) || \
  5238. defined(TARGET_IS_TM4C129_RA2)
  5239. #define ROM_SPIFlashWriteDisable \
  5240. ((void (*)(uint32_t ui32Base))ROM_SPIFLASHTABLE[7])
  5241. #endif
  5242. #if defined(TARGET_IS_TM4C129_RA0) || \
  5243. defined(TARGET_IS_TM4C129_RA1) || \
  5244. defined(TARGET_IS_TM4C129_RA2)
  5245. #define ROM_SPIFlashReadStatus \
  5246. ((uint8_t (*)(uint32_t ui32Base))ROM_SPIFLASHTABLE[8])
  5247. #endif
  5248. #if defined(TARGET_IS_TM4C129_RA0) || \
  5249. defined(TARGET_IS_TM4C129_RA1) || \
  5250. defined(TARGET_IS_TM4C129_RA2)
  5251. #define ROM_SPIFlashWriteEnable \
  5252. ((void (*)(uint32_t ui32Base))ROM_SPIFLASHTABLE[9])
  5253. #endif
  5254. #if defined(TARGET_IS_TM4C129_RA0) || \
  5255. defined(TARGET_IS_TM4C129_RA1) || \
  5256. defined(TARGET_IS_TM4C129_RA2)
  5257. #define ROM_SPIFlashFastRead \
  5258. ((void (*)(uint32_t ui32Base, \
  5259. uint32_t ui32Addr, \
  5260. uint8_t *pui8Data, \
  5261. uint32_t ui32Count))ROM_SPIFLASHTABLE[10])
  5262. #endif
  5263. #if defined(TARGET_IS_TM4C129_RA0) || \
  5264. defined(TARGET_IS_TM4C129_RA1) || \
  5265. defined(TARGET_IS_TM4C129_RA2)
  5266. #define ROM_SPIFlashFastReadNonBlocking \
  5267. ((void (*)(tSPIFlashState *pState, \
  5268. uint32_t ui32Base, \
  5269. uint32_t ui32Addr, \
  5270. uint8_t *pui8Data, \
  5271. uint32_t ui32Count, \
  5272. bool bUseDMA, \
  5273. uint32_t ui32TxChannel, \
  5274. uint32_t ui32RxChannel))ROM_SPIFLASHTABLE[11])
  5275. #endif
  5276. #if defined(TARGET_IS_TM4C129_RA0) || \
  5277. defined(TARGET_IS_TM4C129_RA1) || \
  5278. defined(TARGET_IS_TM4C129_RA2)
  5279. #define ROM_SPIFlashSectorErase \
  5280. ((void (*)(uint32_t ui32Base, \
  5281. uint32_t ui32Addr))ROM_SPIFLASHTABLE[12])
  5282. #endif
  5283. #if defined(TARGET_IS_TM4C129_RA0) || \
  5284. defined(TARGET_IS_TM4C129_RA1) || \
  5285. defined(TARGET_IS_TM4C129_RA2)
  5286. #define ROM_SPIFlashDualRead \
  5287. ((void (*)(uint32_t ui32Base, \
  5288. uint32_t ui32Addr, \
  5289. uint8_t *pui8Data, \
  5290. uint32_t ui32Count))ROM_SPIFLASHTABLE[13])
  5291. #endif
  5292. #if defined(TARGET_IS_TM4C129_RA0) || \
  5293. defined(TARGET_IS_TM4C129_RA1) || \
  5294. defined(TARGET_IS_TM4C129_RA2)
  5295. #define ROM_SPIFlashDualReadNonBlocking \
  5296. ((void (*)(tSPIFlashState *pState, \
  5297. uint32_t ui32Base, \
  5298. uint32_t ui32Addr, \
  5299. uint8_t *pui8Data, \
  5300. uint32_t ui32Count, \
  5301. bool bUseDMA, \
  5302. uint32_t ui32TxChannel, \
  5303. uint32_t ui32RxChannel))ROM_SPIFLASHTABLE[14])
  5304. #endif
  5305. #if defined(TARGET_IS_TM4C129_RA0) || \
  5306. defined(TARGET_IS_TM4C129_RA1) || \
  5307. defined(TARGET_IS_TM4C129_RA2)
  5308. #define ROM_SPIFlashBlockErase32 \
  5309. ((void (*)(uint32_t ui32Base, \
  5310. uint32_t ui32Addr))ROM_SPIFLASHTABLE[15])
  5311. #endif
  5312. #if defined(TARGET_IS_TM4C129_RA0) || \
  5313. defined(TARGET_IS_TM4C129_RA1) || \
  5314. defined(TARGET_IS_TM4C129_RA2)
  5315. #define ROM_SPIFlashQuadRead \
  5316. ((void (*)(uint32_t ui32Base, \
  5317. uint32_t ui32Addr, \
  5318. uint8_t *pui8Data, \
  5319. uint32_t ui32Count))ROM_SPIFLASHTABLE[16])
  5320. #endif
  5321. #if defined(TARGET_IS_TM4C129_RA0) || \
  5322. defined(TARGET_IS_TM4C129_RA1) || \
  5323. defined(TARGET_IS_TM4C129_RA2)
  5324. #define ROM_SPIFlashQuadReadNonBlocking \
  5325. ((void (*)(tSPIFlashState *pState, \
  5326. uint32_t ui32Base, \
  5327. uint32_t ui32Addr, \
  5328. uint8_t *pui8Data, \
  5329. uint32_t ui32Count, \
  5330. bool bUseDMA, \
  5331. uint32_t ui32TxChannel, \
  5332. uint32_t ui32RxChannel))ROM_SPIFLASHTABLE[17])
  5333. #endif
  5334. #if defined(TARGET_IS_TM4C129_RA0) || \
  5335. defined(TARGET_IS_TM4C129_RA1) || \
  5336. defined(TARGET_IS_TM4C129_RA2)
  5337. #define ROM_SPIFlashReadID \
  5338. ((void (*)(uint32_t ui32Base, \
  5339. uint8_t *pui8ManufacturerID, \
  5340. uint16_t *pui16DeviceID))ROM_SPIFLASHTABLE[18])
  5341. #endif
  5342. #if defined(TARGET_IS_TM4C129_RA0) || \
  5343. defined(TARGET_IS_TM4C129_RA1) || \
  5344. defined(TARGET_IS_TM4C129_RA2)
  5345. #define ROM_SPIFlashChipErase \
  5346. ((void (*)(uint32_t ui32Base))ROM_SPIFLASHTABLE[19])
  5347. #endif
  5348. #if defined(TARGET_IS_TM4C129_RA0) || \
  5349. defined(TARGET_IS_TM4C129_RA1) || \
  5350. defined(TARGET_IS_TM4C129_RA2)
  5351. #define ROM_SPIFlashBlockErase64 \
  5352. ((void (*)(uint32_t ui32Base, \
  5353. uint32_t ui32Addr))ROM_SPIFLASHTABLE[20])
  5354. #endif
  5355. //*****************************************************************************
  5356. //
  5357. // Macros for calling ROM functions in the SSI API.
  5358. //
  5359. //*****************************************************************************
  5360. #if defined(TARGET_IS_TM4C123_RA1) || \
  5361. defined(TARGET_IS_TM4C123_RA3) || \
  5362. defined(TARGET_IS_TM4C123_RB1) || \
  5363. defined(TARGET_IS_TM4C123_RB2) || \
  5364. defined(TARGET_IS_TM4C129_RA0) || \
  5365. defined(TARGET_IS_TM4C129_RA1) || \
  5366. defined(TARGET_IS_TM4C129_RA2)
  5367. #define ROM_SSIDataPut \
  5368. ((void (*)(uint32_t ui32Base, \
  5369. uint32_t ui32Data))ROM_SSITABLE[0])
  5370. #endif
  5371. #if defined(TARGET_IS_TM4C123_RA1) || \
  5372. defined(TARGET_IS_TM4C123_RA3) || \
  5373. defined(TARGET_IS_TM4C123_RB1) || \
  5374. defined(TARGET_IS_TM4C123_RB2) || \
  5375. defined(TARGET_IS_TM4C129_RA0) || \
  5376. defined(TARGET_IS_TM4C129_RA1) || \
  5377. defined(TARGET_IS_TM4C129_RA2)
  5378. #define ROM_SSIConfigSetExpClk \
  5379. ((void (*)(uint32_t ui32Base, \
  5380. uint32_t ui32SSIClk, \
  5381. uint32_t ui32Protocol, \
  5382. uint32_t ui32Mode, \
  5383. uint32_t ui32BitRate, \
  5384. uint32_t ui32DataWidth))ROM_SSITABLE[1])
  5385. #endif
  5386. #if defined(TARGET_IS_TM4C123_RA1) || \
  5387. defined(TARGET_IS_TM4C123_RA3) || \
  5388. defined(TARGET_IS_TM4C123_RB1) || \
  5389. defined(TARGET_IS_TM4C123_RB2) || \
  5390. defined(TARGET_IS_TM4C129_RA0) || \
  5391. defined(TARGET_IS_TM4C129_RA1) || \
  5392. defined(TARGET_IS_TM4C129_RA2)
  5393. #define ROM_SSIEnable \
  5394. ((void (*)(uint32_t ui32Base))ROM_SSITABLE[2])
  5395. #endif
  5396. #if defined(TARGET_IS_TM4C123_RA1) || \
  5397. defined(TARGET_IS_TM4C123_RA3) || \
  5398. defined(TARGET_IS_TM4C123_RB1) || \
  5399. defined(TARGET_IS_TM4C123_RB2) || \
  5400. defined(TARGET_IS_TM4C129_RA0) || \
  5401. defined(TARGET_IS_TM4C129_RA1) || \
  5402. defined(TARGET_IS_TM4C129_RA2)
  5403. #define ROM_SSIDisable \
  5404. ((void (*)(uint32_t ui32Base))ROM_SSITABLE[3])
  5405. #endif
  5406. #if defined(TARGET_IS_TM4C123_RA1) || \
  5407. defined(TARGET_IS_TM4C123_RA3) || \
  5408. defined(TARGET_IS_TM4C123_RB1) || \
  5409. defined(TARGET_IS_TM4C123_RB2) || \
  5410. defined(TARGET_IS_TM4C129_RA0) || \
  5411. defined(TARGET_IS_TM4C129_RA1) || \
  5412. defined(TARGET_IS_TM4C129_RA2)
  5413. #define ROM_SSIIntEnable \
  5414. ((void (*)(uint32_t ui32Base, \
  5415. uint32_t ui32IntFlags))ROM_SSITABLE[4])
  5416. #endif
  5417. #if defined(TARGET_IS_TM4C123_RA1) || \
  5418. defined(TARGET_IS_TM4C123_RA3) || \
  5419. defined(TARGET_IS_TM4C123_RB1) || \
  5420. defined(TARGET_IS_TM4C123_RB2) || \
  5421. defined(TARGET_IS_TM4C129_RA0) || \
  5422. defined(TARGET_IS_TM4C129_RA1) || \
  5423. defined(TARGET_IS_TM4C129_RA2)
  5424. #define ROM_SSIIntDisable \
  5425. ((void (*)(uint32_t ui32Base, \
  5426. uint32_t ui32IntFlags))ROM_SSITABLE[5])
  5427. #endif
  5428. #if defined(TARGET_IS_TM4C123_RA1) || \
  5429. defined(TARGET_IS_TM4C123_RA3) || \
  5430. defined(TARGET_IS_TM4C123_RB1) || \
  5431. defined(TARGET_IS_TM4C123_RB2) || \
  5432. defined(TARGET_IS_TM4C129_RA0) || \
  5433. defined(TARGET_IS_TM4C129_RA1) || \
  5434. defined(TARGET_IS_TM4C129_RA2)
  5435. #define ROM_SSIIntStatus \
  5436. ((uint32_t (*)(uint32_t ui32Base, \
  5437. bool bMasked))ROM_SSITABLE[6])
  5438. #endif
  5439. #if defined(TARGET_IS_TM4C123_RA1) || \
  5440. defined(TARGET_IS_TM4C123_RA3) || \
  5441. defined(TARGET_IS_TM4C123_RB1) || \
  5442. defined(TARGET_IS_TM4C123_RB2) || \
  5443. defined(TARGET_IS_TM4C129_RA0) || \
  5444. defined(TARGET_IS_TM4C129_RA1) || \
  5445. defined(TARGET_IS_TM4C129_RA2)
  5446. #define ROM_SSIIntClear \
  5447. ((void (*)(uint32_t ui32Base, \
  5448. uint32_t ui32IntFlags))ROM_SSITABLE[7])
  5449. #endif
  5450. #if defined(TARGET_IS_TM4C123_RA1) || \
  5451. defined(TARGET_IS_TM4C123_RA3) || \
  5452. defined(TARGET_IS_TM4C123_RB1) || \
  5453. defined(TARGET_IS_TM4C123_RB2) || \
  5454. defined(TARGET_IS_TM4C129_RA0) || \
  5455. defined(TARGET_IS_TM4C129_RA1) || \
  5456. defined(TARGET_IS_TM4C129_RA2)
  5457. #define ROM_SSIDataPutNonBlocking \
  5458. ((int32_t (*)(uint32_t ui32Base, \
  5459. uint32_t ui32Data))ROM_SSITABLE[8])
  5460. #endif
  5461. #if defined(TARGET_IS_TM4C123_RA1) || \
  5462. defined(TARGET_IS_TM4C123_RA3) || \
  5463. defined(TARGET_IS_TM4C123_RB1) || \
  5464. defined(TARGET_IS_TM4C123_RB2) || \
  5465. defined(TARGET_IS_TM4C129_RA0) || \
  5466. defined(TARGET_IS_TM4C129_RA1) || \
  5467. defined(TARGET_IS_TM4C129_RA2)
  5468. #define ROM_SSIDataGet \
  5469. ((void (*)(uint32_t ui32Base, \
  5470. uint32_t *pui32Data))ROM_SSITABLE[9])
  5471. #endif
  5472. #if defined(TARGET_IS_TM4C123_RA1) || \
  5473. defined(TARGET_IS_TM4C123_RA3) || \
  5474. defined(TARGET_IS_TM4C123_RB1) || \
  5475. defined(TARGET_IS_TM4C123_RB2) || \
  5476. defined(TARGET_IS_TM4C129_RA0) || \
  5477. defined(TARGET_IS_TM4C129_RA1) || \
  5478. defined(TARGET_IS_TM4C129_RA2)
  5479. #define ROM_SSIDataGetNonBlocking \
  5480. ((int32_t (*)(uint32_t ui32Base, \
  5481. uint32_t *pui32Data))ROM_SSITABLE[10])
  5482. #endif
  5483. #if defined(TARGET_IS_TM4C123_RA1) || \
  5484. defined(TARGET_IS_TM4C123_RA3) || \
  5485. defined(TARGET_IS_TM4C123_RB1) || \
  5486. defined(TARGET_IS_TM4C123_RB2) || \
  5487. defined(TARGET_IS_TM4C129_RA0) || \
  5488. defined(TARGET_IS_TM4C129_RA1) || \
  5489. defined(TARGET_IS_TM4C129_RA2)
  5490. #define ROM_UpdateSSI \
  5491. ((void (*)(void))ROM_SSITABLE[11])
  5492. #endif
  5493. #if defined(TARGET_IS_TM4C123_RA1) || \
  5494. defined(TARGET_IS_TM4C123_RA3) || \
  5495. defined(TARGET_IS_TM4C123_RB1) || \
  5496. defined(TARGET_IS_TM4C123_RB2) || \
  5497. defined(TARGET_IS_TM4C129_RA0) || \
  5498. defined(TARGET_IS_TM4C129_RA1) || \
  5499. defined(TARGET_IS_TM4C129_RA2)
  5500. #define ROM_SSIDMAEnable \
  5501. ((void (*)(uint32_t ui32Base, \
  5502. uint32_t ui32DMAFlags))ROM_SSITABLE[12])
  5503. #endif
  5504. #if defined(TARGET_IS_TM4C123_RA1) || \
  5505. defined(TARGET_IS_TM4C123_RA3) || \
  5506. defined(TARGET_IS_TM4C123_RB1) || \
  5507. defined(TARGET_IS_TM4C123_RB2) || \
  5508. defined(TARGET_IS_TM4C129_RA0) || \
  5509. defined(TARGET_IS_TM4C129_RA1) || \
  5510. defined(TARGET_IS_TM4C129_RA2)
  5511. #define ROM_SSIDMADisable \
  5512. ((void (*)(uint32_t ui32Base, \
  5513. uint32_t ui32DMAFlags))ROM_SSITABLE[13])
  5514. #endif
  5515. #if defined(TARGET_IS_TM4C123_RA1) || \
  5516. defined(TARGET_IS_TM4C123_RA3) || \
  5517. defined(TARGET_IS_TM4C123_RB1) || \
  5518. defined(TARGET_IS_TM4C123_RB2) || \
  5519. defined(TARGET_IS_TM4C129_RA0) || \
  5520. defined(TARGET_IS_TM4C129_RA1) || \
  5521. defined(TARGET_IS_TM4C129_RA2)
  5522. #define ROM_SSIBusy \
  5523. ((bool (*)(uint32_t ui32Base))ROM_SSITABLE[14])
  5524. #endif
  5525. #if defined(TARGET_IS_TM4C123_RA1) || \
  5526. defined(TARGET_IS_TM4C123_RA3) || \
  5527. defined(TARGET_IS_TM4C123_RB1) || \
  5528. defined(TARGET_IS_TM4C123_RB2) || \
  5529. defined(TARGET_IS_TM4C129_RA0) || \
  5530. defined(TARGET_IS_TM4C129_RA1) || \
  5531. defined(TARGET_IS_TM4C129_RA2)
  5532. #define ROM_SSIClockSourceGet \
  5533. ((uint32_t (*)(uint32_t ui32Base))ROM_SSITABLE[15])
  5534. #endif
  5535. #if defined(TARGET_IS_TM4C123_RA1) || \
  5536. defined(TARGET_IS_TM4C123_RA3) || \
  5537. defined(TARGET_IS_TM4C123_RB1) || \
  5538. defined(TARGET_IS_TM4C123_RB2) || \
  5539. defined(TARGET_IS_TM4C129_RA0) || \
  5540. defined(TARGET_IS_TM4C129_RA1) || \
  5541. defined(TARGET_IS_TM4C129_RA2)
  5542. #define ROM_SSIClockSourceSet \
  5543. ((void (*)(uint32_t ui32Base, \
  5544. uint32_t ui32Source))ROM_SSITABLE[16])
  5545. #endif
  5546. #if defined(TARGET_IS_TM4C129_RA0) || \
  5547. defined(TARGET_IS_TM4C129_RA1) || \
  5548. defined(TARGET_IS_TM4C129_RA2)
  5549. #define ROM_SSIAdvModeSet \
  5550. ((void (*)(uint32_t ui32Base, \
  5551. uint32_t ui32Mode))ROM_SSITABLE[17])
  5552. #endif
  5553. #if defined(TARGET_IS_TM4C129_RA0) || \
  5554. defined(TARGET_IS_TM4C129_RA1) || \
  5555. defined(TARGET_IS_TM4C129_RA2)
  5556. #define ROM_SSIAdvDataPutFrameEnd \
  5557. ((void (*)(uint32_t ui32Base, \
  5558. uint32_t ui32Data))ROM_SSITABLE[18])
  5559. #endif
  5560. #if defined(TARGET_IS_TM4C129_RA0) || \
  5561. defined(TARGET_IS_TM4C129_RA1) || \
  5562. defined(TARGET_IS_TM4C129_RA2)
  5563. #define ROM_SSIAdvDataPutFrameEndNonBlocking \
  5564. ((int32_t (*)(uint32_t ui32Base, \
  5565. uint32_t ui32Data))ROM_SSITABLE[19])
  5566. #endif
  5567. #if defined(TARGET_IS_TM4C129_RA0) || \
  5568. defined(TARGET_IS_TM4C129_RA1) || \
  5569. defined(TARGET_IS_TM4C129_RA2)
  5570. #define ROM_SSIAdvFrameHoldEnable \
  5571. ((void (*)(uint32_t ui32Base))ROM_SSITABLE[20])
  5572. #endif
  5573. #if defined(TARGET_IS_TM4C129_RA0) || \
  5574. defined(TARGET_IS_TM4C129_RA1) || \
  5575. defined(TARGET_IS_TM4C129_RA2)
  5576. #define ROM_SSIAdvFrameHoldDisable \
  5577. ((void (*)(uint32_t ui32Base))ROM_SSITABLE[21])
  5578. #endif
  5579. //*****************************************************************************
  5580. //
  5581. // Macros for calling ROM functions in the SysCtl API.
  5582. //
  5583. //*****************************************************************************
  5584. #if defined(TARGET_IS_TM4C123_RA1) || \
  5585. defined(TARGET_IS_TM4C123_RA3) || \
  5586. defined(TARGET_IS_TM4C123_RB1) || \
  5587. defined(TARGET_IS_TM4C123_RB2) || \
  5588. defined(TARGET_IS_TM4C129_RA0) || \
  5589. defined(TARGET_IS_TM4C129_RA1) || \
  5590. defined(TARGET_IS_TM4C129_RA2)
  5591. #define ROM_SysCtlSleep \
  5592. ((void (*)(void))ROM_SYSCTLTABLE[0])
  5593. #endif
  5594. #if defined(TARGET_IS_TM4C123_RA1) || \
  5595. defined(TARGET_IS_TM4C123_RA3) || \
  5596. defined(TARGET_IS_TM4C123_RB1) || \
  5597. defined(TARGET_IS_TM4C123_RB2) || \
  5598. defined(TARGET_IS_TM4C129_RA0) || \
  5599. defined(TARGET_IS_TM4C129_RA1) || \
  5600. defined(TARGET_IS_TM4C129_RA2)
  5601. #define ROM_SysCtlSRAMSizeGet \
  5602. ((uint32_t (*)(void))ROM_SYSCTLTABLE[1])
  5603. #endif
  5604. #if defined(TARGET_IS_TM4C123_RA1) || \
  5605. defined(TARGET_IS_TM4C123_RA3) || \
  5606. defined(TARGET_IS_TM4C123_RB1) || \
  5607. defined(TARGET_IS_TM4C123_RB2) || \
  5608. defined(TARGET_IS_TM4C129_RA0) || \
  5609. defined(TARGET_IS_TM4C129_RA1) || \
  5610. defined(TARGET_IS_TM4C129_RA2)
  5611. #define ROM_SysCtlFlashSizeGet \
  5612. ((uint32_t (*)(void))ROM_SYSCTLTABLE[2])
  5613. #endif
  5614. #if defined(TARGET_IS_TM4C123_RA1) || \
  5615. defined(TARGET_IS_TM4C123_RA3) || \
  5616. defined(TARGET_IS_TM4C123_RB1) || \
  5617. defined(TARGET_IS_TM4C123_RB2) || \
  5618. defined(TARGET_IS_TM4C129_RA0) || \
  5619. defined(TARGET_IS_TM4C129_RA1) || \
  5620. defined(TARGET_IS_TM4C129_RA2)
  5621. #define ROM_SysCtlPeripheralPresent \
  5622. ((bool (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[4])
  5623. #endif
  5624. #if defined(TARGET_IS_TM4C123_RA1) || \
  5625. defined(TARGET_IS_TM4C123_RA3) || \
  5626. defined(TARGET_IS_TM4C123_RB1) || \
  5627. defined(TARGET_IS_TM4C123_RB2) || \
  5628. defined(TARGET_IS_TM4C129_RA0) || \
  5629. defined(TARGET_IS_TM4C129_RA1) || \
  5630. defined(TARGET_IS_TM4C129_RA2)
  5631. #define ROM_SysCtlPeripheralReset \
  5632. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[5])
  5633. #endif
  5634. #if defined(TARGET_IS_TM4C123_RA1) || \
  5635. defined(TARGET_IS_TM4C123_RA3) || \
  5636. defined(TARGET_IS_TM4C123_RB1) || \
  5637. defined(TARGET_IS_TM4C123_RB2) || \
  5638. defined(TARGET_IS_TM4C129_RA0) || \
  5639. defined(TARGET_IS_TM4C129_RA1) || \
  5640. defined(TARGET_IS_TM4C129_RA2)
  5641. #define ROM_SysCtlPeripheralEnable \
  5642. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[6])
  5643. #endif
  5644. #if defined(TARGET_IS_TM4C123_RA1) || \
  5645. defined(TARGET_IS_TM4C123_RA3) || \
  5646. defined(TARGET_IS_TM4C123_RB1) || \
  5647. defined(TARGET_IS_TM4C123_RB2) || \
  5648. defined(TARGET_IS_TM4C129_RA0) || \
  5649. defined(TARGET_IS_TM4C129_RA1) || \
  5650. defined(TARGET_IS_TM4C129_RA2)
  5651. #define ROM_SysCtlPeripheralDisable \
  5652. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[7])
  5653. #endif
  5654. #if defined(TARGET_IS_TM4C123_RA1) || \
  5655. defined(TARGET_IS_TM4C123_RA3) || \
  5656. defined(TARGET_IS_TM4C123_RB1) || \
  5657. defined(TARGET_IS_TM4C123_RB2) || \
  5658. defined(TARGET_IS_TM4C129_RA0) || \
  5659. defined(TARGET_IS_TM4C129_RA1) || \
  5660. defined(TARGET_IS_TM4C129_RA2)
  5661. #define ROM_SysCtlPeripheralSleepEnable \
  5662. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[8])
  5663. #endif
  5664. #if defined(TARGET_IS_TM4C123_RA1) || \
  5665. defined(TARGET_IS_TM4C123_RA3) || \
  5666. defined(TARGET_IS_TM4C123_RB1) || \
  5667. defined(TARGET_IS_TM4C123_RB2) || \
  5668. defined(TARGET_IS_TM4C129_RA0) || \
  5669. defined(TARGET_IS_TM4C129_RA1) || \
  5670. defined(TARGET_IS_TM4C129_RA2)
  5671. #define ROM_SysCtlPeripheralSleepDisable \
  5672. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[9])
  5673. #endif
  5674. #if defined(TARGET_IS_TM4C123_RA1) || \
  5675. defined(TARGET_IS_TM4C123_RA3) || \
  5676. defined(TARGET_IS_TM4C123_RB1) || \
  5677. defined(TARGET_IS_TM4C123_RB2) || \
  5678. defined(TARGET_IS_TM4C129_RA0) || \
  5679. defined(TARGET_IS_TM4C129_RA1) || \
  5680. defined(TARGET_IS_TM4C129_RA2)
  5681. #define ROM_SysCtlPeripheralDeepSleepEnable \
  5682. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[10])
  5683. #endif
  5684. #if defined(TARGET_IS_TM4C123_RA1) || \
  5685. defined(TARGET_IS_TM4C123_RA3) || \
  5686. defined(TARGET_IS_TM4C123_RB1) || \
  5687. defined(TARGET_IS_TM4C123_RB2) || \
  5688. defined(TARGET_IS_TM4C129_RA0) || \
  5689. defined(TARGET_IS_TM4C129_RA1) || \
  5690. defined(TARGET_IS_TM4C129_RA2)
  5691. #define ROM_SysCtlPeripheralDeepSleepDisable \
  5692. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[11])
  5693. #endif
  5694. #if defined(TARGET_IS_TM4C123_RA1) || \
  5695. defined(TARGET_IS_TM4C123_RA3) || \
  5696. defined(TARGET_IS_TM4C123_RB1) || \
  5697. defined(TARGET_IS_TM4C123_RB2) || \
  5698. defined(TARGET_IS_TM4C129_RA0) || \
  5699. defined(TARGET_IS_TM4C129_RA1) || \
  5700. defined(TARGET_IS_TM4C129_RA2)
  5701. #define ROM_SysCtlPeripheralClockGating \
  5702. ((void (*)(bool bEnable))ROM_SYSCTLTABLE[12])
  5703. #endif
  5704. #if defined(TARGET_IS_TM4C123_RA1) || \
  5705. defined(TARGET_IS_TM4C123_RA3) || \
  5706. defined(TARGET_IS_TM4C123_RB1) || \
  5707. defined(TARGET_IS_TM4C123_RB2) || \
  5708. defined(TARGET_IS_TM4C129_RA0) || \
  5709. defined(TARGET_IS_TM4C129_RA1) || \
  5710. defined(TARGET_IS_TM4C129_RA2)
  5711. #define ROM_SysCtlIntEnable \
  5712. ((void (*)(uint32_t ui32Ints))ROM_SYSCTLTABLE[13])
  5713. #endif
  5714. #if defined(TARGET_IS_TM4C123_RA1) || \
  5715. defined(TARGET_IS_TM4C123_RA3) || \
  5716. defined(TARGET_IS_TM4C123_RB1) || \
  5717. defined(TARGET_IS_TM4C123_RB2) || \
  5718. defined(TARGET_IS_TM4C129_RA0) || \
  5719. defined(TARGET_IS_TM4C129_RA1) || \
  5720. defined(TARGET_IS_TM4C129_RA2)
  5721. #define ROM_SysCtlIntDisable \
  5722. ((void (*)(uint32_t ui32Ints))ROM_SYSCTLTABLE[14])
  5723. #endif
  5724. #if defined(TARGET_IS_TM4C123_RA1) || \
  5725. defined(TARGET_IS_TM4C123_RA3) || \
  5726. defined(TARGET_IS_TM4C123_RB1) || \
  5727. defined(TARGET_IS_TM4C123_RB2) || \
  5728. defined(TARGET_IS_TM4C129_RA0) || \
  5729. defined(TARGET_IS_TM4C129_RA1) || \
  5730. defined(TARGET_IS_TM4C129_RA2)
  5731. #define ROM_SysCtlIntClear \
  5732. ((void (*)(uint32_t ui32Ints))ROM_SYSCTLTABLE[15])
  5733. #endif
  5734. #if defined(TARGET_IS_TM4C123_RA1) || \
  5735. defined(TARGET_IS_TM4C123_RA3) || \
  5736. defined(TARGET_IS_TM4C123_RB1) || \
  5737. defined(TARGET_IS_TM4C123_RB2) || \
  5738. defined(TARGET_IS_TM4C129_RA0) || \
  5739. defined(TARGET_IS_TM4C129_RA1) || \
  5740. defined(TARGET_IS_TM4C129_RA2)
  5741. #define ROM_SysCtlIntStatus \
  5742. ((uint32_t (*)(bool bMasked))ROM_SYSCTLTABLE[16])
  5743. #endif
  5744. #if defined(TARGET_IS_TM4C123_RA1) || \
  5745. defined(TARGET_IS_TM4C123_RA3) || \
  5746. defined(TARGET_IS_TM4C123_RB1) || \
  5747. defined(TARGET_IS_TM4C123_RB2) || \
  5748. defined(TARGET_IS_TM4C129_RA0) || \
  5749. defined(TARGET_IS_TM4C129_RA1) || \
  5750. defined(TARGET_IS_TM4C129_RA2)
  5751. #define ROM_SysCtlReset \
  5752. ((void (*)(void))ROM_SYSCTLTABLE[19])
  5753. #endif
  5754. #if defined(TARGET_IS_TM4C123_RA1) || \
  5755. defined(TARGET_IS_TM4C123_RA3) || \
  5756. defined(TARGET_IS_TM4C123_RB1) || \
  5757. defined(TARGET_IS_TM4C123_RB2) || \
  5758. defined(TARGET_IS_TM4C129_RA0) || \
  5759. defined(TARGET_IS_TM4C129_RA1) || \
  5760. defined(TARGET_IS_TM4C129_RA2)
  5761. #define ROM_SysCtlDeepSleep \
  5762. ((void (*)(void))ROM_SYSCTLTABLE[20])
  5763. #endif
  5764. #if defined(TARGET_IS_TM4C123_RA1) || \
  5765. defined(TARGET_IS_TM4C123_RA3) || \
  5766. defined(TARGET_IS_TM4C123_RB1) || \
  5767. defined(TARGET_IS_TM4C123_RB2) || \
  5768. defined(TARGET_IS_TM4C129_RA0) || \
  5769. defined(TARGET_IS_TM4C129_RA1) || \
  5770. defined(TARGET_IS_TM4C129_RA2)
  5771. #define ROM_SysCtlResetCauseGet \
  5772. ((uint32_t (*)(void))ROM_SYSCTLTABLE[21])
  5773. #endif
  5774. #if defined(TARGET_IS_TM4C123_RA1) || \
  5775. defined(TARGET_IS_TM4C123_RA3) || \
  5776. defined(TARGET_IS_TM4C123_RB1) || \
  5777. defined(TARGET_IS_TM4C123_RB2) || \
  5778. defined(TARGET_IS_TM4C129_RA0) || \
  5779. defined(TARGET_IS_TM4C129_RA1) || \
  5780. defined(TARGET_IS_TM4C129_RA2)
  5781. #define ROM_SysCtlResetCauseClear \
  5782. ((void (*)(uint32_t ui32Causes))ROM_SYSCTLTABLE[22])
  5783. #endif
  5784. #if defined(TARGET_IS_TM4C123_RA1) || \
  5785. defined(TARGET_IS_TM4C123_RA3) || \
  5786. defined(TARGET_IS_TM4C123_RB1) || \
  5787. defined(TARGET_IS_TM4C123_RB2)
  5788. #define ROM_SysCtlClockSet \
  5789. ((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[23])
  5790. #endif
  5791. #if defined(TARGET_IS_TM4C123_RA1) || \
  5792. defined(TARGET_IS_TM4C123_RA3) || \
  5793. defined(TARGET_IS_TM4C123_RB1) || \
  5794. defined(TARGET_IS_TM4C123_RB2)
  5795. #define ROM_SysCtlClockGet \
  5796. ((uint32_t (*)(void))ROM_SYSCTLTABLE[24])
  5797. #endif
  5798. #if defined(TARGET_IS_TM4C123_RA1) || \
  5799. defined(TARGET_IS_TM4C123_RA3) || \
  5800. defined(TARGET_IS_TM4C123_RB1) || \
  5801. defined(TARGET_IS_TM4C123_RB2)
  5802. #define ROM_SysCtlPWMClockSet \
  5803. ((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[25])
  5804. #endif
  5805. #if defined(TARGET_IS_TM4C123_RA1) || \
  5806. defined(TARGET_IS_TM4C123_RA3) || \
  5807. defined(TARGET_IS_TM4C123_RB1) || \
  5808. defined(TARGET_IS_TM4C123_RB2)
  5809. #define ROM_SysCtlPWMClockGet \
  5810. ((uint32_t (*)(void))ROM_SYSCTLTABLE[26])
  5811. #endif
  5812. #if defined(TARGET_IS_TM4C123_RA1) || \
  5813. defined(TARGET_IS_TM4C123_RA3) || \
  5814. defined(TARGET_IS_TM4C123_RB1) || \
  5815. defined(TARGET_IS_TM4C123_RB2)
  5816. #define ROM_SysCtlUSBPLLEnable \
  5817. ((void (*)(void))ROM_SYSCTLTABLE[31])
  5818. #endif
  5819. #if defined(TARGET_IS_TM4C123_RA1) || \
  5820. defined(TARGET_IS_TM4C123_RA3) || \
  5821. defined(TARGET_IS_TM4C123_RB1) || \
  5822. defined(TARGET_IS_TM4C123_RB2)
  5823. #define ROM_SysCtlUSBPLLDisable \
  5824. ((void (*)(void))ROM_SYSCTLTABLE[32])
  5825. #endif
  5826. #if defined(TARGET_IS_TM4C123_RA1) || \
  5827. defined(TARGET_IS_TM4C123_RA3) || \
  5828. defined(TARGET_IS_TM4C123_RB1) || \
  5829. defined(TARGET_IS_TM4C123_RB2) || \
  5830. defined(TARGET_IS_TM4C129_RA0) || \
  5831. defined(TARGET_IS_TM4C129_RA1) || \
  5832. defined(TARGET_IS_TM4C129_RA2)
  5833. #define ROM_SysCtlDelay \
  5834. ((void (*)(uint32_t ui32Count))ROM_SYSCTLTABLE[34])
  5835. #endif
  5836. #if defined(TARGET_IS_TM4C123_RA1) || \
  5837. defined(TARGET_IS_TM4C123_RA3) || \
  5838. defined(TARGET_IS_TM4C123_RB1) || \
  5839. defined(TARGET_IS_TM4C123_RB2) || \
  5840. defined(TARGET_IS_TM4C129_RA0) || \
  5841. defined(TARGET_IS_TM4C129_RA1) || \
  5842. defined(TARGET_IS_TM4C129_RA2)
  5843. #define ROM_SysCtlPeripheralReady \
  5844. ((bool (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[35])
  5845. #endif
  5846. #if defined(TARGET_IS_TM4C123_RA1) || \
  5847. defined(TARGET_IS_TM4C123_RA3) || \
  5848. defined(TARGET_IS_TM4C123_RB1) || \
  5849. defined(TARGET_IS_TM4C123_RB2) || \
  5850. defined(TARGET_IS_TM4C129_RA0) || \
  5851. defined(TARGET_IS_TM4C129_RA1) || \
  5852. defined(TARGET_IS_TM4C129_RA2)
  5853. #define ROM_SysCtlPeripheralPowerOn \
  5854. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[36])
  5855. #endif
  5856. #if defined(TARGET_IS_TM4C123_RA1) || \
  5857. defined(TARGET_IS_TM4C123_RA3) || \
  5858. defined(TARGET_IS_TM4C123_RB1) || \
  5859. defined(TARGET_IS_TM4C123_RB2) || \
  5860. defined(TARGET_IS_TM4C129_RA0) || \
  5861. defined(TARGET_IS_TM4C129_RA1) || \
  5862. defined(TARGET_IS_TM4C129_RA2)
  5863. #define ROM_SysCtlPeripheralPowerOff \
  5864. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[37])
  5865. #endif
  5866. #if defined(TARGET_IS_TM4C123_RA1) || \
  5867. defined(TARGET_IS_TM4C123_RA3) || \
  5868. defined(TARGET_IS_TM4C123_RB1) || \
  5869. defined(TARGET_IS_TM4C123_RB2) || \
  5870. defined(TARGET_IS_TM4C129_RA0) || \
  5871. defined(TARGET_IS_TM4C129_RA1) || \
  5872. defined(TARGET_IS_TM4C129_RA2)
  5873. #define ROM_SysCtlMOSCConfigSet \
  5874. ((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[44])
  5875. #endif
  5876. #if defined(TARGET_IS_TM4C123_RA1) || \
  5877. defined(TARGET_IS_TM4C123_RA3) || \
  5878. defined(TARGET_IS_TM4C123_RB1) || \
  5879. defined(TARGET_IS_TM4C123_RB2) || \
  5880. defined(TARGET_IS_TM4C129_RA0) || \
  5881. defined(TARGET_IS_TM4C129_RA1) || \
  5882. defined(TARGET_IS_TM4C129_RA2)
  5883. #define ROM_SysCtlPIOSCCalibrate \
  5884. ((uint32_t (*)(uint32_t ui32Type))ROM_SYSCTLTABLE[45])
  5885. #endif
  5886. #if defined(TARGET_IS_TM4C123_RA1) || \
  5887. defined(TARGET_IS_TM4C123_RA3) || \
  5888. defined(TARGET_IS_TM4C123_RB1) || \
  5889. defined(TARGET_IS_TM4C123_RB2)
  5890. #define ROM_SysCtlDeepSleepClockSet \
  5891. ((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[46])
  5892. #endif
  5893. #if defined(TARGET_IS_TM4C129_RA0) || \
  5894. defined(TARGET_IS_TM4C129_RA1) || \
  5895. defined(TARGET_IS_TM4C129_RA2)
  5896. #define ROM_SysCtlDeepSleepClockConfigSet \
  5897. ((void (*)(uint32_t ui32Div, \
  5898. uint32_t ui32Config))ROM_SYSCTLTABLE[47])
  5899. #endif
  5900. #if defined(TARGET_IS_TM4C129_RA0) || \
  5901. defined(TARGET_IS_TM4C129_RA1) || \
  5902. defined(TARGET_IS_TM4C129_RA2)
  5903. #define ROM_SysCtlResetBehaviorSet \
  5904. ((void (*)(uint32_t ui32Behavior))ROM_SYSCTLTABLE[51])
  5905. #endif
  5906. #if defined(TARGET_IS_TM4C129_RA0) || \
  5907. defined(TARGET_IS_TM4C129_RA1) || \
  5908. defined(TARGET_IS_TM4C129_RA2)
  5909. #define ROM_SysCtlResetBehaviorGet \
  5910. ((uint32_t (*)(void))ROM_SYSCTLTABLE[52])
  5911. #endif
  5912. #if defined(TARGET_IS_TM4C129_RA0) || \
  5913. defined(TARGET_IS_TM4C129_RA1) || \
  5914. defined(TARGET_IS_TM4C129_RA2)
  5915. #define ROM_SysCtlFlashSectorSizeGet \
  5916. ((uint32_t (*)(void))ROM_SYSCTLTABLE[54])
  5917. #endif
  5918. #if defined(TARGET_IS_TM4C123_RB1) || \
  5919. defined(TARGET_IS_TM4C129_RA0) || \
  5920. defined(TARGET_IS_TM4C129_RA1) || \
  5921. defined(TARGET_IS_TM4C129_RA2)
  5922. #define ROM_SysCtlVoltageEventConfig \
  5923. ((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[55])
  5924. #endif
  5925. #if defined(TARGET_IS_TM4C129_RA0) || \
  5926. defined(TARGET_IS_TM4C129_RA1) || \
  5927. defined(TARGET_IS_TM4C129_RA2)
  5928. #define ROM_SysCtlVoltageEventStatus \
  5929. ((uint32_t (*)(void))ROM_SYSCTLTABLE[56])
  5930. #endif
  5931. #if defined(TARGET_IS_TM4C129_RA0) || \
  5932. defined(TARGET_IS_TM4C129_RA1) || \
  5933. defined(TARGET_IS_TM4C129_RA2)
  5934. #define ROM_SysCtlVoltageEventClear \
  5935. ((void (*)(uint32_t ui32Status))ROM_SYSCTLTABLE[57])
  5936. #endif
  5937. #if defined(TARGET_IS_TM4C129_RA0) || \
  5938. defined(TARGET_IS_TM4C129_RA1) || \
  5939. defined(TARGET_IS_TM4C129_RA2)
  5940. #define ROM_SysCtlNMIStatus \
  5941. ((uint32_t (*)(void))ROM_SYSCTLTABLE[58])
  5942. #endif
  5943. #if defined(TARGET_IS_TM4C129_RA0) || \
  5944. defined(TARGET_IS_TM4C129_RA1) || \
  5945. defined(TARGET_IS_TM4C129_RA2)
  5946. #define ROM_SysCtlNMIClear \
  5947. ((void (*)(uint32_t ui32Status))ROM_SYSCTLTABLE[59])
  5948. #endif
  5949. #if defined(TARGET_IS_TM4C129_RA0) || \
  5950. defined(TARGET_IS_TM4C129_RA1) || \
  5951. defined(TARGET_IS_TM4C129_RA2)
  5952. #define ROM_SysCtlClockOutConfig \
  5953. ((void (*)(uint32_t ui32Config, \
  5954. uint32_t ui32Div))ROM_SYSCTLTABLE[60])
  5955. #endif
  5956. #if defined(TARGET_IS_TM4C129_RA0) || \
  5957. defined(TARGET_IS_TM4C129_RA1) || \
  5958. defined(TARGET_IS_TM4C129_RA2)
  5959. #define ROM_SysCtlAltClkConfig \
  5960. ((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[61])
  5961. #endif
  5962. //*****************************************************************************
  5963. //
  5964. // Macros for calling ROM functions in the SysExc API.
  5965. //
  5966. //*****************************************************************************
  5967. #if defined(TARGET_IS_TM4C123_RA1) || \
  5968. defined(TARGET_IS_TM4C123_RA3) || \
  5969. defined(TARGET_IS_TM4C123_RB1) || \
  5970. defined(TARGET_IS_TM4C123_RB2) || \
  5971. defined(TARGET_IS_TM4C129_RA0) || \
  5972. defined(TARGET_IS_TM4C129_RA1) || \
  5973. defined(TARGET_IS_TM4C129_RA2)
  5974. #define ROM_SysExcIntStatus \
  5975. ((uint32_t (*)(bool bMasked))ROM_SYSEXCTABLE[0])
  5976. #endif
  5977. #if defined(TARGET_IS_TM4C123_RA1) || \
  5978. defined(TARGET_IS_TM4C123_RA3) || \
  5979. defined(TARGET_IS_TM4C123_RB1) || \
  5980. defined(TARGET_IS_TM4C123_RB2) || \
  5981. defined(TARGET_IS_TM4C129_RA0) || \
  5982. defined(TARGET_IS_TM4C129_RA1) || \
  5983. defined(TARGET_IS_TM4C129_RA2)
  5984. #define ROM_SysExcIntClear \
  5985. ((void (*)(uint32_t ui32IntFlags))ROM_SYSEXCTABLE[1])
  5986. #endif
  5987. #if defined(TARGET_IS_TM4C123_RA1) || \
  5988. defined(TARGET_IS_TM4C123_RA3) || \
  5989. defined(TARGET_IS_TM4C123_RB1) || \
  5990. defined(TARGET_IS_TM4C123_RB2) || \
  5991. defined(TARGET_IS_TM4C129_RA0) || \
  5992. defined(TARGET_IS_TM4C129_RA1) || \
  5993. defined(TARGET_IS_TM4C129_RA2)
  5994. #define ROM_SysExcIntDisable \
  5995. ((void (*)(uint32_t ui32IntFlags))ROM_SYSEXCTABLE[2])
  5996. #endif
  5997. #if defined(TARGET_IS_TM4C123_RA1) || \
  5998. defined(TARGET_IS_TM4C123_RA3) || \
  5999. defined(TARGET_IS_TM4C123_RB1) || \
  6000. defined(TARGET_IS_TM4C123_RB2) || \
  6001. defined(TARGET_IS_TM4C129_RA0) || \
  6002. defined(TARGET_IS_TM4C129_RA1) || \
  6003. defined(TARGET_IS_TM4C129_RA2)
  6004. #define ROM_SysExcIntEnable \
  6005. ((void (*)(uint32_t ui32IntFlags))ROM_SYSEXCTABLE[3])
  6006. #endif
  6007. //*****************************************************************************
  6008. //
  6009. // Macros for calling ROM functions in the SysTick API.
  6010. //
  6011. //*****************************************************************************
  6012. #if defined(TARGET_IS_TM4C123_RA1) || \
  6013. defined(TARGET_IS_TM4C123_RA3) || \
  6014. defined(TARGET_IS_TM4C123_RB1) || \
  6015. defined(TARGET_IS_TM4C123_RB2) || \
  6016. defined(TARGET_IS_TM4C129_RA0) || \
  6017. defined(TARGET_IS_TM4C129_RA1) || \
  6018. defined(TARGET_IS_TM4C129_RA2)
  6019. #define ROM_SysTickValueGet \
  6020. ((uint32_t (*)(void))ROM_SYSTICKTABLE[0])
  6021. #endif
  6022. #if defined(TARGET_IS_TM4C123_RA1) || \
  6023. defined(TARGET_IS_TM4C123_RA3) || \
  6024. defined(TARGET_IS_TM4C123_RB1) || \
  6025. defined(TARGET_IS_TM4C123_RB2) || \
  6026. defined(TARGET_IS_TM4C129_RA0) || \
  6027. defined(TARGET_IS_TM4C129_RA1) || \
  6028. defined(TARGET_IS_TM4C129_RA2)
  6029. #define ROM_SysTickEnable \
  6030. ((void (*)(void))ROM_SYSTICKTABLE[1])
  6031. #endif
  6032. #if defined(TARGET_IS_TM4C123_RA1) || \
  6033. defined(TARGET_IS_TM4C123_RA3) || \
  6034. defined(TARGET_IS_TM4C123_RB1) || \
  6035. defined(TARGET_IS_TM4C123_RB2) || \
  6036. defined(TARGET_IS_TM4C129_RA0) || \
  6037. defined(TARGET_IS_TM4C129_RA1) || \
  6038. defined(TARGET_IS_TM4C129_RA2)
  6039. #define ROM_SysTickDisable \
  6040. ((void (*)(void))ROM_SYSTICKTABLE[2])
  6041. #endif
  6042. #if defined(TARGET_IS_TM4C123_RA1) || \
  6043. defined(TARGET_IS_TM4C123_RA3) || \
  6044. defined(TARGET_IS_TM4C123_RB1) || \
  6045. defined(TARGET_IS_TM4C123_RB2) || \
  6046. defined(TARGET_IS_TM4C129_RA0) || \
  6047. defined(TARGET_IS_TM4C129_RA1) || \
  6048. defined(TARGET_IS_TM4C129_RA2)
  6049. #define ROM_SysTickIntEnable \
  6050. ((void (*)(void))ROM_SYSTICKTABLE[3])
  6051. #endif
  6052. #if defined(TARGET_IS_TM4C123_RA1) || \
  6053. defined(TARGET_IS_TM4C123_RA3) || \
  6054. defined(TARGET_IS_TM4C123_RB1) || \
  6055. defined(TARGET_IS_TM4C123_RB2) || \
  6056. defined(TARGET_IS_TM4C129_RA0) || \
  6057. defined(TARGET_IS_TM4C129_RA1) || \
  6058. defined(TARGET_IS_TM4C129_RA2)
  6059. #define ROM_SysTickIntDisable \
  6060. ((void (*)(void))ROM_SYSTICKTABLE[4])
  6061. #endif
  6062. #if defined(TARGET_IS_TM4C123_RA1) || \
  6063. defined(TARGET_IS_TM4C123_RA3) || \
  6064. defined(TARGET_IS_TM4C123_RB1) || \
  6065. defined(TARGET_IS_TM4C123_RB2) || \
  6066. defined(TARGET_IS_TM4C129_RA0) || \
  6067. defined(TARGET_IS_TM4C129_RA1) || \
  6068. defined(TARGET_IS_TM4C129_RA2)
  6069. #define ROM_SysTickPeriodSet \
  6070. ((void (*)(uint32_t ui32Period))ROM_SYSTICKTABLE[5])
  6071. #endif
  6072. #if defined(TARGET_IS_TM4C123_RA1) || \
  6073. defined(TARGET_IS_TM4C123_RA3) || \
  6074. defined(TARGET_IS_TM4C123_RB1) || \
  6075. defined(TARGET_IS_TM4C123_RB2) || \
  6076. defined(TARGET_IS_TM4C129_RA0) || \
  6077. defined(TARGET_IS_TM4C129_RA1) || \
  6078. defined(TARGET_IS_TM4C129_RA2)
  6079. #define ROM_SysTickPeriodGet \
  6080. ((uint32_t (*)(void))ROM_SYSTICKTABLE[6])
  6081. #endif
  6082. //*****************************************************************************
  6083. //
  6084. // Macros for calling ROM functions in the Timer API.
  6085. //
  6086. //*****************************************************************************
  6087. #if defined(TARGET_IS_TM4C123_RA1) || \
  6088. defined(TARGET_IS_TM4C123_RA3) || \
  6089. defined(TARGET_IS_TM4C123_RB1) || \
  6090. defined(TARGET_IS_TM4C123_RB2) || \
  6091. defined(TARGET_IS_TM4C129_RA0) || \
  6092. defined(TARGET_IS_TM4C129_RA1) || \
  6093. defined(TARGET_IS_TM4C129_RA2)
  6094. #define ROM_TimerIntClear \
  6095. ((void (*)(uint32_t ui32Base, \
  6096. uint32_t ui32IntFlags))ROM_TIMERTABLE[0])
  6097. #endif
  6098. #if defined(TARGET_IS_TM4C123_RA1) || \
  6099. defined(TARGET_IS_TM4C123_RA3) || \
  6100. defined(TARGET_IS_TM4C123_RB1) || \
  6101. defined(TARGET_IS_TM4C123_RB2) || \
  6102. defined(TARGET_IS_TM4C129_RA0) || \
  6103. defined(TARGET_IS_TM4C129_RA1) || \
  6104. defined(TARGET_IS_TM4C129_RA2)
  6105. #define ROM_TimerEnable \
  6106. ((void (*)(uint32_t ui32Base, \
  6107. uint32_t ui32Timer))ROM_TIMERTABLE[1])
  6108. #endif
  6109. #if defined(TARGET_IS_TM4C123_RA1) || \
  6110. defined(TARGET_IS_TM4C123_RA3) || \
  6111. defined(TARGET_IS_TM4C123_RB1) || \
  6112. defined(TARGET_IS_TM4C123_RB2) || \
  6113. defined(TARGET_IS_TM4C129_RA0) || \
  6114. defined(TARGET_IS_TM4C129_RA1) || \
  6115. defined(TARGET_IS_TM4C129_RA2)
  6116. #define ROM_TimerDisable \
  6117. ((void (*)(uint32_t ui32Base, \
  6118. uint32_t ui32Timer))ROM_TIMERTABLE[2])
  6119. #endif
  6120. #if defined(TARGET_IS_TM4C123_RA1) || \
  6121. defined(TARGET_IS_TM4C123_RA3) || \
  6122. defined(TARGET_IS_TM4C123_RB1) || \
  6123. defined(TARGET_IS_TM4C123_RB2) || \
  6124. defined(TARGET_IS_TM4C129_RA0) || \
  6125. defined(TARGET_IS_TM4C129_RA1) || \
  6126. defined(TARGET_IS_TM4C129_RA2)
  6127. #define ROM_TimerConfigure \
  6128. ((void (*)(uint32_t ui32Base, \
  6129. uint32_t ui32Config))ROM_TIMERTABLE[3])
  6130. #endif
  6131. #if defined(TARGET_IS_TM4C123_RA1) || \
  6132. defined(TARGET_IS_TM4C123_RA3) || \
  6133. defined(TARGET_IS_TM4C123_RB1) || \
  6134. defined(TARGET_IS_TM4C123_RB2) || \
  6135. defined(TARGET_IS_TM4C129_RA0) || \
  6136. defined(TARGET_IS_TM4C129_RA1) || \
  6137. defined(TARGET_IS_TM4C129_RA2)
  6138. #define ROM_TimerControlLevel \
  6139. ((void (*)(uint32_t ui32Base, \
  6140. uint32_t ui32Timer, \
  6141. bool bInvert))ROM_TIMERTABLE[4])
  6142. #endif
  6143. #if defined(TARGET_IS_TM4C123_RA1) || \
  6144. defined(TARGET_IS_TM4C123_RA3) || \
  6145. defined(TARGET_IS_TM4C123_RB1) || \
  6146. defined(TARGET_IS_TM4C123_RB2) || \
  6147. defined(TARGET_IS_TM4C129_RA1)
  6148. #define ROM_TimerControlTrigger \
  6149. ((void (*)(uint32_t ui32Base, \
  6150. uint32_t ui32Timer, \
  6151. bool bEnable))ROM_TIMERTABLE[5])
  6152. #endif
  6153. #if defined(TARGET_IS_TM4C123_RA1) || \
  6154. defined(TARGET_IS_TM4C123_RA3) || \
  6155. defined(TARGET_IS_TM4C123_RB1) || \
  6156. defined(TARGET_IS_TM4C123_RB2) || \
  6157. defined(TARGET_IS_TM4C129_RA0) || \
  6158. defined(TARGET_IS_TM4C129_RA1) || \
  6159. defined(TARGET_IS_TM4C129_RA2)
  6160. #define ROM_TimerControlEvent \
  6161. ((void (*)(uint32_t ui32Base, \
  6162. uint32_t ui32Timer, \
  6163. uint32_t ui32Event))ROM_TIMERTABLE[6])
  6164. #endif
  6165. #if defined(TARGET_IS_TM4C123_RA1) || \
  6166. defined(TARGET_IS_TM4C123_RA3) || \
  6167. defined(TARGET_IS_TM4C123_RB1) || \
  6168. defined(TARGET_IS_TM4C123_RB2) || \
  6169. defined(TARGET_IS_TM4C129_RA0) || \
  6170. defined(TARGET_IS_TM4C129_RA1) || \
  6171. defined(TARGET_IS_TM4C129_RA2)
  6172. #define ROM_TimerControlStall \
  6173. ((void (*)(uint32_t ui32Base, \
  6174. uint32_t ui32Timer, \
  6175. bool bStall))ROM_TIMERTABLE[7])
  6176. #endif
  6177. #if defined(TARGET_IS_TM4C123_RA1) || \
  6178. defined(TARGET_IS_TM4C123_RA3) || \
  6179. defined(TARGET_IS_TM4C123_RB1) || \
  6180. defined(TARGET_IS_TM4C123_RB2) || \
  6181. defined(TARGET_IS_TM4C129_RA0) || \
  6182. defined(TARGET_IS_TM4C129_RA1) || \
  6183. defined(TARGET_IS_TM4C129_RA2)
  6184. #define ROM_TimerRTCEnable \
  6185. ((void (*)(uint32_t ui32Base))ROM_TIMERTABLE[8])
  6186. #endif
  6187. #if defined(TARGET_IS_TM4C123_RA1) || \
  6188. defined(TARGET_IS_TM4C123_RA3) || \
  6189. defined(TARGET_IS_TM4C123_RB1) || \
  6190. defined(TARGET_IS_TM4C123_RB2) || \
  6191. defined(TARGET_IS_TM4C129_RA0) || \
  6192. defined(TARGET_IS_TM4C129_RA1) || \
  6193. defined(TARGET_IS_TM4C129_RA2)
  6194. #define ROM_TimerRTCDisable \
  6195. ((void (*)(uint32_t ui32Base))ROM_TIMERTABLE[9])
  6196. #endif
  6197. #if defined(TARGET_IS_TM4C123_RA1) || \
  6198. defined(TARGET_IS_TM4C123_RA3) || \
  6199. defined(TARGET_IS_TM4C123_RB1) || \
  6200. defined(TARGET_IS_TM4C123_RB2) || \
  6201. defined(TARGET_IS_TM4C129_RA0) || \
  6202. defined(TARGET_IS_TM4C129_RA1) || \
  6203. defined(TARGET_IS_TM4C129_RA2)
  6204. #define ROM_TimerPrescaleSet \
  6205. ((void (*)(uint32_t ui32Base, \
  6206. uint32_t ui32Timer, \
  6207. uint32_t ui32Value))ROM_TIMERTABLE[10])
  6208. #endif
  6209. #if defined(TARGET_IS_TM4C123_RA1) || \
  6210. defined(TARGET_IS_TM4C123_RA3) || \
  6211. defined(TARGET_IS_TM4C123_RB1) || \
  6212. defined(TARGET_IS_TM4C123_RB2) || \
  6213. defined(TARGET_IS_TM4C129_RA0) || \
  6214. defined(TARGET_IS_TM4C129_RA1) || \
  6215. defined(TARGET_IS_TM4C129_RA2)
  6216. #define ROM_TimerPrescaleGet \
  6217. ((uint32_t (*)(uint32_t ui32Base, \
  6218. uint32_t ui32Timer))ROM_TIMERTABLE[11])
  6219. #endif
  6220. #if defined(TARGET_IS_TM4C123_RA1) || \
  6221. defined(TARGET_IS_TM4C123_RA3) || \
  6222. defined(TARGET_IS_TM4C123_RB1) || \
  6223. defined(TARGET_IS_TM4C123_RB2) || \
  6224. defined(TARGET_IS_TM4C129_RA0) || \
  6225. defined(TARGET_IS_TM4C129_RA1) || \
  6226. defined(TARGET_IS_TM4C129_RA2)
  6227. #define ROM_TimerPrescaleMatchSet \
  6228. ((void (*)(uint32_t ui32Base, \
  6229. uint32_t ui32Timer, \
  6230. uint32_t ui32Value))ROM_TIMERTABLE[12])
  6231. #endif
  6232. #if defined(TARGET_IS_TM4C123_RA1) || \
  6233. defined(TARGET_IS_TM4C123_RA3) || \
  6234. defined(TARGET_IS_TM4C123_RB1) || \
  6235. defined(TARGET_IS_TM4C123_RB2) || \
  6236. defined(TARGET_IS_TM4C129_RA0) || \
  6237. defined(TARGET_IS_TM4C129_RA1) || \
  6238. defined(TARGET_IS_TM4C129_RA2)
  6239. #define ROM_TimerPrescaleMatchGet \
  6240. ((uint32_t (*)(uint32_t ui32Base, \
  6241. uint32_t ui32Timer))ROM_TIMERTABLE[13])
  6242. #endif
  6243. #if defined(TARGET_IS_TM4C123_RA1) || \
  6244. defined(TARGET_IS_TM4C123_RA3) || \
  6245. defined(TARGET_IS_TM4C123_RB1) || \
  6246. defined(TARGET_IS_TM4C123_RB2) || \
  6247. defined(TARGET_IS_TM4C129_RA0) || \
  6248. defined(TARGET_IS_TM4C129_RA1) || \
  6249. defined(TARGET_IS_TM4C129_RA2)
  6250. #define ROM_TimerLoadSet \
  6251. ((void (*)(uint32_t ui32Base, \
  6252. uint32_t ui32Timer, \
  6253. uint32_t ui32Value))ROM_TIMERTABLE[14])
  6254. #endif
  6255. #if defined(TARGET_IS_TM4C123_RA1) || \
  6256. defined(TARGET_IS_TM4C123_RA3) || \
  6257. defined(TARGET_IS_TM4C123_RB1) || \
  6258. defined(TARGET_IS_TM4C123_RB2) || \
  6259. defined(TARGET_IS_TM4C129_RA0) || \
  6260. defined(TARGET_IS_TM4C129_RA1) || \
  6261. defined(TARGET_IS_TM4C129_RA2)
  6262. #define ROM_TimerLoadGet \
  6263. ((uint32_t (*)(uint32_t ui32Base, \
  6264. uint32_t ui32Timer))ROM_TIMERTABLE[15])
  6265. #endif
  6266. #if defined(TARGET_IS_TM4C123_RA1) || \
  6267. defined(TARGET_IS_TM4C123_RA3) || \
  6268. defined(TARGET_IS_TM4C123_RB1) || \
  6269. defined(TARGET_IS_TM4C123_RB2) || \
  6270. defined(TARGET_IS_TM4C129_RA0) || \
  6271. defined(TARGET_IS_TM4C129_RA1) || \
  6272. defined(TARGET_IS_TM4C129_RA2)
  6273. #define ROM_TimerValueGet \
  6274. ((uint32_t (*)(uint32_t ui32Base, \
  6275. uint32_t ui32Timer))ROM_TIMERTABLE[16])
  6276. #endif
  6277. #if defined(TARGET_IS_TM4C123_RA1) || \
  6278. defined(TARGET_IS_TM4C123_RA3) || \
  6279. defined(TARGET_IS_TM4C123_RB1) || \
  6280. defined(TARGET_IS_TM4C123_RB2) || \
  6281. defined(TARGET_IS_TM4C129_RA0) || \
  6282. defined(TARGET_IS_TM4C129_RA1) || \
  6283. defined(TARGET_IS_TM4C129_RA2)
  6284. #define ROM_TimerMatchSet \
  6285. ((void (*)(uint32_t ui32Base, \
  6286. uint32_t ui32Timer, \
  6287. uint32_t ui32Value))ROM_TIMERTABLE[17])
  6288. #endif
  6289. #if defined(TARGET_IS_TM4C123_RA1) || \
  6290. defined(TARGET_IS_TM4C123_RA3) || \
  6291. defined(TARGET_IS_TM4C123_RB1) || \
  6292. defined(TARGET_IS_TM4C123_RB2) || \
  6293. defined(TARGET_IS_TM4C129_RA0) || \
  6294. defined(TARGET_IS_TM4C129_RA1) || \
  6295. defined(TARGET_IS_TM4C129_RA2)
  6296. #define ROM_TimerMatchGet \
  6297. ((uint32_t (*)(uint32_t ui32Base, \
  6298. uint32_t ui32Timer))ROM_TIMERTABLE[18])
  6299. #endif
  6300. #if defined(TARGET_IS_TM4C123_RA1) || \
  6301. defined(TARGET_IS_TM4C123_RA3) || \
  6302. defined(TARGET_IS_TM4C123_RB1) || \
  6303. defined(TARGET_IS_TM4C123_RB2) || \
  6304. defined(TARGET_IS_TM4C129_RA0) || \
  6305. defined(TARGET_IS_TM4C129_RA1) || \
  6306. defined(TARGET_IS_TM4C129_RA2)
  6307. #define ROM_TimerIntEnable \
  6308. ((void (*)(uint32_t ui32Base, \
  6309. uint32_t ui32IntFlags))ROM_TIMERTABLE[19])
  6310. #endif
  6311. #if defined(TARGET_IS_TM4C123_RA1) || \
  6312. defined(TARGET_IS_TM4C123_RA3) || \
  6313. defined(TARGET_IS_TM4C123_RB1) || \
  6314. defined(TARGET_IS_TM4C123_RB2) || \
  6315. defined(TARGET_IS_TM4C129_RA0) || \
  6316. defined(TARGET_IS_TM4C129_RA1) || \
  6317. defined(TARGET_IS_TM4C129_RA2)
  6318. #define ROM_TimerIntDisable \
  6319. ((void (*)(uint32_t ui32Base, \
  6320. uint32_t ui32IntFlags))ROM_TIMERTABLE[20])
  6321. #endif
  6322. #if defined(TARGET_IS_TM4C123_RA1) || \
  6323. defined(TARGET_IS_TM4C123_RA3) || \
  6324. defined(TARGET_IS_TM4C123_RB1) || \
  6325. defined(TARGET_IS_TM4C123_RB2) || \
  6326. defined(TARGET_IS_TM4C129_RA0) || \
  6327. defined(TARGET_IS_TM4C129_RA1) || \
  6328. defined(TARGET_IS_TM4C129_RA2)
  6329. #define ROM_TimerIntStatus \
  6330. ((uint32_t (*)(uint32_t ui32Base, \
  6331. bool bMasked))ROM_TIMERTABLE[21])
  6332. #endif
  6333. #if defined(TARGET_IS_TM4C123_RA1) || \
  6334. defined(TARGET_IS_TM4C123_RA3) || \
  6335. defined(TARGET_IS_TM4C123_RB1) || \
  6336. defined(TARGET_IS_TM4C123_RB2) || \
  6337. defined(TARGET_IS_TM4C129_RA0) || \
  6338. defined(TARGET_IS_TM4C129_RA1) || \
  6339. defined(TARGET_IS_TM4C129_RA2)
  6340. #define ROM_TimerControlWaitOnTrigger \
  6341. ((void (*)(uint32_t ui32Base, \
  6342. uint32_t ui32Timer, \
  6343. bool bWait))ROM_TIMERTABLE[22])
  6344. #endif
  6345. #if defined(TARGET_IS_TM4C123_RA1) || \
  6346. defined(TARGET_IS_TM4C123_RA3) || \
  6347. defined(TARGET_IS_TM4C123_RB1) || \
  6348. defined(TARGET_IS_TM4C123_RB2)
  6349. #define ROM_TimerLoadSet64 \
  6350. ((void (*)(uint32_t ui32Base, \
  6351. uint64_t ui64Value))ROM_TIMERTABLE[23])
  6352. #endif
  6353. #if defined(TARGET_IS_TM4C123_RA1) || \
  6354. defined(TARGET_IS_TM4C123_RA3) || \
  6355. defined(TARGET_IS_TM4C123_RB1) || \
  6356. defined(TARGET_IS_TM4C123_RB2)
  6357. #define ROM_TimerLoadGet64 \
  6358. ((uint64_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[24])
  6359. #endif
  6360. #if defined(TARGET_IS_TM4C123_RA1) || \
  6361. defined(TARGET_IS_TM4C123_RA3) || \
  6362. defined(TARGET_IS_TM4C123_RB1) || \
  6363. defined(TARGET_IS_TM4C123_RB2)
  6364. #define ROM_TimerValueGet64 \
  6365. ((uint64_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[25])
  6366. #endif
  6367. #if defined(TARGET_IS_TM4C123_RA1) || \
  6368. defined(TARGET_IS_TM4C123_RA3) || \
  6369. defined(TARGET_IS_TM4C123_RB1) || \
  6370. defined(TARGET_IS_TM4C123_RB2)
  6371. #define ROM_TimerMatchSet64 \
  6372. ((void (*)(uint32_t ui32Base, \
  6373. uint64_t ui64Value))ROM_TIMERTABLE[26])
  6374. #endif
  6375. #if defined(TARGET_IS_TM4C123_RA1) || \
  6376. defined(TARGET_IS_TM4C123_RA3) || \
  6377. defined(TARGET_IS_TM4C123_RB1) || \
  6378. defined(TARGET_IS_TM4C123_RB2)
  6379. #define ROM_TimerMatchGet64 \
  6380. ((uint64_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[27])
  6381. #endif
  6382. #if defined(TARGET_IS_TM4C129_RA0) || \
  6383. defined(TARGET_IS_TM4C129_RA1) || \
  6384. defined(TARGET_IS_TM4C129_RA2)
  6385. #define ROM_TimerClockSourceGet \
  6386. ((uint32_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[28])
  6387. #endif
  6388. #if defined(TARGET_IS_TM4C129_RA0) || \
  6389. defined(TARGET_IS_TM4C129_RA1) || \
  6390. defined(TARGET_IS_TM4C129_RA2)
  6391. #define ROM_TimerClockSourceSet \
  6392. ((void (*)(uint32_t ui32Base, \
  6393. uint32_t ui32Source))ROM_TIMERTABLE[29])
  6394. #endif
  6395. #if defined(TARGET_IS_TM4C129_RA0) || \
  6396. defined(TARGET_IS_TM4C129_RA1) || \
  6397. defined(TARGET_IS_TM4C129_RA2)
  6398. #define ROM_TimerADCEventGet \
  6399. ((uint32_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[30])
  6400. #endif
  6401. #if defined(TARGET_IS_TM4C129_RA0) || \
  6402. defined(TARGET_IS_TM4C129_RA1) || \
  6403. defined(TARGET_IS_TM4C129_RA2)
  6404. #define ROM_TimerADCEventSet \
  6405. ((void (*)(uint32_t ui32Base, \
  6406. uint32_t ui32ADCEvent))ROM_TIMERTABLE[31])
  6407. #endif
  6408. #if defined(TARGET_IS_TM4C129_RA0) || \
  6409. defined(TARGET_IS_TM4C129_RA1) || \
  6410. defined(TARGET_IS_TM4C129_RA2)
  6411. #define ROM_TimerDMAEventGet \
  6412. ((uint32_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[32])
  6413. #endif
  6414. #if defined(TARGET_IS_TM4C129_RA0) || \
  6415. defined(TARGET_IS_TM4C129_RA1) || \
  6416. defined(TARGET_IS_TM4C129_RA2)
  6417. #define ROM_TimerDMAEventSet \
  6418. ((void (*)(uint32_t ui32Base, \
  6419. uint32_t ui32DMAEvent))ROM_TIMERTABLE[33])
  6420. #endif
  6421. #if defined(TARGET_IS_TM4C129_RA0) || \
  6422. defined(TARGET_IS_TM4C129_RA1) || \
  6423. defined(TARGET_IS_TM4C129_RA2)
  6424. #define ROM_TimerSynchronize \
  6425. ((void (*)(uint32_t ui32Base, \
  6426. uint32_t ui32Timers))ROM_TIMERTABLE[34])
  6427. #endif
  6428. //*****************************************************************************
  6429. //
  6430. // Macros for calling ROM functions in the UART API.
  6431. //
  6432. //*****************************************************************************
  6433. #if defined(TARGET_IS_TM4C123_RA1) || \
  6434. defined(TARGET_IS_TM4C123_RA3) || \
  6435. defined(TARGET_IS_TM4C123_RB1) || \
  6436. defined(TARGET_IS_TM4C123_RB2) || \
  6437. defined(TARGET_IS_TM4C129_RA0) || \
  6438. defined(TARGET_IS_TM4C129_RA1) || \
  6439. defined(TARGET_IS_TM4C129_RA2)
  6440. #define ROM_UARTCharPut \
  6441. ((void (*)(uint32_t ui32Base, \
  6442. unsigned char ucData))ROM_UARTTABLE[0])
  6443. #endif
  6444. #if defined(TARGET_IS_TM4C123_RA1) || \
  6445. defined(TARGET_IS_TM4C123_RA3) || \
  6446. defined(TARGET_IS_TM4C123_RB1) || \
  6447. defined(TARGET_IS_TM4C123_RB2) || \
  6448. defined(TARGET_IS_TM4C129_RA0) || \
  6449. defined(TARGET_IS_TM4C129_RA1) || \
  6450. defined(TARGET_IS_TM4C129_RA2)
  6451. #define ROM_UARTParityModeSet \
  6452. ((void (*)(uint32_t ui32Base, \
  6453. uint32_t ui32Parity))ROM_UARTTABLE[1])
  6454. #endif
  6455. #if defined(TARGET_IS_TM4C123_RA1) || \
  6456. defined(TARGET_IS_TM4C123_RA3) || \
  6457. defined(TARGET_IS_TM4C123_RB1) || \
  6458. defined(TARGET_IS_TM4C123_RB2) || \
  6459. defined(TARGET_IS_TM4C129_RA0) || \
  6460. defined(TARGET_IS_TM4C129_RA1) || \
  6461. defined(TARGET_IS_TM4C129_RA2)
  6462. #define ROM_UARTParityModeGet \
  6463. ((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[2])
  6464. #endif
  6465. #if defined(TARGET_IS_TM4C123_RA1) || \
  6466. defined(TARGET_IS_TM4C123_RA3) || \
  6467. defined(TARGET_IS_TM4C123_RB1) || \
  6468. defined(TARGET_IS_TM4C123_RB2) || \
  6469. defined(TARGET_IS_TM4C129_RA0) || \
  6470. defined(TARGET_IS_TM4C129_RA1) || \
  6471. defined(TARGET_IS_TM4C129_RA2)
  6472. #define ROM_UARTFIFOLevelSet \
  6473. ((void (*)(uint32_t ui32Base, \
  6474. uint32_t ui32TxLevel, \
  6475. uint32_t ui32RxLevel))ROM_UARTTABLE[3])
  6476. #endif
  6477. #if defined(TARGET_IS_TM4C123_RA1) || \
  6478. defined(TARGET_IS_TM4C123_RA3) || \
  6479. defined(TARGET_IS_TM4C123_RB1) || \
  6480. defined(TARGET_IS_TM4C123_RB2) || \
  6481. defined(TARGET_IS_TM4C129_RA0) || \
  6482. defined(TARGET_IS_TM4C129_RA1) || \
  6483. defined(TARGET_IS_TM4C129_RA2)
  6484. #define ROM_UARTFIFOLevelGet \
  6485. ((void (*)(uint32_t ui32Base, \
  6486. uint32_t *pui32TxLevel, \
  6487. uint32_t *pui32RxLevel))ROM_UARTTABLE[4])
  6488. #endif
  6489. #if defined(TARGET_IS_TM4C123_RA1) || \
  6490. defined(TARGET_IS_TM4C123_RA3) || \
  6491. defined(TARGET_IS_TM4C123_RB1) || \
  6492. defined(TARGET_IS_TM4C123_RB2) || \
  6493. defined(TARGET_IS_TM4C129_RA0) || \
  6494. defined(TARGET_IS_TM4C129_RA1) || \
  6495. defined(TARGET_IS_TM4C129_RA2)
  6496. #define ROM_UARTConfigSetExpClk \
  6497. ((void (*)(uint32_t ui32Base, \
  6498. uint32_t ui32UARTClk, \
  6499. uint32_t ui32Baud, \
  6500. uint32_t ui32Config))ROM_UARTTABLE[5])
  6501. #endif
  6502. #if defined(TARGET_IS_TM4C123_RA1) || \
  6503. defined(TARGET_IS_TM4C123_RA3) || \
  6504. defined(TARGET_IS_TM4C123_RB1) || \
  6505. defined(TARGET_IS_TM4C123_RB2) || \
  6506. defined(TARGET_IS_TM4C129_RA0) || \
  6507. defined(TARGET_IS_TM4C129_RA1) || \
  6508. defined(TARGET_IS_TM4C129_RA2)
  6509. #define ROM_UARTConfigGetExpClk \
  6510. ((void (*)(uint32_t ui32Base, \
  6511. uint32_t ui32UARTClk, \
  6512. uint32_t *pui32Baud, \
  6513. uint32_t *pui32Config))ROM_UARTTABLE[6])
  6514. #endif
  6515. #if defined(TARGET_IS_TM4C123_RA1) || \
  6516. defined(TARGET_IS_TM4C123_RA3) || \
  6517. defined(TARGET_IS_TM4C123_RB1) || \
  6518. defined(TARGET_IS_TM4C123_RB2) || \
  6519. defined(TARGET_IS_TM4C129_RA0) || \
  6520. defined(TARGET_IS_TM4C129_RA1) || \
  6521. defined(TARGET_IS_TM4C129_RA2)
  6522. #define ROM_UARTEnable \
  6523. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[7])
  6524. #endif
  6525. #if defined(TARGET_IS_TM4C123_RA1) || \
  6526. defined(TARGET_IS_TM4C123_RA3) || \
  6527. defined(TARGET_IS_TM4C123_RB1) || \
  6528. defined(TARGET_IS_TM4C123_RB2) || \
  6529. defined(TARGET_IS_TM4C129_RA0) || \
  6530. defined(TARGET_IS_TM4C129_RA1) || \
  6531. defined(TARGET_IS_TM4C129_RA2)
  6532. #define ROM_UARTDisable \
  6533. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[8])
  6534. #endif
  6535. #if defined(TARGET_IS_TM4C123_RA1) || \
  6536. defined(TARGET_IS_TM4C123_RA3) || \
  6537. defined(TARGET_IS_TM4C123_RB1) || \
  6538. defined(TARGET_IS_TM4C123_RB2) || \
  6539. defined(TARGET_IS_TM4C129_RA0) || \
  6540. defined(TARGET_IS_TM4C129_RA1) || \
  6541. defined(TARGET_IS_TM4C129_RA2)
  6542. #define ROM_UARTEnableSIR \
  6543. ((void (*)(uint32_t ui32Base, \
  6544. bool bLowPower))ROM_UARTTABLE[9])
  6545. #endif
  6546. #if defined(TARGET_IS_TM4C123_RA1) || \
  6547. defined(TARGET_IS_TM4C123_RA3) || \
  6548. defined(TARGET_IS_TM4C123_RB1) || \
  6549. defined(TARGET_IS_TM4C123_RB2) || \
  6550. defined(TARGET_IS_TM4C129_RA0) || \
  6551. defined(TARGET_IS_TM4C129_RA1) || \
  6552. defined(TARGET_IS_TM4C129_RA2)
  6553. #define ROM_UARTDisableSIR \
  6554. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[10])
  6555. #endif
  6556. #if defined(TARGET_IS_TM4C123_RA1) || \
  6557. defined(TARGET_IS_TM4C123_RA3) || \
  6558. defined(TARGET_IS_TM4C123_RB1) || \
  6559. defined(TARGET_IS_TM4C123_RB2) || \
  6560. defined(TARGET_IS_TM4C129_RA0) || \
  6561. defined(TARGET_IS_TM4C129_RA1) || \
  6562. defined(TARGET_IS_TM4C129_RA2)
  6563. #define ROM_UARTCharsAvail \
  6564. ((bool (*)(uint32_t ui32Base))ROM_UARTTABLE[11])
  6565. #endif
  6566. #if defined(TARGET_IS_TM4C123_RA1) || \
  6567. defined(TARGET_IS_TM4C123_RA3) || \
  6568. defined(TARGET_IS_TM4C123_RB1) || \
  6569. defined(TARGET_IS_TM4C123_RB2) || \
  6570. defined(TARGET_IS_TM4C129_RA0) || \
  6571. defined(TARGET_IS_TM4C129_RA1) || \
  6572. defined(TARGET_IS_TM4C129_RA2)
  6573. #define ROM_UARTSpaceAvail \
  6574. ((bool (*)(uint32_t ui32Base))ROM_UARTTABLE[12])
  6575. #endif
  6576. #if defined(TARGET_IS_TM4C123_RA1) || \
  6577. defined(TARGET_IS_TM4C123_RA3) || \
  6578. defined(TARGET_IS_TM4C123_RB1) || \
  6579. defined(TARGET_IS_TM4C123_RB2) || \
  6580. defined(TARGET_IS_TM4C129_RA0) || \
  6581. defined(TARGET_IS_TM4C129_RA1) || \
  6582. defined(TARGET_IS_TM4C129_RA2)
  6583. #define ROM_UARTCharGetNonBlocking \
  6584. ((int32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[13])
  6585. #endif
  6586. #if defined(TARGET_IS_TM4C123_RA1) || \
  6587. defined(TARGET_IS_TM4C123_RA3) || \
  6588. defined(TARGET_IS_TM4C123_RB1) || \
  6589. defined(TARGET_IS_TM4C123_RB2) || \
  6590. defined(TARGET_IS_TM4C129_RA0) || \
  6591. defined(TARGET_IS_TM4C129_RA1) || \
  6592. defined(TARGET_IS_TM4C129_RA2)
  6593. #define ROM_UARTCharGet \
  6594. ((int32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[14])
  6595. #endif
  6596. #if defined(TARGET_IS_TM4C123_RA1) || \
  6597. defined(TARGET_IS_TM4C123_RA3) || \
  6598. defined(TARGET_IS_TM4C123_RB1) || \
  6599. defined(TARGET_IS_TM4C123_RB2) || \
  6600. defined(TARGET_IS_TM4C129_RA0) || \
  6601. defined(TARGET_IS_TM4C129_RA1) || \
  6602. defined(TARGET_IS_TM4C129_RA2)
  6603. #define ROM_UARTCharPutNonBlocking \
  6604. ((bool (*)(uint32_t ui32Base, \
  6605. unsigned char ucData))ROM_UARTTABLE[15])
  6606. #endif
  6607. #if defined(TARGET_IS_TM4C123_RA1) || \
  6608. defined(TARGET_IS_TM4C123_RA3) || \
  6609. defined(TARGET_IS_TM4C123_RB1) || \
  6610. defined(TARGET_IS_TM4C123_RB2) || \
  6611. defined(TARGET_IS_TM4C129_RA0) || \
  6612. defined(TARGET_IS_TM4C129_RA1) || \
  6613. defined(TARGET_IS_TM4C129_RA2)
  6614. #define ROM_UARTBreakCtl \
  6615. ((void (*)(uint32_t ui32Base, \
  6616. bool bBreakState))ROM_UARTTABLE[16])
  6617. #endif
  6618. #if defined(TARGET_IS_TM4C123_RA1) || \
  6619. defined(TARGET_IS_TM4C123_RA3) || \
  6620. defined(TARGET_IS_TM4C123_RB1) || \
  6621. defined(TARGET_IS_TM4C123_RB2) || \
  6622. defined(TARGET_IS_TM4C129_RA0) || \
  6623. defined(TARGET_IS_TM4C129_RA1) || \
  6624. defined(TARGET_IS_TM4C129_RA2)
  6625. #define ROM_UARTIntEnable \
  6626. ((void (*)(uint32_t ui32Base, \
  6627. uint32_t ui32IntFlags))ROM_UARTTABLE[17])
  6628. #endif
  6629. #if defined(TARGET_IS_TM4C123_RA1) || \
  6630. defined(TARGET_IS_TM4C123_RA3) || \
  6631. defined(TARGET_IS_TM4C123_RB1) || \
  6632. defined(TARGET_IS_TM4C123_RB2) || \
  6633. defined(TARGET_IS_TM4C129_RA0) || \
  6634. defined(TARGET_IS_TM4C129_RA1) || \
  6635. defined(TARGET_IS_TM4C129_RA2)
  6636. #define ROM_UARTIntDisable \
  6637. ((void (*)(uint32_t ui32Base, \
  6638. uint32_t ui32IntFlags))ROM_UARTTABLE[18])
  6639. #endif
  6640. #if defined(TARGET_IS_TM4C123_RA1) || \
  6641. defined(TARGET_IS_TM4C123_RA3) || \
  6642. defined(TARGET_IS_TM4C123_RB1) || \
  6643. defined(TARGET_IS_TM4C123_RB2) || \
  6644. defined(TARGET_IS_TM4C129_RA0) || \
  6645. defined(TARGET_IS_TM4C129_RA1) || \
  6646. defined(TARGET_IS_TM4C129_RA2)
  6647. #define ROM_UARTIntStatus \
  6648. ((uint32_t (*)(uint32_t ui32Base, \
  6649. bool bMasked))ROM_UARTTABLE[19])
  6650. #endif
  6651. #if defined(TARGET_IS_TM4C123_RA1) || \
  6652. defined(TARGET_IS_TM4C123_RA3) || \
  6653. defined(TARGET_IS_TM4C123_RB1) || \
  6654. defined(TARGET_IS_TM4C123_RB2) || \
  6655. defined(TARGET_IS_TM4C129_RA0) || \
  6656. defined(TARGET_IS_TM4C129_RA1) || \
  6657. defined(TARGET_IS_TM4C129_RA2)
  6658. #define ROM_UARTIntClear \
  6659. ((void (*)(uint32_t ui32Base, \
  6660. uint32_t ui32IntFlags))ROM_UARTTABLE[20])
  6661. #endif
  6662. #if defined(TARGET_IS_TM4C123_RA1) || \
  6663. defined(TARGET_IS_TM4C123_RA3) || \
  6664. defined(TARGET_IS_TM4C123_RB1) || \
  6665. defined(TARGET_IS_TM4C123_RB2) || \
  6666. defined(TARGET_IS_TM4C129_RA0) || \
  6667. defined(TARGET_IS_TM4C129_RA1) || \
  6668. defined(TARGET_IS_TM4C129_RA2)
  6669. #define ROM_UpdateUART \
  6670. ((void (*)(void))ROM_UARTTABLE[21])
  6671. #endif
  6672. #if defined(TARGET_IS_TM4C123_RA1) || \
  6673. defined(TARGET_IS_TM4C123_RA3) || \
  6674. defined(TARGET_IS_TM4C123_RB1) || \
  6675. defined(TARGET_IS_TM4C123_RB2) || \
  6676. defined(TARGET_IS_TM4C129_RA0) || \
  6677. defined(TARGET_IS_TM4C129_RA1) || \
  6678. defined(TARGET_IS_TM4C129_RA2)
  6679. #define ROM_UARTDMAEnable \
  6680. ((void (*)(uint32_t ui32Base, \
  6681. uint32_t ui32DMAFlags))ROM_UARTTABLE[22])
  6682. #endif
  6683. #if defined(TARGET_IS_TM4C123_RA1) || \
  6684. defined(TARGET_IS_TM4C123_RA3) || \
  6685. defined(TARGET_IS_TM4C123_RB1) || \
  6686. defined(TARGET_IS_TM4C123_RB2) || \
  6687. defined(TARGET_IS_TM4C129_RA0) || \
  6688. defined(TARGET_IS_TM4C129_RA1) || \
  6689. defined(TARGET_IS_TM4C129_RA2)
  6690. #define ROM_UARTDMADisable \
  6691. ((void (*)(uint32_t ui32Base, \
  6692. uint32_t ui32DMAFlags))ROM_UARTTABLE[23])
  6693. #endif
  6694. #if defined(TARGET_IS_TM4C123_RA1) || \
  6695. defined(TARGET_IS_TM4C123_RA3) || \
  6696. defined(TARGET_IS_TM4C123_RB1) || \
  6697. defined(TARGET_IS_TM4C123_RB2) || \
  6698. defined(TARGET_IS_TM4C129_RA0) || \
  6699. defined(TARGET_IS_TM4C129_RA1) || \
  6700. defined(TARGET_IS_TM4C129_RA2)
  6701. #define ROM_UARTFIFOEnable \
  6702. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[24])
  6703. #endif
  6704. #if defined(TARGET_IS_TM4C123_RA1) || \
  6705. defined(TARGET_IS_TM4C123_RA3) || \
  6706. defined(TARGET_IS_TM4C123_RB1) || \
  6707. defined(TARGET_IS_TM4C123_RB2) || \
  6708. defined(TARGET_IS_TM4C129_RA0) || \
  6709. defined(TARGET_IS_TM4C129_RA1) || \
  6710. defined(TARGET_IS_TM4C129_RA2)
  6711. #define ROM_UARTFIFODisable \
  6712. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[25])
  6713. #endif
  6714. #if defined(TARGET_IS_TM4C123_RA1) || \
  6715. defined(TARGET_IS_TM4C123_RA3) || \
  6716. defined(TARGET_IS_TM4C123_RB1) || \
  6717. defined(TARGET_IS_TM4C123_RB2) || \
  6718. defined(TARGET_IS_TM4C129_RA0) || \
  6719. defined(TARGET_IS_TM4C129_RA1) || \
  6720. defined(TARGET_IS_TM4C129_RA2)
  6721. #define ROM_UARTBusy \
  6722. ((bool (*)(uint32_t ui32Base))ROM_UARTTABLE[26])
  6723. #endif
  6724. #if defined(TARGET_IS_TM4C123_RA1) || \
  6725. defined(TARGET_IS_TM4C123_RA3) || \
  6726. defined(TARGET_IS_TM4C123_RB1) || \
  6727. defined(TARGET_IS_TM4C123_RB2) || \
  6728. defined(TARGET_IS_TM4C129_RA0) || \
  6729. defined(TARGET_IS_TM4C129_RA1) || \
  6730. defined(TARGET_IS_TM4C129_RA2)
  6731. #define ROM_UARTTxIntModeSet \
  6732. ((void (*)(uint32_t ui32Base, \
  6733. uint32_t ui32Mode))ROM_UARTTABLE[27])
  6734. #endif
  6735. #if defined(TARGET_IS_TM4C123_RA1) || \
  6736. defined(TARGET_IS_TM4C123_RA3) || \
  6737. defined(TARGET_IS_TM4C123_RB1) || \
  6738. defined(TARGET_IS_TM4C123_RB2) || \
  6739. defined(TARGET_IS_TM4C129_RA0) || \
  6740. defined(TARGET_IS_TM4C129_RA1) || \
  6741. defined(TARGET_IS_TM4C129_RA2)
  6742. #define ROM_UARTTxIntModeGet \
  6743. ((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[28])
  6744. #endif
  6745. #if defined(TARGET_IS_TM4C123_RA1) || \
  6746. defined(TARGET_IS_TM4C123_RA3) || \
  6747. defined(TARGET_IS_TM4C123_RB1) || \
  6748. defined(TARGET_IS_TM4C123_RB2) || \
  6749. defined(TARGET_IS_TM4C129_RA0) || \
  6750. defined(TARGET_IS_TM4C129_RA1) || \
  6751. defined(TARGET_IS_TM4C129_RA2)
  6752. #define ROM_UARTRxErrorGet \
  6753. ((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[29])
  6754. #endif
  6755. #if defined(TARGET_IS_TM4C123_RA1) || \
  6756. defined(TARGET_IS_TM4C123_RA3) || \
  6757. defined(TARGET_IS_TM4C123_RB1) || \
  6758. defined(TARGET_IS_TM4C123_RB2) || \
  6759. defined(TARGET_IS_TM4C129_RA0) || \
  6760. defined(TARGET_IS_TM4C129_RA1) || \
  6761. defined(TARGET_IS_TM4C129_RA2)
  6762. #define ROM_UARTRxErrorClear \
  6763. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[30])
  6764. #endif
  6765. #if defined(TARGET_IS_TM4C123_RA1) || \
  6766. defined(TARGET_IS_TM4C123_RA3) || \
  6767. defined(TARGET_IS_TM4C123_RB1) || \
  6768. defined(TARGET_IS_TM4C123_RB2) || \
  6769. defined(TARGET_IS_TM4C129_RA0) || \
  6770. defined(TARGET_IS_TM4C129_RA1) || \
  6771. defined(TARGET_IS_TM4C129_RA2)
  6772. #define ROM_UARTClockSourceSet \
  6773. ((void (*)(uint32_t ui32Base, \
  6774. uint32_t ui32Source))ROM_UARTTABLE[31])
  6775. #endif
  6776. #if defined(TARGET_IS_TM4C123_RA1) || \
  6777. defined(TARGET_IS_TM4C123_RA3) || \
  6778. defined(TARGET_IS_TM4C123_RB1) || \
  6779. defined(TARGET_IS_TM4C123_RB2) || \
  6780. defined(TARGET_IS_TM4C129_RA0) || \
  6781. defined(TARGET_IS_TM4C129_RA1) || \
  6782. defined(TARGET_IS_TM4C129_RA2)
  6783. #define ROM_UARTClockSourceGet \
  6784. ((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[32])
  6785. #endif
  6786. #if defined(TARGET_IS_TM4C123_RA1) || \
  6787. defined(TARGET_IS_TM4C123_RA3) || \
  6788. defined(TARGET_IS_TM4C123_RB1) || \
  6789. defined(TARGET_IS_TM4C123_RB2) || \
  6790. defined(TARGET_IS_TM4C129_RA0) || \
  6791. defined(TARGET_IS_TM4C129_RA1) || \
  6792. defined(TARGET_IS_TM4C129_RA2)
  6793. #define ROM_UART9BitEnable \
  6794. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[33])
  6795. #endif
  6796. #if defined(TARGET_IS_TM4C123_RA1) || \
  6797. defined(TARGET_IS_TM4C123_RA3) || \
  6798. defined(TARGET_IS_TM4C123_RB1) || \
  6799. defined(TARGET_IS_TM4C123_RB2) || \
  6800. defined(TARGET_IS_TM4C129_RA0) || \
  6801. defined(TARGET_IS_TM4C129_RA1) || \
  6802. defined(TARGET_IS_TM4C129_RA2)
  6803. #define ROM_UART9BitDisable \
  6804. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[34])
  6805. #endif
  6806. #if defined(TARGET_IS_TM4C123_RA1) || \
  6807. defined(TARGET_IS_TM4C123_RA3) || \
  6808. defined(TARGET_IS_TM4C123_RB1) || \
  6809. defined(TARGET_IS_TM4C123_RB2) || \
  6810. defined(TARGET_IS_TM4C129_RA0) || \
  6811. defined(TARGET_IS_TM4C129_RA1) || \
  6812. defined(TARGET_IS_TM4C129_RA2)
  6813. #define ROM_UART9BitAddrSet \
  6814. ((void (*)(uint32_t ui32Base, \
  6815. uint8_t ui8Addr, \
  6816. uint8_t ui8Mask))ROM_UARTTABLE[35])
  6817. #endif
  6818. #if defined(TARGET_IS_TM4C123_RA1) || \
  6819. defined(TARGET_IS_TM4C123_RA3) || \
  6820. defined(TARGET_IS_TM4C123_RB1) || \
  6821. defined(TARGET_IS_TM4C123_RB2) || \
  6822. defined(TARGET_IS_TM4C129_RA0) || \
  6823. defined(TARGET_IS_TM4C129_RA1) || \
  6824. defined(TARGET_IS_TM4C129_RA2)
  6825. #define ROM_UART9BitAddrSend \
  6826. ((void (*)(uint32_t ui32Base, \
  6827. uint8_t ui8Addr))ROM_UARTTABLE[36])
  6828. #endif
  6829. #if defined(TARGET_IS_TM4C129_RA0) || \
  6830. defined(TARGET_IS_TM4C129_RA1) || \
  6831. defined(TARGET_IS_TM4C129_RA2)
  6832. #define ROM_UARTSmartCardDisable \
  6833. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[37])
  6834. #endif
  6835. #if defined(TARGET_IS_TM4C129_RA0) || \
  6836. defined(TARGET_IS_TM4C129_RA1) || \
  6837. defined(TARGET_IS_TM4C129_RA2)
  6838. #define ROM_UARTSmartCardEnable \
  6839. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[38])
  6840. #endif
  6841. #if defined(TARGET_IS_TM4C123_RB1) || \
  6842. defined(TARGET_IS_TM4C129_RA0) || \
  6843. defined(TARGET_IS_TM4C129_RA1) || \
  6844. defined(TARGET_IS_TM4C129_RA2)
  6845. #define ROM_UARTModemControlClear \
  6846. ((void (*)(uint32_t ui32Base, \
  6847. uint32_t ui32Control))ROM_UARTTABLE[39])
  6848. #endif
  6849. #if defined(TARGET_IS_TM4C129_RA0) || \
  6850. defined(TARGET_IS_TM4C129_RA1) || \
  6851. defined(TARGET_IS_TM4C129_RA2)
  6852. #define ROM_UARTModemControlGet \
  6853. ((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[40])
  6854. #endif
  6855. #if defined(TARGET_IS_TM4C129_RA0) || \
  6856. defined(TARGET_IS_TM4C129_RA1) || \
  6857. defined(TARGET_IS_TM4C129_RA2)
  6858. #define ROM_UARTModemControlSet \
  6859. ((void (*)(uint32_t ui32Base, \
  6860. uint32_t ui32Control))ROM_UARTTABLE[41])
  6861. #endif
  6862. #if defined(TARGET_IS_TM4C129_RA0) || \
  6863. defined(TARGET_IS_TM4C129_RA1) || \
  6864. defined(TARGET_IS_TM4C129_RA2)
  6865. #define ROM_UARTModemStatusGet \
  6866. ((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[42])
  6867. #endif
  6868. #if defined(TARGET_IS_TM4C129_RA0) || \
  6869. defined(TARGET_IS_TM4C129_RA1) || \
  6870. defined(TARGET_IS_TM4C129_RA2)
  6871. #define ROM_UARTFlowControlGet \
  6872. ((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[43])
  6873. #endif
  6874. #if defined(TARGET_IS_TM4C129_RA0) || \
  6875. defined(TARGET_IS_TM4C129_RA1) || \
  6876. defined(TARGET_IS_TM4C129_RA2)
  6877. #define ROM_UARTFlowControlSet \
  6878. ((void (*)(uint32_t ui32Base, \
  6879. uint32_t ui32Mode))ROM_UARTTABLE[44])
  6880. #endif
  6881. //*****************************************************************************
  6882. //
  6883. // Macros for calling ROM functions in the uDMA API.
  6884. //
  6885. //*****************************************************************************
  6886. #if defined(TARGET_IS_TM4C123_RA1) || \
  6887. defined(TARGET_IS_TM4C123_RA3) || \
  6888. defined(TARGET_IS_TM4C123_RB1) || \
  6889. defined(TARGET_IS_TM4C123_RB2) || \
  6890. defined(TARGET_IS_TM4C129_RA0) || \
  6891. defined(TARGET_IS_TM4C129_RA1) || \
  6892. defined(TARGET_IS_TM4C129_RA2)
  6893. #define ROM_uDMAChannelTransferSet \
  6894. ((void (*)(uint32_t ui32ChannelStructIndex, \
  6895. uint32_t ui32Mode, \
  6896. void *pvSrcAddr, \
  6897. void *pvDstAddr, \
  6898. uint32_t ui32TransferSize))ROM_UDMATABLE[0])
  6899. #endif
  6900. #if defined(TARGET_IS_TM4C123_RA1) || \
  6901. defined(TARGET_IS_TM4C123_RA3) || \
  6902. defined(TARGET_IS_TM4C123_RB1) || \
  6903. defined(TARGET_IS_TM4C123_RB2) || \
  6904. defined(TARGET_IS_TM4C129_RA0) || \
  6905. defined(TARGET_IS_TM4C129_RA1) || \
  6906. defined(TARGET_IS_TM4C129_RA2)
  6907. #define ROM_uDMAEnable \
  6908. ((void (*)(void))ROM_UDMATABLE[1])
  6909. #endif
  6910. #if defined(TARGET_IS_TM4C123_RA1) || \
  6911. defined(TARGET_IS_TM4C123_RA3) || \
  6912. defined(TARGET_IS_TM4C123_RB1) || \
  6913. defined(TARGET_IS_TM4C123_RB2) || \
  6914. defined(TARGET_IS_TM4C129_RA0) || \
  6915. defined(TARGET_IS_TM4C129_RA1) || \
  6916. defined(TARGET_IS_TM4C129_RA2)
  6917. #define ROM_uDMADisable \
  6918. ((void (*)(void))ROM_UDMATABLE[2])
  6919. #endif
  6920. #if defined(TARGET_IS_TM4C123_RA1) || \
  6921. defined(TARGET_IS_TM4C123_RA3) || \
  6922. defined(TARGET_IS_TM4C123_RB1) || \
  6923. defined(TARGET_IS_TM4C123_RB2) || \
  6924. defined(TARGET_IS_TM4C129_RA0) || \
  6925. defined(TARGET_IS_TM4C129_RA1) || \
  6926. defined(TARGET_IS_TM4C129_RA2)
  6927. #define ROM_uDMAErrorStatusGet \
  6928. ((uint32_t (*)(void))ROM_UDMATABLE[3])
  6929. #endif
  6930. #if defined(TARGET_IS_TM4C123_RA1) || \
  6931. defined(TARGET_IS_TM4C123_RA3) || \
  6932. defined(TARGET_IS_TM4C123_RB1) || \
  6933. defined(TARGET_IS_TM4C123_RB2) || \
  6934. defined(TARGET_IS_TM4C129_RA0) || \
  6935. defined(TARGET_IS_TM4C129_RA1) || \
  6936. defined(TARGET_IS_TM4C129_RA2)
  6937. #define ROM_uDMAErrorStatusClear \
  6938. ((void (*)(void))ROM_UDMATABLE[4])
  6939. #endif
  6940. #if defined(TARGET_IS_TM4C123_RA1) || \
  6941. defined(TARGET_IS_TM4C123_RA3) || \
  6942. defined(TARGET_IS_TM4C123_RB1) || \
  6943. defined(TARGET_IS_TM4C123_RB2) || \
  6944. defined(TARGET_IS_TM4C129_RA0) || \
  6945. defined(TARGET_IS_TM4C129_RA1) || \
  6946. defined(TARGET_IS_TM4C129_RA2)
  6947. #define ROM_uDMAChannelEnable \
  6948. ((void (*)(uint32_t ui32ChannelNum))ROM_UDMATABLE[5])
  6949. #endif
  6950. #if defined(TARGET_IS_TM4C123_RA1) || \
  6951. defined(TARGET_IS_TM4C123_RA3) || \
  6952. defined(TARGET_IS_TM4C123_RB1) || \
  6953. defined(TARGET_IS_TM4C123_RB2) || \
  6954. defined(TARGET_IS_TM4C129_RA0) || \
  6955. defined(TARGET_IS_TM4C129_RA1) || \
  6956. defined(TARGET_IS_TM4C129_RA2)
  6957. #define ROM_uDMAChannelDisable \
  6958. ((void (*)(uint32_t ui32ChannelNum))ROM_UDMATABLE[6])
  6959. #endif
  6960. #if defined(TARGET_IS_TM4C123_RA1) || \
  6961. defined(TARGET_IS_TM4C123_RA3) || \
  6962. defined(TARGET_IS_TM4C123_RB1) || \
  6963. defined(TARGET_IS_TM4C123_RB2) || \
  6964. defined(TARGET_IS_TM4C129_RA0) || \
  6965. defined(TARGET_IS_TM4C129_RA1) || \
  6966. defined(TARGET_IS_TM4C129_RA2)
  6967. #define ROM_uDMAChannelIsEnabled \
  6968. ((bool (*)(uint32_t ui32ChannelNum))ROM_UDMATABLE[7])
  6969. #endif
  6970. #if defined(TARGET_IS_TM4C123_RA1) || \
  6971. defined(TARGET_IS_TM4C123_RA3) || \
  6972. defined(TARGET_IS_TM4C123_RB1) || \
  6973. defined(TARGET_IS_TM4C123_RB2) || \
  6974. defined(TARGET_IS_TM4C129_RA0) || \
  6975. defined(TARGET_IS_TM4C129_RA1) || \
  6976. defined(TARGET_IS_TM4C129_RA2)
  6977. #define ROM_uDMAControlBaseSet \
  6978. ((void (*)(void *pControlTable))ROM_UDMATABLE[8])
  6979. #endif
  6980. #if defined(TARGET_IS_TM4C123_RA1) || \
  6981. defined(TARGET_IS_TM4C123_RA3) || \
  6982. defined(TARGET_IS_TM4C123_RB1) || \
  6983. defined(TARGET_IS_TM4C123_RB2) || \
  6984. defined(TARGET_IS_TM4C129_RA0) || \
  6985. defined(TARGET_IS_TM4C129_RA1) || \
  6986. defined(TARGET_IS_TM4C129_RA2)
  6987. #define ROM_uDMAControlBaseGet \
  6988. ((void * (*)(void))ROM_UDMATABLE[9])
  6989. #endif
  6990. #if defined(TARGET_IS_TM4C123_RA1) || \
  6991. defined(TARGET_IS_TM4C123_RA3) || \
  6992. defined(TARGET_IS_TM4C123_RB1) || \
  6993. defined(TARGET_IS_TM4C123_RB2) || \
  6994. defined(TARGET_IS_TM4C129_RA0) || \
  6995. defined(TARGET_IS_TM4C129_RA1) || \
  6996. defined(TARGET_IS_TM4C129_RA2)
  6997. #define ROM_uDMAChannelRequest \
  6998. ((void (*)(uint32_t ui32ChannelNum))ROM_UDMATABLE[10])
  6999. #endif
  7000. #if defined(TARGET_IS_TM4C123_RA1) || \
  7001. defined(TARGET_IS_TM4C123_RA3) || \
  7002. defined(TARGET_IS_TM4C123_RB1) || \
  7003. defined(TARGET_IS_TM4C123_RB2) || \
  7004. defined(TARGET_IS_TM4C129_RA0) || \
  7005. defined(TARGET_IS_TM4C129_RA1) || \
  7006. defined(TARGET_IS_TM4C129_RA2)
  7007. #define ROM_uDMAChannelAttributeEnable \
  7008. ((void (*)(uint32_t ui32ChannelNum, \
  7009. uint32_t ui32Attr))ROM_UDMATABLE[11])
  7010. #endif
  7011. #if defined(TARGET_IS_TM4C123_RA1) || \
  7012. defined(TARGET_IS_TM4C123_RA3) || \
  7013. defined(TARGET_IS_TM4C123_RB1) || \
  7014. defined(TARGET_IS_TM4C123_RB2) || \
  7015. defined(TARGET_IS_TM4C129_RA0) || \
  7016. defined(TARGET_IS_TM4C129_RA1) || \
  7017. defined(TARGET_IS_TM4C129_RA2)
  7018. #define ROM_uDMAChannelAttributeDisable \
  7019. ((void (*)(uint32_t ui32ChannelNum, \
  7020. uint32_t ui32Attr))ROM_UDMATABLE[12])
  7021. #endif
  7022. #if defined(TARGET_IS_TM4C123_RA1) || \
  7023. defined(TARGET_IS_TM4C123_RA3) || \
  7024. defined(TARGET_IS_TM4C123_RB1) || \
  7025. defined(TARGET_IS_TM4C123_RB2) || \
  7026. defined(TARGET_IS_TM4C129_RA0) || \
  7027. defined(TARGET_IS_TM4C129_RA1) || \
  7028. defined(TARGET_IS_TM4C129_RA2)
  7029. #define ROM_uDMAChannelAttributeGet \
  7030. ((uint32_t (*)(uint32_t ui32ChannelNum))ROM_UDMATABLE[13])
  7031. #endif
  7032. #if defined(TARGET_IS_TM4C123_RA1) || \
  7033. defined(TARGET_IS_TM4C123_RA3) || \
  7034. defined(TARGET_IS_TM4C123_RB1) || \
  7035. defined(TARGET_IS_TM4C123_RB2) || \
  7036. defined(TARGET_IS_TM4C129_RA0) || \
  7037. defined(TARGET_IS_TM4C129_RA1) || \
  7038. defined(TARGET_IS_TM4C129_RA2)
  7039. #define ROM_uDMAChannelControlSet \
  7040. ((void (*)(uint32_t ui32ChannelStructIndex, \
  7041. uint32_t ui32Control))ROM_UDMATABLE[14])
  7042. #endif
  7043. #if defined(TARGET_IS_TM4C123_RA1) || \
  7044. defined(TARGET_IS_TM4C123_RA3) || \
  7045. defined(TARGET_IS_TM4C123_RB1) || \
  7046. defined(TARGET_IS_TM4C123_RB2) || \
  7047. defined(TARGET_IS_TM4C129_RA0) || \
  7048. defined(TARGET_IS_TM4C129_RA1) || \
  7049. defined(TARGET_IS_TM4C129_RA2)
  7050. #define ROM_uDMAChannelSizeGet \
  7051. ((uint32_t (*)(uint32_t ui32ChannelStructIndex))ROM_UDMATABLE[15])
  7052. #endif
  7053. #if defined(TARGET_IS_TM4C123_RA1) || \
  7054. defined(TARGET_IS_TM4C123_RA3) || \
  7055. defined(TARGET_IS_TM4C123_RB1) || \
  7056. defined(TARGET_IS_TM4C123_RB2) || \
  7057. defined(TARGET_IS_TM4C129_RA0) || \
  7058. defined(TARGET_IS_TM4C129_RA1) || \
  7059. defined(TARGET_IS_TM4C129_RA2)
  7060. #define ROM_uDMAChannelModeGet \
  7061. ((uint32_t (*)(uint32_t ui32ChannelStructIndex))ROM_UDMATABLE[16])
  7062. #endif
  7063. #if defined(TARGET_IS_TM4C123_RA1) || \
  7064. defined(TARGET_IS_TM4C123_RA3) || \
  7065. defined(TARGET_IS_TM4C123_RB1) || \
  7066. defined(TARGET_IS_TM4C123_RB2) || \
  7067. defined(TARGET_IS_TM4C129_RA0) || \
  7068. defined(TARGET_IS_TM4C129_RA1) || \
  7069. defined(TARGET_IS_TM4C129_RA2)
  7070. #define ROM_uDMAChannelSelectSecondary \
  7071. ((void (*)(uint32_t ui32SecPeriphs))ROM_UDMATABLE[17])
  7072. #endif
  7073. #if defined(TARGET_IS_TM4C123_RA1) || \
  7074. defined(TARGET_IS_TM4C123_RA3) || \
  7075. defined(TARGET_IS_TM4C123_RB1) || \
  7076. defined(TARGET_IS_TM4C123_RB2) || \
  7077. defined(TARGET_IS_TM4C129_RA0) || \
  7078. defined(TARGET_IS_TM4C129_RA1) || \
  7079. defined(TARGET_IS_TM4C129_RA2)
  7080. #define ROM_uDMAChannelSelectDefault \
  7081. ((void (*)(uint32_t ui32DefPeriphs))ROM_UDMATABLE[18])
  7082. #endif
  7083. #if defined(TARGET_IS_TM4C123_RA1) || \
  7084. defined(TARGET_IS_TM4C123_RA3) || \
  7085. defined(TARGET_IS_TM4C123_RB1) || \
  7086. defined(TARGET_IS_TM4C123_RB2) || \
  7087. defined(TARGET_IS_TM4C129_RA0) || \
  7088. defined(TARGET_IS_TM4C129_RA1) || \
  7089. defined(TARGET_IS_TM4C129_RA2)
  7090. #define ROM_uDMAIntStatus \
  7091. ((uint32_t (*)(void))ROM_UDMATABLE[19])
  7092. #endif
  7093. #if defined(TARGET_IS_TM4C123_RA1) || \
  7094. defined(TARGET_IS_TM4C123_RA3) || \
  7095. defined(TARGET_IS_TM4C123_RB1) || \
  7096. defined(TARGET_IS_TM4C123_RB2) || \
  7097. defined(TARGET_IS_TM4C129_RA0) || \
  7098. defined(TARGET_IS_TM4C129_RA1) || \
  7099. defined(TARGET_IS_TM4C129_RA2)
  7100. #define ROM_uDMAIntClear \
  7101. ((void (*)(uint32_t ui32ChanMask))ROM_UDMATABLE[20])
  7102. #endif
  7103. #if defined(TARGET_IS_TM4C123_RA1) || \
  7104. defined(TARGET_IS_TM4C123_RA3) || \
  7105. defined(TARGET_IS_TM4C123_RB1) || \
  7106. defined(TARGET_IS_TM4C123_RB2) || \
  7107. defined(TARGET_IS_TM4C129_RA0) || \
  7108. defined(TARGET_IS_TM4C129_RA1) || \
  7109. defined(TARGET_IS_TM4C129_RA2)
  7110. #define ROM_uDMAControlAlternateBaseGet \
  7111. ((void * (*)(void))ROM_UDMATABLE[21])
  7112. #endif
  7113. #if defined(TARGET_IS_TM4C123_RA1) || \
  7114. defined(TARGET_IS_TM4C123_RA3) || \
  7115. defined(TARGET_IS_TM4C123_RB1) || \
  7116. defined(TARGET_IS_TM4C123_RB2) || \
  7117. defined(TARGET_IS_TM4C129_RA0) || \
  7118. defined(TARGET_IS_TM4C129_RA1) || \
  7119. defined(TARGET_IS_TM4C129_RA2)
  7120. #define ROM_uDMAChannelScatterGatherSet \
  7121. ((void (*)(uint32_t ui32ChannelNum, \
  7122. uint32_t ui32TaskCount, \
  7123. void *pvTaskList, \
  7124. uint32_t ui32IsPeriphSG))ROM_UDMATABLE[22])
  7125. #endif
  7126. #if defined(TARGET_IS_TM4C123_RA1) || \
  7127. defined(TARGET_IS_TM4C123_RA3) || \
  7128. defined(TARGET_IS_TM4C123_RB1) || \
  7129. defined(TARGET_IS_TM4C123_RB2) || \
  7130. defined(TARGET_IS_TM4C129_RA0) || \
  7131. defined(TARGET_IS_TM4C129_RA1) || \
  7132. defined(TARGET_IS_TM4C129_RA2)
  7133. #define ROM_uDMAChannelAssign \
  7134. ((void (*)(uint32_t ui32Mapping))ROM_UDMATABLE[23])
  7135. #endif
  7136. //*****************************************************************************
  7137. //
  7138. // Macros for calling ROM functions in the USB API.
  7139. //
  7140. //*****************************************************************************
  7141. #if defined(TARGET_IS_TM4C123_RA1) || \
  7142. defined(TARGET_IS_TM4C123_RA3) || \
  7143. defined(TARGET_IS_TM4C123_RB1) || \
  7144. defined(TARGET_IS_TM4C123_RB2) || \
  7145. defined(TARGET_IS_TM4C129_RA0) || \
  7146. defined(TARGET_IS_TM4C129_RA1) || \
  7147. defined(TARGET_IS_TM4C129_RA2)
  7148. #define ROM_USBDevAddrGet \
  7149. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[1])
  7150. #endif
  7151. #if defined(TARGET_IS_TM4C123_RA1) || \
  7152. defined(TARGET_IS_TM4C123_RA3) || \
  7153. defined(TARGET_IS_TM4C123_RB1) || \
  7154. defined(TARGET_IS_TM4C123_RB2) || \
  7155. defined(TARGET_IS_TM4C129_RA0) || \
  7156. defined(TARGET_IS_TM4C129_RA1) || \
  7157. defined(TARGET_IS_TM4C129_RA2)
  7158. #define ROM_USBDevAddrSet \
  7159. ((void (*)(uint32_t ui32Base, \
  7160. uint32_t ui32Address))ROM_USBTABLE[2])
  7161. #endif
  7162. #if defined(TARGET_IS_TM4C123_RA1) || \
  7163. defined(TARGET_IS_TM4C123_RA3) || \
  7164. defined(TARGET_IS_TM4C123_RB1) || \
  7165. defined(TARGET_IS_TM4C123_RB2) || \
  7166. defined(TARGET_IS_TM4C129_RA0) || \
  7167. defined(TARGET_IS_TM4C129_RA1) || \
  7168. defined(TARGET_IS_TM4C129_RA2)
  7169. #define ROM_USBDevConnect \
  7170. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[3])
  7171. #endif
  7172. #if defined(TARGET_IS_TM4C123_RA1) || \
  7173. defined(TARGET_IS_TM4C123_RA3) || \
  7174. defined(TARGET_IS_TM4C123_RB1) || \
  7175. defined(TARGET_IS_TM4C123_RB2) || \
  7176. defined(TARGET_IS_TM4C129_RA0) || \
  7177. defined(TARGET_IS_TM4C129_RA1) || \
  7178. defined(TARGET_IS_TM4C129_RA2)
  7179. #define ROM_USBDevDisconnect \
  7180. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[4])
  7181. #endif
  7182. #if defined(TARGET_IS_TM4C123_RA1) || \
  7183. defined(TARGET_IS_TM4C123_RA3) || \
  7184. defined(TARGET_IS_TM4C123_RB1) || \
  7185. defined(TARGET_IS_TM4C123_RB2) || \
  7186. defined(TARGET_IS_TM4C129_RA0) || \
  7187. defined(TARGET_IS_TM4C129_RA1) || \
  7188. defined(TARGET_IS_TM4C129_RA2)
  7189. #define ROM_USBDevEndpointConfigSet \
  7190. ((void (*)(uint32_t ui32Base, \
  7191. uint32_t ui32Endpoint, \
  7192. uint32_t ui32MaxPacketSize, \
  7193. uint32_t ui32Flags))ROM_USBTABLE[5])
  7194. #endif
  7195. #if defined(TARGET_IS_TM4C123_RA1) || \
  7196. defined(TARGET_IS_TM4C123_RA3) || \
  7197. defined(TARGET_IS_TM4C123_RB1) || \
  7198. defined(TARGET_IS_TM4C123_RB2) || \
  7199. defined(TARGET_IS_TM4C129_RA0) || \
  7200. defined(TARGET_IS_TM4C129_RA1) || \
  7201. defined(TARGET_IS_TM4C129_RA2)
  7202. #define ROM_USBDevEndpointDataAck \
  7203. ((void (*)(uint32_t ui32Base, \
  7204. uint32_t ui32Endpoint, \
  7205. bool bIsLastPacket))ROM_USBTABLE[6])
  7206. #endif
  7207. #if defined(TARGET_IS_TM4C123_RA1) || \
  7208. defined(TARGET_IS_TM4C123_RA3) || \
  7209. defined(TARGET_IS_TM4C123_RB1) || \
  7210. defined(TARGET_IS_TM4C123_RB2) || \
  7211. defined(TARGET_IS_TM4C129_RA0) || \
  7212. defined(TARGET_IS_TM4C129_RA1) || \
  7213. defined(TARGET_IS_TM4C129_RA2)
  7214. #define ROM_USBDevEndpointStall \
  7215. ((void (*)(uint32_t ui32Base, \
  7216. uint32_t ui32Endpoint, \
  7217. uint32_t ui32Flags))ROM_USBTABLE[7])
  7218. #endif
  7219. #if defined(TARGET_IS_TM4C123_RA1) || \
  7220. defined(TARGET_IS_TM4C123_RA3) || \
  7221. defined(TARGET_IS_TM4C123_RB1) || \
  7222. defined(TARGET_IS_TM4C123_RB2) || \
  7223. defined(TARGET_IS_TM4C129_RA0) || \
  7224. defined(TARGET_IS_TM4C129_RA1) || \
  7225. defined(TARGET_IS_TM4C129_RA2)
  7226. #define ROM_USBDevEndpointStallClear \
  7227. ((void (*)(uint32_t ui32Base, \
  7228. uint32_t ui32Endpoint, \
  7229. uint32_t ui32Flags))ROM_USBTABLE[8])
  7230. #endif
  7231. #if defined(TARGET_IS_TM4C123_RA1) || \
  7232. defined(TARGET_IS_TM4C123_RA3) || \
  7233. defined(TARGET_IS_TM4C123_RB1) || \
  7234. defined(TARGET_IS_TM4C123_RB2) || \
  7235. defined(TARGET_IS_TM4C129_RA0) || \
  7236. defined(TARGET_IS_TM4C129_RA1) || \
  7237. defined(TARGET_IS_TM4C129_RA2)
  7238. #define ROM_USBDevEndpointStatusClear \
  7239. ((void (*)(uint32_t ui32Base, \
  7240. uint32_t ui32Endpoint, \
  7241. uint32_t ui32Flags))ROM_USBTABLE[9])
  7242. #endif
  7243. #if defined(TARGET_IS_TM4C123_RA1) || \
  7244. defined(TARGET_IS_TM4C123_RA3) || \
  7245. defined(TARGET_IS_TM4C123_RB1) || \
  7246. defined(TARGET_IS_TM4C123_RB2) || \
  7247. defined(TARGET_IS_TM4C129_RA0) || \
  7248. defined(TARGET_IS_TM4C129_RA1) || \
  7249. defined(TARGET_IS_TM4C129_RA2)
  7250. #define ROM_USBEndpointDataGet \
  7251. ((int32_t (*)(uint32_t ui32Base, \
  7252. uint32_t ui32Endpoint, \
  7253. uint8_t *pui8Data, \
  7254. uint32_t *pui32Size))ROM_USBTABLE[10])
  7255. #endif
  7256. #if defined(TARGET_IS_TM4C123_RA1) || \
  7257. defined(TARGET_IS_TM4C123_RA3) || \
  7258. defined(TARGET_IS_TM4C123_RB1) || \
  7259. defined(TARGET_IS_TM4C123_RB2) || \
  7260. defined(TARGET_IS_TM4C129_RA0) || \
  7261. defined(TARGET_IS_TM4C129_RA1) || \
  7262. defined(TARGET_IS_TM4C129_RA2)
  7263. #define ROM_USBEndpointDataPut \
  7264. ((int32_t (*)(uint32_t ui32Base, \
  7265. uint32_t ui32Endpoint, \
  7266. uint8_t *pui8Data, \
  7267. uint32_t ui32Size))ROM_USBTABLE[11])
  7268. #endif
  7269. #if defined(TARGET_IS_TM4C123_RA1) || \
  7270. defined(TARGET_IS_TM4C123_RA3) || \
  7271. defined(TARGET_IS_TM4C123_RB1) || \
  7272. defined(TARGET_IS_TM4C123_RB2) || \
  7273. defined(TARGET_IS_TM4C129_RA0) || \
  7274. defined(TARGET_IS_TM4C129_RA1) || \
  7275. defined(TARGET_IS_TM4C129_RA2)
  7276. #define ROM_USBEndpointDataSend \
  7277. ((int32_t (*)(uint32_t ui32Base, \
  7278. uint32_t ui32Endpoint, \
  7279. uint32_t ui32TransType))ROM_USBTABLE[12])
  7280. #endif
  7281. #if defined(TARGET_IS_TM4C123_RA1) || \
  7282. defined(TARGET_IS_TM4C123_RA3) || \
  7283. defined(TARGET_IS_TM4C123_RB1) || \
  7284. defined(TARGET_IS_TM4C123_RB2) || \
  7285. defined(TARGET_IS_TM4C129_RA0) || \
  7286. defined(TARGET_IS_TM4C129_RA1) || \
  7287. defined(TARGET_IS_TM4C129_RA2)
  7288. #define ROM_USBEndpointDataToggleClear \
  7289. ((void (*)(uint32_t ui32Base, \
  7290. uint32_t ui32Endpoint, \
  7291. uint32_t ui32Flags))ROM_USBTABLE[13])
  7292. #endif
  7293. #if defined(TARGET_IS_TM4C123_RA1) || \
  7294. defined(TARGET_IS_TM4C123_RA3) || \
  7295. defined(TARGET_IS_TM4C123_RB1) || \
  7296. defined(TARGET_IS_TM4C123_RB2) || \
  7297. defined(TARGET_IS_TM4C129_RA0) || \
  7298. defined(TARGET_IS_TM4C129_RA1) || \
  7299. defined(TARGET_IS_TM4C129_RA2)
  7300. #define ROM_USBEndpointStatus \
  7301. ((uint32_t (*)(uint32_t ui32Base, \
  7302. uint32_t ui32Endpoint))ROM_USBTABLE[14])
  7303. #endif
  7304. #if defined(TARGET_IS_TM4C123_RA1) || \
  7305. defined(TARGET_IS_TM4C123_RA3) || \
  7306. defined(TARGET_IS_TM4C123_RB1) || \
  7307. defined(TARGET_IS_TM4C123_RB2) || \
  7308. defined(TARGET_IS_TM4C129_RA0) || \
  7309. defined(TARGET_IS_TM4C129_RA1) || \
  7310. defined(TARGET_IS_TM4C129_RA2)
  7311. #define ROM_USBFIFOAddrGet \
  7312. ((uint32_t (*)(uint32_t ui32Base, \
  7313. uint32_t ui32Endpoint))ROM_USBTABLE[15])
  7314. #endif
  7315. #if defined(TARGET_IS_TM4C123_RA1) || \
  7316. defined(TARGET_IS_TM4C123_RA3) || \
  7317. defined(TARGET_IS_TM4C123_RB1) || \
  7318. defined(TARGET_IS_TM4C123_RB2) || \
  7319. defined(TARGET_IS_TM4C129_RA0) || \
  7320. defined(TARGET_IS_TM4C129_RA1) || \
  7321. defined(TARGET_IS_TM4C129_RA2)
  7322. #define ROM_USBFIFOConfigGet \
  7323. ((void (*)(uint32_t ui32Base, \
  7324. uint32_t ui32Endpoint, \
  7325. uint32_t *pui32FIFOAddress, \
  7326. uint32_t *pui32FIFOSize, \
  7327. uint32_t ui32Flags))ROM_USBTABLE[16])
  7328. #endif
  7329. #if defined(TARGET_IS_TM4C123_RA1) || \
  7330. defined(TARGET_IS_TM4C123_RA3) || \
  7331. defined(TARGET_IS_TM4C123_RB1) || \
  7332. defined(TARGET_IS_TM4C123_RB2) || \
  7333. defined(TARGET_IS_TM4C129_RA0) || \
  7334. defined(TARGET_IS_TM4C129_RA1) || \
  7335. defined(TARGET_IS_TM4C129_RA2)
  7336. #define ROM_USBFIFOConfigSet \
  7337. ((void (*)(uint32_t ui32Base, \
  7338. uint32_t ui32Endpoint, \
  7339. uint32_t ui32FIFOAddress, \
  7340. uint32_t ui32FIFOSize, \
  7341. uint32_t ui32Flags))ROM_USBTABLE[17])
  7342. #endif
  7343. #if defined(TARGET_IS_TM4C123_RA1) || \
  7344. defined(TARGET_IS_TM4C123_RA3) || \
  7345. defined(TARGET_IS_TM4C123_RB1) || \
  7346. defined(TARGET_IS_TM4C123_RB2) || \
  7347. defined(TARGET_IS_TM4C129_RA0) || \
  7348. defined(TARGET_IS_TM4C129_RA1) || \
  7349. defined(TARGET_IS_TM4C129_RA2)
  7350. #define ROM_USBFIFOFlush \
  7351. ((void (*)(uint32_t ui32Base, \
  7352. uint32_t ui32Endpoint, \
  7353. uint32_t ui32Flags))ROM_USBTABLE[18])
  7354. #endif
  7355. #if defined(TARGET_IS_TM4C123_RA1) || \
  7356. defined(TARGET_IS_TM4C123_RA3) || \
  7357. defined(TARGET_IS_TM4C123_RB1) || \
  7358. defined(TARGET_IS_TM4C123_RB2) || \
  7359. defined(TARGET_IS_TM4C129_RA0) || \
  7360. defined(TARGET_IS_TM4C129_RA1) || \
  7361. defined(TARGET_IS_TM4C129_RA2)
  7362. #define ROM_USBFrameNumberGet \
  7363. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[19])
  7364. #endif
  7365. #if defined(TARGET_IS_TM4C123_RA1) || \
  7366. defined(TARGET_IS_TM4C123_RA3) || \
  7367. defined(TARGET_IS_TM4C123_RB1) || \
  7368. defined(TARGET_IS_TM4C123_RB2) || \
  7369. defined(TARGET_IS_TM4C129_RA0) || \
  7370. defined(TARGET_IS_TM4C129_RA1) || \
  7371. defined(TARGET_IS_TM4C129_RA2)
  7372. #define ROM_USBHostAddrGet \
  7373. ((uint32_t (*)(uint32_t ui32Base, \
  7374. uint32_t ui32Endpoint, \
  7375. uint32_t ui32Flags))ROM_USBTABLE[20])
  7376. #endif
  7377. #if defined(TARGET_IS_TM4C123_RA1) || \
  7378. defined(TARGET_IS_TM4C123_RA3) || \
  7379. defined(TARGET_IS_TM4C123_RB1) || \
  7380. defined(TARGET_IS_TM4C123_RB2) || \
  7381. defined(TARGET_IS_TM4C129_RA0) || \
  7382. defined(TARGET_IS_TM4C129_RA1) || \
  7383. defined(TARGET_IS_TM4C129_RA2)
  7384. #define ROM_USBHostAddrSet \
  7385. ((void (*)(uint32_t ui32Base, \
  7386. uint32_t ui32Endpoint, \
  7387. uint32_t ui32Addr, \
  7388. uint32_t ui32Flags))ROM_USBTABLE[21])
  7389. #endif
  7390. #if defined(TARGET_IS_TM4C123_RA3) || \
  7391. defined(TARGET_IS_TM4C123_RB1) || \
  7392. defined(TARGET_IS_TM4C123_RB2) || \
  7393. defined(TARGET_IS_TM4C129_RA0) || \
  7394. defined(TARGET_IS_TM4C129_RA1) || \
  7395. defined(TARGET_IS_TM4C129_RA2)
  7396. #define ROM_USBHostEndpointConfig \
  7397. ((void (*)(uint32_t ui32Base, \
  7398. uint32_t ui32Endpoint, \
  7399. uint32_t ui32MaxPacketSize, \
  7400. uint32_t ui32NAKPollInterval, \
  7401. uint32_t ui32TargetEndpoint, \
  7402. uint32_t ui32Flags))ROM_USBTABLE[22])
  7403. #endif
  7404. #if defined(TARGET_IS_TM4C123_RA1) || \
  7405. defined(TARGET_IS_TM4C123_RA3) || \
  7406. defined(TARGET_IS_TM4C123_RB1) || \
  7407. defined(TARGET_IS_TM4C123_RB2) || \
  7408. defined(TARGET_IS_TM4C129_RA0) || \
  7409. defined(TARGET_IS_TM4C129_RA1) || \
  7410. defined(TARGET_IS_TM4C129_RA2)
  7411. #define ROM_USBHostEndpointDataAck \
  7412. ((void (*)(uint32_t ui32Base, \
  7413. uint32_t ui32Endpoint))ROM_USBTABLE[23])
  7414. #endif
  7415. #if defined(TARGET_IS_TM4C123_RA1) || \
  7416. defined(TARGET_IS_TM4C123_RA3) || \
  7417. defined(TARGET_IS_TM4C123_RB1) || \
  7418. defined(TARGET_IS_TM4C123_RB2) || \
  7419. defined(TARGET_IS_TM4C129_RA0) || \
  7420. defined(TARGET_IS_TM4C129_RA1) || \
  7421. defined(TARGET_IS_TM4C129_RA2)
  7422. #define ROM_USBHostEndpointDataToggle \
  7423. ((void (*)(uint32_t ui32Base, \
  7424. uint32_t ui32Endpoint, \
  7425. bool bDataToggle, \
  7426. uint32_t ui32Flags))ROM_USBTABLE[24])
  7427. #endif
  7428. #if defined(TARGET_IS_TM4C123_RA1) || \
  7429. defined(TARGET_IS_TM4C123_RA3) || \
  7430. defined(TARGET_IS_TM4C123_RB1) || \
  7431. defined(TARGET_IS_TM4C123_RB2) || \
  7432. defined(TARGET_IS_TM4C129_RA0) || \
  7433. defined(TARGET_IS_TM4C129_RA1) || \
  7434. defined(TARGET_IS_TM4C129_RA2)
  7435. #define ROM_USBHostEndpointStatusClear \
  7436. ((void (*)(uint32_t ui32Base, \
  7437. uint32_t ui32Endpoint, \
  7438. uint32_t ui32Flags))ROM_USBTABLE[25])
  7439. #endif
  7440. #if defined(TARGET_IS_TM4C123_RA1) || \
  7441. defined(TARGET_IS_TM4C123_RA3) || \
  7442. defined(TARGET_IS_TM4C123_RB1) || \
  7443. defined(TARGET_IS_TM4C123_RB2) || \
  7444. defined(TARGET_IS_TM4C129_RA0) || \
  7445. defined(TARGET_IS_TM4C129_RA1) || \
  7446. defined(TARGET_IS_TM4C129_RA2)
  7447. #define ROM_USBHostHubAddrGet \
  7448. ((uint32_t (*)(uint32_t ui32Base, \
  7449. uint32_t ui32Endpoint, \
  7450. uint32_t ui32Flags))ROM_USBTABLE[26])
  7451. #endif
  7452. #if defined(TARGET_IS_TM4C123_RA1) || \
  7453. defined(TARGET_IS_TM4C123_RA3) || \
  7454. defined(TARGET_IS_TM4C123_RB1) || \
  7455. defined(TARGET_IS_TM4C123_RB2) || \
  7456. defined(TARGET_IS_TM4C129_RA0) || \
  7457. defined(TARGET_IS_TM4C129_RA1) || \
  7458. defined(TARGET_IS_TM4C129_RA2)
  7459. #define ROM_USBHostHubAddrSet \
  7460. ((void (*)(uint32_t ui32Base, \
  7461. uint32_t ui32Endpoint, \
  7462. uint32_t ui32Addr, \
  7463. uint32_t ui32Flags))ROM_USBTABLE[27])
  7464. #endif
  7465. #if defined(TARGET_IS_TM4C123_RA1) || \
  7466. defined(TARGET_IS_TM4C123_RA3) || \
  7467. defined(TARGET_IS_TM4C123_RB1) || \
  7468. defined(TARGET_IS_TM4C123_RB2) || \
  7469. defined(TARGET_IS_TM4C129_RA0) || \
  7470. defined(TARGET_IS_TM4C129_RA1) || \
  7471. defined(TARGET_IS_TM4C129_RA2)
  7472. #define ROM_USBHostPwrDisable \
  7473. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[28])
  7474. #endif
  7475. #if defined(TARGET_IS_TM4C123_RA1) || \
  7476. defined(TARGET_IS_TM4C123_RA3) || \
  7477. defined(TARGET_IS_TM4C123_RB1) || \
  7478. defined(TARGET_IS_TM4C123_RB2) || \
  7479. defined(TARGET_IS_TM4C129_RA0) || \
  7480. defined(TARGET_IS_TM4C129_RA1) || \
  7481. defined(TARGET_IS_TM4C129_RA2)
  7482. #define ROM_USBHostPwrEnable \
  7483. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[29])
  7484. #endif
  7485. #if defined(TARGET_IS_TM4C123_RA1) || \
  7486. defined(TARGET_IS_TM4C123_RA3) || \
  7487. defined(TARGET_IS_TM4C123_RB1) || \
  7488. defined(TARGET_IS_TM4C123_RB2) || \
  7489. defined(TARGET_IS_TM4C129_RA0) || \
  7490. defined(TARGET_IS_TM4C129_RA1) || \
  7491. defined(TARGET_IS_TM4C129_RA2)
  7492. #define ROM_USBHostPwrConfig \
  7493. ((void (*)(uint32_t ui32Base, \
  7494. uint32_t ui32Flags))ROM_USBTABLE[30])
  7495. #endif
  7496. #if defined(TARGET_IS_TM4C123_RA1) || \
  7497. defined(TARGET_IS_TM4C123_RA3) || \
  7498. defined(TARGET_IS_TM4C123_RB1) || \
  7499. defined(TARGET_IS_TM4C123_RB2) || \
  7500. defined(TARGET_IS_TM4C129_RA0) || \
  7501. defined(TARGET_IS_TM4C129_RA1) || \
  7502. defined(TARGET_IS_TM4C129_RA2)
  7503. #define ROM_USBHostPwrFaultDisable \
  7504. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[31])
  7505. #endif
  7506. #if defined(TARGET_IS_TM4C123_RA1) || \
  7507. defined(TARGET_IS_TM4C123_RA3) || \
  7508. defined(TARGET_IS_TM4C123_RB1) || \
  7509. defined(TARGET_IS_TM4C123_RB2) || \
  7510. defined(TARGET_IS_TM4C129_RA0) || \
  7511. defined(TARGET_IS_TM4C129_RA1) || \
  7512. defined(TARGET_IS_TM4C129_RA2)
  7513. #define ROM_USBHostPwrFaultEnable \
  7514. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[32])
  7515. #endif
  7516. #if defined(TARGET_IS_TM4C123_RA1) || \
  7517. defined(TARGET_IS_TM4C123_RA3) || \
  7518. defined(TARGET_IS_TM4C123_RB1) || \
  7519. defined(TARGET_IS_TM4C123_RB2) || \
  7520. defined(TARGET_IS_TM4C129_RA0) || \
  7521. defined(TARGET_IS_TM4C129_RA1) || \
  7522. defined(TARGET_IS_TM4C129_RA2)
  7523. #define ROM_USBHostRequestIN \
  7524. ((void (*)(uint32_t ui32Base, \
  7525. uint32_t ui32Endpoint))ROM_USBTABLE[33])
  7526. #endif
  7527. #if defined(TARGET_IS_TM4C123_RA1) || \
  7528. defined(TARGET_IS_TM4C123_RA3) || \
  7529. defined(TARGET_IS_TM4C123_RB1) || \
  7530. defined(TARGET_IS_TM4C123_RB2) || \
  7531. defined(TARGET_IS_TM4C129_RA0) || \
  7532. defined(TARGET_IS_TM4C129_RA1) || \
  7533. defined(TARGET_IS_TM4C129_RA2)
  7534. #define ROM_USBHostRequestStatus \
  7535. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[34])
  7536. #endif
  7537. #if defined(TARGET_IS_TM4C123_RA1) || \
  7538. defined(TARGET_IS_TM4C123_RA3) || \
  7539. defined(TARGET_IS_TM4C123_RB1) || \
  7540. defined(TARGET_IS_TM4C123_RB2) || \
  7541. defined(TARGET_IS_TM4C129_RA0) || \
  7542. defined(TARGET_IS_TM4C129_RA1) || \
  7543. defined(TARGET_IS_TM4C129_RA2)
  7544. #define ROM_USBHostReset \
  7545. ((void (*)(uint32_t ui32Base, \
  7546. bool bStart))ROM_USBTABLE[35])
  7547. #endif
  7548. #if defined(TARGET_IS_TM4C123_RA1) || \
  7549. defined(TARGET_IS_TM4C123_RA3) || \
  7550. defined(TARGET_IS_TM4C123_RB1) || \
  7551. defined(TARGET_IS_TM4C123_RB2) || \
  7552. defined(TARGET_IS_TM4C129_RA0) || \
  7553. defined(TARGET_IS_TM4C129_RA1) || \
  7554. defined(TARGET_IS_TM4C129_RA2)
  7555. #define ROM_USBHostResume \
  7556. ((void (*)(uint32_t ui32Base, \
  7557. bool bStart))ROM_USBTABLE[36])
  7558. #endif
  7559. #if defined(TARGET_IS_TM4C123_RA1) || \
  7560. defined(TARGET_IS_TM4C123_RA3) || \
  7561. defined(TARGET_IS_TM4C123_RB1) || \
  7562. defined(TARGET_IS_TM4C123_RB2) || \
  7563. defined(TARGET_IS_TM4C129_RA0) || \
  7564. defined(TARGET_IS_TM4C129_RA1) || \
  7565. defined(TARGET_IS_TM4C129_RA2)
  7566. #define ROM_USBHostSpeedGet \
  7567. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[37])
  7568. #endif
  7569. #if defined(TARGET_IS_TM4C123_RA1) || \
  7570. defined(TARGET_IS_TM4C123_RA3) || \
  7571. defined(TARGET_IS_TM4C123_RB1) || \
  7572. defined(TARGET_IS_TM4C123_RB2) || \
  7573. defined(TARGET_IS_TM4C129_RA0) || \
  7574. defined(TARGET_IS_TM4C129_RA1) || \
  7575. defined(TARGET_IS_TM4C129_RA2)
  7576. #define ROM_USBHostSuspend \
  7577. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[38])
  7578. #endif
  7579. #if defined(TARGET_IS_TM4C123_RA1) || \
  7580. defined(TARGET_IS_TM4C123_RA3) || \
  7581. defined(TARGET_IS_TM4C123_RB1) || \
  7582. defined(TARGET_IS_TM4C123_RB2) || \
  7583. defined(TARGET_IS_TM4C129_RA0) || \
  7584. defined(TARGET_IS_TM4C129_RA1) || \
  7585. defined(TARGET_IS_TM4C129_RA2)
  7586. #define ROM_USBDevEndpointConfigGet \
  7587. ((void (*)(uint32_t ui32Base, \
  7588. uint32_t ui32Endpoint, \
  7589. uint32_t *pui32MaxPacketSize, \
  7590. uint32_t *pui32Flags))ROM_USBTABLE[41])
  7591. #endif
  7592. #if defined(TARGET_IS_TM4C123_RA1) || \
  7593. defined(TARGET_IS_TM4C123_RA3) || \
  7594. defined(TARGET_IS_TM4C123_RB1) || \
  7595. defined(TARGET_IS_TM4C123_RB2) || \
  7596. defined(TARGET_IS_TM4C129_RA0) || \
  7597. defined(TARGET_IS_TM4C129_RA1) || \
  7598. defined(TARGET_IS_TM4C129_RA2)
  7599. #define ROM_USBEndpointDMAEnable \
  7600. ((void (*)(uint32_t ui32Base, \
  7601. uint32_t ui32Endpoint, \
  7602. uint32_t ui32Flags))ROM_USBTABLE[42])
  7603. #endif
  7604. #if defined(TARGET_IS_TM4C123_RA1) || \
  7605. defined(TARGET_IS_TM4C123_RA3) || \
  7606. defined(TARGET_IS_TM4C123_RB1) || \
  7607. defined(TARGET_IS_TM4C123_RB2) || \
  7608. defined(TARGET_IS_TM4C129_RA0) || \
  7609. defined(TARGET_IS_TM4C129_RA1) || \
  7610. defined(TARGET_IS_TM4C129_RA2)
  7611. #define ROM_USBEndpointDMADisable \
  7612. ((void (*)(uint32_t ui32Base, \
  7613. uint32_t ui32Endpoint, \
  7614. uint32_t ui32Flags))ROM_USBTABLE[43])
  7615. #endif
  7616. #if defined(TARGET_IS_TM4C123_RA1) || \
  7617. defined(TARGET_IS_TM4C123_RA3) || \
  7618. defined(TARGET_IS_TM4C123_RB1) || \
  7619. defined(TARGET_IS_TM4C123_RB2) || \
  7620. defined(TARGET_IS_TM4C129_RA0) || \
  7621. defined(TARGET_IS_TM4C129_RA1) || \
  7622. defined(TARGET_IS_TM4C129_RA2)
  7623. #define ROM_USBEndpointDataAvail \
  7624. ((uint32_t (*)(uint32_t ui32Base, \
  7625. uint32_t ui32Endpoint))ROM_USBTABLE[44])
  7626. #endif
  7627. #if defined(TARGET_IS_TM4C123_RA1) || \
  7628. defined(TARGET_IS_TM4C123_RA3) || \
  7629. defined(TARGET_IS_TM4C123_RB1) || \
  7630. defined(TARGET_IS_TM4C123_RB2) || \
  7631. defined(TARGET_IS_TM4C129_RA0) || \
  7632. defined(TARGET_IS_TM4C129_RA1) || \
  7633. defined(TARGET_IS_TM4C129_RA2)
  7634. #define ROM_USBModeGet \
  7635. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[46])
  7636. #endif
  7637. #if defined(TARGET_IS_TM4C123_RA1) || \
  7638. defined(TARGET_IS_TM4C123_RA3) || \
  7639. defined(TARGET_IS_TM4C123_RB1) || \
  7640. defined(TARGET_IS_TM4C123_RB2) || \
  7641. defined(TARGET_IS_TM4C129_RA0) || \
  7642. defined(TARGET_IS_TM4C129_RA1) || \
  7643. defined(TARGET_IS_TM4C129_RA2)
  7644. #define ROM_USBEndpointDMAChannel \
  7645. ((void (*)(uint32_t ui32Base, \
  7646. uint32_t ui32Endpoint, \
  7647. uint32_t ui32Channel))ROM_USBTABLE[47])
  7648. #endif
  7649. #if defined(TARGET_IS_TM4C123_RA1) || \
  7650. defined(TARGET_IS_TM4C123_RA3) || \
  7651. defined(TARGET_IS_TM4C123_RB1) || \
  7652. defined(TARGET_IS_TM4C123_RB2) || \
  7653. defined(TARGET_IS_TM4C129_RA0) || \
  7654. defined(TARGET_IS_TM4C129_RA1) || \
  7655. defined(TARGET_IS_TM4C129_RA2)
  7656. #define ROM_USBIntDisableControl \
  7657. ((void (*)(uint32_t ui32Base, \
  7658. uint32_t ui32IntFlags))ROM_USBTABLE[48])
  7659. #endif
  7660. #if defined(TARGET_IS_TM4C123_RA1) || \
  7661. defined(TARGET_IS_TM4C123_RA3) || \
  7662. defined(TARGET_IS_TM4C123_RB1) || \
  7663. defined(TARGET_IS_TM4C123_RB2) || \
  7664. defined(TARGET_IS_TM4C129_RA0) || \
  7665. defined(TARGET_IS_TM4C129_RA1) || \
  7666. defined(TARGET_IS_TM4C129_RA2)
  7667. #define ROM_USBIntEnableControl \
  7668. ((void (*)(uint32_t ui32Base, \
  7669. uint32_t ui32IntFlags))ROM_USBTABLE[49])
  7670. #endif
  7671. #if defined(TARGET_IS_TM4C123_RA1) || \
  7672. defined(TARGET_IS_TM4C123_RA3) || \
  7673. defined(TARGET_IS_TM4C123_RB1) || \
  7674. defined(TARGET_IS_TM4C123_RB2) || \
  7675. defined(TARGET_IS_TM4C129_RA0) || \
  7676. defined(TARGET_IS_TM4C129_RA1) || \
  7677. defined(TARGET_IS_TM4C129_RA2)
  7678. #define ROM_USBIntStatusControl \
  7679. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[50])
  7680. #endif
  7681. #if defined(TARGET_IS_TM4C123_RA1) || \
  7682. defined(TARGET_IS_TM4C123_RA3) || \
  7683. defined(TARGET_IS_TM4C123_RB1) || \
  7684. defined(TARGET_IS_TM4C123_RB2) || \
  7685. defined(TARGET_IS_TM4C129_RA0) || \
  7686. defined(TARGET_IS_TM4C129_RA1) || \
  7687. defined(TARGET_IS_TM4C129_RA2)
  7688. #define ROM_USBIntDisableEndpoint \
  7689. ((void (*)(uint32_t ui32Base, \
  7690. uint32_t ui32IntFlags))ROM_USBTABLE[51])
  7691. #endif
  7692. #if defined(TARGET_IS_TM4C123_RA1) || \
  7693. defined(TARGET_IS_TM4C123_RA3) || \
  7694. defined(TARGET_IS_TM4C123_RB1) || \
  7695. defined(TARGET_IS_TM4C123_RB2) || \
  7696. defined(TARGET_IS_TM4C129_RA0) || \
  7697. defined(TARGET_IS_TM4C129_RA1) || \
  7698. defined(TARGET_IS_TM4C129_RA2)
  7699. #define ROM_USBIntEnableEndpoint \
  7700. ((void (*)(uint32_t ui32Base, \
  7701. uint32_t ui32IntFlags))ROM_USBTABLE[52])
  7702. #endif
  7703. #if defined(TARGET_IS_TM4C123_RA1) || \
  7704. defined(TARGET_IS_TM4C123_RA3) || \
  7705. defined(TARGET_IS_TM4C123_RB1) || \
  7706. defined(TARGET_IS_TM4C123_RB2) || \
  7707. defined(TARGET_IS_TM4C129_RA0) || \
  7708. defined(TARGET_IS_TM4C129_RA1) || \
  7709. defined(TARGET_IS_TM4C129_RA2)
  7710. #define ROM_USBIntStatusEndpoint \
  7711. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[53])
  7712. #endif
  7713. #if defined(TARGET_IS_TM4C123_RA1) || \
  7714. defined(TARGET_IS_TM4C123_RA3) || \
  7715. defined(TARGET_IS_TM4C123_RB1) || \
  7716. defined(TARGET_IS_TM4C123_RB2) || \
  7717. defined(TARGET_IS_TM4C129_RA0) || \
  7718. defined(TARGET_IS_TM4C129_RA1) || \
  7719. defined(TARGET_IS_TM4C129_RA2)
  7720. #define ROM_USBHostMode \
  7721. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[54])
  7722. #endif
  7723. #if defined(TARGET_IS_TM4C123_RA1) || \
  7724. defined(TARGET_IS_TM4C123_RA3) || \
  7725. defined(TARGET_IS_TM4C123_RB1) || \
  7726. defined(TARGET_IS_TM4C123_RB2) || \
  7727. defined(TARGET_IS_TM4C129_RA0) || \
  7728. defined(TARGET_IS_TM4C129_RA1) || \
  7729. defined(TARGET_IS_TM4C129_RA2)
  7730. #define ROM_USBDevMode \
  7731. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[55])
  7732. #endif
  7733. #if defined(TARGET_IS_TM4C123_RA1) || \
  7734. defined(TARGET_IS_TM4C123_RA3) || \
  7735. defined(TARGET_IS_TM4C123_RB1) || \
  7736. defined(TARGET_IS_TM4C123_RB2) || \
  7737. defined(TARGET_IS_TM4C129_RA0) || \
  7738. defined(TARGET_IS_TM4C129_RA1) || \
  7739. defined(TARGET_IS_TM4C129_RA2)
  7740. #define ROM_USBPHYPowerOff \
  7741. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[56])
  7742. #endif
  7743. #if defined(TARGET_IS_TM4C123_RA1) || \
  7744. defined(TARGET_IS_TM4C123_RA3) || \
  7745. defined(TARGET_IS_TM4C123_RB1) || \
  7746. defined(TARGET_IS_TM4C123_RB2) || \
  7747. defined(TARGET_IS_TM4C129_RA0) || \
  7748. defined(TARGET_IS_TM4C129_RA1) || \
  7749. defined(TARGET_IS_TM4C129_RA2)
  7750. #define ROM_USBPHYPowerOn \
  7751. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[57])
  7752. #endif
  7753. #if defined(TARGET_IS_TM4C123_RA3) || \
  7754. defined(TARGET_IS_TM4C123_RB1) || \
  7755. defined(TARGET_IS_TM4C123_RB2) || \
  7756. defined(TARGET_IS_TM4C129_RA0) || \
  7757. defined(TARGET_IS_TM4C129_RA1) || \
  7758. defined(TARGET_IS_TM4C129_RA2)
  7759. #define ROM_UpdateUSB \
  7760. ((void (*)(uint8_t *pui8DescriptorInfo))ROM_USBTABLE[58])
  7761. #endif
  7762. #if defined(TARGET_IS_TM4C123_RA1) || \
  7763. defined(TARGET_IS_TM4C123_RA3) || \
  7764. defined(TARGET_IS_TM4C123_RB1) || \
  7765. defined(TARGET_IS_TM4C123_RB2) || \
  7766. defined(TARGET_IS_TM4C129_RA0) || \
  7767. defined(TARGET_IS_TM4C129_RA1) || \
  7768. defined(TARGET_IS_TM4C129_RA2)
  7769. #define ROM_USBOTGMode \
  7770. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[59])
  7771. #endif
  7772. #if defined(TARGET_IS_TM4C123_RB1) || \
  7773. defined(TARGET_IS_TM4C129_RA0) || \
  7774. defined(TARGET_IS_TM4C129_RA1) || \
  7775. defined(TARGET_IS_TM4C129_RA2)
  7776. #define ROM_USBHostRequestINClear \
  7777. ((void (*)(uint32_t ui32Base, \
  7778. uint32_t ui32Endpoint))ROM_USBTABLE[60])
  7779. #endif
  7780. #if defined(TARGET_IS_TM4C123_RB1) || \
  7781. defined(TARGET_IS_TM4C129_RA0) || \
  7782. defined(TARGET_IS_TM4C129_RA1) || \
  7783. defined(TARGET_IS_TM4C129_RA2)
  7784. #define ROM_USBNumEndpointsGet \
  7785. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[61])
  7786. #endif
  7787. #if defined(TARGET_IS_TM4C129_RA0) || \
  7788. defined(TARGET_IS_TM4C129_RA1) || \
  7789. defined(TARGET_IS_TM4C129_RA2)
  7790. #define ROM_USBClockDisable \
  7791. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[62])
  7792. #endif
  7793. #if defined(TARGET_IS_TM4C129_RA0) || \
  7794. defined(TARGET_IS_TM4C129_RA1) || \
  7795. defined(TARGET_IS_TM4C129_RA2)
  7796. #define ROM_USBClockEnable \
  7797. ((void (*)(uint32_t ui32Base, \
  7798. uint32_t ui32Div, \
  7799. uint32_t ui32Flags))ROM_USBTABLE[63])
  7800. #endif
  7801. #if defined(TARGET_IS_TM4C129_RA0) || \
  7802. defined(TARGET_IS_TM4C129_RA1) || \
  7803. defined(TARGET_IS_TM4C129_RA2)
  7804. #define ROM_USBControllerVersion \
  7805. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[64])
  7806. #endif
  7807. #if defined(TARGET_IS_TM4C129_RA0) || \
  7808. defined(TARGET_IS_TM4C129_RA1) || \
  7809. defined(TARGET_IS_TM4C129_RA2)
  7810. #define ROM_USBDevLPMConfig \
  7811. ((void (*)(uint32_t ui32Base, \
  7812. uint32_t ui32Config))ROM_USBTABLE[65])
  7813. #endif
  7814. #if defined(TARGET_IS_TM4C129_RA0) || \
  7815. defined(TARGET_IS_TM4C129_RA1) || \
  7816. defined(TARGET_IS_TM4C129_RA2)
  7817. #define ROM_USBDevLPMDisable \
  7818. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[66])
  7819. #endif
  7820. #if defined(TARGET_IS_TM4C123_RB1) || \
  7821. defined(TARGET_IS_TM4C129_RA0) || \
  7822. defined(TARGET_IS_TM4C129_RA1) || \
  7823. defined(TARGET_IS_TM4C129_RA2)
  7824. #define ROM_USBDevLPMEnable \
  7825. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[67])
  7826. #endif
  7827. #if defined(TARGET_IS_TM4C129_RA0) || \
  7828. defined(TARGET_IS_TM4C129_RA1) || \
  7829. defined(TARGET_IS_TM4C129_RA2)
  7830. #define ROM_USBDevLPMRemoteWake \
  7831. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[68])
  7832. #endif
  7833. #if defined(TARGET_IS_TM4C129_RA0) || \
  7834. defined(TARGET_IS_TM4C129_RA1) || \
  7835. defined(TARGET_IS_TM4C129_RA2)
  7836. #define ROM_USBDevSpeedGet \
  7837. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[69])
  7838. #endif
  7839. #if defined(TARGET_IS_TM4C129_RA0) || \
  7840. defined(TARGET_IS_TM4C129_RA1) || \
  7841. defined(TARGET_IS_TM4C129_RA2)
  7842. #define ROM_USBDMAChannelAddressGet \
  7843. ((void * (*)(uint32_t ui32Base, \
  7844. uint32_t ui32Channel))ROM_USBTABLE[70])
  7845. #endif
  7846. #if defined(TARGET_IS_TM4C129_RA0) || \
  7847. defined(TARGET_IS_TM4C129_RA1) || \
  7848. defined(TARGET_IS_TM4C129_RA2)
  7849. #define ROM_USBDMAChannelAddressSet \
  7850. ((void (*)(uint32_t ui32Base, \
  7851. uint32_t ui32Channel, \
  7852. void *pvAddress))ROM_USBTABLE[71])
  7853. #endif
  7854. #if defined(TARGET_IS_TM4C129_RA0) || \
  7855. defined(TARGET_IS_TM4C129_RA1) || \
  7856. defined(TARGET_IS_TM4C129_RA2)
  7857. #define ROM_USBDMAChannelConfigSet \
  7858. ((void (*)(uint32_t ui32Base, \
  7859. uint32_t ui32Channel, \
  7860. uint32_t ui32Endpoint, \
  7861. uint32_t ui32Config))ROM_USBTABLE[72])
  7862. #endif
  7863. #if defined(TARGET_IS_TM4C129_RA0) || \
  7864. defined(TARGET_IS_TM4C129_RA1) || \
  7865. defined(TARGET_IS_TM4C129_RA2)
  7866. #define ROM_USBDMAChannelDisable \
  7867. ((void (*)(uint32_t ui32Base, \
  7868. uint32_t ui32Channel))ROM_USBTABLE[73])
  7869. #endif
  7870. #if defined(TARGET_IS_TM4C129_RA0) || \
  7871. defined(TARGET_IS_TM4C129_RA1) || \
  7872. defined(TARGET_IS_TM4C129_RA2)
  7873. #define ROM_USBDMAChannelEnable \
  7874. ((void (*)(uint32_t ui32Base, \
  7875. uint32_t ui32Channel))ROM_USBTABLE[74])
  7876. #endif
  7877. #if defined(TARGET_IS_TM4C129_RA0) || \
  7878. defined(TARGET_IS_TM4C129_RA1) || \
  7879. defined(TARGET_IS_TM4C129_RA2)
  7880. #define ROM_USBDMAChannelIntDisable \
  7881. ((void (*)(uint32_t ui32Base, \
  7882. uint32_t ui32Channel))ROM_USBTABLE[75])
  7883. #endif
  7884. #if defined(TARGET_IS_TM4C129_RA0) || \
  7885. defined(TARGET_IS_TM4C129_RA1) || \
  7886. defined(TARGET_IS_TM4C129_RA2)
  7887. #define ROM_USBDMAChannelIntEnable \
  7888. ((void (*)(uint32_t ui32Base, \
  7889. uint32_t ui32Channel))ROM_USBTABLE[76])
  7890. #endif
  7891. #if defined(TARGET_IS_TM4C129_RA0) || \
  7892. defined(TARGET_IS_TM4C129_RA1) || \
  7893. defined(TARGET_IS_TM4C129_RA2)
  7894. #define ROM_USBDMAChannelCountGet \
  7895. ((uint32_t (*)(uint32_t ui32Base, \
  7896. uint32_t ui32Channel))ROM_USBTABLE[77])
  7897. #endif
  7898. #if defined(TARGET_IS_TM4C129_RA0) || \
  7899. defined(TARGET_IS_TM4C129_RA1) || \
  7900. defined(TARGET_IS_TM4C129_RA2)
  7901. #define ROM_USBDMAChannelCountSet \
  7902. ((void (*)(uint32_t ui32Base, \
  7903. uint32_t ui32Count, \
  7904. uint32_t ui32Channel))ROM_USBTABLE[78])
  7905. #endif
  7906. #if defined(TARGET_IS_TM4C129_RA0) || \
  7907. defined(TARGET_IS_TM4C129_RA1) || \
  7908. defined(TARGET_IS_TM4C129_RA2)
  7909. #define ROM_USBDMAChannelIntStatus \
  7910. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[79])
  7911. #endif
  7912. #if defined(TARGET_IS_TM4C129_RA0) || \
  7913. defined(TARGET_IS_TM4C129_RA1) || \
  7914. defined(TARGET_IS_TM4C129_RA2)
  7915. #define ROM_USBDMAChannelStatus \
  7916. ((uint32_t (*)(uint32_t ui32Base, \
  7917. uint32_t ui32Channel))ROM_USBTABLE[80])
  7918. #endif
  7919. #if defined(TARGET_IS_TM4C129_RA0) || \
  7920. defined(TARGET_IS_TM4C129_RA1) || \
  7921. defined(TARGET_IS_TM4C129_RA2)
  7922. #define ROM_USBDMAChannelStatusClear \
  7923. ((void (*)(uint32_t ui32Base, \
  7924. uint32_t ui32Channel, \
  7925. uint32_t ui32Status))ROM_USBTABLE[81])
  7926. #endif
  7927. #if defined(TARGET_IS_TM4C129_RA0) || \
  7928. defined(TARGET_IS_TM4C129_RA1) || \
  7929. defined(TARGET_IS_TM4C129_RA2)
  7930. #define ROM_USBHighSpeed \
  7931. ((void (*)(uint32_t ui32Base, \
  7932. bool bEnable))ROM_USBTABLE[82])
  7933. #endif
  7934. #if defined(TARGET_IS_TM4C129_RA0) || \
  7935. defined(TARGET_IS_TM4C129_RA1) || \
  7936. defined(TARGET_IS_TM4C129_RA2)
  7937. #define ROM_USBHostEndpointPing \
  7938. ((void (*)(uint32_t ui32Base, \
  7939. uint32_t ui32Endpoint, \
  7940. bool bEnable))ROM_USBTABLE[83])
  7941. #endif
  7942. #if defined(TARGET_IS_TM4C129_RA0) || \
  7943. defined(TARGET_IS_TM4C129_RA1) || \
  7944. defined(TARGET_IS_TM4C129_RA2)
  7945. #define ROM_USBHostEndpointSpeed \
  7946. ((void (*)(uint32_t ui32Base, \
  7947. uint32_t ui32Endpoint, \
  7948. uint32_t ui32Flags))ROM_USBTABLE[84])
  7949. #endif
  7950. #if defined(TARGET_IS_TM4C129_RA0) || \
  7951. defined(TARGET_IS_TM4C129_RA1) || \
  7952. defined(TARGET_IS_TM4C129_RA2)
  7953. #define ROM_USBHostLPMConfig \
  7954. ((void (*)(uint32_t ui32Base, \
  7955. uint32_t ui32ResumeTime, \
  7956. uint32_t ui32Config))ROM_USBTABLE[85])
  7957. #endif
  7958. #if defined(TARGET_IS_TM4C129_RA0) || \
  7959. defined(TARGET_IS_TM4C129_RA1) || \
  7960. defined(TARGET_IS_TM4C129_RA2)
  7961. #define ROM_USBHostLPMResume \
  7962. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[86])
  7963. #endif
  7964. #if defined(TARGET_IS_TM4C129_RA0) || \
  7965. defined(TARGET_IS_TM4C129_RA1) || \
  7966. defined(TARGET_IS_TM4C129_RA2)
  7967. #define ROM_USBHostLPMSend \
  7968. ((void (*)(uint32_t ui32Base, \
  7969. uint32_t ui32Address, \
  7970. uint32_t uiEndpoint))ROM_USBTABLE[87])
  7971. #endif
  7972. #if defined(TARGET_IS_TM4C129_RA0) || \
  7973. defined(TARGET_IS_TM4C129_RA1) || \
  7974. defined(TARGET_IS_TM4C129_RA2)
  7975. #define ROM_USBLPMIntDisable \
  7976. ((void (*)(uint32_t ui32Base, \
  7977. uint32_t ui32Ints))ROM_USBTABLE[88])
  7978. #endif
  7979. #if defined(TARGET_IS_TM4C129_RA0) || \
  7980. defined(TARGET_IS_TM4C129_RA1) || \
  7981. defined(TARGET_IS_TM4C129_RA2)
  7982. #define ROM_USBLPMIntEnable \
  7983. ((void (*)(uint32_t ui32Base, \
  7984. uint32_t ui32Ints))ROM_USBTABLE[89])
  7985. #endif
  7986. #if defined(TARGET_IS_TM4C129_RA0) || \
  7987. defined(TARGET_IS_TM4C129_RA1) || \
  7988. defined(TARGET_IS_TM4C129_RA2)
  7989. #define ROM_USBLPMIntStatus \
  7990. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[90])
  7991. #endif
  7992. #if defined(TARGET_IS_TM4C129_RA0) || \
  7993. defined(TARGET_IS_TM4C129_RA1) || \
  7994. defined(TARGET_IS_TM4C129_RA2)
  7995. #define ROM_USBLPMLinkStateGet \
  7996. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[91])
  7997. #endif
  7998. #if defined(TARGET_IS_TM4C129_RA0) || \
  7999. defined(TARGET_IS_TM4C129_RA1) || \
  8000. defined(TARGET_IS_TM4C129_RA2)
  8001. #define ROM_USBEndpointPacketCountSet \
  8002. ((void (*)(uint32_t ui32Base, \
  8003. uint32_t ui32Endpoint, \
  8004. uint32_t ui32Count))ROM_USBTABLE[92])
  8005. #endif
  8006. #if defined(TARGET_IS_TM4C129_RA0) || \
  8007. defined(TARGET_IS_TM4C129_RA1) || \
  8008. defined(TARGET_IS_TM4C129_RA2)
  8009. #define ROM_USBULPIConfig \
  8010. ((void (*)(uint32_t ui32Base, \
  8011. uint32_t ui32Config))ROM_USBTABLE[93])
  8012. #endif
  8013. #if defined(TARGET_IS_TM4C129_RA0) || \
  8014. defined(TARGET_IS_TM4C129_RA1) || \
  8015. defined(TARGET_IS_TM4C129_RA2)
  8016. #define ROM_USBULPIDisable \
  8017. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[94])
  8018. #endif
  8019. #if defined(TARGET_IS_TM4C129_RA0) || \
  8020. defined(TARGET_IS_TM4C129_RA1) || \
  8021. defined(TARGET_IS_TM4C129_RA2)
  8022. #define ROM_USBULPIEnable \
  8023. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[95])
  8024. #endif
  8025. #if defined(TARGET_IS_TM4C129_RA0) || \
  8026. defined(TARGET_IS_TM4C129_RA1) || \
  8027. defined(TARGET_IS_TM4C129_RA2)
  8028. #define ROM_USBULPIRegRead \
  8029. ((uint8_t (*)(uint32_t ui32Base, \
  8030. uint8_t ui8Reg))ROM_USBTABLE[96])
  8031. #endif
  8032. #if defined(TARGET_IS_TM4C129_RA0) || \
  8033. defined(TARGET_IS_TM4C129_RA1) || \
  8034. defined(TARGET_IS_TM4C129_RA2)
  8035. #define ROM_USBULPIRegWrite \
  8036. ((void (*)(uint32_t ui32Base, \
  8037. uint8_t ui8Reg, \
  8038. uint8_t ui8Data))ROM_USBTABLE[97])
  8039. #endif
  8040. #if defined(TARGET_IS_TM4C129_RA0) || \
  8041. defined(TARGET_IS_TM4C129_RA1) || \
  8042. defined(TARGET_IS_TM4C129_RA2)
  8043. #define ROM_USBOTGSessionRequest \
  8044. ((void (*)(uint32_t ui32Base, \
  8045. bool bStart))ROM_USBTABLE[98])
  8046. #endif
  8047. #if defined(TARGET_IS_TM4C129_RA1) || \
  8048. defined(TARGET_IS_TM4C129_RA2)
  8049. #define ROM_USBDMANumChannels \
  8050. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[99])
  8051. #endif
  8052. #if defined(TARGET_IS_TM4C129_RA1) || \
  8053. defined(TARGET_IS_TM4C129_RA2)
  8054. #define ROM_USBEndpointDMAConfigSet \
  8055. ((void (*)(uint32_t ui32Base, \
  8056. uint32_t ui32Endpoint, \
  8057. uint32_t ui32Config))ROM_USBTABLE[100])
  8058. #endif
  8059. #if defined(TARGET_IS_TM4C129_RA1) || \
  8060. defined(TARGET_IS_TM4C129_RA2)
  8061. #define ROM_USBLPMRemoteWakeEnabled \
  8062. ((bool (*)(uint32_t ui32Base))ROM_USBTABLE[102])
  8063. #endif
  8064. #if defined(TARGET_IS_TM4C129_RA0) || \
  8065. defined(TARGET_IS_TM4C129_RA1) || \
  8066. defined(TARGET_IS_TM4C129_RA2)
  8067. #define ROM_USBModeConfig \
  8068. ((void (*)(uint32_t ui32Base, \
  8069. uint32_t ui32Mode))ROM_USBTABLE[103])
  8070. #endif
  8071. //*****************************************************************************
  8072. //
  8073. // Macros for calling ROM functions in the Watchdog API.
  8074. //
  8075. //*****************************************************************************
  8076. #if defined(TARGET_IS_TM4C123_RA1) || \
  8077. defined(TARGET_IS_TM4C123_RA3) || \
  8078. defined(TARGET_IS_TM4C123_RB1) || \
  8079. defined(TARGET_IS_TM4C123_RB2) || \
  8080. defined(TARGET_IS_TM4C129_RA0) || \
  8081. defined(TARGET_IS_TM4C129_RA1) || \
  8082. defined(TARGET_IS_TM4C129_RA2)
  8083. #define ROM_WatchdogIntClear \
  8084. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[0])
  8085. #endif
  8086. #if defined(TARGET_IS_TM4C123_RA1) || \
  8087. defined(TARGET_IS_TM4C123_RA3) || \
  8088. defined(TARGET_IS_TM4C123_RB1) || \
  8089. defined(TARGET_IS_TM4C123_RB2) || \
  8090. defined(TARGET_IS_TM4C129_RA0) || \
  8091. defined(TARGET_IS_TM4C129_RA1) || \
  8092. defined(TARGET_IS_TM4C129_RA2)
  8093. #define ROM_WatchdogRunning \
  8094. ((bool (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[1])
  8095. #endif
  8096. #if defined(TARGET_IS_TM4C123_RA1) || \
  8097. defined(TARGET_IS_TM4C123_RA3) || \
  8098. defined(TARGET_IS_TM4C123_RB1) || \
  8099. defined(TARGET_IS_TM4C123_RB2) || \
  8100. defined(TARGET_IS_TM4C129_RA0) || \
  8101. defined(TARGET_IS_TM4C129_RA1) || \
  8102. defined(TARGET_IS_TM4C129_RA2)
  8103. #define ROM_WatchdogEnable \
  8104. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[2])
  8105. #endif
  8106. #if defined(TARGET_IS_TM4C123_RA1) || \
  8107. defined(TARGET_IS_TM4C123_RA3) || \
  8108. defined(TARGET_IS_TM4C123_RB1) || \
  8109. defined(TARGET_IS_TM4C123_RB2) || \
  8110. defined(TARGET_IS_TM4C129_RA0) || \
  8111. defined(TARGET_IS_TM4C129_RA1) || \
  8112. defined(TARGET_IS_TM4C129_RA2)
  8113. #define ROM_WatchdogResetEnable \
  8114. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[3])
  8115. #endif
  8116. #if defined(TARGET_IS_TM4C123_RA1) || \
  8117. defined(TARGET_IS_TM4C123_RA3) || \
  8118. defined(TARGET_IS_TM4C123_RB1) || \
  8119. defined(TARGET_IS_TM4C123_RB2) || \
  8120. defined(TARGET_IS_TM4C129_RA0) || \
  8121. defined(TARGET_IS_TM4C129_RA1) || \
  8122. defined(TARGET_IS_TM4C129_RA2)
  8123. #define ROM_WatchdogResetDisable \
  8124. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[4])
  8125. #endif
  8126. #if defined(TARGET_IS_TM4C123_RA1) || \
  8127. defined(TARGET_IS_TM4C123_RA3) || \
  8128. defined(TARGET_IS_TM4C123_RB1) || \
  8129. defined(TARGET_IS_TM4C123_RB2) || \
  8130. defined(TARGET_IS_TM4C129_RA0) || \
  8131. defined(TARGET_IS_TM4C129_RA1) || \
  8132. defined(TARGET_IS_TM4C129_RA2)
  8133. #define ROM_WatchdogLock \
  8134. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[5])
  8135. #endif
  8136. #if defined(TARGET_IS_TM4C123_RA1) || \
  8137. defined(TARGET_IS_TM4C123_RA3) || \
  8138. defined(TARGET_IS_TM4C123_RB1) || \
  8139. defined(TARGET_IS_TM4C123_RB2) || \
  8140. defined(TARGET_IS_TM4C129_RA0) || \
  8141. defined(TARGET_IS_TM4C129_RA1) || \
  8142. defined(TARGET_IS_TM4C129_RA2)
  8143. #define ROM_WatchdogUnlock \
  8144. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[6])
  8145. #endif
  8146. #if defined(TARGET_IS_TM4C123_RA1) || \
  8147. defined(TARGET_IS_TM4C123_RA3) || \
  8148. defined(TARGET_IS_TM4C123_RB1) || \
  8149. defined(TARGET_IS_TM4C123_RB2) || \
  8150. defined(TARGET_IS_TM4C129_RA0) || \
  8151. defined(TARGET_IS_TM4C129_RA1) || \
  8152. defined(TARGET_IS_TM4C129_RA2)
  8153. #define ROM_WatchdogLockState \
  8154. ((bool (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[7])
  8155. #endif
  8156. #if defined(TARGET_IS_TM4C123_RA1) || \
  8157. defined(TARGET_IS_TM4C123_RA3) || \
  8158. defined(TARGET_IS_TM4C123_RB1) || \
  8159. defined(TARGET_IS_TM4C123_RB2) || \
  8160. defined(TARGET_IS_TM4C129_RA0) || \
  8161. defined(TARGET_IS_TM4C129_RA1) || \
  8162. defined(TARGET_IS_TM4C129_RA2)
  8163. #define ROM_WatchdogReloadSet \
  8164. ((void (*)(uint32_t ui32Base, \
  8165. uint32_t ui32LoadVal))ROM_WATCHDOGTABLE[8])
  8166. #endif
  8167. #if defined(TARGET_IS_TM4C123_RA1) || \
  8168. defined(TARGET_IS_TM4C123_RA3) || \
  8169. defined(TARGET_IS_TM4C123_RB1) || \
  8170. defined(TARGET_IS_TM4C123_RB2) || \
  8171. defined(TARGET_IS_TM4C129_RA0) || \
  8172. defined(TARGET_IS_TM4C129_RA1) || \
  8173. defined(TARGET_IS_TM4C129_RA2)
  8174. #define ROM_WatchdogReloadGet \
  8175. ((uint32_t (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[9])
  8176. #endif
  8177. #if defined(TARGET_IS_TM4C123_RA1) || \
  8178. defined(TARGET_IS_TM4C123_RA3) || \
  8179. defined(TARGET_IS_TM4C123_RB1) || \
  8180. defined(TARGET_IS_TM4C123_RB2) || \
  8181. defined(TARGET_IS_TM4C129_RA0) || \
  8182. defined(TARGET_IS_TM4C129_RA1) || \
  8183. defined(TARGET_IS_TM4C129_RA2)
  8184. #define ROM_WatchdogValueGet \
  8185. ((uint32_t (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[10])
  8186. #endif
  8187. #if defined(TARGET_IS_TM4C123_RA1) || \
  8188. defined(TARGET_IS_TM4C123_RA3) || \
  8189. defined(TARGET_IS_TM4C123_RB1) || \
  8190. defined(TARGET_IS_TM4C123_RB2) || \
  8191. defined(TARGET_IS_TM4C129_RA0) || \
  8192. defined(TARGET_IS_TM4C129_RA1) || \
  8193. defined(TARGET_IS_TM4C129_RA2)
  8194. #define ROM_WatchdogIntEnable \
  8195. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[11])
  8196. #endif
  8197. #if defined(TARGET_IS_TM4C123_RA1) || \
  8198. defined(TARGET_IS_TM4C123_RA3) || \
  8199. defined(TARGET_IS_TM4C123_RB1) || \
  8200. defined(TARGET_IS_TM4C123_RB2) || \
  8201. defined(TARGET_IS_TM4C129_RA0) || \
  8202. defined(TARGET_IS_TM4C129_RA1) || \
  8203. defined(TARGET_IS_TM4C129_RA2)
  8204. #define ROM_WatchdogIntStatus \
  8205. ((uint32_t (*)(uint32_t ui32Base, \
  8206. bool bMasked))ROM_WATCHDOGTABLE[12])
  8207. #endif
  8208. #if defined(TARGET_IS_TM4C123_RA1) || \
  8209. defined(TARGET_IS_TM4C123_RA3) || \
  8210. defined(TARGET_IS_TM4C123_RB1) || \
  8211. defined(TARGET_IS_TM4C123_RB2) || \
  8212. defined(TARGET_IS_TM4C129_RA0) || \
  8213. defined(TARGET_IS_TM4C129_RA1) || \
  8214. defined(TARGET_IS_TM4C129_RA2)
  8215. #define ROM_WatchdogStallEnable \
  8216. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[13])
  8217. #endif
  8218. #if defined(TARGET_IS_TM4C123_RA1) || \
  8219. defined(TARGET_IS_TM4C123_RA3) || \
  8220. defined(TARGET_IS_TM4C123_RB1) || \
  8221. defined(TARGET_IS_TM4C123_RB2) || \
  8222. defined(TARGET_IS_TM4C129_RA0) || \
  8223. defined(TARGET_IS_TM4C129_RA1) || \
  8224. defined(TARGET_IS_TM4C129_RA2)
  8225. #define ROM_WatchdogStallDisable \
  8226. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[14])
  8227. #endif
  8228. #if defined(TARGET_IS_TM4C123_RA1) || \
  8229. defined(TARGET_IS_TM4C123_RA3) || \
  8230. defined(TARGET_IS_TM4C123_RB1) || \
  8231. defined(TARGET_IS_TM4C123_RB2) || \
  8232. defined(TARGET_IS_TM4C129_RA0) || \
  8233. defined(TARGET_IS_TM4C129_RA1) || \
  8234. defined(TARGET_IS_TM4C129_RA2)
  8235. #define ROM_WatchdogIntTypeSet \
  8236. ((void (*)(uint32_t ui32Base, \
  8237. uint32_t ui32Type))ROM_WATCHDOGTABLE[15])
  8238. #endif
  8239. //*****************************************************************************
  8240. //
  8241. // Macros for calling ROM functions in the Software API.
  8242. //
  8243. //*****************************************************************************
  8244. #if defined(TARGET_IS_TM4C123_RA1) || \
  8245. defined(TARGET_IS_TM4C123_RA3) || \
  8246. defined(TARGET_IS_TM4C123_RB1) || \
  8247. defined(TARGET_IS_TM4C123_RB2) || \
  8248. defined(TARGET_IS_TM4C129_RA0) || \
  8249. defined(TARGET_IS_TM4C129_RA1) || \
  8250. defined(TARGET_IS_TM4C129_RA2)
  8251. #define ROM_Crc16Array \
  8252. ((uint16_t (*)(uint32_t ui32WordLen, \
  8253. const uint32_t *pui32Data))ROM_SOFTWARETABLE[1])
  8254. #endif
  8255. #if defined(TARGET_IS_TM4C123_RA1) || \
  8256. defined(TARGET_IS_TM4C123_RA3) || \
  8257. defined(TARGET_IS_TM4C123_RB1) || \
  8258. defined(TARGET_IS_TM4C123_RB2) || \
  8259. defined(TARGET_IS_TM4C129_RA0) || \
  8260. defined(TARGET_IS_TM4C129_RA1) || \
  8261. defined(TARGET_IS_TM4C129_RA2)
  8262. #define ROM_Crc16Array3 \
  8263. ((void (*)(uint32_t ui32WordLen, \
  8264. const uint32_t *pui32Data, \
  8265. uint16_t *pui16Crc3))ROM_SOFTWARETABLE[2])
  8266. #endif
  8267. #if defined(TARGET_IS_TM4C123_RA1) || \
  8268. defined(TARGET_IS_TM4C123_RA3) || \
  8269. defined(TARGET_IS_TM4C123_RB1) || \
  8270. defined(TARGET_IS_TM4C123_RB2) || \
  8271. defined(TARGET_IS_TM4C129_RA0) || \
  8272. defined(TARGET_IS_TM4C129_RA1) || \
  8273. defined(TARGET_IS_TM4C129_RA2)
  8274. #define ROM_Crc16 \
  8275. ((uint16_t (*)(uint16_t ui16Crc, \
  8276. const uint8_t *pui8Data, \
  8277. uint32_t ui32Count))ROM_SOFTWARETABLE[3])
  8278. #endif
  8279. #if defined(TARGET_IS_TM4C123_RA1) || \
  8280. defined(TARGET_IS_TM4C123_RA3) || \
  8281. defined(TARGET_IS_TM4C123_RB1) || \
  8282. defined(TARGET_IS_TM4C123_RB2) || \
  8283. defined(TARGET_IS_TM4C129_RA0) || \
  8284. defined(TARGET_IS_TM4C129_RA1) || \
  8285. defined(TARGET_IS_TM4C129_RA2)
  8286. #define ROM_Crc8CCITT \
  8287. ((uint8_t (*)(uint8_t ui8Crc, \
  8288. const uint8_t *pui8Data, \
  8289. uint32_t ui32Count))ROM_SOFTWARETABLE[4])
  8290. #endif
  8291. #if defined(TARGET_IS_TM4C129_RA0) || \
  8292. defined(TARGET_IS_TM4C129_RA1) || \
  8293. defined(TARGET_IS_TM4C129_RA2)
  8294. #define ROM_Crc32 \
  8295. ((uint32_t (*)(uint32_t ui32Crc, \
  8296. const uint8_t *pui8Data, \
  8297. uint32_t ui32Count))ROM_SOFTWARETABLE[5])
  8298. #endif
  8299. #if defined(TARGET_IS_TM4C123_RA1) || \
  8300. defined(TARGET_IS_TM4C123_RA3) || \
  8301. defined(TARGET_IS_TM4C123_RB1) || \
  8302. defined(TARGET_IS_TM4C123_RB2) || \
  8303. defined(TARGET_IS_TM4C129_RA0) || \
  8304. defined(TARGET_IS_TM4C129_RA1) || \
  8305. defined(TARGET_IS_TM4C129_RA2)
  8306. #define ROM_pvAESTable \
  8307. ((void *)&(ROM_SOFTWARETABLE[7]))
  8308. #endif
  8309. #endif // __DRIVERLIB_ROM_H__