hwtimer.c 8.5 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2015-08-31 heyuanjie87 first version
  9. */
  10. #include <rtdevice.h>
  11. #include <rthw.h>
  12. #define DBG_TAG "hwtimer"
  13. #define DBG_LVL DBG_INFO
  14. #include <rtdbg.h>
  15. rt_inline rt_uint32_t timeout_calc(rt_hwtimer_t *timer, rt_hwtimerval_t *tv)
  16. {
  17. float overflow;
  18. float timeout;
  19. rt_uint32_t counter;
  20. int i, index = 0;
  21. float tv_sec;
  22. float devi_min = 1;
  23. float devi;
  24. /* changed to second */
  25. overflow = timer->info->maxcnt/(float)timer->freq;
  26. tv_sec = tv->sec + tv->usec/(float)1000000;
  27. if (tv_sec < (1/(float)timer->freq))
  28. {
  29. /* little timeout */
  30. i = 0;
  31. timeout = 1/(float)timer->freq;
  32. }
  33. else
  34. {
  35. for (i = 1; i > 0; i ++)
  36. {
  37. timeout = tv_sec/i;
  38. if (timeout <= overflow)
  39. {
  40. counter = (rt_uint32_t)(timeout * timer->freq);
  41. devi = tv_sec - (counter / (float)timer->freq) * i;
  42. /* Minimum calculation error */
  43. if (devi > devi_min)
  44. {
  45. i = index;
  46. timeout = tv_sec/i;
  47. break;
  48. }
  49. else if (devi == 0)
  50. {
  51. break;
  52. }
  53. else if (devi < devi_min)
  54. {
  55. devi_min = devi;
  56. index = i;
  57. }
  58. }
  59. }
  60. }
  61. timer->cycles = i;
  62. timer->reload = i;
  63. timer->period_sec = timeout;
  64. counter = (rt_uint32_t)(timeout * timer->freq);
  65. return counter;
  66. }
  67. static rt_err_t rt_hwtimer_init(struct rt_device *dev)
  68. {
  69. rt_err_t result = RT_EOK;
  70. rt_hwtimer_t *timer;
  71. timer = (rt_hwtimer_t *)dev;
  72. /* try to change to 1MHz */
  73. if ((1000000 <= timer->info->maxfreq) && (1000000 >= timer->info->minfreq))
  74. {
  75. timer->freq = 1000000;
  76. }
  77. else
  78. {
  79. timer->freq = timer->info->minfreq;
  80. }
  81. timer->mode = HWTIMER_MODE_ONESHOT;
  82. timer->cycles = 0;
  83. timer->overflow = 0;
  84. if (timer->ops->init)
  85. {
  86. timer->ops->init(timer, 1);
  87. }
  88. else
  89. {
  90. result = -RT_ENOSYS;
  91. }
  92. return result;
  93. }
  94. static rt_err_t rt_hwtimer_open(struct rt_device *dev, rt_uint16_t oflag)
  95. {
  96. rt_err_t result = RT_EOK;
  97. rt_hwtimer_t *timer;
  98. timer = (rt_hwtimer_t *)dev;
  99. if (timer->ops->control != RT_NULL)
  100. {
  101. timer->ops->control(timer, HWTIMER_CTRL_FREQ_SET, &timer->freq);
  102. }
  103. else
  104. {
  105. result = -RT_ENOSYS;
  106. }
  107. return result;
  108. }
  109. static rt_err_t rt_hwtimer_close(struct rt_device *dev)
  110. {
  111. rt_err_t result = RT_EOK;
  112. rt_hwtimer_t *timer;
  113. timer = (rt_hwtimer_t*)dev;
  114. if (timer->ops->init != RT_NULL)
  115. {
  116. timer->ops->init(timer, 0);
  117. }
  118. else
  119. {
  120. result = -RT_ENOSYS;
  121. }
  122. dev->flag &= ~RT_DEVICE_FLAG_ACTIVATED;
  123. dev->rx_indicate = RT_NULL;
  124. return result;
  125. }
  126. static rt_ssize_t rt_hwtimer_read(struct rt_device *dev, rt_off_t pos, void *buffer, rt_size_t size)
  127. {
  128. rt_hwtimer_t *timer;
  129. rt_hwtimerval_t tv;
  130. rt_uint32_t cnt;
  131. rt_base_t level;
  132. rt_int32_t overflow;
  133. float t;
  134. timer = (rt_hwtimer_t *)dev;
  135. if (timer->ops->count_get == RT_NULL)
  136. return 0;
  137. level = rt_hw_interrupt_disable();
  138. cnt = timer->ops->count_get(timer);
  139. overflow = timer->overflow;
  140. rt_hw_interrupt_enable(level);
  141. if (timer->info->cntmode == HWTIMER_CNTMODE_DW)
  142. {
  143. cnt = (rt_uint32_t)(timer->freq * timer->period_sec) - cnt;
  144. }
  145. if (timer->mode == HWTIMER_MODE_ONESHOT)
  146. {
  147. overflow = 0;
  148. }
  149. t = overflow * timer->period_sec + cnt/(float)timer->freq;
  150. tv.sec = (rt_int32_t)t;
  151. tv.usec = (rt_int32_t)((t - tv.sec) * 1000000);
  152. size = size > sizeof(tv)? sizeof(tv) : size;
  153. rt_memcpy(buffer, &tv, size);
  154. return size;
  155. }
  156. static rt_ssize_t rt_hwtimer_write(struct rt_device *dev, rt_off_t pos, const void *buffer, rt_size_t size)
  157. {
  158. rt_base_t level;
  159. rt_uint32_t t;
  160. rt_hwtimer_mode_t opm = HWTIMER_MODE_PERIOD;
  161. rt_hwtimer_t *timer;
  162. timer = (rt_hwtimer_t *)dev;
  163. if ((timer->ops->start == RT_NULL) || (timer->ops->stop == RT_NULL))
  164. return 0;
  165. if (size != sizeof(rt_hwtimerval_t))
  166. return 0;
  167. timer->ops->stop(timer);
  168. level = rt_hw_interrupt_disable();
  169. timer->overflow = 0;
  170. rt_hw_interrupt_enable(level);
  171. t = timeout_calc(timer, (rt_hwtimerval_t*)buffer);
  172. if ((timer->cycles <= 1) && (timer->mode == HWTIMER_MODE_ONESHOT))
  173. {
  174. opm = HWTIMER_MODE_ONESHOT;
  175. }
  176. if (timer->ops->start(timer, t, opm) != RT_EOK)
  177. size = 0;
  178. return size;
  179. }
  180. static rt_err_t rt_hwtimer_control(struct rt_device *dev, int cmd, void *args)
  181. {
  182. rt_base_t level;
  183. rt_err_t result = RT_EOK;
  184. rt_hwtimer_t *timer;
  185. timer = (rt_hwtimer_t *)dev;
  186. switch (cmd)
  187. {
  188. case HWTIMER_CTRL_STOP:
  189. {
  190. if (timer->ops->stop != RT_NULL)
  191. {
  192. timer->ops->stop(timer);
  193. }
  194. else
  195. {
  196. result = -RT_ENOSYS;
  197. }
  198. }
  199. break;
  200. case HWTIMER_CTRL_FREQ_SET:
  201. {
  202. rt_int32_t *f;
  203. if (args == RT_NULL)
  204. {
  205. result = -RT_EEMPTY;
  206. break;
  207. }
  208. f = (rt_int32_t*)args;
  209. if ((*f > timer->info->maxfreq) || (*f < timer->info->minfreq))
  210. {
  211. LOG_W("frequency setting out of range! It will maintain at %d Hz", timer->freq);
  212. result = -RT_EINVAL;
  213. break;
  214. }
  215. if (timer->ops->control != RT_NULL)
  216. {
  217. result = timer->ops->control(timer, cmd, args);
  218. if (result == RT_EOK)
  219. {
  220. level = rt_hw_interrupt_disable();
  221. timer->freq = *f;
  222. rt_hw_interrupt_enable(level);
  223. }
  224. }
  225. else
  226. {
  227. result = -RT_ENOSYS;
  228. }
  229. }
  230. break;
  231. case HWTIMER_CTRL_INFO_GET:
  232. {
  233. if (args == RT_NULL)
  234. {
  235. result = -RT_EEMPTY;
  236. break;
  237. }
  238. *((struct rt_hwtimer_info*)args) = *timer->info;
  239. }
  240. break;
  241. case HWTIMER_CTRL_MODE_SET:
  242. {
  243. rt_hwtimer_mode_t *m;
  244. if (args == RT_NULL)
  245. {
  246. result = -RT_EEMPTY;
  247. break;
  248. }
  249. m = (rt_hwtimer_mode_t*)args;
  250. if ((*m != HWTIMER_MODE_ONESHOT) && (*m != HWTIMER_MODE_PERIOD))
  251. {
  252. result = -RT_ERROR;
  253. break;
  254. }
  255. level = rt_hw_interrupt_disable();
  256. timer->mode = *m;
  257. rt_hw_interrupt_enable(level);
  258. }
  259. break;
  260. default:
  261. {
  262. result = -RT_ENOSYS;
  263. }
  264. break;
  265. }
  266. return result;
  267. }
  268. void rt_device_hwtimer_isr(rt_hwtimer_t *timer)
  269. {
  270. rt_base_t level;
  271. RT_ASSERT(timer != RT_NULL);
  272. level = rt_hw_interrupt_disable();
  273. timer->overflow ++;
  274. if (timer->cycles != 0)
  275. {
  276. timer->cycles --;
  277. }
  278. if (timer->cycles == 0)
  279. {
  280. timer->cycles = timer->reload;
  281. rt_hw_interrupt_enable(level);
  282. if (timer->mode == HWTIMER_MODE_ONESHOT)
  283. {
  284. if (timer->ops->stop != RT_NULL)
  285. {
  286. timer->ops->stop(timer);
  287. }
  288. }
  289. if (timer->parent.rx_indicate != RT_NULL)
  290. {
  291. timer->parent.rx_indicate(&timer->parent, sizeof(struct rt_hwtimerval));
  292. }
  293. }
  294. else
  295. {
  296. rt_hw_interrupt_enable(level);
  297. }
  298. }
  299. #ifdef RT_USING_DEVICE_OPS
  300. const static struct rt_device_ops hwtimer_ops =
  301. {
  302. rt_hwtimer_init,
  303. rt_hwtimer_open,
  304. rt_hwtimer_close,
  305. rt_hwtimer_read,
  306. rt_hwtimer_write,
  307. rt_hwtimer_control
  308. };
  309. #endif
  310. rt_err_t rt_device_hwtimer_register(rt_hwtimer_t *timer, const char *name, void *user_data)
  311. {
  312. struct rt_device *device;
  313. RT_ASSERT(timer != RT_NULL);
  314. RT_ASSERT(timer->ops != RT_NULL);
  315. RT_ASSERT(timer->info != RT_NULL);
  316. device = &(timer->parent);
  317. device->type = RT_Device_Class_Timer;
  318. device->rx_indicate = RT_NULL;
  319. device->tx_complete = RT_NULL;
  320. #ifdef RT_USING_DEVICE_OPS
  321. device->ops = &hwtimer_ops;
  322. #else
  323. device->init = rt_hwtimer_init;
  324. device->open = rt_hwtimer_open;
  325. device->close = rt_hwtimer_close;
  326. device->read = rt_hwtimer_read;
  327. device->write = rt_hwtimer_write;
  328. device->control = rt_hwtimer_control;
  329. #endif
  330. device->user_data = user_data;
  331. return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STANDALONE);
  332. }