psci.h 5.9 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2021-09-09 GuEe-GUI The first version
  9. */
  10. #ifndef __PSCI_H__
  11. #define __PSCI_H__
  12. #include <rtdef.h>
  13. /*
  14. * Non-Confidential PSCI 1.0 release (30 January 2015), and errata fix for PSCI 0.2, unsupport PSCI 0.1
  15. */
  16. /* PSCI 0.2 interface */
  17. #define PSCI_0_2_FN_BASE 0x84000000
  18. #define PSCI_0_2_FN(n) (PSCI_0_2_FN_BASE + (n))
  19. #define PSCI_0_2_FN_END 0x8400001F
  20. #define PSCI_0_2_FN64_BASE 0xC4000000
  21. #define PSCI_0_2_FN64(n) (PSCI_0_2_FN64_BASE + (n))
  22. #define PSCI_0_2_FN64_END 0xC400001F
  23. #define PSCI_0_2_FN_PSCI_VERSION PSCI_0_2_FN(0)
  24. #define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1)
  25. #define PSCI_0_2_FN_CPU_OFF PSCI_0_2_FN(2)
  26. #define PSCI_0_2_FN_CPU_ON PSCI_0_2_FN(3)
  27. #define PSCI_0_2_FN_AFFINITY_INFO PSCI_0_2_FN(4)
  28. #define PSCI_0_2_FN_MIGRATE PSCI_0_2_FN(5)
  29. #define PSCI_0_2_FN_MIGRATE_INFO_TYPE PSCI_0_2_FN(6)
  30. #define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU PSCI_0_2_FN(7)
  31. #define PSCI_0_2_FN_SYSTEM_OFF PSCI_0_2_FN(8)
  32. #define PSCI_0_2_FN_SYSTEM_RESET PSCI_0_2_FN(9)
  33. #define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1)
  34. #define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3)
  35. #define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4)
  36. #define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5)
  37. #define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7)
  38. /* PSCI 1.0 interface */
  39. #define PSCI_1_0_FN_PSCI_FEATURES PSCI_0_2_FN(10)
  40. #define PSCI_1_0_FN_CPU_FREEZE PSCI_0_2_FN(11)
  41. #define PSCI_1_0_FN_CPU_DEFAULT_SUSPEND PSCI_0_2_FN(12)
  42. #define PSCI_1_0_FN_NODE_HW_STATE PSCI_0_2_FN(13)
  43. #define PSCI_1_0_FN_SYSTEM_SUSPEND PSCI_0_2_FN(14)
  44. #define PSCI_1_0_FN_SET_SUSPEND_MODE PSCI_0_2_FN(15)
  45. #define PSCI_1_0_FN_STAT_RESIDENCY PSCI_0_2_FN(16)
  46. #define PSCI_1_0_FN_STAT_COUNT PSCI_0_2_FN(17)
  47. #define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18)
  48. #define PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND PSCI_0_2_FN64(12)
  49. #define PSCI_1_0_FN64_NODE_HW_STATE PSCI_0_2_FN64(13)
  50. #define PSCI_1_0_FN64_SYSTEM_SUSPEND PSCI_0_2_FN64(14)
  51. #define PSCI_1_0_FN64_STAT_RESIDENCY PSCI_0_2_FN64(16)
  52. #define PSCI_1_0_FN64_STAT_COUNT PSCI_0_2_FN64(17)
  53. #define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18)
  54. /* PSCI version decoding (independent of PSCI version) */
  55. #define PSCI_VERSION_MAJOR_SHIFT 16
  56. #define PSCI_VERSION_MINOR_MASK ((1U << PSCI_VERSION_MAJOR_SHIFT) - 1)
  57. #define PSCI_VERSION_MAJOR_MASK ~PSCI_VERSION_MINOR_MASK
  58. #define PSCI_VERSION_MAJOR(version) (((version) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT)
  59. #define PSCI_VERSION_MINOR(version) ((version) & PSCI_VERSION_MINOR_MASK)
  60. #define PSCI_VERSION(major, min) ((((major) << PSCI_VERSION_MAJOR_SHIFT) & PSCI_VERSION_MAJOR_MASK) | \
  61. ((min) & PSCI_VERSION_MINOR_MASK))
  62. /* PSCI affinity level state returned by AFFINITY_INFO */
  63. #define PSCI_AFFINITY_LEVEL_ON 0
  64. #define PSCI_AFFINITY_LEVEL_OFF 1
  65. #define PSCI_AFFINITY_LEVEL_ON_PENDING 2
  66. /*
  67. * PSCI power state
  68. * power_level:
  69. * Level 0: cores
  70. * Level 1: clusters
  71. * Level 2: system
  72. * state_type:
  73. * value 0: standby or retention state
  74. * value 1: powerdown state(entry and context_id is valid)
  75. * state_id:
  76. * StateID
  77. */
  78. #define PSCI_POWER_STATE_LEVEL_CORES 0
  79. #define PSCI_POWER_STATE_LEVEL_CLUSTERS 1
  80. #define PSCI_POWER_STATE_LEVEL_SYSTEM 2
  81. #define PSCI_POWER_STATE_TYPE_STANDBY 0
  82. #define PSCI_POWER_STATE_TYPE_POWER_DOWN 1
  83. #define PSCI_POWER_LEVEL_SHIFT 24
  84. #define PSCI_POWER_STATE_TYPE_SHIFT 16
  85. #define PSCI_POWER_STATE_ID_SHIFT 0
  86. #define PSCI_POWER_STATE(power_level, state_type, state_id) \
  87. ( \
  88. ((power_level) << PSCI_POWER_LEVEL_SHIFT) | \
  89. ((state_type) << PSCI_POWER_STATE_TYPE_SHIFT) | \
  90. ((state_id) << PSCI_POWER_STATE_ID_SHIFT) \
  91. )
  92. #define PSCI_POWER_LEVEL_VAL(state) (((state) >> PSCI_POWER_LEVEL_SHIFT) & 0x3)
  93. #define PSCI_POWER_STATE_TYPE_VAL(state) (((state) >> PSCI_POWER_STATE_TYPE_SHIFT) & 0x1)
  94. #define PSCI_POWER_STATE_ID_VAL(state) (((state) >> PSCI_POWER_STATE_ID_SHIFT) & 0xffff)
  95. /*
  96. * For system, cluster, core
  97. * 0: run
  98. * 1: standby(only core)
  99. * 2: retention
  100. * 3: powerdown
  101. */
  102. #define PSCI_POWER_STATE_ID_RUN 0
  103. #define PSCI_POWER_STATE_ID_STANDBY 1
  104. #define PSCI_POWER_STATE_ID_RETENTION 2
  105. #define PSCI_POWER_STATE_ID_POWERDOWN 3
  106. #define PSCI_POWER_STATE_ID(state_id_power_level, system, cluster, core) \
  107. ( \
  108. ((state_id_power_level) << 12) | \
  109. ((system) << 8) | \
  110. ((cluster) << 4) | \
  111. (core) \
  112. )
  113. #define PSCI_RET_SUCCESS 0
  114. #define PSCI_RET_NOT_SUPPORTED (-1)
  115. #define PSCI_RET_INVALID_PARAMETERS (-2)
  116. #define PSCI_RET_DENIED (-3)
  117. #define PSCI_RET_ALREADY_ON (-4)
  118. #define PSCI_RET_ON_PENDING (-5)
  119. #define PSCI_RET_INTERNAL_FAILURE (-6)
  120. #define PSCI_RET_NOT_PRESENT (-7)
  121. #define PSCI_RET_DISABLED (-8)
  122. #define PSCI_RET_INVALID_ADDRESS (-9)
  123. void psci_system_off(void);
  124. void psci_system_reboot(void);
  125. rt_uint32_t rt_psci_get_version(void);
  126. rt_uint32_t rt_psci_cpu_on(int cpuid, rt_ubase_t entry_point);
  127. rt_uint32_t rt_psci_cpu_off(rt_uint32_t state);
  128. rt_uint32_t rt_psci_cpu_suspend(rt_uint32_t power_state, rt_ubase_t entry_point);
  129. rt_uint32_t rt_psci_migrate(int cpuid);
  130. rt_uint32_t rt_psci_get_affinity_info(rt_ubase_t target_affinity, rt_ubase_t lowest_affinity_level);
  131. rt_uint32_t rt_psci_migrate_info_type(void);
  132. #endif /* __PSCI_H__ */