ald_uart.c 35 KB

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  1. /**
  2. *********************************************************************************
  3. *
  4. * @file ald_uart.c
  5. * @brief UART module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Universal Asynchronous Receiver Transmitter (UART) peripheral:
  8. * + Initialization and Configuration functions
  9. * + IO operation functions
  10. * + Peripheral Control functions
  11. * + Peripheral State and Errors functions
  12. *
  13. * @version V1.0
  14. * @date 21 Nov 2017
  15. * @author AE Team
  16. * @note
  17. *
  18. * Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
  19. *
  20. *********************************************************************************
  21. * @verbatim
  22. ==============================================================================
  23. ##### How to use this driver #####
  24. ==============================================================================
  25. [..]
  26. The UART driver can be used as follows:
  27. (#) Declare a uart_handle_t handle structure.
  28. (#) Initialize the UART low level resources:
  29. (##) Enable the UARTx interface clock.
  30. (##) UART pins configuration:
  31. (+++) Enable the clock for the UART GPIOs.
  32. (+++) Configure the UART pins (TX as alternate function pull-up, RX as alternate function Input).
  33. (##) NVIC configuration if you need to use interrupt process (uart_send_by_it()
  34. and uart_recv_by_it() APIs):
  35. (+++) Configure the uart interrupt priority.
  36. (+++) Enable the NVIC UART IRQ handle.
  37. (##) DMA Configuration if you need to use DMA process (uart_send_by_dma()
  38. and uart_recv_by_dma() APIs):
  39. (+++) Select the DMA Tx/Rx channel.
  40. (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
  41. (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
  42. flow control and Mode(Receiver/Transmitter) in the hperh Init structure.
  43. (#) Initialize the UART registers by calling the uart_init() API.
  44. [..]
  45. Three operation modes are available within this driver:
  46. *** Polling mode IO operation ***
  47. =================================
  48. [..]
  49. (+) Send an amount of data in blocking mode using uart_send()
  50. (+) Receive an amount of data in blocking mode using uart_recv()
  51. *** Interrupt mode IO operation ***
  52. ===================================
  53. [..]
  54. (+) Send an amount of data in non blocking mode using uart_send_by_it()
  55. (+) At transmission end of transfer hperh->tx_cplt_cbk() is executed and user can
  56. add his own code by customization of function pointer hperh->tx_cplt_cbk()
  57. (+) Receive an amount of data in non blocking mode using uart_recv_by_it()
  58. (+) At reception end of transfer hperh->rx_cplt_cbk() is executed and user can
  59. add his own code by customization of function pointer hperh->rx_cplt_cbk()
  60. (+) In case of transfer Error, hperh->error_cbk() function is executed and user can
  61. add his own code by customization of function pointer hperh->error_cbk()
  62. *** DMA mode IO operation ***
  63. ==============================
  64. [..]
  65. (+) Send an amount of data in non blocking mode (DMA) using uart_send_by_dma()
  66. (+) At transmission end of transfer hperh->tx_cplt_cbk() is executed and user can
  67. add his own code by customization of function pointer hperh->tx_cplt_cbk()
  68. (+) Receive an amount of data in non blocking mode (DMA) using uart_recv_by_dma()
  69. (+) At reception end of transfer hperh->rx_cplt_cbk() is executed and user can
  70. add his own code by customization of function pointer hperh->rx_cplt_cbk()
  71. (+) In case of transfer Error, hperh->error_cbk() function is executed and user can
  72. add his own code by customization of function pointer hperh->error_cbk()
  73. (+) Pause the DMA Transfer using uart_dma_pause()
  74. (+) Resume the DMA Transfer using uart_dma_resume()
  75. (+) Stop the DMA Transfer using uart_dma_stop()
  76. @endverbatim
  77. ******************************************************************************
  78. */
  79. #include "ald_uart.h"
  80. #include "ald_cmu.h"
  81. /** @addtogroup ES32FXXX_ALD
  82. * @{
  83. */
  84. /** @defgroup UART UART
  85. * @brief UART module driver
  86. * @{
  87. */
  88. #ifdef ALD_UART
  89. /** @defgroup UART_Private_Functions UART Private Functions
  90. * @brief UART Private functions
  91. * @{
  92. */
  93. #ifdef ALD_DMA
  94. /**
  95. * @brief DMA uart transmit process complete callback.
  96. * @param arg: Pointer to a uart_handle_t structure.
  97. * @retval None
  98. */
  99. static void uart_dma_send_cplt(void *arg)
  100. {
  101. uart_handle_t *hperh = (uart_handle_t *)arg;
  102. if (hperh->state == UART_STATE_BUSY_TX)
  103. uart_dma_req_config(hperh, DISABLE);
  104. hperh->tx_count = 0;
  105. uart_interrupt_config(hperh, UART_IT_TC, ENABLE);
  106. return;
  107. }
  108. /**
  109. * @brief DMA uart receive process complete callback.
  110. * @param arg: Pointer to a uart_handle_t structure.
  111. * @retval None
  112. */
  113. static void uart_dma_recv_cplt(void *arg)
  114. {
  115. uart_handle_t *hperh = (uart_handle_t *)arg;
  116. if (hperh->state == UART_STATE_BUSY_RX)
  117. uart_dma_req_config(hperh, DISABLE);
  118. hperh->rx_count = 0;
  119. CLEAR_BIT(hperh->state, UART_STATE_RX_MASK);
  120. if (hperh->rx_cplt_cbk)
  121. hperh->rx_cplt_cbk(hperh);
  122. return;
  123. }
  124. /**
  125. * @brief DMA uart communication error callback.
  126. * @param arg: Pointer to a uart_handle_t structure.
  127. * @retval None
  128. */
  129. static void uart_dma_error(void *arg)
  130. {
  131. uart_handle_t *hperh = (uart_handle_t *)arg;
  132. hperh->rx_count = 0;
  133. hperh->tx_count = 0;
  134. hperh->state = UART_STATE_READY;
  135. hperh->err_code |= UART_ERROR_DMA;
  136. uart_dma_req_config(hperh, DISABLE);
  137. if (hperh->error_cbk)
  138. hperh->error_cbk(hperh);
  139. return;
  140. }
  141. #endif
  142. /**
  143. * @brief This function handles uart Communication Timeout.
  144. * @param hperh: Pointer to a uart_handle_t structure.
  145. * @param flag: specifies the uart flag to check.
  146. * @param status: The new Flag status (SET or RESET).
  147. * @param timeout: Timeout duration
  148. * @retval Status, see @ref ald_status_t.
  149. */
  150. static ald_status_t uart_wait_flag(uart_handle_t *hperh, uart_status_t flag, flag_status_t status, uint32_t timeout)
  151. {
  152. uint32_t tick;
  153. if (timeout == 0)
  154. return ERROR;
  155. tick = __get_tick();
  156. /* Waiting for flag */
  157. while ((uart_get_status(hperh, flag)) != status) {
  158. if (((__get_tick()) - tick) > timeout)
  159. return TIMEOUT;
  160. }
  161. return OK;
  162. }
  163. /**
  164. * @brief Sends an amount of data in non blocking mode.
  165. * @param hperh: Pointer to a uart_handle_t structure.
  166. * @retval Status, see @ref ald_status_t.
  167. */
  168. static ald_status_t __uart_send_by_it(uart_handle_t *hperh)
  169. {
  170. if ((hperh->state & UART_STATE_TX_MASK) == 0x0)
  171. return BUSY;
  172. WRITE_REG(hperh->perh->TBR, (uint8_t)(*hperh->tx_buf++ & 0x00FF));
  173. if (--hperh->tx_count == 0) {
  174. uart_clear_flag_status(hperh, UART_IF_TC);
  175. uart_interrupt_config(hperh, UART_IT_TXS, DISABLE);
  176. uart_interrupt_config(hperh, UART_IT_TC, ENABLE);
  177. }
  178. return OK;
  179. }
  180. /**
  181. * @brief Wraps up transmission in non blocking mode.
  182. * @param hperh: pointer to a uart_handle_t structure.
  183. * @retval Status, see @ref ald_status_t.
  184. */
  185. static ald_status_t __uart_end_send_by_it(uart_handle_t *hperh)
  186. {
  187. if (!(READ_BIT(hperh->perh->SR, UART_SR_TEM_MSK)))
  188. return OK;
  189. uart_interrupt_config(hperh, UART_IT_TC, DISABLE);
  190. CLEAR_BIT(hperh->state, UART_STATE_TX_MASK);
  191. if (hperh->tx_cplt_cbk)
  192. hperh->tx_cplt_cbk(hperh);
  193. return OK;
  194. }
  195. /**
  196. * @brief Receives an amount of data in non blocking mode
  197. * @param hperh: Pointer to a uart_handle_t structure.
  198. * @retval Status, see @ref ald_status_t.
  199. */
  200. static ald_status_t __uart_recv_by_it(uart_handle_t *hperh)
  201. {
  202. if ((hperh->state & UART_STATE_RX_MASK) == 0x0)
  203. return BUSY;
  204. *hperh->rx_buf++ = (uint8_t)(hperh->perh->RBR & 0xFF);
  205. if (--hperh->rx_count == 0) {
  206. uart_interrupt_config(hperh, UART_IT_RXRD, DISABLE);
  207. CLEAR_BIT(hperh->state, UART_STATE_RX_MASK);
  208. if (hperh->rx_cplt_cbk)
  209. hperh->rx_cplt_cbk(hperh);
  210. }
  211. return OK;
  212. }
  213. /**
  214. * @}
  215. */
  216. /** @defgroup UART_Public_Functions UART Public Functions
  217. * @{
  218. */
  219. /** @defgroup UART_Public_Functions_Group1 Initialization and Configuration functions
  220. * @brief Initialization and Configuration functions
  221. *
  222. * @verbatim
  223. ===============================================================================
  224. ##### Initialization and Configuration functions #####
  225. ===============================================================================
  226. [..]
  227. This subsection provides a set of functions allowing to initialize the UARTx
  228. and configure UARTx param.
  229. (+) For the UARTx only these parameters can be configured:
  230. (++) Baud Rate
  231. (++) Word Length
  232. (++) Stop Bit
  233. (++) Parity
  234. (++) Hardware flow control
  235. (+) For RS485 mode, user also need configure some parameters by
  236. uart_rs485_config():
  237. (++) Enable/disable normal point mode
  238. (++) Enable/disable auto-direction
  239. (++) Enable/disable address detection invert
  240. (++) Enable/disable address for compare
  241. @endverbatim
  242. * @{
  243. */
  244. /**
  245. * @brief Reset UART peripheral
  246. * @param hperh: Pointer to a uart_handle_t structure that contains
  247. * the configuration information for the specified uart module.
  248. * @retval None
  249. */
  250. void uart_reset(uart_handle_t *hperh)
  251. {
  252. assert_param(IS_UART_ALL(hperh->perh));
  253. WRITE_REG(hperh->perh->BRR, 0x0);
  254. WRITE_REG(hperh->perh->LCR, 0x0);
  255. WRITE_REG(hperh->perh->MCR, 0x0);
  256. WRITE_REG(hperh->perh->CR, 0x0);
  257. WRITE_REG(hperh->perh->RTOR, 0x0);
  258. WRITE_REG(hperh->perh->FCR, 0x0);
  259. WRITE_REG(hperh->perh->IDR, 0xFFF);
  260. hperh->err_code = UART_ERROR_NONE;
  261. hperh->state = UART_STATE_RESET;
  262. __UNLOCK(hperh);
  263. return;
  264. }
  265. /**
  266. * @brief Initializes the UARTx according to the specified
  267. * parameters in the uart_handle_t.
  268. * @param hperh: Pointer to a uart_handle_t structure that contains
  269. * the configuration information for the specified UART module.
  270. * @retval None
  271. */
  272. void uart_init(uart_handle_t *hperh)
  273. {
  274. uint32_t tmp;
  275. assert_param(IS_UART_ALL(hperh->perh));
  276. assert_param(IS_UART_BAUDRATE(hperh->init.baud));
  277. assert_param(IS_UART_WORD_LENGTH(hperh->init.word_length));
  278. assert_param(IS_UART_STOPBITS(hperh->init.stop_bits));
  279. assert_param(IS_UART_PARITY(hperh->init.parity));
  280. assert_param(IS_UART_MODE(hperh->init.mode));
  281. assert_param(IS_UART_HARDWARE_FLOW_CONTROL(hperh->init.fctl));
  282. uart_reset(hperh);
  283. tmp = READ_REG(hperh->perh->LCR);
  284. MODIFY_REG(tmp, UART_LCR_DLS_MSK, hperh->init.word_length << UART_LCR_DLS_POSS);
  285. MODIFY_REG(tmp, UART_LCR_STOP_MSK, hperh->init.stop_bits << UART_LCR_STOP_POS);
  286. MODIFY_REG(tmp, UART_LCR_PEN_MSK, (hperh->init.parity == UART_PARITY_NONE ? 0 : 1) << UART_LCR_PEN_POS);
  287. MODIFY_REG(tmp, UART_LCR_PS_MSK, (hperh->init.parity == UART_PARITY_EVEN ? 1 : 0) << UART_LCR_PS_POS);
  288. WRITE_REG(hperh->perh->LCR, tmp);
  289. MODIFY_REG(hperh->perh->MCR, UART_MCR_AFCEN_MSK, hperh->init.fctl << UART_MCR_AFCEN_POS);
  290. SET_BIT(hperh->perh->LCR, UART_LCR_BRWEN_MSK);
  291. WRITE_REG(hperh->perh->BRR, cmu_get_pclk1_clock() / hperh->init.baud);
  292. CLEAR_BIT(hperh->perh->LCR, UART_LCR_BRWEN_MSK);
  293. SET_BIT(hperh->perh->FCR, UART_FCR_FIFOEN_MSK);
  294. SET_BIT(hperh->perh->FCR, UART_FCR_RFRST_MSK);
  295. SET_BIT(hperh->perh->FCR, UART_FCR_TFRST_MSK);
  296. MODIFY_REG(hperh->perh->FCR, UART_FCR_RXTL_MSK, 0 << UART_FCR_RXTL_POSS);
  297. MODIFY_REG(hperh->perh->FCR, UART_FCR_TXTL_MSK, 0 << UART_FCR_TXTL_POSS);
  298. SET_BIT(hperh->perh->LCR, UART_LCR_RXEN_MSK);
  299. if (hperh->init.mode == UART_MODE_LIN)
  300. SET_BIT(hperh->perh->MCR, UART_MCR_LINEN_MSK);
  301. else if (hperh->init.mode == UART_MODE_IrDA)
  302. SET_BIT(hperh->perh->MCR, UART_MCR_IREN_MSK);
  303. else if (hperh->init.mode == UART_MODE_RS485)
  304. SET_BIT(hperh->perh->MCR, UART_MCR_AADEN_MSK);
  305. else if (hperh->init.mode == UART_MODE_HDSEL)
  306. SET_BIT(hperh->perh->MCR, UART_MCR_HDSEL_MSK);
  307. else
  308. ;/* do nothing */
  309. if (hperh->init.fctl)
  310. SET_BIT(hperh->perh->MCR, UART_MCR_RTSCTRL_MSK);
  311. if (hperh->init.mode == UART_MODE_IrDA)
  312. SET_BIT(hperh->perh->LCR, UART_LCR_RXINV_MSK);
  313. hperh->state = UART_STATE_READY;
  314. hperh->err_code = UART_ERROR_NONE;
  315. return;
  316. }
  317. /**
  318. * @brief Configure the RS485 mode according to the specified
  319. * parameters in the uart_rs485_config_t.
  320. * @param hperh: Pointer to a uart_handle_t structure that contains
  321. * the configuration information for the specified UART module.
  322. * @param config: Specifies the RS485 parameters.
  323. * @retval None
  324. */
  325. void uart_rs485_config(uart_handle_t *hperh, uart_rs485_config_t *config)
  326. {
  327. assert_param(IS_UART_ALL(hperh->perh));
  328. assert_param(IS_FUNC_STATE(config->normal));
  329. assert_param(IS_FUNC_STATE(config->dir));
  330. assert_param(IS_FUNC_STATE(config->invert));
  331. MODIFY_REG(hperh->perh->MCR, UART_MCR_AADNOR_MSK, config->normal << UART_MCR_AADNOR_POS);
  332. MODIFY_REG(hperh->perh->MCR, UART_MCR_AADDIR_MSK, config->dir << UART_MCR_AADDIR_POS);
  333. MODIFY_REG(hperh->perh->MCR, UART_MCR_AADINV_MSK, config->invert << UART_MCR_AADINV_POS);
  334. MODIFY_REG(hperh->perh->CR, UART_CR_ADDR_MSK, config->addr << UART_CR_ADDR_POSS);
  335. return;
  336. }
  337. /**
  338. * @}
  339. */
  340. /** @defgroup UART_Public_Functions_Group2 IO operation functions
  341. * @brief UART Transmit and Receive functions
  342. * @verbatim
  343. ==============================================================================
  344. # IO operation functions #
  345. ==============================================================================
  346. [..]
  347. This subsection provides a set of functions allowing to manage the UART data transfers.
  348. (#) There are two modes of transfer:
  349. (++) Blocking mode: The communication is performed in polling mode.
  350. The Status of all data processing is returned by the same function
  351. after finishing transfer.
  352. (++) Non blocking mode: The communication is performed using Interrupts
  353. or DMA, these APIs return the Status.
  354. The end of the data processing will be indicated through the
  355. dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
  356. using DMA mode.
  357. The hperh->tx_cplt_cbk(), hperh->rx_cplt_cbk() user callbacks
  358. will be executed respectively at the end of the transmit or receive process.
  359. The hperh->error_cbk() user callback will be executed when
  360. a communication error is detected.
  361. (#) Blocking mode APIs are:
  362. (++) uart_send()
  363. (++) uart_recv()
  364. (#) Non Blocking mode APIs with Interrupt are:
  365. (++) uart_send_by_it()
  366. (++) uart_recv_by_it()
  367. (++) uart_irq_handle()
  368. (#) Non Blocking mode functions with DMA are:
  369. (++) uart_send_by_dma()
  370. (++) uart_recv_by_dma()
  371. (++) uart_dma_pause()
  372. (++) uart_dma_resume()
  373. (++) uart_dma_stop()
  374. (#) A set of transfer complete callbacks are provided in non blocking mode:
  375. (++) hperh->tx_cplt_cbk()
  376. (++) hperh->rx_cplt_cbk()
  377. (++) hperh->error_cbk()
  378. @endverbatim
  379. * @{
  380. */
  381. /**
  382. * @brief Sends an amount of data in blocking mode.
  383. * @param hperh: Pointer to a uart_handle_t structure.
  384. * @param buf: Pointer to data buffer
  385. * @param size: Amount of data to be sent
  386. * @param timeout: Timeout duration
  387. * @retval Status, see @ref ald_status_t.
  388. */
  389. ald_status_t uart_send(uart_handle_t *hperh, uint8_t *buf, uint16_t size, uint32_t timeout)
  390. {
  391. assert_param(IS_UART_ALL(hperh->perh));
  392. if ((hperh->state != UART_STATE_READY) && (hperh->state != UART_STATE_BUSY_RX))
  393. return BUSY;
  394. if ((buf == NULL) || (size == 0))
  395. return ERROR;
  396. __LOCK(hperh);
  397. hperh->err_code = UART_ERROR_NONE;
  398. SET_BIT(hperh->state, UART_STATE_TX_MASK);
  399. hperh->tx_size = size;
  400. hperh->tx_count = size;
  401. while (hperh->tx_count-- > 0) {
  402. if (uart_wait_flag(hperh, UART_STATUS_TBEM, SET, timeout) != OK) {
  403. __UNLOCK(hperh);
  404. hperh->state = UART_STATE_READY;
  405. return TIMEOUT;
  406. }
  407. WRITE_REG(hperh->perh->TBR, (*buf++ & 0xFF));
  408. }
  409. if (uart_wait_flag(hperh, UART_STATUS_TEM, SET, timeout) != OK) {
  410. __UNLOCK(hperh);
  411. hperh->state = UART_STATE_READY;
  412. return TIMEOUT;
  413. }
  414. CLEAR_BIT(hperh->state, UART_STATE_TX_MASK);
  415. __UNLOCK(hperh);
  416. return OK;
  417. }
  418. /**
  419. * @brief Receives an amount of data in blocking mode.
  420. * @param hperh: Pointer to a uart_handle_t structure.
  421. * @param buf: Pointer to data buffer
  422. * @param size: Amount of data to be received
  423. * @param timeout: Timeout duration
  424. * @retval Status, see @ref ald_status_t.
  425. */
  426. ald_status_t uart_recv(uart_handle_t *hperh, uint8_t *buf, uint16_t size, uint32_t timeout)
  427. {
  428. assert_param(IS_UART_ALL(hperh->perh));
  429. if ((hperh->state != UART_STATE_READY) && (hperh->state != UART_STATE_BUSY_TX))
  430. return BUSY;
  431. if ((buf == NULL ) || (size == 0))
  432. return ERROR;
  433. __LOCK(hperh);
  434. hperh->err_code = UART_ERROR_NONE;
  435. SET_BIT(hperh->state, UART_STATE_RX_MASK);
  436. hperh->rx_size = size;
  437. hperh->rx_count = size;
  438. while (hperh->rx_count-- > 0) {
  439. if (uart_wait_flag(hperh, UART_STATUS_DR, SET, timeout) != OK) {
  440. __UNLOCK(hperh);
  441. hperh->state = UART_STATE_READY;
  442. return TIMEOUT;
  443. }
  444. *buf++ = (uint8_t)(hperh->perh->RBR & 0xFF);
  445. }
  446. CLEAR_BIT(hperh->state, UART_STATE_RX_MASK);
  447. __UNLOCK(hperh);
  448. return OK;
  449. }
  450. /**
  451. * @brief Sends an amount of data in non blocking mode.
  452. * @param hperh: Pointer to a uart_handle_t structure.
  453. * @param buf: Pointer to data buffer
  454. * @param size: Amount of data to be sent
  455. * @retval Status, see @ref ald_status_t.
  456. */
  457. ald_status_t uart_send_by_it(uart_handle_t *hperh, uint8_t *buf, uint16_t size)
  458. {
  459. assert_param(IS_UART_ALL(hperh->perh));
  460. if ((hperh->state != UART_STATE_READY) && (hperh->state != UART_STATE_BUSY_RX))
  461. return BUSY;
  462. if ((buf == NULL ) || (size == 0))
  463. return ERROR;
  464. __LOCK(hperh);
  465. hperh->tx_buf = buf;
  466. hperh->tx_size = size;
  467. hperh->tx_count = size;
  468. hperh->err_code = UART_ERROR_NONE;
  469. SET_BIT(hperh->state, UART_STATE_TX_MASK);
  470. __UNLOCK(hperh);
  471. if (((uart_get_status(hperh, UART_STATUS_TBEM)) == SET)
  472. && ((uart_get_flag_status(hperh, UART_IF_TXS)) == RESET)) {
  473. WRITE_REG(hperh->perh->TBR, (*hperh->tx_buf++ & 0xFF));
  474. --hperh->tx_count;
  475. }
  476. if (hperh->tx_count == 0) {
  477. uart_interrupt_config(hperh, UART_IT_TC, ENABLE);
  478. return OK;
  479. }
  480. uart_interrupt_config(hperh, UART_IT_TXS, ENABLE);
  481. return OK;
  482. }
  483. /**
  484. * @brief Receives an amount of data in non blocking mode
  485. * @param hperh: Pointer to a uart_handle_t structure.
  486. * @param buf: Pointer to data buffer
  487. * @param size: Amount of data to be received
  488. * @retval Status, see @ref ald_status_t.
  489. */
  490. ald_status_t uart_recv_by_it(uart_handle_t *hperh, uint8_t *buf, uint16_t size)
  491. {
  492. assert_param(IS_UART_ALL(hperh->perh));
  493. if ((hperh->state != UART_STATE_READY) && (hperh->state != UART_STATE_BUSY_TX))
  494. return BUSY;
  495. if ((buf == NULL ) || (size == 0))
  496. return ERROR;
  497. __LOCK(hperh);
  498. hperh->rx_buf = buf;
  499. hperh->rx_size = size;
  500. hperh->rx_count = size;
  501. hperh->err_code = UART_ERROR_NONE;
  502. SET_BIT(hperh->state, UART_STATE_RX_MASK);
  503. __UNLOCK(hperh);
  504. uart_interrupt_config(hperh, UART_IT_RXRD, ENABLE);
  505. return OK;
  506. }
  507. #ifdef ALD_DMA
  508. /**
  509. * @brief Sends an amount of data in non blocking mode.
  510. * @param hperh: Pointer to a uart_handle_t structure.
  511. * @param buf: Pointer to data buffer
  512. * @param size: Amount of data to be sent
  513. * @param channel: DMA channel as UART transmit
  514. * @retval Status, see @ref ald_status_t.
  515. */
  516. ald_status_t uart_send_by_dma(uart_handle_t *hperh, uint8_t *buf, uint16_t size, uint8_t channel)
  517. {
  518. assert_param(IS_UART_ALL(hperh->perh));
  519. if ((hperh->state != UART_STATE_READY) && (hperh->state != UART_STATE_BUSY_RX))
  520. return BUSY;
  521. if ((buf == NULL ) || (size == 0))
  522. return ERROR;
  523. __LOCK(hperh);
  524. hperh->tx_buf = buf;
  525. hperh->tx_size = size;
  526. hperh->tx_count = size;
  527. hperh->err_code = UART_ERROR_NONE;
  528. SET_BIT(hperh->state, UART_STATE_TX_MASK);
  529. if (hperh->hdmatx.perh == NULL)
  530. hperh->hdmatx.perh = DMA0;
  531. hperh->hdmatx.cplt_cbk = uart_dma_send_cplt;
  532. hperh->hdmatx.cplt_arg = (void *)hperh;
  533. hperh->hdmatx.err_cbk = uart_dma_error;
  534. hperh->hdmatx.err_arg = (void *)hperh;
  535. dma_config_struct(&hperh->hdmatx.config);
  536. hperh->hdmatx.config.src = (void *)buf;
  537. hperh->hdmatx.config.dst = (void *)&hperh->perh->TBR;
  538. hperh->hdmatx.config.size = size;
  539. hperh->hdmatx.config.src_inc = DMA_DATA_INC_BYTE;
  540. hperh->hdmatx.config.dst_inc = DMA_DATA_INC_NONE;
  541. hperh->hdmatx.config.msigsel = DMA_MSIGSEL_UART_TXEMPTY;
  542. hperh->hdmatx.config.burst = ENABLE;
  543. hperh->hdmatx.config.channel = channel;
  544. if (hperh->init.mode == UART_MODE_RS485) {
  545. hperh->hdmatx.config.src_inc = DMA_DATA_INC_HALFWORD;
  546. hperh->hdmatx.config.data_width = DMA_DATA_SIZE_HALFWORD;
  547. }
  548. if (hperh->perh == UART0)
  549. hperh->hdmatx.config.msel = DMA_MSEL_UART0;
  550. else if (hperh->perh == UART1)
  551. hperh->hdmatx.config.msel = DMA_MSEL_UART1;
  552. else if (hperh->perh == UART2)
  553. hperh->hdmatx.config.msel = DMA_MSEL_UART2;
  554. else if (hperh->perh == UART3)
  555. hperh->hdmatx.config.msel = DMA_MSEL_UART3;
  556. else
  557. ; /* do nothing */
  558. dma_config_basic(&hperh->hdmatx);
  559. __UNLOCK(hperh);
  560. uart_clear_flag_status(hperh, UART_IF_TC);
  561. uart_dma_req_config(hperh, ENABLE);
  562. return OK;
  563. }
  564. /**
  565. * @brief Receives an amount of data in non blocking mode.
  566. * @param hperh: Pointer to a uart_handle_t structure.
  567. * @param buf: Pointer to data buffer
  568. * @param size: Amount of data to be received
  569. * @param channel: DMA channel as UART receive
  570. * @retval Status, see @ref ald_status_t.
  571. */
  572. ald_status_t uart_recv_by_dma(uart_handle_t *hperh, uint8_t *buf, uint16_t size, uint8_t channel)
  573. {
  574. assert_param(IS_UART_ALL(hperh->perh));
  575. if ((hperh->state != UART_STATE_READY) && (hperh->state != UART_STATE_BUSY_TX))
  576. return BUSY;
  577. if ((buf == NULL) || (size == 0))
  578. return ERROR;
  579. __LOCK(hperh);
  580. hperh->rx_buf = buf;
  581. hperh->rx_size = size;
  582. hperh->err_code = UART_ERROR_NONE;
  583. SET_BIT(hperh->state, UART_STATE_RX_MASK);
  584. if (hperh->hdmarx.perh == NULL)
  585. hperh->hdmarx.perh = DMA0;
  586. hperh->hdmarx.cplt_cbk = uart_dma_recv_cplt;
  587. hperh->hdmarx.cplt_arg = (void *)hperh;
  588. hperh->hdmarx.err_cbk = uart_dma_error;
  589. hperh->hdmarx.err_arg = (void *)hperh;
  590. dma_config_struct(&hperh->hdmarx.config);
  591. hperh->hdmarx.config.src = (void *)&hperh->perh->RBR;
  592. hperh->hdmarx.config.dst = (void *)buf;
  593. hperh->hdmarx.config.size = size;
  594. hperh->hdmarx.config.src_inc = DMA_DATA_INC_NONE;
  595. hperh->hdmarx.config.dst_inc = DMA_DATA_INC_BYTE;
  596. hperh->hdmarx.config.msigsel = DMA_MSIGSEL_UART_RNR;
  597. hperh->hdmarx.config.burst = ENABLE;
  598. hperh->hdmarx.config.channel = channel;
  599. if (hperh->init.mode == UART_MODE_RS485) {
  600. hperh->hdmarx.config.dst_inc = DMA_DATA_INC_HALFWORD;
  601. hperh->hdmarx.config.data_width = DMA_DATA_SIZE_HALFWORD;
  602. }
  603. if (hperh->perh == UART0)
  604. hperh->hdmarx.config.msel = DMA_MSEL_UART0;
  605. else if (hperh->perh == UART1)
  606. hperh->hdmarx.config.msel = DMA_MSEL_UART1;
  607. else if (hperh->perh == UART2)
  608. hperh->hdmarx.config.msel = DMA_MSEL_UART2;
  609. else if (hperh->perh == UART3)
  610. hperh->hdmarx.config.msel = DMA_MSEL_UART3;
  611. else
  612. ;
  613. dma_config_basic(&hperh->hdmarx);
  614. __UNLOCK(hperh);
  615. uart_dma_req_config(hperh, ENABLE);
  616. return OK;
  617. }
  618. /**
  619. * @brief Pauses the DMA Transfer.
  620. * @param hperh: Pointer to a uart_handle_t structure.
  621. * @retval Status, see @ref ald_status_t.
  622. */
  623. ald_status_t uart_dma_pause(uart_handle_t *hperh)
  624. {
  625. assert_param(IS_UART_ALL(hperh->perh));
  626. uart_dma_req_config(hperh, DISABLE);
  627. return OK;
  628. }
  629. /**
  630. * @brief Resumes the DMA Transfer.
  631. * @param hperh: Pointer to a uart_handle_t structure.
  632. * @retval Status, see @ref ald_status_t.
  633. */
  634. ald_status_t uart_dma_resume(uart_handle_t *hperh)
  635. {
  636. assert_param(IS_UART_ALL(hperh->perh));
  637. uart_dma_req_config(hperh, ENABLE);
  638. return OK;
  639. }
  640. /**
  641. * @brief Stops the DMA Transfer.
  642. * @param hperh: Pointer to a uart_handle_t structure.
  643. * @retval Status, see @ref ald_status_t.
  644. */
  645. ald_status_t uart_dma_stop(uart_handle_t *hperh)
  646. {
  647. assert_param(IS_UART_ALL(hperh->perh));
  648. uart_dma_req_config(hperh, DISABLE);
  649. hperh->state = UART_STATE_READY;
  650. return OK;
  651. }
  652. #endif
  653. /**
  654. * @brief This function handles UART interrupt request.
  655. * @param hperh: Pointer to a uart_handle_t structure.
  656. * @retval None
  657. */
  658. void uart_irq_handle(uart_handle_t *hperh)
  659. {
  660. assert_param(IS_UART_ALL(hperh->perh));
  661. /* Handle parity error */
  662. if ((uart_get_status(hperh, UART_STATUS_PE)) != RESET)
  663. hperh->err_code |= UART_ERROR_PE;
  664. /* Handle frame error */
  665. if ((uart_get_status(hperh, UART_STATUS_FE)) != RESET)
  666. hperh->err_code |= UART_ERROR_FE;
  667. /* Handle overflow error */
  668. if ((uart_get_status(hperh, UART_STATUS_OE)) != RESET)
  669. hperh->err_code |= UART_ERROR_ORE;
  670. /* Receive */
  671. if ((uart_get_mask_flag_status(hperh, UART_IF_RXRD)) != RESET) {
  672. uart_clear_flag_status(hperh, UART_IF_RXRD);
  673. __uart_recv_by_it(hperh);
  674. }
  675. /* Transmite */
  676. if ((uart_get_mask_flag_status(hperh, UART_IF_TXS)) != RESET) {
  677. uart_clear_flag_status(hperh, UART_IF_TXS);
  678. __uart_send_by_it(hperh);
  679. }
  680. /* End Transmite */
  681. if ((uart_get_mask_flag_status(hperh, UART_IF_TC)) != RESET) {
  682. uart_clear_flag_status(hperh, UART_IF_TC);
  683. __uart_end_send_by_it(hperh);
  684. }
  685. /* Handle error state */
  686. if (hperh->err_code != UART_ERROR_NONE) {
  687. hperh->state = UART_STATE_READY;
  688. if (hperh->error_cbk)
  689. hperh->error_cbk(hperh);
  690. }
  691. }
  692. /**
  693. * @}
  694. */
  695. /** @defgroup UART_Public_Functions_Group3 Peripheral Control functions
  696. * @brief UART control functions
  697. *
  698. * @verbatim
  699. ==============================================================================
  700. ##### Peripheral Control functions #####
  701. ==============================================================================
  702. [..]
  703. This subsection provides a set of functions allowing to control the UART:
  704. (+) uart_interrupt_config() API can be helpful to configure UART interrupt source.
  705. (+) uart_dma_req_config() API can be helpful to configure UART DMA request.
  706. (+) uart_tx_fifo_config() API can be helpful to configure UART TX FIFO paramters.
  707. (+) uart_rx_fifo_config() API can be helpful to configure UART RX FIFO paramters.
  708. (+) uart_lin_send_break() API can send a frame of break in LIN mode.
  709. (+) uart_lin_detect_break_len_config() API can be helpful to configure the length of break frame.
  710. (+) uart_auto_baud_config() API can be helpful to configure detection data mode.
  711. (+) uart_get_it_status() API can get the status of interrupt source.
  712. (+) uart_get_status() API can get the status of UART_SR register.
  713. (+) uart_get_flag_status() API can get the status of UART flag.
  714. (+) uart_get_mask_flag_status() API can get status os flag and interrupt source.
  715. (+) uart_clear_flag_status() API can clear UART flag.
  716. @endverbatim
  717. * @{
  718. */
  719. /**
  720. * @brief Enable/disable the specified UART interrupts.
  721. * @param hperh: Pointer to a uart_handle_t structure.
  722. * @param it: Specifies the UART interrupt sources to be enabled or disabled.
  723. * This parameter can be one of the @ref uart_it_t.
  724. * @param state: New state of the specified UART interrupts.
  725. * This parameter can be:
  726. * @arg ENABLE
  727. * @arg DISABLE
  728. * @retval None
  729. */
  730. void uart_interrupt_config(uart_handle_t *hperh, uart_it_t it, type_func_t state)
  731. {
  732. assert_param(IS_UART_ALL(hperh->perh));
  733. assert_param(IS_UART_IT(it));
  734. assert_param(IS_FUNC_STATE(state));
  735. if (state == ENABLE)
  736. WRITE_REG(hperh->perh->IER, it);
  737. else
  738. WRITE_REG(hperh->perh->IDR, it);
  739. return;
  740. }
  741. /**
  742. * @brief Configure UART DMA request.
  743. * @param hperh: Pointer to a uart_handle_t structure.
  744. * @param state: New state of the specified DMA request.
  745. * This parameter can be:
  746. * @arg ENABLE
  747. * @arg DISABLE
  748. * @retval None
  749. */
  750. void uart_dma_req_config(uart_handle_t *hperh, type_func_t state)
  751. {
  752. assert_param(IS_UART_ALL(hperh->perh));
  753. assert_param(IS_FUNC_STATE(state));
  754. if (state == ENABLE)
  755. SET_BIT(hperh->perh->MCR, UART_MCR_DMAEN_MSK);
  756. else
  757. CLEAR_BIT(hperh->perh->MCR, UART_MCR_DMAEN_MSK);
  758. return;
  759. }
  760. /**
  761. * @brief Configure transmit fifo parameters.
  762. * @param hperh: Pointer to a uart_handle_t structure.
  763. * @param config: Transmit fifo trigger level.
  764. * @param level: Transmit fifo level.
  765. * @retval None
  766. */
  767. void uart_tx_fifo_config(uart_handle_t *hperh, uart_rxfifo_t config, uint8_t level)
  768. {
  769. assert_param(IS_UART_ALL(hperh->perh));
  770. assert_param(IS_UART_TXFIFO_TYPE(config));
  771. SET_BIT(hperh->perh->FCR, UART_FCR_TFRST_MSK);
  772. MODIFY_REG(hperh->perh->FCR, UART_FCR_TXTL_MSK, config << UART_FCR_TXTL_POSS);
  773. MODIFY_REG(hperh->perh->FCR, UART_FCR_TXFL_MSK, level << UART_FCR_TXFL_POSS);
  774. SET_BIT(hperh->perh->FCR, UART_FCR_FIFOEN_MSK);
  775. return;
  776. }
  777. /**
  778. * @brief Configure receive fifo parameters.
  779. * @param hperh: Pointer to a uart_handle_t structure.
  780. * @param config: Receive fifo trigger level.
  781. * @param level: Receive fifo level.
  782. * @retval None
  783. */
  784. void uart_rx_fifo_config(uart_handle_t *hperh, uart_rxfifo_t config, uint8_t level)
  785. {
  786. assert_param(IS_UART_ALL(hperh->perh));
  787. assert_param(IS_UART_RXFIFO_TYPE(config));
  788. SET_BIT(hperh->perh->FCR, UART_FCR_RFRST_MSK);
  789. MODIFY_REG(hperh->perh->FCR, UART_FCR_RXTL_MSK, config << UART_FCR_RXTL_POSS);
  790. MODIFY_REG(hperh->perh->FCR, UART_FCR_RXFL_MSK, level << UART_FCR_RXFL_POSS);
  791. SET_BIT(hperh->perh->FCR, UART_FCR_FIFOEN_MSK);
  792. return;
  793. }
  794. /**
  795. * @brief request to send a frame of break.
  796. * @param hperh: Pointer to a uart_handle_t structure.
  797. * @retval None
  798. */
  799. void uart_lin_send_break(uart_handle_t *hperh)
  800. {
  801. assert_param(IS_UART_ALL(hperh->perh));
  802. SET_BIT(hperh->perh->MCR, UART_MCR_BKREQ_MSK);
  803. return;
  804. }
  805. /**
  806. * @brief Configure the length of break frame to be detect.
  807. * @param hperh: Pointer to a uart_handle_t structure.
  808. * @param len: Length of break frame.
  809. * @arg LIN_BREAK_LEN_10B
  810. * @arg LIN_BREAK_LEN_11B
  811. * @retval None
  812. */
  813. void uart_lin_detect_break_len_config(uart_handle_t *hperh, uart_lin_break_len_t len)
  814. {
  815. assert_param(IS_UART_ALL(hperh->perh));
  816. assert_param(IS_UART_LIN_BREAK_LEN(len));
  817. MODIFY_REG(hperh->perh->MCR, UART_MCR_LINBDL_MSK, len << UART_MCR_LINBDL_POS);
  818. return;
  819. }
  820. /**
  821. * @brief Configure the mode of auto-baud-rate detect.
  822. * @param hperh: Pointer to a uart_handle_t structure.
  823. * @param mode: The mode of auto-baud-rate detect.
  824. * @arg UART_ABRMOD_1_TO_0
  825. * @arg UART_ABRMOD_1
  826. * @arg UART_ABRMOD_0_TO_1
  827. * @retval None
  828. */
  829. void uart_auto_baud_config(uart_handle_t *hperh, uart_auto_baud_mode_t mode)
  830. {
  831. assert_param(IS_UART_ALL(hperh->perh));
  832. assert_param(IS_UART_AUTO_BAUD_MODE(mode));
  833. MODIFY_REG(hperh->perh->MCR, UART_MCR_ABRMOD_MSK, mode << UART_MCR_ABRMOD_POSS);
  834. return;
  835. }
  836. /**
  837. * @brief Send address in RS485 mode.
  838. * @param hperh: Pointer to a uart_handle_t structure that contains
  839. * the configuration information for the specified UART module.
  840. * @param addr: the address of RS485 device.
  841. * @param timeout: Timeout duration
  842. * @retval The ALD status.
  843. */
  844. ald_status_t uart_rs485_send_addr(uart_handle_t *hperh, uint16_t addr, uint32_t timeout)
  845. {
  846. assert_param(IS_UART_ALL(hperh->perh));
  847. if ((hperh->state != UART_STATE_READY) && (hperh->state != UART_STATE_BUSY_RX))
  848. return BUSY;
  849. SET_BIT(hperh->state, UART_STATE_TX_MASK);
  850. if (uart_wait_flag(hperh, UART_STATUS_TBEM, SET, timeout) != OK) {
  851. hperh->state = UART_STATE_READY;
  852. return TIMEOUT;
  853. }
  854. WRITE_REG(hperh->perh->TBR, (addr | 0x100));
  855. if (uart_wait_flag(hperh, UART_STATUS_TEM, SET, timeout) != OK) {
  856. hperh->state = UART_STATE_READY;
  857. return TIMEOUT;
  858. }
  859. CLEAR_BIT(hperh->state, UART_STATE_TX_MASK);
  860. return OK;
  861. }
  862. /**
  863. * @brief Get the status of UART interrupt source.
  864. * @param hperh: Pointer to a uart_handle_t structure.
  865. * @param it: Specifies the UART interrupt source.
  866. * This parameter can be one of the @ref uart_it_t.
  867. * @retval Status:
  868. * - 0: RESET
  869. * - 1: SET
  870. */
  871. it_status_t uart_get_it_status(uart_handle_t *hperh, uart_it_t it)
  872. {
  873. assert_param(IS_UART_ALL(hperh->perh));
  874. assert_param(IS_UART_IT(it));
  875. if (READ_BIT(hperh->perh->IVS, it))
  876. return SET;
  877. return RESET;
  878. }
  879. /**
  880. * @brief Get the status of UART_SR register.
  881. * @param hperh: Pointer to a uart_handle_t structure.
  882. * @param status: Specifies the UART status type.
  883. * This parameter can be one of the @ref uart_status_t.
  884. * @retval Status:
  885. * - 0: RESET
  886. * - 1: SET
  887. */
  888. flag_status_t uart_get_status(uart_handle_t *hperh, uart_status_t status)
  889. {
  890. assert_param(IS_UART_ALL(hperh->perh));
  891. assert_param(IS_UART_STATUS(status));
  892. if (READ_BIT(hperh->perh->SR, status))
  893. return SET;
  894. return RESET;
  895. }
  896. /**
  897. * @brief Get the status of UART interrupt flag.
  898. * @param hperh: Pointer to a uart_handle_t structure.
  899. * @param flag: Specifies the UART interrupt flag.
  900. * This parameter can be one of the @ref uart_flag_t.
  901. * @retval Status:
  902. * - 0: RESET
  903. * - 1: SET
  904. */
  905. flag_status_t uart_get_flag_status(uart_handle_t *hperh, uart_flag_t flag)
  906. {
  907. assert_param(IS_UART_ALL(hperh->perh));
  908. assert_param(IS_UART_IF(flag));
  909. if (READ_BIT(hperh->perh->RIF, flag))
  910. return SET;
  911. return RESET;
  912. }
  913. /**
  914. * @brief Get the status of interrupt flag and interupt source.
  915. * @param hperh: Pointer to a uart_handle_t structure.
  916. * @param flag: Specifies the UART interrupt flag.
  917. * This parameter can be one of the @ref uart_flag_t.
  918. * @retval Status:
  919. * - 0: RESET
  920. * - 1: SET
  921. */
  922. flag_status_t uart_get_mask_flag_status(uart_handle_t *hperh, uart_flag_t flag)
  923. {
  924. assert_param(IS_UART_ALL(hperh->perh));
  925. assert_param(IS_UART_IF(flag));
  926. if (READ_BIT(hperh->perh->IFM, flag))
  927. return SET;
  928. return RESET;
  929. }
  930. /**
  931. * @brief Clear the UART interrupt flag.
  932. * @param hperh: Pointer to a uart_handle_t structure.
  933. * @param flag: Specifies the UART interrupt flag.
  934. * This parameter can be one of the @ref uart_flag_t.
  935. * @retval None
  936. */
  937. void uart_clear_flag_status(uart_handle_t *hperh, uart_flag_t flag)
  938. {
  939. assert_param(IS_UART_ALL(hperh->perh));
  940. assert_param(IS_UART_IF(flag));
  941. WRITE_REG(hperh->perh->ICR, flag);
  942. return;
  943. }
  944. /**
  945. * @}
  946. */
  947. /** @defgroup UART_Public_Functions_Group4 Peripheral State and Errors functions
  948. * @brief UART State and Errors functions
  949. *
  950. @verbatim
  951. ==============================================================================
  952. ##### Peripheral State and Errors functions #####
  953. ==============================================================================
  954. [..]
  955. This subsection provides a set of functions allowing to return the State of
  956. UART communication process, return Peripheral Errors occurred during communication
  957. process
  958. (+) uart_get_state() API can be helpful to check in run-time the state of the UART peripheral.
  959. (+) uart_get_error() check in run-time errors that could be occurred during communication.
  960. @endverbatim
  961. * @{
  962. */
  963. /**
  964. * @brief Returns the UART state.
  965. * @param hperh: Pointer to a uart_handle_t structure.
  966. * @retval ALD state
  967. */
  968. uart_state_t uart_get_state(uart_handle_t *hperh)
  969. {
  970. return hperh->state;
  971. }
  972. /**
  973. * @brief Return the UART error code
  974. * @param hperh: Pointer to a uart_handle_t structure.
  975. * @retval UART Error Code
  976. */
  977. uint32_t uart_get_error(uart_handle_t *hperh)
  978. {
  979. return hperh->err_code;
  980. }
  981. /**
  982. * @}
  983. */
  984. /**
  985. * @}
  986. */
  987. #endif /* ALD_UART */
  988. /**
  989. * @}
  990. */
  991. /**
  992. * @}
  993. */