usart.c 8.5 KB

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  1. /*
  2. * File : usart.c
  3. * mb9bf506r uart driver
  4. * This file is part of RT-Thread RTOS
  5. * COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
  6. *
  7. * The license and distribution terms for this file may be
  8. * found in the file LICENSE in this distribution or at
  9. * http://www.rt-thread.org/license/LICENSE
  10. *
  11. * Change Logs:
  12. * Date Author Notes
  13. * 2012-11-30 lgnq first version
  14. */
  15. #include <rtthread.h>
  16. #include <rtdevice.h>
  17. #include "usart.h"
  18. #include "uart_18xx_43xx.h"
  19. #include "scu_18xx_43xx.h"
  20. #if defined(RT_USING_UART0)
  21. /* UART0 device driver structure */
  22. struct serial_ringbuffer uart0_int_rx;
  23. struct uart_device uart0 =
  24. {
  25. LPC_USART0,
  26. USART0_IRQn,
  27. };
  28. struct rt_serial_device serial0;
  29. void UART0_IRQHandler(void)
  30. {
  31. UART_Int_Status status;
  32. /* enter interrupt */
  33. rt_interrupt_enter();
  34. status = Chip_UART_GetIntStatus(LPC_USART0);
  35. /* error */
  36. if (status == UART_ERROR)
  37. {
  38. return;
  39. }
  40. /* ready for Read Data */
  41. if (status & READY_TO_RECEIVE)
  42. {
  43. rt_hw_serial_isr(&serial0);
  44. }
  45. /* leave interrupt */
  46. rt_interrupt_leave();
  47. }
  48. #endif
  49. #if defined(RT_USING_UART1)
  50. /* UART1 device driver structure */
  51. struct serial_ringbuffer uart1_int_rx;
  52. struct uart_device uart1 =
  53. {
  54. LPC_UART1,
  55. USART1_IRQn,
  56. };
  57. struct rt_serial_device serial1;
  58. void UART1_IRQHandler(void)
  59. {
  60. UART_Int_Status status;
  61. /* enter interrupt */
  62. rt_interrupt_enter();
  63. status = Chip_UART_GetIntStatus(LPC_UART1);
  64. /* error */
  65. if (status == UART_ERROR)
  66. {
  67. return;
  68. }
  69. /* ready for Read Data */
  70. if (status & READY_TO_RECEIVE)
  71. {
  72. rt_hw_serial_isr(&serial1);
  73. }
  74. /* leave interrupt */
  75. rt_interrupt_leave();
  76. }
  77. #endif
  78. #if defined(RT_USING_UART2)
  79. /* UART2 device driver structure */
  80. struct serial_ringbuffer uart2_int_rx;
  81. struct uart_device uart2 =
  82. {
  83. LPC_USART2,
  84. USART2_IRQn,
  85. };
  86. struct rt_serial_device serial2;
  87. void UART2_IRQHandler(void)
  88. {
  89. UART_Int_Status status;
  90. /* enter interrupt */
  91. rt_interrupt_enter();
  92. status = Chip_UART_GetIntStatus(LPC_USART2);
  93. /* error */
  94. if (status == UART_ERROR)
  95. {
  96. return;
  97. }
  98. /* ready for Read Data */
  99. if (status & READY_TO_RECEIVE)
  100. {
  101. rt_hw_serial_isr(&serial2);
  102. }
  103. /* leave interrupt */
  104. rt_interrupt_leave();
  105. }
  106. #endif
  107. #if defined(RT_USING_UART3)
  108. /* UART3 device driver structure */
  109. struct serial_ringbuffer uart3_int_rx;
  110. struct uart_device uart3 =
  111. {
  112. LPC_USART3,
  113. USART3_IRQn,
  114. };
  115. struct rt_serial_device serial3;
  116. void UART3_IRQHandler(void)
  117. {
  118. UART_Int_Status status;
  119. /* enter interrupt */
  120. rt_interrupt_enter();
  121. status = Chip_UART_GetIntStatus(LPC_USART3);
  122. /* error */
  123. if (status == UART_ERROR)
  124. {
  125. return;
  126. }
  127. /* ready for Read Data */
  128. if (status & READY_TO_RECEIVE)
  129. {
  130. rt_hw_serial_isr(&serial3);
  131. }
  132. /* leave interrupt */
  133. rt_interrupt_leave();
  134. }
  135. #endif
  136. void uart_pin_setup(void)
  137. {
  138. #if defined(RT_USING_UART0)
  139. Chip_SCU_PinMux(0x6, 4, MD_PDN, FUNC2); /* P6.5 : UART0_TXD */
  140. Chip_SCU_PinMux(0x6, 5, MD_PLN | MD_EZI | MD_ZI, FUNC2); /* P6.4 : UART0_RXD */
  141. #endif
  142. #if defined(RT_USING_UART1)
  143. Chip_SCU_PinMux(0x1, 13, MD_PDN, FUNC2); /* P1.13 : UART1_TXD */
  144. Chip_SCU_PinMux(0x1, 14, MD_PLN | MD_EZI | MD_ZI, FUNC2); /* P1.14 : UART1_RX */
  145. #endif
  146. }
  147. static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  148. {
  149. struct uart_device *uart;
  150. UART_DATABIT_Type databit;
  151. UART_STOPBIT_Type stopbit;
  152. UART_PARITY_Type parity;
  153. /* UART FIFO configuration Struct variable */
  154. UART_FIFO_CFG_Type UARTFIFOConfigStruct;
  155. RT_ASSERT(serial != RT_NULL);
  156. uart = (struct uart_device *)serial->parent.user_data;
  157. Chip_UART_Init(uart->uart_regs);
  158. Chip_UART_SetBaud(uart->uart_regs, cfg->baud_rate);
  159. /* set stop bits */
  160. switch (cfg->stop_bits)
  161. {
  162. case STOP_BITS_1:
  163. stopbit = UART_STOPBIT_1;
  164. break;
  165. case STOP_BITS_2:
  166. stopbit = UART_STOPBIT_2;
  167. break;
  168. default:
  169. return RT_ERROR;
  170. }
  171. /* set data bits */
  172. switch (cfg->data_bits)
  173. {
  174. case DATA_BITS_5:
  175. databit = UART_DATABIT_5;
  176. break;
  177. case DATA_BITS_6:
  178. databit = UART_DATABIT_6;
  179. break;
  180. case DATA_BITS_7:
  181. databit = UART_DATABIT_7;
  182. break;
  183. case DATA_BITS_8:
  184. databit = UART_DATABIT_8;
  185. break;
  186. default:
  187. return RT_ERROR;
  188. }
  189. /* set parity */
  190. switch (cfg->parity)
  191. {
  192. case PARITY_NONE:
  193. parity = UART_PARITY_NONE;
  194. break;
  195. case PARITY_EVEN:
  196. parity = UART_PARITY_EVEN;
  197. break;
  198. case PARITY_ODD:
  199. parity = UART_PARITY_ODD;
  200. break;
  201. default:
  202. return RT_ERROR;
  203. }
  204. Chip_UART_ConfigData(uart->uart_regs, databit, parity, stopbit);
  205. /* Enable UART Transmit */
  206. Chip_UART_TxCmd(uart->uart_regs, ENABLE);
  207. Chip_UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
  208. /* Enable DMA mode in UART */
  209. UARTFIFOConfigStruct.FIFO_DMAMode = ENABLE;
  210. /* Initialize FIFO for UART0 peripheral */
  211. Chip_UART_FIFOConfig(uart->uart_regs, &UARTFIFOConfigStruct);
  212. /* Enable UART Rx interrupt */
  213. Chip_UART_IntConfig(uart->uart_regs, UART_INTCFG_RBR, ENABLE);
  214. /* Enable UART line status interrupt */
  215. Chip_UART_IntConfig(uart->uart_regs, UART_INTCFG_RLS, ENABLE);
  216. /* Enable Interrupt for UART channel */
  217. /* Priority = 1 */
  218. NVIC_SetPriority(uart->irq_num, 1);
  219. return RT_EOK;
  220. }
  221. static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
  222. {
  223. struct uart_device *uart;
  224. RT_ASSERT(serial != RT_NULL);
  225. uart = (struct uart_device *)serial->parent.user_data;
  226. switch (cmd)
  227. {
  228. case RT_DEVICE_CTRL_CLR_INT:
  229. /* disable rx irq */
  230. UART_DISABLE_IRQ(uart->irq_num);
  231. break;
  232. case RT_DEVICE_CTRL_SET_INT:
  233. /* enable rx irq */
  234. UART_ENABLE_IRQ(uart->irq_num);
  235. break;
  236. }
  237. return (RT_EOK);
  238. }
  239. static int uart_putc(struct rt_serial_device *serial, char c)
  240. {
  241. struct uart_device *uart;
  242. RT_ASSERT(serial != RT_NULL);
  243. uart = (struct uart_device *)serial->parent.user_data;
  244. /* wait send buffer is empty */
  245. while (!(uart->uart_regs->LSR & UART_LSR_THRE))
  246. ;
  247. /* write to send buffer */
  248. uart->uart_regs->THR = c & UART_THR_MASKBIT;
  249. return (1);
  250. }
  251. static int uart_getc(struct rt_serial_device *serial)
  252. {
  253. struct uart_device *uart;
  254. uint8_t ch;
  255. RT_ASSERT(serial != RT_NULL);
  256. uart = (struct uart_device *)serial->parent.user_data;
  257. /* receive buffer is full */
  258. if (uart->uart_regs->LSR & UART_LSR_RDR)
  259. {
  260. ch = uart->uart_regs->RBR & UART_RBR_MASKBIT;
  261. return (ch);
  262. }
  263. else
  264. return (-1);
  265. }
  266. static struct rt_uart_ops uart_ops =
  267. {
  268. uart_configure,
  269. uart_control,
  270. uart_putc,
  271. uart_getc,
  272. };
  273. void rt_hw_serial_init(void)
  274. {
  275. struct serial_configure config;
  276. config.baud_rate = BAUD_RATE_115200;
  277. config.data_bits = DATA_BITS_8;
  278. config.parity = PARITY_NONE;
  279. config.stop_bits = STOP_BITS_1;
  280. uart_pin_setup();
  281. #if defined(RT_USING_UART0)
  282. serial0.ops = &uart_ops;
  283. serial0.int_rx = &uart0_int_rx;
  284. serial0.config = config;
  285. /* register UART0 device */
  286. rt_hw_serial_register(&serial0,
  287. "uart0",
  288. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  289. &uart0);
  290. #endif
  291. #if defined(RT_USING_UART1)
  292. serial1.ops = &uart_ops;
  293. serial1.int_rx = &uart1_int_rx;
  294. serial1.config = config;
  295. /* register UART1 device */
  296. rt_hw_serial_register(&serial1,
  297. "uart1",
  298. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  299. &uart1);
  300. #endif
  301. #if defined(RT_USING_UART2)
  302. serial2.ops = &uart_ops;
  303. serial2.int_rx = &uart2_int_rx;
  304. serial2.config = config;
  305. /* register UART2 device */
  306. rt_hw_serial_register(&serial2,
  307. "uart2",
  308. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  309. &uart2);
  310. #endif
  311. #if defined(RT_USING_UART3)
  312. serial3.ops = &uart_ops;
  313. serial3.int_rx = &uart3_int_rx;
  314. serial3.config = config;
  315. /* register UART3 device */
  316. rt_hw_serial_register(&serial3,
  317. "uart3",
  318. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  319. &uart3);
  320. #endif
  321. }