stm32f10x_i2c.h 18 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f10x_i2c.h
  4. * @author MCD Application Team
  5. * @version V3.2.0
  6. * @date 03/01/2010
  7. * @brief This file contains all the functions prototypes for the I2C firmware
  8. * library.
  9. ******************************************************************************
  10. * @copy
  11. *
  12. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  13. * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  14. * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  15. * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  16. * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  17. * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  18. *
  19. * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
  20. */
  21. /* Define to prevent recursive inclusion -------------------------------------*/
  22. #ifndef __STM32F10x_I2C_H
  23. #define __STM32F10x_I2C_H
  24. #ifdef __cplusplus
  25. extern "C" {
  26. #endif
  27. /* Includes ------------------------------------------------------------------*/
  28. #include "stm32f10x.h"
  29. /** @addtogroup STM32F10x_StdPeriph_Driver
  30. * @{
  31. */
  32. /** @addtogroup I2C
  33. * @{
  34. */
  35. /** @defgroup I2C_Exported_Types
  36. * @{
  37. */
  38. /**
  39. * @brief I2C Init structure definition
  40. */
  41. typedef struct
  42. {
  43. uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency.
  44. This parameter must be set to a value lower than 400kHz */
  45. uint16_t I2C_Mode; /*!< Specifies the I2C mode.
  46. This parameter can be a value of @ref I2C_mode */
  47. uint16_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
  48. This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
  49. uint16_t I2C_OwnAddress1; /*!< Specifies the first device own address.
  50. This parameter can be a 7-bit or 10-bit address. */
  51. uint16_t I2C_Ack; /*!< Enables or disables the acknowledgement.
  52. This parameter can be a value of @ref I2C_acknowledgement */
  53. uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.
  54. This parameter can be a value of @ref I2C_acknowledged_address */
  55. }I2C_InitTypeDef;
  56. /**
  57. * @}
  58. */
  59. /** @defgroup I2C_Exported_Constants
  60. * @{
  61. */
  62. #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \
  63. ((PERIPH) == I2C2))
  64. /** @defgroup I2C_mode
  65. * @{
  66. */
  67. #define I2C_Mode_I2C ((uint16_t)0x0000)
  68. #define I2C_Mode_SMBusDevice ((uint16_t)0x0002)
  69. #define I2C_Mode_SMBusHost ((uint16_t)0x000A)
  70. #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \
  71. ((MODE) == I2C_Mode_SMBusDevice) || \
  72. ((MODE) == I2C_Mode_SMBusHost))
  73. /**
  74. * @}
  75. */
  76. /** @defgroup I2C_duty_cycle_in_fast_mode
  77. * @{
  78. */
  79. #define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */
  80. #define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */
  81. #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \
  82. ((CYCLE) == I2C_DutyCycle_2))
  83. /**
  84. * @}
  85. */
  86. /** @defgroup I2C_acknowledgement
  87. * @{
  88. */
  89. #define I2C_Ack_Enable ((uint16_t)0x0400)
  90. #define I2C_Ack_Disable ((uint16_t)0x0000)
  91. #define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \
  92. ((STATE) == I2C_Ack_Disable))
  93. /**
  94. * @}
  95. */
  96. /** @defgroup I2C_transfer_direction
  97. * @{
  98. */
  99. #define I2C_Direction_Transmitter ((uint8_t)0x00)
  100. #define I2C_Direction_Receiver ((uint8_t)0x01)
  101. #define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
  102. ((DIRECTION) == I2C_Direction_Receiver))
  103. /**
  104. * @}
  105. */
  106. /** @defgroup I2C_acknowledged_address
  107. * @{
  108. */
  109. #define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000)
  110. #define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000)
  111. #define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
  112. ((ADDRESS) == I2C_AcknowledgedAddress_10bit))
  113. /**
  114. * @}
  115. */
  116. /** @defgroup I2C_registers
  117. * @{
  118. */
  119. #define I2C_Register_CR1 ((uint8_t)0x00)
  120. #define I2C_Register_CR2 ((uint8_t)0x04)
  121. #define I2C_Register_OAR1 ((uint8_t)0x08)
  122. #define I2C_Register_OAR2 ((uint8_t)0x0C)
  123. #define I2C_Register_DR ((uint8_t)0x10)
  124. #define I2C_Register_SR1 ((uint8_t)0x14)
  125. #define I2C_Register_SR2 ((uint8_t)0x18)
  126. #define I2C_Register_CCR ((uint8_t)0x1C)
  127. #define I2C_Register_TRISE ((uint8_t)0x20)
  128. #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \
  129. ((REGISTER) == I2C_Register_CR2) || \
  130. ((REGISTER) == I2C_Register_OAR1) || \
  131. ((REGISTER) == I2C_Register_OAR2) || \
  132. ((REGISTER) == I2C_Register_DR) || \
  133. ((REGISTER) == I2C_Register_SR1) || \
  134. ((REGISTER) == I2C_Register_SR2) || \
  135. ((REGISTER) == I2C_Register_CCR) || \
  136. ((REGISTER) == I2C_Register_TRISE))
  137. /**
  138. * @}
  139. */
  140. /** @defgroup I2C_SMBus_alert_pin_level
  141. * @{
  142. */
  143. #define I2C_SMBusAlert_Low ((uint16_t)0x2000)
  144. #define I2C_SMBusAlert_High ((uint16_t)0xDFFF)
  145. #define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \
  146. ((ALERT) == I2C_SMBusAlert_High))
  147. /**
  148. * @}
  149. */
  150. /** @defgroup I2C_PEC_position
  151. * @{
  152. */
  153. #define I2C_PECPosition_Next ((uint16_t)0x0800)
  154. #define I2C_PECPosition_Current ((uint16_t)0xF7FF)
  155. #define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \
  156. ((POSITION) == I2C_PECPosition_Current))
  157. /**
  158. * @}
  159. */
  160. /** @defgroup I2C_interrupts_definition
  161. * @{
  162. */
  163. #define I2C_IT_BUF ((uint16_t)0x0400)
  164. #define I2C_IT_EVT ((uint16_t)0x0200)
  165. #define I2C_IT_ERR ((uint16_t)0x0100)
  166. #define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00))
  167. /**
  168. * @}
  169. */
  170. /** @defgroup I2C_interrupts_definition
  171. * @{
  172. */
  173. #define I2C_IT_SMBALERT ((uint32_t)0x01008000)
  174. #define I2C_IT_TIMEOUT ((uint32_t)0x01004000)
  175. #define I2C_IT_PECERR ((uint32_t)0x01001000)
  176. #define I2C_IT_OVR ((uint32_t)0x01000800)
  177. #define I2C_IT_AF ((uint32_t)0x01000400)
  178. #define I2C_IT_ARLO ((uint32_t)0x01000200)
  179. #define I2C_IT_BERR ((uint32_t)0x01000100)
  180. #define I2C_IT_TXE ((uint32_t)0x06000080)
  181. #define I2C_IT_RXNE ((uint32_t)0x06000040)
  182. #define I2C_IT_STOPF ((uint32_t)0x02000010)
  183. #define I2C_IT_ADD10 ((uint32_t)0x02000008)
  184. #define I2C_IT_BTF ((uint32_t)0x02000004)
  185. #define I2C_IT_ADDR ((uint32_t)0x02000002)
  186. #define I2C_IT_SB ((uint32_t)0x02000001)
  187. #define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00))
  188. #define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \
  189. ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \
  190. ((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \
  191. ((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \
  192. ((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \
  193. ((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \
  194. ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB))
  195. /**
  196. * @}
  197. */
  198. /** @defgroup I2C_flags_definition
  199. * @{
  200. */
  201. /**
  202. * @brief SR2 register flags
  203. */
  204. #define I2C_FLAG_DUALF ((uint32_t)0x00800000)
  205. #define I2C_FLAG_SMBHOST ((uint32_t)0x00400000)
  206. #define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000)
  207. #define I2C_FLAG_GENCALL ((uint32_t)0x00100000)
  208. #define I2C_FLAG_TRA ((uint32_t)0x00040000)
  209. #define I2C_FLAG_BUSY ((uint32_t)0x00020000)
  210. #define I2C_FLAG_MSL ((uint32_t)0x00010000)
  211. /**
  212. * @brief SR1 register flags
  213. */
  214. #define I2C_FLAG_SMBALERT ((uint32_t)0x10008000)
  215. #define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000)
  216. #define I2C_FLAG_PECERR ((uint32_t)0x10001000)
  217. #define I2C_FLAG_OVR ((uint32_t)0x10000800)
  218. #define I2C_FLAG_AF ((uint32_t)0x10000400)
  219. #define I2C_FLAG_ARLO ((uint32_t)0x10000200)
  220. #define I2C_FLAG_BERR ((uint32_t)0x10000100)
  221. #define I2C_FLAG_TXE ((uint32_t)0x10000080)
  222. #define I2C_FLAG_RXNE ((uint32_t)0x10000040)
  223. #define I2C_FLAG_STOPF ((uint32_t)0x10000010)
  224. #define I2C_FLAG_ADD10 ((uint32_t)0x10000008)
  225. #define I2C_FLAG_BTF ((uint32_t)0x10000004)
  226. #define I2C_FLAG_ADDR ((uint32_t)0x10000002)
  227. #define I2C_FLAG_SB ((uint32_t)0x10000001)
  228. #define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00))
  229. #define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \
  230. ((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \
  231. ((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \
  232. ((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \
  233. ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \
  234. ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \
  235. ((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \
  236. ((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \
  237. ((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \
  238. ((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \
  239. ((FLAG) == I2C_FLAG_SB))
  240. /**
  241. * @}
  242. */
  243. /** @defgroup I2C_Events
  244. * @{
  245. */
  246. /**
  247. * @brief EV1
  248. */
  249. #define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
  250. #define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */
  251. #define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
  252. #define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */
  253. #define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */
  254. /**
  255. * @brief EV2
  256. */
  257. #define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */
  258. /**
  259. * @brief EV3
  260. */
  261. #define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */
  262. /**
  263. * @brief EV4
  264. */
  265. #define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */
  266. /**
  267. * @brief EV5
  268. */
  269. #define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */
  270. /**
  271. * @brief EV6
  272. */
  273. #define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
  274. #define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */
  275. /**
  276. * @brief EV7
  277. */
  278. #define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */
  279. /**
  280. * @brief EV8
  281. */
  282. #define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
  283. /**
  284. * @brief EV8_2
  285. */
  286. #define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
  287. /**
  288. * @brief EV9
  289. */
  290. #define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */
  291. /**
  292. * @brief EV3_2
  293. */
  294. #define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */
  295. #define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \
  296. ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \
  297. ((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \
  298. ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \
  299. ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \
  300. ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \
  301. ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \
  302. ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \
  303. ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \
  304. ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \
  305. ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \
  306. ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \
  307. ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \
  308. ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \
  309. ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \
  310. ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \
  311. ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \
  312. ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \
  313. ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \
  314. ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE))
  315. /**
  316. * @}
  317. */
  318. /** @defgroup I2C_own_address1
  319. * @{
  320. */
  321. #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF)
  322. /**
  323. * @}
  324. */
  325. /** @defgroup I2C_clock_speed
  326. * @{
  327. */
  328. #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000))
  329. /**
  330. * @}
  331. */
  332. /**
  333. * @}
  334. */
  335. /** @defgroup I2C_Exported_Macros
  336. * @{
  337. */
  338. /**
  339. * @}
  340. */
  341. /** @defgroup I2C_Exported_Functions
  342. * @{
  343. */
  344. void I2C_DeInit(I2C_TypeDef* I2Cx);
  345. void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
  346. void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
  347. void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  348. void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  349. void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  350. void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
  351. void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
  352. void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);
  353. void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address);
  354. void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  355. void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  356. void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState);
  357. void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data);
  358. uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx);
  359. void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction);
  360. uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register);
  361. void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  362. void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert);
  363. void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
  364. void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition);
  365. void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
  366. uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx);
  367. void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  368. void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
  369. void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle);
  370. uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx);
  371. ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT);
  372. FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
  373. void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
  374. ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
  375. void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
  376. #ifdef __cplusplus
  377. }
  378. #endif
  379. #endif /*__STM32F10x_I2C_H */
  380. /**
  381. * @}
  382. */
  383. /**
  384. * @}
  385. */
  386. /**
  387. * @}
  388. */
  389. /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/