uart.c 6.4 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2010-03-08 Bernard The first version for LPC17xx
  9. * 2010-06-29 lgnq Modified for V850
  10. */
  11. #include <rthw.h>
  12. #include <rtthread.h>
  13. #include "io70f3454.h"
  14. #include "uart.h"
  15. #if defined(RT_USING_UART0) && defined(RT_USING_DEVICE)
  16. struct rt_uart_v850
  17. {
  18. struct rt_device parent;
  19. /* buffer for reception */
  20. rt_uint8_t read_index, save_index;
  21. rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
  22. }uart_device;
  23. void uarta1_receive_handler(void)
  24. {
  25. rt_ubase_t level;
  26. rt_uint8_t c;
  27. struct rt_uart_v850 *uart = &uart_device;
  28. // while(ri_u0c1 == 0)
  29. // ;
  30. c = (char) UA1RX;
  31. /* Receive Data Available */
  32. uart->rx_buffer[uart->save_index] = c;
  33. level = rt_hw_interrupt_disable();
  34. uart->save_index ++;
  35. if (uart->save_index >= RT_UART_RX_BUFFER_SIZE)
  36. uart->save_index = 0;
  37. rt_hw_interrupt_enable(level);
  38. /* invoke callback */
  39. if (uart->parent.rx_indicate != RT_NULL)
  40. {
  41. rt_size_t length;
  42. if (uart->read_index > uart->save_index)
  43. length = RT_UART_RX_BUFFER_SIZE - uart->read_index + uart->save_index;
  44. else
  45. length = uart->save_index - uart->read_index;
  46. uart->parent.rx_indicate(&uart->parent, length);
  47. }
  48. }
  49. static rt_err_t rt_uart_init (rt_device_t dev)
  50. {
  51. UA1TXE = 0U; /* disable UARTA1 transmission operation */
  52. UA1RXE = 0U; /* disable UARTA1 reception operation */
  53. UA1PWR = 0U; /* disable UARTA1 operation */
  54. UA1TMK = 1U; /* disable INTUA1T interrupt */
  55. UA1TIF = 0U; /* clear INTUA1T interrupt flag */
  56. UA1RMK = 1U; /* disable INTUA1R interrupt */
  57. UA1RIF = 0U; /* clear INTUA1R interrupt flag */
  58. /* Set INTUA1T level low priority */
  59. UA1TIC |= 0x07U;
  60. /* Set INTUA1R level low priority */
  61. UA1RIC |= 0x07U;
  62. //BAUDRATE = 9600
  63. UA1CTL1 = _03_UARTA_BASECLK_FXX_16;
  64. UA1CTL2 = _11_UARTA1_BASECLK_DIVISION;
  65. UA1CTL0 = _10_UARTA_TRANSFDIR_LSB | _00_UARTA_PARITY_NONE | _02_UARTA_DATALENGTH_8BIT | _00_UARTA_STOPLENGTH_1BIT;
  66. UA1OPT0 = _14_UARTA_UAnOPT0_INITIALVALUE | _00_UARTA_TRAN_DATALEVEL_NORMAL | _00_UARTA_REC_DATALEVEL_NORMAL;
  67. UA1PWR = 1U; /* enable UARTA1 operation */
  68. /* Set TXDA1 pin */
  69. /* Set RXDA1 pin */
  70. PFC3_bit.no0 = 0;
  71. PFCE3_bit.no0 = 0;
  72. PMC3_bit.no0 = 1;
  73. PFC3_bit.no1 = 0;
  74. PFCE3_bit.no1 = 0;
  75. PMC3_bit.no1 = 1;
  76. return RT_EOK;
  77. }
  78. static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)
  79. {
  80. RT_ASSERT(dev != RT_NULL);
  81. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  82. {
  83. /* Enable the UART Interrupt */
  84. UA1TIF = 0U; /* clear INTUA1T interrupt flag */
  85. UA1TMK = 1U; /* disable INTUA1T interrupt */
  86. UA1RIF = 0U; /* clear INTUA1R interrupt flag */
  87. UA1RMK = 0U; /* enable INTUA1R interrupt */
  88. UA1TXE = 1U; /* enable UARTA1 transmission operation */
  89. UA1RXE = 1U; /* enable UARTA1 reception operation */
  90. }
  91. return RT_EOK;
  92. }
  93. static rt_err_t rt_uart_close(rt_device_t dev)
  94. {
  95. RT_ASSERT(dev != RT_NULL);
  96. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  97. {
  98. /* Disable the UART Interrupt */
  99. UA1TXE = 0U; /* disable UARTA1 transmission operation */
  100. UA1RXE = 0U; /* disable UARTA1 reception operation */
  101. UA1TMK = 1U; /* disable INTUA1T interrupt */
  102. UA1TIF = 0U; /* clear INTUA1T interrupt flag */
  103. UA1RMK = 1U; /* disable INTUA1R interrupt */
  104. UA1RIF = 0U; /* clear INTUA1R interrupt flag */
  105. }
  106. return RT_EOK;
  107. }
  108. static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
  109. {
  110. rt_uint8_t *ptr;
  111. struct rt_uart_v850 *uart = (struct rt_uart_v850 *)dev;
  112. RT_ASSERT(uart != RT_NULL);
  113. /* point to buffer */
  114. ptr = (rt_uint8_t *)buffer;
  115. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  116. {
  117. while (size)
  118. {
  119. /* interrupt receive */
  120. rt_base_t level;
  121. /* disable interrupt */
  122. level = rt_hw_interrupt_disable();
  123. if (uart->read_index != uart->save_index)
  124. {
  125. *ptr = uart->rx_buffer[uart->read_index];
  126. uart->read_index ++;
  127. if (uart->read_index >= RT_UART_RX_BUFFER_SIZE)
  128. uart->read_index = 0;
  129. }
  130. else
  131. {
  132. /* no data in rx buffer */
  133. /* enable interrupt */
  134. rt_hw_interrupt_enable(level);
  135. break;
  136. }
  137. /* enable interrupt */
  138. rt_hw_interrupt_enable(level);
  139. ptr ++;
  140. size --;
  141. }
  142. return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  143. }
  144. return 0;
  145. }
  146. static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
  147. {
  148. char *ptr;
  149. ptr = (char*)buffer;
  150. if (dev->flag & RT_DEVICE_FLAG_STREAM)
  151. {
  152. /* stream mode */
  153. while (size)
  154. {
  155. if (*ptr == '\n')
  156. {
  157. while (UA1TSF == 1U)
  158. ;
  159. UA1TX = '\r';
  160. }
  161. /* THRE status, contain valid data */
  162. while (UA1TSF == 1U)
  163. ;
  164. UA1TX = *ptr;
  165. ptr ++;
  166. size --;
  167. }
  168. }
  169. else
  170. {
  171. while (size != 0)
  172. {
  173. /* THRE status, contain valid data */
  174. while (UA1TSF == 1U)
  175. ;
  176. UA1TX = *ptr;
  177. ptr ++;
  178. size --;
  179. }
  180. }
  181. return (rt_size_t)ptr - (rt_size_t)buffer;
  182. }
  183. void rt_hw_uart_init(void)
  184. {
  185. struct rt_uart_v850 *uart;
  186. /* get uart device */
  187. uart = &uart_device;
  188. /* device initialization */
  189. uart->parent.type = RT_Device_Class_Char;
  190. rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer));
  191. uart->read_index = uart->save_index = 0;
  192. /* device interface */
  193. uart->parent.init = rt_uart_init;
  194. uart->parent.open = rt_uart_open;
  195. uart->parent.close = rt_uart_close;
  196. uart->parent.read = rt_uart_read;
  197. uart->parent.write = rt_uart_write;
  198. uart->parent.control = RT_NULL;
  199. uart->parent.user_data = RT_NULL;
  200. rt_device_register(&uart->parent,
  201. "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_RX);
  202. }
  203. #endif /* end of UART */
  204. /*@}*/