drv_lptim.c 2.7 KB

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  1. /*
  2. * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2019-11-01 wangyq first version
  9. */
  10. #include <board.h>
  11. #include <drv_lptim.h>
  12. #include <ald_lptim.h>
  13. static lptim_handle_t h_lptim;
  14. void LPTIM0_SPI2_Handler(void)
  15. {
  16. /* LPTIM Intetrupt */
  17. if (ald_lptim_get_it_status(&h_lptim, LPTIM_IT_ARRMAT) &&
  18. ald_lptim_get_flag_status(&h_lptim, LPTIM_FLAG_ARRMAT))
  19. {
  20. /* enter interrupt */
  21. rt_interrupt_enter();
  22. ald_lptim_clear_flag_status(&h_lptim, LPTIM_FLAG_ARRMAT);
  23. /* leave interrupt */
  24. rt_interrupt_leave();
  25. }
  26. }
  27. /**
  28. * This function get current count value of LPTIM
  29. *
  30. * @return the count vlaue
  31. */
  32. rt_uint32_t es32f0_lptim_get_current_tick(void)
  33. {
  34. return READ_REG(h_lptim.perh->CNT);
  35. }
  36. /**
  37. * This function get the max value that LPTIM can count
  38. *
  39. * @return the max count
  40. */
  41. rt_uint32_t es32f0_lptim_get_tick_max(void)
  42. {
  43. return (0xFFFF);
  44. }
  45. /**
  46. * This function start LPTIM with reload value
  47. *
  48. * @param reload The value that LPTIM count down from
  49. *
  50. * @return RT_EOK
  51. */
  52. rt_err_t es32f0_lptim_start(rt_uint32_t reload)
  53. {
  54. h_lptim.init.arr = reload;
  55. ald_lptim_toggle_start_by_it(&h_lptim);
  56. return (RT_EOK);
  57. }
  58. /**
  59. * This function stop LPTIM
  60. */
  61. void es32f0_lptim_stop(void)
  62. {
  63. ald_lptim_toggle_stop_by_it(&h_lptim);
  64. }
  65. /**
  66. * This function get the count clock of LPTIM
  67. *
  68. * @return the count clock frequency in Hz
  69. */
  70. rt_uint32_t es32f0_lptim_get_countfreq(void)
  71. {
  72. return 1000000;
  73. }
  74. /**
  75. * This function initialize the lptim
  76. */
  77. int es32f0_hw_lptim_init(void)
  78. {
  79. lptim_clock_source_init_t clock_config;
  80. lptim_trigger_init_t trigger_config;
  81. /* Enable LPTIM clock */
  82. ald_cmu_perh_clock_config(CMU_PERH_LPTIM0, ENABLE);
  83. /* LPTIM Configuration */
  84. h_lptim.perh = LPTIM0;
  85. h_lptim.init.psc = LPTIM_PRESC_1; // can not select other premeter
  86. h_lptim.init.arr = 0x0FFF;
  87. h_lptim.init.clock = CMU_LP_PERH_CLOCK_SEL_HRC_1M;
  88. h_lptim.init.mode = LPTIM_MODE_SINGLE;
  89. ald_lptim_toggle_init(&h_lptim);
  90. /* Initialize clock source */
  91. clock_config.sel = LPTIM_CKSEL_INTERNAL;
  92. clock_config.polarity = LPTIM_CKPOL_RISING;
  93. ald_lptim_clock_source_config(&h_lptim, &clock_config);
  94. /* Initialize toggle */
  95. trigger_config.mode = LPTIM_TRIGEN_SW;
  96. ald_lptim_trigger_config(&h_lptim, &trigger_config);
  97. ald_lptim_interrupt_config(&h_lptim, LPTIM_IT_ARRMAT, ENABLE);
  98. NVIC_ClearPendingIRQ(LPTIM0_SPI2_IRQn);
  99. NVIC_SetPriority(LPTIM0_SPI2_IRQn, 0);
  100. NVIC_EnableIRQ(LPTIM0_SPI2_IRQn);
  101. return 0;
  102. }
  103. INIT_DEVICE_EXPORT(es32f0_hw_lptim_init);