drv_spi.c 8.4 KB

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  1. /*
  2. * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2019-01-24 wangyq the first version
  9. * 2019-11-01 wangyq update libraries
  10. * 2020-12-15 liuhy update libraries
  11. */
  12. #include <rtthread.h>
  13. #include <rtdevice.h>
  14. #include <string.h>
  15. #include <rthw.h>
  16. #include "board.h"
  17. #include "drv_spi.h"
  18. #include <ald_spi.h>
  19. #include <ald_gpio.h>
  20. #include <ald_cmu.h>
  21. #ifdef RT_USING_SPI
  22. #define SPITIMEOUT 0x0FFF
  23. rt_err_t spi_configure(struct rt_spi_device *device,
  24. struct rt_spi_configuration *cfg)
  25. {
  26. spi_handle_t *hspi;
  27. hspi = (spi_handle_t *)device->bus->parent.user_data;
  28. /* config spi mode */
  29. if (cfg->mode & RT_SPI_SLAVE)
  30. {
  31. hspi->init.mode = SPI_MODE_SLAVER;
  32. }
  33. else
  34. {
  35. hspi->init.mode = SPI_MODE_MASTER;
  36. }
  37. if (cfg->mode & RT_SPI_3WIRE)
  38. {
  39. hspi->init.dir = SPI_DIRECTION_1LINE;
  40. }
  41. else
  42. {
  43. hspi->init.dir = SPI_DIRECTION_2LINES;
  44. }
  45. if (cfg->data_width == 8)
  46. {
  47. hspi->init.data_size = SPI_DATA_SIZE_8;
  48. }
  49. else if (cfg->data_width == 16)
  50. {
  51. hspi->init.data_size = SPI_DATA_SIZE_16;
  52. }
  53. if (cfg->mode & RT_SPI_CPHA)
  54. {
  55. hspi->init.phase = SPI_CPHA_SECOND;
  56. }
  57. else
  58. {
  59. hspi->init.phase = SPI_CPHA_FIRST;
  60. }
  61. if (cfg->mode & RT_SPI_CPOL)
  62. {
  63. hspi->init.polarity = SPI_CPOL_HIGH;
  64. }
  65. else
  66. {
  67. hspi->init.polarity = SPI_CPOL_LOW;
  68. }
  69. if (cfg->mode & RT_SPI_NO_CS)
  70. {
  71. hspi->init.ss_en = DISABLE;
  72. }
  73. else
  74. {
  75. hspi->init.ss_en = ENABLE;
  76. }
  77. /* config spi clock */
  78. if (cfg->max_hz >= ald_cmu_get_pclk1_clock() / 2)
  79. {
  80. /* pclk1 max speed 48MHz, spi master max speed 10MHz */
  81. if (ald_cmu_get_pclk1_clock() / 2 <= 10000000)
  82. {
  83. hspi->init.baud = SPI_BAUD_2;
  84. }
  85. else if (ald_cmu_get_pclk1_clock() / 4 <= 10000000)
  86. {
  87. hspi->init.baud = SPI_BAUD_4;
  88. }
  89. else
  90. {
  91. hspi->init.baud = SPI_BAUD_8;
  92. }
  93. }
  94. else if (cfg->max_hz >= ald_cmu_get_pclk1_clock() / 4)
  95. {
  96. /* pclk1 max speed 48MHz, spi master max speed 10MHz */
  97. if (ald_cmu_get_pclk1_clock() / 4 <= 10000000)
  98. {
  99. hspi->init.baud = SPI_BAUD_4;
  100. }
  101. else
  102. {
  103. hspi->init.baud = SPI_BAUD_8;
  104. }
  105. }
  106. else if (cfg->max_hz >= ald_cmu_get_pclk1_clock() / 8)
  107. {
  108. hspi->init.baud = SPI_BAUD_8;
  109. }
  110. else if (cfg->max_hz >= ald_cmu_get_pclk1_clock() / 16)
  111. {
  112. hspi->init.baud = SPI_BAUD_16;
  113. }
  114. else if (cfg->max_hz >= ald_cmu_get_pclk1_clock() / 32)
  115. {
  116. hspi->init.baud = SPI_BAUD_32;
  117. }
  118. else if (cfg->max_hz >= ald_cmu_get_pclk1_clock() / 64)
  119. {
  120. hspi->init.baud = SPI_BAUD_64;
  121. }
  122. else if (cfg->max_hz >= ald_cmu_get_pclk1_clock() / 128)
  123. {
  124. hspi->init.baud = SPI_BAUD_128;
  125. }
  126. else
  127. {
  128. hspi->init.baud = SPI_BAUD_256;
  129. }
  130. ald_spi_init(hspi);
  131. return RT_EOK;
  132. }
  133. static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
  134. {
  135. rt_err_t res;
  136. spi_handle_t *hspi;
  137. struct es32f0_hw_spi_cs *cs;
  138. RT_ASSERT(device != RT_NULL);
  139. RT_ASSERT(device->bus != RT_NULL);
  140. RT_ASSERT(device->bus->parent.user_data != RT_NULL);
  141. hspi = (spi_handle_t *)device->bus->parent.user_data;
  142. cs = device->parent.user_data;
  143. if(message->send_buf != RT_NULL || message->recv_buf != RT_NULL)
  144. {
  145. /* send & receive */
  146. if ((message->send_buf != RT_NULL) && (message->recv_buf != RT_NULL))
  147. {
  148. if (message->cs_take)
  149. {
  150. rt_pin_write(cs->pin, 0);
  151. }
  152. res = ald_spi_send_recv(hspi, (rt_uint8_t *)message->send_buf, (rt_uint8_t *)message->recv_buf,
  153. (rt_int32_t)message->length, SPITIMEOUT);
  154. if (message->cs_release)
  155. {
  156. rt_pin_write(cs->pin, 1);
  157. }
  158. if (res != RT_EOK)
  159. return RT_ERROR;
  160. }
  161. else
  162. {
  163. /* only send data */
  164. if (message->recv_buf == RT_NULL)
  165. {
  166. if (message->cs_take)
  167. {
  168. rt_pin_write(cs->pin, 0);
  169. }
  170. res = ald_spi_send(hspi, (rt_uint8_t *)message->send_buf, (rt_int32_t)message->length, SPITIMEOUT);
  171. if (message->cs_release)
  172. {
  173. rt_pin_write(cs->pin, 1);
  174. }
  175. if (res != RT_EOK)
  176. return RT_ERROR;
  177. }
  178. /* only receive data */
  179. if (message->send_buf == RT_NULL)
  180. {
  181. if (message->cs_take)
  182. {
  183. rt_pin_write(cs->pin, 0);
  184. }
  185. res = ald_spi_recv(hspi, (rt_uint8_t *)message->recv_buf, (rt_int32_t)message->length, SPITIMEOUT);
  186. if (message->cs_release)
  187. {
  188. rt_pin_write(cs->pin, 1);
  189. }
  190. if (res != RT_EOK)
  191. return RT_ERROR;
  192. }
  193. }
  194. }
  195. else
  196. {
  197. if (message->cs_take)
  198. {
  199. rt_pin_write(cs->pin, 0);
  200. }
  201. if (message->cs_release)
  202. {
  203. rt_pin_write(cs->pin, 1);
  204. }
  205. return RT_EOK;
  206. }
  207. return message->length;
  208. }
  209. const struct rt_spi_ops es32f0_spi_ops =
  210. {
  211. spi_configure,
  212. spixfer,
  213. };
  214. rt_err_t es32f0_spi_device_attach(rt_uint32_t pin, const char *bus_name, const char *device_name)
  215. {
  216. /* define spi Instance */
  217. struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
  218. RT_ASSERT(spi_device != RT_NULL);
  219. struct es32f0_hw_spi_cs *cs_pin = (struct es32f0_hw_spi_cs *)rt_malloc(sizeof(struct es32f0_hw_spi_cs));
  220. RT_ASSERT(cs_pin != RT_NULL);
  221. cs_pin->pin = pin;
  222. rt_pin_mode(pin, PIN_MODE_OUTPUT);
  223. rt_pin_write(pin, 1);
  224. return rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
  225. }
  226. #ifdef BSP_USING_SPI0
  227. static struct rt_spi_bus _spi_bus0;
  228. static spi_handle_t _spi0;
  229. #endif
  230. #ifdef BSP_USING_SPI1
  231. static struct rt_spi_bus _spi_bus1;
  232. static spi_handle_t _spi1;
  233. #endif
  234. int rt_hw_spi_init(void)
  235. {
  236. int result = RT_EOK;
  237. struct rt_spi_bus *spi_bus;
  238. spi_handle_t *spi;
  239. gpio_init_t gpio_instruct;
  240. #ifdef BSP_USING_SPI0
  241. _spi0.perh = SPI0;
  242. spi_bus = &_spi_bus0;
  243. spi = &_spi0;
  244. rt_device_t spi_bus_dev0;
  245. /* SPI0 gpio init */
  246. gpio_instruct.mode = GPIO_MODE_OUTPUT;
  247. gpio_instruct.odos = GPIO_PUSH_PULL;
  248. gpio_instruct.func = GPIO_FUNC_4;
  249. gpio_instruct.type = GPIO_TYPE_CMOS;
  250. gpio_instruct.flt = GPIO_FILTER_DISABLE;
  251. /* PB3->SPI0_SCK, PB5->SPI0_MOSI */
  252. ald_gpio_init(GPIOB, GPIO_PIN_3 | GPIO_PIN_5, &gpio_instruct);
  253. /* PB4->SPI0_MISO */
  254. gpio_instruct.mode = GPIO_MODE_INPUT;
  255. ald_gpio_init(GPIOB, GPIO_PIN_4, &gpio_instruct);
  256. spi_bus->parent.user_data = spi;
  257. result = rt_spi_bus_register(spi_bus, "spi0", &es32f0_spi_ops);
  258. if (result != RT_EOK)
  259. {
  260. return result;
  261. }
  262. rt_device_register(spi_bus_dev0, "spi00", RT_DEVICE_FLAG_RDWR);
  263. /* SPI0_NSS = PA15 = PIN 50 */
  264. result = es32f0_spi_device_attach(50, "spi0", "spi00");
  265. if (result != RT_EOK)
  266. {
  267. return result;
  268. }
  269. #endif
  270. #ifdef BSP_USING_SPI1
  271. _spi1.perh = SPI1;
  272. spi_bus = &_spi_bus1;
  273. spi = &_spi1;
  274. rt_device_t spi_bus_dev0;
  275. /* SPI1 gpio init */
  276. gpio_instruct.mode = GPIO_MODE_OUTPUT;
  277. gpio_instruct.odos = GPIO_PUSH_PULL;
  278. gpio_instruct.func = GPIO_FUNC_4;
  279. gpio_instruct.type = GPIO_TYPE_CMOS;
  280. gpio_instruct.flt = GPIO_FILTER_DISABLE;
  281. /* PB13->SPI1_SCK, PB15->SPI1_MOSI */
  282. ald_gpio_init(GPIOB, GPIO_PIN_13 | GPIO_PIN_15, &gpio_instruct);
  283. /* PB14->SPI1_MISO */
  284. gpio_instruct.mode = GPIO_MODE_INPUT;
  285. ald_gpio_init(GPIOB, GPIO_PIN_14, &gpio_instruct);
  286. spi_bus->parent.user_data = spi;
  287. result = rt_spi_bus_register(spi_bus, "spi1", &es32f0_spi_ops);
  288. if (result != RT_EOK)
  289. {
  290. return result;
  291. }
  292. rt_device_register(spi_bus_dev0, "spi10", RT_DEVICE_FLAG_RDWR);
  293. /* SPI1_NSS = PC00 = PIN 8 */
  294. result = es32f0_spi_device_attach(8, "spi1", "spi10");
  295. if (result != RT_EOK)
  296. {
  297. return result;
  298. }
  299. #endif
  300. return result;
  301. }
  302. INIT_BOARD_EXPORT(rt_hw_spi_init);
  303. #endif