context_gcc.S 4.6 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2013-07-05 Bernard the first version
  9. */
  10. #include "rtconfig.h"
  11. .section .text, "ax"
  12. #ifdef RT_USING_SMP
  13. #define rt_hw_interrupt_disable rt_hw_local_irq_disable
  14. #define rt_hw_interrupt_enable rt_hw_local_irq_enable
  15. #endif
  16. /*
  17. * rt_base_t rt_hw_interrupt_disable();
  18. */
  19. .globl rt_hw_interrupt_disable
  20. rt_hw_interrupt_disable:
  21. mrs r0, cpsr
  22. cpsid i
  23. bx lr
  24. /*
  25. * void rt_hw_interrupt_enable(rt_base_t level);
  26. */
  27. .globl rt_hw_interrupt_enable
  28. rt_hw_interrupt_enable:
  29. msr cpsr, r0
  30. bx lr
  31. /*
  32. * void rt_hw_context_switch_to(rt_uint32 to, struct rt_thread *to_thread);
  33. * r0 --> to (thread stack)
  34. * r1 --> to_thread
  35. */
  36. .globl rt_hw_context_switch_to
  37. rt_hw_context_switch_to:
  38. ldr sp, [r0] @ get new task stack pointer
  39. #ifdef RT_USING_SMP
  40. mov r0, r1
  41. bl rt_cpus_lock_status_restore
  42. #endif /*RT_USING_SMP*/
  43. #ifdef RT_USING_LWP
  44. ldmfd sp, {r13, r14}^ @ pop usr_sp usr_lr
  45. add sp, #8
  46. #endif
  47. ldmfd sp!, {r4} @ pop new task spsr
  48. msr spsr_cxsf, r4
  49. ldmfd sp!, {r0-r12, lr, pc}^ @ pop new task r0-r12, lr & pc
  50. .section .bss.share.isr
  51. _guest_switch_lvl:
  52. .word 0
  53. .globl vmm_virq_update
  54. .section .text.isr, "ax"
  55. /*
  56. * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to, struct rt_thread *to_thread);
  57. * r0 --> from (from_thread stack)
  58. * r1 --> to (to_thread stack)
  59. * r2 --> to_thread
  60. */
  61. .globl rt_hw_context_switch
  62. rt_hw_context_switch:
  63. stmfd sp!, {lr} @ push pc (lr should be pushed in place of PC)
  64. stmfd sp!, {r0-r12, lr} @ push lr & register file
  65. mrs r4, cpsr
  66. tst lr, #0x01
  67. orrne r4, r4, #0x20 @ it's thumb code
  68. stmfd sp!, {r4} @ push cpsr
  69. #ifdef RT_USING_LWP
  70. stmfd sp, {r13, r14}^ @ push usr_sp usr_lr
  71. sub sp, #8
  72. #endif
  73. str sp, [r0] @ store sp in preempted tasks TCB
  74. ldr sp, [r1] @ get new task stack pointer
  75. #ifdef RT_USING_SMP
  76. mov r0, r2
  77. bl rt_cpus_lock_status_restore
  78. #endif /*RT_USING_SMP*/
  79. #ifdef RT_USING_LWP
  80. ldmfd sp, {r13, r14}^ @ pop usr_sp usr_lr
  81. add sp, #8
  82. #endif
  83. ldmfd sp!, {r4} @ pop new task cpsr to spsr
  84. msr spsr_cxsf, r4
  85. ldmfd sp!, {r0-r12, lr, pc}^ @ pop new task r0-r12, lr & pc, copy spsr to cpsr
  86. /*
  87. * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
  88. */
  89. .equ Mode_USR, 0x10
  90. .equ Mode_FIQ, 0x11
  91. .equ Mode_IRQ, 0x12
  92. .equ Mode_SVC, 0x13
  93. .equ Mode_ABT, 0x17
  94. .equ Mode_UND, 0x1B
  95. .equ Mode_SYS, 0x1F
  96. .equ I_Bit, 0x80 @ when I bit is set, IRQ is disabled
  97. .equ F_Bit, 0x40 @ when F bit is set, FIQ is disabled
  98. .globl rt_thread_switch_interrupt_flag
  99. .globl rt_interrupt_from_thread
  100. .globl rt_interrupt_to_thread
  101. .globl rt_hw_context_switch_interrupt
  102. rt_hw_context_switch_interrupt:
  103. #ifdef RT_USING_SMP
  104. /* r0 :irq_mod context
  105. * r1 :addr of from_thread's sp
  106. * r2 :addr of to_thread's sp
  107. * r3 :to_thread's tcb
  108. */
  109. @ r0 point to {r0-r3} in stack
  110. push {r1 - r3}
  111. mov r1, r0
  112. add r0, r0, #4*4
  113. ldmfd r0!, {r4-r12,lr}@ reload saved registers
  114. mrs r3, spsr @ get cpsr of interrupt thread
  115. sub r2, lr, #4 @ save old task's pc to r2
  116. msr cpsr_c, #I_Bit|F_Bit|Mode_SVC
  117. stmfd sp!, {r2} @ push old task's pc
  118. stmfd sp!, {r4-r12,lr}@ push old task's lr,r12-r4
  119. ldmfd r1, {r4-r7} @ restore r0-r3 of the interrupt thread
  120. stmfd sp!, {r4-r7} @ push old task's r0-r3
  121. stmfd sp!, {r3} @ push old task's cpsr
  122. #ifdef RT_USING_LWP
  123. stmfd sp, {r13,r14}^ @push usr_sp usr_lr
  124. sub sp, #8
  125. #endif
  126. msr cpsr_c, #I_Bit|F_Bit|Mode_IRQ
  127. pop {r1 - r3}
  128. mov sp, r0
  129. msr cpsr_c, #I_Bit|F_Bit|Mode_SVC
  130. str sp, [r1]
  131. ldr sp, [r2]
  132. mov r0, r3
  133. bl rt_cpus_lock_status_restore
  134. #ifdef RT_USING_LWP
  135. ldmfd sp, {r13,r14}^ @pop usr_sp usr_lr
  136. add sp, #8
  137. #endif
  138. ldmfd sp!, {r4} @ pop new task's cpsr to spsr
  139. msr spsr_cxsf, r4
  140. ldmfd sp!, {r0-r12,lr,pc}^ @ pop new task's r0-r12,lr & pc, copy spsr to cpsr
  141. #else /*RT_USING_SMP*/
  142. ldr r2, =rt_thread_switch_interrupt_flag
  143. ldr r3, [r2]
  144. cmp r3, #1
  145. beq _reswitch
  146. ldr ip, =rt_interrupt_from_thread @ set rt_interrupt_from_thread
  147. mov r3, #1 @ set rt_thread_switch_interrupt_flag to 1
  148. str r0, [ip]
  149. str r3, [r2]
  150. _reswitch:
  151. ldr r2, =rt_interrupt_to_thread @ set rt_interrupt_to_thread
  152. str r1, [r2]
  153. bx lr
  154. #endif /*RT_USING_SMP*/