spi_flash_gd.c 9.8 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2015-10-11 fullhan copy from winbond flash
  9. */
  10. #include <stdint.h>
  11. #include <rtthread.h>
  12. #include <rtdevice.h>
  13. #include "spi_flash.h"
  14. #include "spi_flash_gd.h"
  15. #define FLASH_DEBUG
  16. #ifdef FLASH_DEBUG
  17. #define FLASH_TRACE rt_kprintf
  18. #else
  19. #define FLASH_TRACE(...)
  20. #endif /* #ifdef FLASH_DEBUG */
  21. #define PAGE_SIZE 4096
  22. /* JEDEC Manufacturer's ID */
  23. #define MF_ID (0xC8)
  24. /* JEDEC Device ID: Memory type and Capacity */
  25. #define MTC_GD25Q128 (0x4018)
  26. /* command list */
  27. #define CMD_WRSR (0x01) /* Write Status Register */
  28. #define CMD_PP (0x02) /* Page Program */
  29. #define CMD_READ (0x03) /* Read Data */
  30. #define CMD_WRDI (0x04) /* Write Disable */
  31. #define CMD_RDSR1 (0x05) /* Read Status Register-1 */
  32. #define CMD_WREN (0x06) /* Write Enable */
  33. #define CMD_FAST_READ (0x0B) /* Fast Read */
  34. #define CMD_ERASE_4K (0x20) /* Sector Erase:4K */
  35. #define CMD_RDSR2 (0x35) /* Read Status Register-2 */
  36. #define CMD_ERASE_32K (0x52) /* 32KB Block Erase */
  37. #define CMD_JEDEC_ID (0x9F) /* Read JEDEC ID */
  38. #define CMD_ERASE_full (0xC7) /* Chip Erase */
  39. #define CMD_ERASE_64K (0xD8) /* 64KB Block Erase */
  40. #define DUMMY (0xFF)
  41. static struct spi_flash_device spi_flash_device;
  42. static void flash_lock(struct spi_flash_device * flash_device)
  43. {
  44. rt_mutex_take(&flash_device->lock, RT_WAITING_FOREVER);
  45. }
  46. static void flash_unlock(struct spi_flash_device * flash_device)
  47. {
  48. rt_mutex_release(&flash_device->lock);
  49. }
  50. static uint8_t w25qxx_read_status(void)
  51. {
  52. return rt_spi_sendrecv8(spi_flash_device.rt_spi_device, CMD_RDSR1);
  53. }
  54. static void w25qxx_wait_busy(void)
  55. {
  56. while( w25qxx_read_status() & (0x01));
  57. }
  58. /** \brief read [size] byte from [offset] to [buffer]
  59. *
  60. * \param offset uint32_t unit : byte
  61. * \param buffer uint8_t*
  62. * \param size uint32_t unit : byte
  63. * \return uint32_t byte for read
  64. *
  65. */
  66. static uint32_t w25qxx_read(uint32_t offset, uint8_t * buffer, uint32_t size)
  67. {
  68. uint8_t send_buffer[4];
  69. send_buffer[0] = CMD_WRDI;
  70. rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 1);
  71. send_buffer[0] = CMD_READ;
  72. send_buffer[1] = (uint8_t)(offset>>16);
  73. send_buffer[2] = (uint8_t)(offset>>8);
  74. send_buffer[3] = (uint8_t)(offset);
  75. rt_spi_send_then_recv(spi_flash_device.rt_spi_device,
  76. send_buffer, 4,
  77. buffer, size);
  78. return size;
  79. }
  80. /** \brief write N page on [page]
  81. *
  82. * \param page_addr uint32_t unit : byte (4096 * N,1 page = 4096byte)
  83. * \param buffer const uint8_t*
  84. * \return uint32_t
  85. *
  86. */
  87. static uint32_t w25qxx_page_write(uint32_t page_addr, const uint8_t* buffer)
  88. {
  89. uint32_t index;
  90. uint8_t send_buffer[4];
  91. RT_ASSERT((page_addr&0xFF) == 0); /* page addr must align to 256byte. */
  92. send_buffer[0] = CMD_WREN;
  93. rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 1);
  94. send_buffer[0] = CMD_ERASE_4K;
  95. send_buffer[1] = (page_addr >> 16);
  96. send_buffer[2] = (page_addr >> 8);
  97. send_buffer[3] = (page_addr);
  98. rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 4);
  99. w25qxx_wait_busy(); // wait erase done.
  100. for(index=0; index < (PAGE_SIZE / 256); index++)
  101. {
  102. send_buffer[0] = CMD_WREN;
  103. rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 1);
  104. send_buffer[0] = CMD_PP;
  105. send_buffer[1] = (uint8_t)(page_addr >> 16);
  106. send_buffer[2] = (uint8_t)(page_addr >> 8);
  107. send_buffer[3] = (uint8_t)(page_addr);
  108. rt_spi_send_then_send(spi_flash_device.rt_spi_device,
  109. send_buffer,
  110. 4,
  111. buffer,
  112. 256);
  113. buffer += 256;
  114. page_addr += 256;
  115. w25qxx_wait_busy();
  116. }
  117. send_buffer[0] = CMD_WRDI;
  118. rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 1);
  119. return PAGE_SIZE;
  120. }
  121. /* RT-Thread device interface */
  122. static rt_err_t w25qxx_flash_init(rt_device_t dev)
  123. {
  124. return RT_EOK;
  125. }
  126. static rt_err_t w25qxx_flash_open(rt_device_t dev, rt_uint16_t oflag)
  127. {
  128. uint8_t send_buffer[3];
  129. flash_lock((struct spi_flash_device *)dev);
  130. send_buffer[0] = CMD_WREN;
  131. rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 1);
  132. send_buffer[0] = CMD_WRSR;
  133. send_buffer[1] = 0;
  134. send_buffer[2] = 0;
  135. rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 3);
  136. w25qxx_wait_busy();
  137. flash_unlock((struct spi_flash_device *)dev);
  138. return RT_EOK;
  139. }
  140. static rt_err_t w25qxx_flash_close(rt_device_t dev)
  141. {
  142. return RT_EOK;
  143. }
  144. static rt_err_t w25qxx_flash_control(rt_device_t dev, int cmd, void *args)
  145. {
  146. RT_ASSERT(dev != RT_NULL);
  147. if (cmd == RT_DEVICE_CTRL_BLK_GETGEOME)
  148. {
  149. struct rt_device_blk_geometry *geometry;
  150. geometry = (struct rt_device_blk_geometry *)args;
  151. if (geometry == RT_NULL) return -RT_ERROR;
  152. geometry->bytes_per_sector = spi_flash_device.geometry.bytes_per_sector;
  153. geometry->sector_count = spi_flash_device.geometry.sector_count;
  154. geometry->block_size = spi_flash_device.geometry.block_size;
  155. }
  156. return RT_EOK;
  157. }
  158. static rt_size_t w25qxx_flash_read(rt_device_t dev,
  159. rt_off_t pos,
  160. void* buffer,
  161. rt_size_t size)
  162. {
  163. flash_lock((struct spi_flash_device *)dev);
  164. w25qxx_read(pos*spi_flash_device.geometry.bytes_per_sector,
  165. buffer,
  166. size*spi_flash_device.geometry.bytes_per_sector);
  167. flash_unlock((struct spi_flash_device *)dev);
  168. return size;
  169. }
  170. static rt_size_t w25qxx_flash_write(rt_device_t dev,
  171. rt_off_t pos,
  172. const void* buffer,
  173. rt_size_t size)
  174. {
  175. rt_size_t i = 0;
  176. rt_size_t block = size;
  177. const uint8_t * ptr = buffer;
  178. flash_lock((struct spi_flash_device *)dev);
  179. while(block--)
  180. {
  181. w25qxx_page_write((pos + i)*spi_flash_device.geometry.bytes_per_sector,
  182. ptr);
  183. ptr += PAGE_SIZE;
  184. i++;
  185. }
  186. flash_unlock((struct spi_flash_device *)dev);
  187. return size;
  188. }
  189. #ifdef RT_USING_DEVICE_OPS
  190. const static struct rt_device_ops gd_device_ops =
  191. {
  192. w25qxx_flash_init,
  193. w25qxx_flash_open,
  194. w25qxx_flash_close,
  195. w25qxx_flash_read,
  196. w25qxx_flash_write,
  197. w25qxx_flash_control
  198. };
  199. #endif
  200. rt_err_t gd_init(const char * flash_device_name, const char * spi_device_name)
  201. {
  202. struct rt_spi_device * rt_spi_device;
  203. /* initialize mutex */
  204. if (rt_mutex_init(&spi_flash_device.lock, spi_device_name, RT_IPC_FLAG_FIFO) != RT_EOK)
  205. {
  206. rt_kprintf("init sd lock mutex failed\n");
  207. return -RT_ENOSYS;
  208. }
  209. rt_spi_device = (struct rt_spi_device *)rt_device_find(spi_device_name);
  210. if(rt_spi_device == RT_NULL)
  211. {
  212. FLASH_TRACE("spi device %s not found!\r\n", spi_device_name);
  213. return -RT_ENOSYS;
  214. }
  215. spi_flash_device.rt_spi_device = rt_spi_device;
  216. /* config spi */
  217. {
  218. struct rt_spi_configuration cfg;
  219. cfg.data_width = 8;
  220. cfg.mode = RT_SPI_MODE_0 | RT_SPI_MSB; /* SPI Compatible: Mode 0 and Mode 3 */
  221. cfg.max_hz = 50 * 1000 * 1000; /* 50M */
  222. rt_spi_configure(spi_flash_device.rt_spi_device, &cfg);
  223. }
  224. /* init flash */
  225. {
  226. rt_uint8_t cmd;
  227. rt_uint8_t id_recv[3];
  228. uint16_t memory_type_capacity;
  229. flash_lock(&spi_flash_device);
  230. cmd = 0xFF; /* reset SPI FLASH, cancel all cmd in processing. */
  231. rt_spi_send(spi_flash_device.rt_spi_device, &cmd, 1);
  232. cmd = CMD_WRDI;
  233. rt_spi_send(spi_flash_device.rt_spi_device, &cmd, 1);
  234. /* read flash id */
  235. cmd = CMD_JEDEC_ID;
  236. rt_spi_send_then_recv(spi_flash_device.rt_spi_device, &cmd, 1, id_recv, 3);
  237. flash_unlock(&spi_flash_device);
  238. if(id_recv[0] != MF_ID)
  239. {
  240. FLASH_TRACE("Manufacturers ID error!\r\n");
  241. FLASH_TRACE("JEDEC Read-ID Data : %02X %02X %02X\r\n", id_recv[0], id_recv[1], id_recv[2]);
  242. return -RT_ENOSYS;
  243. }
  244. spi_flash_device.geometry.bytes_per_sector = 4096;
  245. spi_flash_device.geometry.block_size = 4096; /* block erase: 4k */
  246. /* get memory type and capacity */
  247. memory_type_capacity = id_recv[1];
  248. memory_type_capacity = (memory_type_capacity << 8) | id_recv[2];
  249. if(memory_type_capacity == MTC_GD25Q128)
  250. {
  251. FLASH_TRACE("GD128 detection\r\n");
  252. spi_flash_device.geometry.sector_count = 4096;
  253. }
  254. else
  255. {
  256. FLASH_TRACE("Memory Capacity error!\r\n");
  257. return -RT_ENOSYS;
  258. }
  259. }
  260. /* register device */
  261. spi_flash_device.flash_device.type = RT_Device_Class_Block;
  262. #ifdef RT_USING_DEVICE_OPS
  263. spi_flash_device.flash_device.ops = &gd_device_ops;
  264. #else
  265. spi_flash_device.flash_device.init = w25qxx_flash_init;
  266. spi_flash_device.flash_device.open = w25qxx_flash_open;
  267. spi_flash_device.flash_device.close = w25qxx_flash_close;
  268. spi_flash_device.flash_device.read = w25qxx_flash_read;
  269. spi_flash_device.flash_device.write = w25qxx_flash_write;
  270. spi_flash_device.flash_device.control = w25qxx_flash_control;
  271. #endif
  272. /* no private */
  273. spi_flash_device.flash_device.user_data = RT_NULL;
  274. rt_device_register(&spi_flash_device.flash_device, flash_device_name,
  275. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STANDALONE);
  276. return RT_EOK;
  277. }