drv_hwtimer.c 13 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-12-10 zylx first version
  9. * 2020-08-25 linyongkang Fix the timer clock frequency doubling problem
  10. */
  11. #include <board.h>
  12. #ifdef BSP_USING_TIM
  13. #include "drv_config.h"
  14. //#define DRV_DEBUG
  15. #define LOG_TAG "drv.hwtimer"
  16. #include <drv_log.h>
  17. #ifdef RT_USING_HWTIMER
  18. enum
  19. {
  20. #ifdef BSP_USING_TIM1
  21. TIM1_INDEX,
  22. #endif
  23. #ifdef BSP_USING_TIM2
  24. TIM2_INDEX,
  25. #endif
  26. #ifdef BSP_USING_TIM3
  27. TIM3_INDEX,
  28. #endif
  29. #ifdef BSP_USING_TIM4
  30. TIM4_INDEX,
  31. #endif
  32. #ifdef BSP_USING_TIM5
  33. TIM5_INDEX,
  34. #endif
  35. #ifdef BSP_USING_TIM6
  36. TIM6_INDEX,
  37. #endif
  38. #ifdef BSP_USING_TIM7
  39. TIM7_INDEX,
  40. #endif
  41. #ifdef BSP_USING_TIM8
  42. TIM8_INDEX,
  43. #endif
  44. #ifdef BSP_USING_TIM9
  45. TIM9_INDEX,
  46. #endif
  47. #ifdef BSP_USING_TIM10
  48. TIM10_INDEX,
  49. #endif
  50. #ifdef BSP_USING_TIM11
  51. TIM11_INDEX,
  52. #endif
  53. #ifdef BSP_USING_TIM12
  54. TIM12_INDEX,
  55. #endif
  56. #ifdef BSP_USING_TIM13
  57. TIM13_INDEX,
  58. #endif
  59. #ifdef BSP_USING_TIM14
  60. TIM14_INDEX,
  61. #endif
  62. #ifdef BSP_USING_TIM15
  63. TIM15_INDEX,
  64. #endif
  65. #ifdef BSP_USING_TIM16
  66. TIM16_INDEX,
  67. #endif
  68. #ifdef BSP_USING_TIM17
  69. TIM17_INDEX,
  70. #endif
  71. };
  72. struct stm32_hwtimer
  73. {
  74. rt_hwtimer_t time_device;
  75. TIM_HandleTypeDef tim_handle;
  76. IRQn_Type tim_irqn;
  77. char *name;
  78. };
  79. static struct stm32_hwtimer stm32_hwtimer_obj[] =
  80. {
  81. #ifdef BSP_USING_TIM1
  82. TIM1_CONFIG,
  83. #endif
  84. #ifdef BSP_USING_TIM2
  85. TIM2_CONFIG,
  86. #endif
  87. #ifdef BSP_USING_TIM3
  88. TIM3_CONFIG,
  89. #endif
  90. #ifdef BSP_USING_TIM4
  91. TIM4_CONFIG,
  92. #endif
  93. #ifdef BSP_USING_TIM5
  94. TIM5_CONFIG,
  95. #endif
  96. #ifdef BSP_USING_TIM6
  97. TIM6_CONFIG,
  98. #endif
  99. #ifdef BSP_USING_TIM7
  100. TIM7_CONFIG,
  101. #endif
  102. #ifdef BSP_USING_TIM8
  103. TIM8_CONFIG,
  104. #endif
  105. #ifdef BSP_USING_TIM9
  106. TIM9_CONFIG,
  107. #endif
  108. #ifdef BSP_USING_TIM10
  109. TIM10_CONFIG,
  110. #endif
  111. #ifdef BSP_USING_TIM11
  112. TIM11_CONFIG,
  113. #endif
  114. #ifdef BSP_USING_TIM12
  115. TIM12_CONFIG,
  116. #endif
  117. #ifdef BSP_USING_TIM13
  118. TIM13_CONFIG,
  119. #endif
  120. #ifdef BSP_USING_TIM14
  121. TIM14_CONFIG,
  122. #endif
  123. #ifdef BSP_USING_TIM15
  124. TIM15_CONFIG,
  125. #endif
  126. #ifdef BSP_USING_TIM16
  127. TIM16_CONFIG,
  128. #endif
  129. #ifdef BSP_USING_TIM17
  130. TIM17_CONFIG,
  131. #endif
  132. };
  133. /* APBx timer clocks frequency doubler state related to APB1CLKDivider value */
  134. static void pclkx_doubler_get(rt_uint32_t *pclk1_doubler, rt_uint32_t *pclk2_doubler)
  135. {
  136. rt_uint32_t flatency = 0;
  137. RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  138. RT_ASSERT(pclk1_doubler != RT_NULL);
  139. RT_ASSERT(pclk1_doubler != RT_NULL);
  140. HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &flatency);
  141. *pclk1_doubler = 1;
  142. *pclk2_doubler = 1;
  143. #if defined(SOC_SERIES_STM32MP1)
  144. if (RCC_ClkInitStruct.APB1_Div != RCC_APB1_DIV1)
  145. {
  146. *pclk1_doubler = 2;
  147. }
  148. if (RCC_ClkInitStruct.APB2_Div != RCC_APB2_DIV1)
  149. {
  150. *pclk2_doubler = 2;
  151. }
  152. #else
  153. if (RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1)
  154. {
  155. *pclk1_doubler = 2;
  156. }
  157. #if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
  158. if (RCC_ClkInitStruct.APB2CLKDivider != RCC_HCLK_DIV1)
  159. {
  160. *pclk2_doubler = 2;
  161. }
  162. #endif
  163. #endif
  164. }
  165. static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
  166. {
  167. uint32_t prescaler_value = 0;
  168. uint32_t pclk1_doubler, pclk2_doubler;
  169. TIM_HandleTypeDef *tim = RT_NULL;
  170. struct stm32_hwtimer *tim_device = RT_NULL;
  171. RT_ASSERT(timer != RT_NULL);
  172. if (state)
  173. {
  174. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  175. tim_device = (struct stm32_hwtimer *)timer;
  176. pclkx_doubler_get(&pclk1_doubler, &pclk2_doubler);
  177. /* time init */
  178. #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  179. if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
  180. #elif defined(SOC_SERIES_STM32L4)
  181. if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
  182. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
  183. if (0)
  184. #endif
  185. {
  186. #if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
  187. prescaler_value = (uint32_t)(HAL_RCC_GetPCLK2Freq() * pclk2_doubler / 10000) - 1;
  188. #endif
  189. }
  190. else
  191. {
  192. prescaler_value = (uint32_t)(HAL_RCC_GetPCLK1Freq() * pclk1_doubler / 10000) - 1;
  193. }
  194. tim->Init.Period = 10000 - 1;
  195. tim->Init.Prescaler = prescaler_value;
  196. tim->Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  197. if (timer->info->cntmode == HWTIMER_CNTMODE_UP)
  198. {
  199. tim->Init.CounterMode = TIM_COUNTERMODE_UP;
  200. }
  201. else
  202. {
  203. tim->Init.CounterMode = TIM_COUNTERMODE_DOWN;
  204. }
  205. tim->Init.RepetitionCounter = 0;
  206. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
  207. tim->Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  208. #endif
  209. if (HAL_TIM_Base_Init(tim) != HAL_OK)
  210. {
  211. LOG_E("%s init failed", tim_device->name);
  212. return;
  213. }
  214. else
  215. {
  216. /* set the TIMx priority */
  217. HAL_NVIC_SetPriority(tim_device->tim_irqn, 3, 0);
  218. /* enable the TIMx global Interrupt */
  219. HAL_NVIC_EnableIRQ(tim_device->tim_irqn);
  220. /* clear update flag */
  221. __HAL_TIM_CLEAR_FLAG(tim, TIM_FLAG_UPDATE);
  222. /* enable update request source */
  223. __HAL_TIM_URS_ENABLE(tim);
  224. LOG_D("%s init success", tim_device->name);
  225. }
  226. }
  227. }
  228. static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
  229. {
  230. rt_err_t result = RT_EOK;
  231. TIM_HandleTypeDef *tim = RT_NULL;
  232. RT_ASSERT(timer != RT_NULL);
  233. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  234. /* set tim cnt */
  235. __HAL_TIM_SET_COUNTER(tim, 0);
  236. /* set tim arr */
  237. __HAL_TIM_SET_AUTORELOAD(tim, t - 1);
  238. if (opmode == HWTIMER_MODE_ONESHOT)
  239. {
  240. /* set timer to single mode */
  241. tim->Instance->CR1 |= TIM_OPMODE_SINGLE;
  242. }
  243. else
  244. {
  245. tim->Instance->CR1 &= (~TIM_OPMODE_SINGLE);
  246. }
  247. /* start timer */
  248. if (HAL_TIM_Base_Start_IT(tim) != HAL_OK)
  249. {
  250. LOG_E("TIM start failed");
  251. result = -RT_ERROR;
  252. }
  253. return result;
  254. }
  255. static void timer_stop(rt_hwtimer_t *timer)
  256. {
  257. TIM_HandleTypeDef *tim = RT_NULL;
  258. RT_ASSERT(timer != RT_NULL);
  259. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  260. /* stop timer */
  261. HAL_TIM_Base_Stop_IT(tim);
  262. /* set tim cnt */
  263. __HAL_TIM_SET_COUNTER(tim, 0);
  264. }
  265. static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
  266. {
  267. TIM_HandleTypeDef *tim = RT_NULL;
  268. rt_err_t result = RT_EOK;
  269. uint32_t pclk1_doubler, pclk2_doubler;
  270. RT_ASSERT(timer != RT_NULL);
  271. RT_ASSERT(arg != RT_NULL);
  272. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  273. switch (cmd)
  274. {
  275. case HWTIMER_CTRL_FREQ_SET:
  276. {
  277. rt_uint32_t freq;
  278. rt_uint16_t val;
  279. /* set timer frequence */
  280. freq = *((rt_uint32_t *)arg);
  281. pclkx_doubler_get(&pclk1_doubler, &pclk2_doubler);
  282. #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  283. if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
  284. #elif defined(SOC_SERIES_STM32L4)
  285. if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
  286. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
  287. if (0)
  288. #endif
  289. {
  290. #if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
  291. val = HAL_RCC_GetPCLK2Freq() * pclk2_doubler / freq;
  292. #endif
  293. }
  294. else
  295. {
  296. val = HAL_RCC_GetPCLK1Freq() * pclk1_doubler / freq;
  297. }
  298. __HAL_TIM_SET_PRESCALER(tim, val - 1);
  299. /* Update frequency value */
  300. tim->Instance->EGR |= TIM_EVENTSOURCE_UPDATE;
  301. }
  302. break;
  303. default:
  304. {
  305. result = -RT_ENOSYS;
  306. }
  307. break;
  308. }
  309. return result;
  310. }
  311. static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
  312. {
  313. TIM_HandleTypeDef *tim = RT_NULL;
  314. RT_ASSERT(timer != RT_NULL);
  315. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  316. return tim->Instance->CNT;
  317. }
  318. static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG;
  319. static const struct rt_hwtimer_ops _ops =
  320. {
  321. .init = timer_init,
  322. .start = timer_start,
  323. .stop = timer_stop,
  324. .count_get = timer_counter_get,
  325. .control = timer_ctrl,
  326. };
  327. #ifdef BSP_USING_TIM2
  328. void TIM2_IRQHandler(void)
  329. {
  330. /* enter interrupt */
  331. rt_interrupt_enter();
  332. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM2_INDEX].tim_handle);
  333. /* leave interrupt */
  334. rt_interrupt_leave();
  335. }
  336. #endif
  337. #ifdef BSP_USING_TIM3
  338. void TIM3_IRQHandler(void)
  339. {
  340. /* enter interrupt */
  341. rt_interrupt_enter();
  342. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM3_INDEX].tim_handle);
  343. /* leave interrupt */
  344. rt_interrupt_leave();
  345. }
  346. #endif
  347. #ifdef BSP_USING_TIM4
  348. void TIM4_IRQHandler(void)
  349. {
  350. /* enter interrupt */
  351. rt_interrupt_enter();
  352. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM4_INDEX].tim_handle);
  353. /* leave interrupt */
  354. rt_interrupt_leave();
  355. }
  356. #endif
  357. #ifdef BSP_USING_TIM5
  358. void TIM5_IRQHandler(void)
  359. {
  360. /* enter interrupt */
  361. rt_interrupt_enter();
  362. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM5_INDEX].tim_handle);
  363. /* leave interrupt */
  364. rt_interrupt_leave();
  365. }
  366. #endif
  367. #ifdef BSP_USING_TIM11
  368. void TIM1_TRG_COM_TIM11_IRQHandler(void)
  369. {
  370. /* enter interrupt */
  371. rt_interrupt_enter();
  372. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM11_INDEX].tim_handle);
  373. /* leave interrupt */
  374. rt_interrupt_leave();
  375. }
  376. #endif
  377. #ifdef BSP_USING_TIM13
  378. void TIM8_UP_TIM13_IRQHandler(void)
  379. {
  380. /* enter interrupt */
  381. rt_interrupt_enter();
  382. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM13_INDEX].tim_handle);
  383. /* leave interrupt */
  384. rt_interrupt_leave();
  385. }
  386. #endif
  387. #ifdef BSP_USING_TIM14
  388. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  389. void TIM8_TRG_COM_TIM14_IRQHandler(void)
  390. #elif defined(SOC_SERIES_STM32F0)
  391. void TIM14_IRQHandler(void)
  392. #endif
  393. {
  394. /* enter interrupt */
  395. rt_interrupt_enter();
  396. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM14_INDEX].tim_handle);
  397. /* leave interrupt */
  398. rt_interrupt_leave();
  399. }
  400. #endif
  401. #ifdef BSP_USING_TIM15
  402. void TIM1_BRK_TIM15_IRQHandler(void)
  403. {
  404. /* enter interrupt */
  405. rt_interrupt_enter();
  406. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM15_INDEX].tim_handle);
  407. /* leave interrupt */
  408. rt_interrupt_leave();
  409. }
  410. #endif
  411. #ifdef BSP_USING_TIM16
  412. #if defined(SOC_SERIES_STM32L4)
  413. void TIM1_UP_TIM16_IRQHandler(void)
  414. #elif defined(SOC_SERIES_STM32F0)
  415. void TIM16_IRQHandler(void)
  416. #endif
  417. {
  418. /* enter interrupt */
  419. rt_interrupt_enter();
  420. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM16_INDEX].tim_handle);
  421. /* leave interrupt */
  422. rt_interrupt_leave();
  423. }
  424. #endif
  425. #ifdef BSP_USING_TIM17
  426. #if defined(SOC_SERIES_STM32L4)
  427. void TIM1_TRG_COM_TIM17_IRQHandler(void)
  428. #elif defined(SOC_SERIES_STM32F0)
  429. void TIM17_IRQHandler(void)
  430. #endif
  431. {
  432. /* enter interrupt */
  433. rt_interrupt_enter();
  434. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM17_INDEX].tim_handle);
  435. /* leave interrupt */
  436. rt_interrupt_leave();
  437. }
  438. #endif
  439. void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
  440. {
  441. #ifdef BSP_USING_TIM2
  442. if (htim->Instance == TIM2)
  443. {
  444. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM2_INDEX].time_device);
  445. }
  446. #endif
  447. #ifdef BSP_USING_TIM3
  448. if (htim->Instance == TIM3)
  449. {
  450. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM3_INDEX].time_device);
  451. }
  452. #endif
  453. #ifdef BSP_USING_TIM4
  454. if (htim->Instance == TIM4)
  455. {
  456. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM4_INDEX].time_device);
  457. }
  458. #endif
  459. #ifdef BSP_USING_TIM5
  460. if (htim->Instance == TIM5)
  461. {
  462. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM5_INDEX].time_device);
  463. }
  464. #endif
  465. #ifdef BSP_USING_TIM11
  466. if (htim->Instance == TIM11)
  467. {
  468. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM11_INDEX].time_device);
  469. }
  470. #endif
  471. #ifdef BSP_USING_TIM13
  472. if (htim->Instance == TIM13)
  473. {
  474. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM13_INDEX].time_device);
  475. }
  476. #endif
  477. #ifdef BSP_USING_TIM14
  478. if (htim->Instance == TIM14)
  479. {
  480. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM14_INDEX].time_device);
  481. }
  482. #endif
  483. #ifdef BSP_USING_TIM15
  484. if (htim->Instance == TIM15)
  485. {
  486. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM15_INDEX].time_device);
  487. }
  488. #endif
  489. #ifdef BSP_USING_TIM16
  490. if (htim->Instance == TIM16)
  491. {
  492. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM16_INDEX].time_device);
  493. }
  494. #endif
  495. #ifdef BSP_USING_TIM17
  496. if (htim->Instance == TIM17)
  497. {
  498. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM17_INDEX].time_device);
  499. }
  500. #endif
  501. }
  502. static int stm32_hwtimer_init(void)
  503. {
  504. int i = 0;
  505. int result = RT_EOK;
  506. for (i = 0; i < sizeof(stm32_hwtimer_obj) / sizeof(stm32_hwtimer_obj[0]); i++)
  507. {
  508. stm32_hwtimer_obj[i].time_device.info = &_info;
  509. stm32_hwtimer_obj[i].time_device.ops = &_ops;
  510. if (rt_device_hwtimer_register(&stm32_hwtimer_obj[i].time_device, stm32_hwtimer_obj[i].name, &stm32_hwtimer_obj[i].tim_handle) == RT_EOK)
  511. {
  512. LOG_D("%s register success", stm32_hwtimer_obj[i].name);
  513. }
  514. else
  515. {
  516. LOG_E("%s register failed", stm32_hwtimer_obj[i].name);
  517. result = -RT_ERROR;
  518. }
  519. }
  520. return result;
  521. }
  522. INIT_BOARD_EXPORT(stm32_hwtimer_init);
  523. #endif /* RT_USING_HWTIMER */
  524. #endif /* BSP_USING_TIM */