drv_uart.c 6.9 KB

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  1. /*
  2. * File : drv_uart.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2009-2013 RT-Thread Develop Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2013-05-18 Bernard The first version for LPC40xx
  13. */
  14. #include <rthw.h>
  15. #include <rtthread.h>
  16. #include <rtdevice.h>
  17. #include "board.h"
  18. #include "lpc_uart.h"
  19. #include "lpc_pinsel.h"
  20. struct lpc_uart
  21. {
  22. UART_ID_Type UART;
  23. IRQn_Type UART_IRQn;
  24. };
  25. static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  26. {
  27. struct lpc_uart *uart;
  28. UART_CFG_Type UARTConfigStruct;
  29. UART_FIFO_CFG_Type UARTFIFOConfigStruct;
  30. RT_ASSERT(serial != RT_NULL);
  31. uart = (struct lpc_uart *)serial->parent.user_data;
  32. /* Initialize UART Configuration parameter structure to default state:
  33. * Baudrate = 115200 bps
  34. * 8 data bit
  35. * 1 Stop bit
  36. * None parity
  37. */
  38. UART_ConfigStructInit(&UARTConfigStruct);
  39. UARTConfigStruct.Baud_rate = 115200;
  40. // Initialize UART0 peripheral with given to corresponding parameter
  41. UART_Init(uart->UART, &UARTConfigStruct);
  42. /* Initialize FIFOConfigStruct to default state:
  43. * - FIFO_DMAMode = DISABLE
  44. * - FIFO_Level = UART_FIFO_TRGLEV0
  45. * - FIFO_ResetRxBuf = ENABLE
  46. * - FIFO_ResetTxBuf = ENABLE
  47. * - FIFO_State = ENABLE
  48. */
  49. UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
  50. // Initialize FIFO for UART0 peripheral
  51. UART_FIFOConfig(uart->UART, &UARTFIFOConfigStruct);
  52. UART_TxCmd(uart->UART, ENABLE);
  53. return RT_EOK;
  54. }
  55. static rt_err_t lpc_control(struct rt_serial_device *serial, int cmd, void *arg)
  56. {
  57. struct lpc_uart *uart;
  58. RT_ASSERT(serial != RT_NULL);
  59. uart = (struct lpc_uart *)serial->parent.user_data;
  60. switch (cmd)
  61. {
  62. case RT_DEVICE_CTRL_CLR_INT:
  63. /* disable rx irq */
  64. UART_IntConfig(uart->UART, UART_INTCFG_RBR, DISABLE);
  65. break;
  66. case RT_DEVICE_CTRL_SET_INT:
  67. /* enable rx irq */
  68. UART_IntConfig(uart->UART, UART_INTCFG_RBR, ENABLE);
  69. break;
  70. }
  71. return RT_EOK;
  72. }
  73. static int lpc_putc(struct rt_serial_device *serial, char c)
  74. {
  75. struct lpc_uart *uart;
  76. uart = (struct lpc_uart *)serial->parent.user_data;
  77. UART_Send(uart->UART, (uint8_t *)&c, 1, BLOCKING);
  78. return 1;
  79. }
  80. static int lpc_getc(struct rt_serial_device *serial)
  81. {
  82. uint8_t ch;
  83. struct lpc_uart *uart;
  84. uart = (struct lpc_uart *)serial->parent.user_data;
  85. if (UART_Receive(uart->UART, &ch, 1, NONE_BLOCKING) == 1)
  86. return (int) ch;
  87. return -1;
  88. }
  89. static const struct rt_uart_ops lpc_uart_ops =
  90. {
  91. lpc_configure,
  92. lpc_control,
  93. lpc_putc,
  94. lpc_getc,
  95. };
  96. #if defined(RT_USING_UART0)
  97. /* UART0 device driver structure */
  98. struct serial_ringbuffer uart0_int_rx;
  99. struct lpc_uart uart0 =
  100. {
  101. UART_0,
  102. UART0_IRQn,
  103. };
  104. struct rt_serial_device serial0;
  105. void UART0_IRQHandler(void)
  106. {
  107. struct lpc_uart *uart;
  108. uint32_t intsrc, tmp, tmp1;
  109. uart = &uart0;
  110. /* enter interrupt */
  111. rt_interrupt_enter();
  112. /* Determine the interrupt source */
  113. intsrc = UART_GetIntId(uart->UART);
  114. tmp = intsrc & UART_IIR_INTID_MASK;
  115. // Receive Line Status
  116. if (tmp == UART_IIR_INTID_RLS)
  117. {
  118. // Check line status
  119. tmp1 = UART_GetLineStatus(uart->UART);
  120. // Mask out the Receive Ready and Transmit Holding empty status
  121. tmp1 &= (UART_LSR_OE | UART_LSR_PE | UART_LSR_FE \
  122. | UART_LSR_BI | UART_LSR_RXFE);
  123. // If any error exist
  124. if (tmp1)
  125. {
  126. //
  127. }
  128. }
  129. // Receive Data Available or Character time-out
  130. if ((tmp == UART_IIR_INTID_RDA) || (tmp == UART_IIR_INTID_CTI))
  131. {
  132. rt_hw_serial_isr(&serial0);
  133. }
  134. /* leave interrupt */
  135. rt_interrupt_leave();
  136. }
  137. #endif
  138. #if defined(RT_USING_UART2)
  139. /* UART2 device driver structure */
  140. struct serial_ringbuffer uart2_int_rx;
  141. struct lpc_uart uart2 =
  142. {
  143. UART_2,
  144. UART2_IRQn,
  145. };
  146. struct rt_serial_device serial2;
  147. void UART2_IRQHandler(void)
  148. {
  149. struct lpc_uart *uart;
  150. uint32_t intsrc, tmp, tmp1;
  151. uart = &uart2;
  152. /* enter interrupt */
  153. rt_interrupt_enter();
  154. /* Determine the interrupt source */
  155. intsrc = UART_GetIntId(uart->UART);
  156. tmp = intsrc & UART_IIR_INTID_MASK;
  157. // Receive Line Status
  158. if (tmp == UART_IIR_INTID_RLS)
  159. {
  160. // Check line status
  161. tmp1 = UART_GetLineStatus(uart->UART);
  162. // Mask out the Receive Ready and Transmit Holding empty status
  163. tmp1 &= (UART_LSR_OE | UART_LSR_PE | UART_LSR_FE \
  164. | UART_LSR_BI | UART_LSR_RXFE);
  165. // If any error exist
  166. if (tmp1)
  167. {
  168. //
  169. }
  170. }
  171. // Receive Data Available or Character time-out
  172. if ((tmp == UART_IIR_INTID_RDA) || (tmp == UART_IIR_INTID_CTI))
  173. {
  174. rt_hw_serial_isr(&serial2);
  175. }
  176. /* leave interrupt */
  177. rt_interrupt_leave();
  178. }
  179. #endif
  180. void rt_hw_uart_init(void)
  181. {
  182. struct lpc_uart *uart;
  183. struct serial_configure config;
  184. #ifdef RT_USING_UART0
  185. uart = &uart0;
  186. config.baud_rate = BAUD_RATE_115200;
  187. config.bit_order = BIT_ORDER_LSB;
  188. config.data_bits = DATA_BITS_8;
  189. config.parity = PARITY_NONE;
  190. config.stop_bits = STOP_BITS_1;
  191. config.invert = NRZ_NORMAL;
  192. serial0.ops = &lpc_uart_ops;
  193. serial0.int_rx = &uart0_int_rx;
  194. serial0.config = config;
  195. /*
  196. * Initialize UART0 pin connect
  197. * P0.2: U0_TXD
  198. * P0.3: U0_RXD
  199. */
  200. PINSEL_ConfigPin(0, 2, 1);
  201. PINSEL_ConfigPin(0, 3, 1);
  202. /* preemption = 1, sub-priority = 1 */
  203. NVIC_SetPriority(uart->UART_IRQn, ((0x01 << 3) | 0x01));
  204. /* Enable Interrupt for UART channel */
  205. NVIC_EnableIRQ(uart->UART_IRQn);
  206. /* register UART1 device */
  207. rt_hw_serial_register(&serial0, "uart0",
  208. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  209. uart);
  210. #endif
  211. #ifdef RT_USING_UART2
  212. uart = &uart2;
  213. config.baud_rate = BAUD_RATE_115200;
  214. config.bit_order = BIT_ORDER_LSB;
  215. config.data_bits = DATA_BITS_8;
  216. config.parity = PARITY_NONE;
  217. config.stop_bits = STOP_BITS_1;
  218. config.invert = NRZ_NORMAL;
  219. serial2.ops = &lpc_uart_ops;
  220. serial2.int_rx = &uart2_int_rx;
  221. serial2.config = config;
  222. /*
  223. * Initialize UART2 pin connect
  224. * P2.8: U2_TXD
  225. * P0.11: U2_RXD
  226. */
  227. PINSEL_ConfigPin(2, 8, 2);
  228. PINSEL_ConfigPin(0, 11, 1);
  229. /* preemption = 1, sub-priority = 1 */
  230. NVIC_SetPriority(uart->UART_IRQn, ((0x01 << 3) | 0x01));
  231. /* Enable Interrupt for UART channel */
  232. NVIC_EnableIRQ(uart->UART_IRQn);
  233. /* register UART1 device */
  234. rt_hw_serial_register(&serial2, "uart2",
  235. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  236. uart);
  237. #endif
  238. }