drv_sdhci.h 1.5 KB

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  1. /*
  2. * Copyright (c) 2006-2024, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2024/04/05 flyingcys first version
  9. */
  10. #ifndef __DRV_SDHCI_H__
  11. #define __DRV_SDHCI_H__
  12. #include "mmio.h"
  13. #include "dw_sdmmc.h"
  14. #include "dw_mmc_reg.h"
  15. #include "core_rv64.h"
  16. #ifndef BIT
  17. #define BIT(nr) (UINT64_C(1) << (nr))
  18. #endif
  19. typedef enum {
  20. SDIF_CHAIN_DMA_MODE = 0x01U, ///< one descriptor with one buffer,but one descriptor point to another
  21. SDIF_DUAL_DMA_MODE = 0x02U, ///< dual mode is one descriptor with two buffer
  22. } sdhci_dma_mode_e;
  23. typedef struct {
  24. bool enable_fix_burst_len; ///< fix burst len enable/disable flag,When set, the AHB will
  25. /// use only SINGLE, INCR4, INCR8 or INCR16 during start of
  26. /// normal burst transfers. When reset, the AHB will use SINGLE
  27. /// and INCR burst transfer operations
  28. sdhci_dma_mode_e mode; ///< define the DMA mode */
  29. uint32_t *dma_des_buffer_start_addr; ///< internal DMA descriptor start address
  30. uint32_t dma_des_buffer_len; /// internal DMA buffer descriptor buffer len ,user need to pay attention to the
  31. /// dma descriptor buffer length if it is bigger enough for your transfer
  32. uint8_t dma_dws_skip_len; ///< define the descriptor skip length ,the length between two descriptor
  33. /// this field is special for dual DMA mode
  34. } sdhci_dma_config_t;
  35. #endif /* __DRV_SDHCI_H__ */