usb_dc_fsdev.c 18 KB

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  1. /*
  2. * Copyright (c) 2022, sakumisu
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include "usbd_core.h"
  7. #ifndef CONFIG_USBDEV_FSDEV_PMA_ACCESS
  8. #error "please define CONFIG_USBDEV_FSDEV_PMA_ACCESS in usb_config.h"
  9. #endif
  10. #define PMA_ACCESS CONFIG_USBDEV_FSDEV_PMA_ACCESS
  11. #include "usb_fsdev_reg.h"
  12. #ifndef CONFIG_USB_FSDEV_RAM_SIZE
  13. #define CONFIG_USB_FSDEV_RAM_SIZE 512
  14. #endif
  15. #ifndef CONFIG_USBDEV_EP_NUM
  16. #define CONFIG_USBDEV_EP_NUM 8
  17. #endif
  18. #define USB ((USB_TypeDef *)g_usbdev_bus[0].reg_base)
  19. #define USB_BTABLE_SIZE (8 * CONFIG_USBDEV_EP_NUM)
  20. static void fsdev_write_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
  21. static void fsdev_read_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
  22. /* Endpoint state */
  23. struct fsdev_ep_state {
  24. uint16_t ep_mps; /* Endpoint max packet size */
  25. uint8_t ep_type; /* Endpoint type */
  26. uint8_t ep_stalled; /* Endpoint stall flag */
  27. uint8_t ep_enable; /* Endpoint enable */
  28. uint16_t ep_pma_buf_len; /* Previously allocated buffer size */
  29. uint16_t ep_pma_addr; /* ep pmd allocated addr */
  30. uint8_t *xfer_buf;
  31. uint32_t xfer_len;
  32. uint32_t actual_xfer_len;
  33. };
  34. /* Driver state */
  35. struct fsdev_udc {
  36. struct usb_setup_packet setup;
  37. volatile uint8_t dev_addr; /*!< USB Address */
  38. volatile uint32_t pma_offset; /*!< pma offset */
  39. struct fsdev_ep_state in_ep[CONFIG_USBDEV_EP_NUM]; /*!< IN endpoint parameters*/
  40. struct fsdev_ep_state out_ep[CONFIG_USBDEV_EP_NUM]; /*!< OUT endpoint parameters */
  41. } g_fsdev_udc;
  42. __WEAK void usb_dc_low_level_init(void)
  43. {
  44. }
  45. __WEAK void usb_dc_low_level_deinit(void)
  46. {
  47. }
  48. int usb_dc_init(uint8_t busid)
  49. {
  50. usb_dc_low_level_init();
  51. /* Init Device */
  52. /* CNTR_FRES = 1 */
  53. USB->CNTR = (uint16_t)USB_CNTR_FRES;
  54. /* CNTR_FRES = 0 */
  55. USB->CNTR = 0U;
  56. /* Clear pending interrupts */
  57. USB->ISTR = 0U;
  58. /*Set Btable Address*/
  59. USB->BTABLE = BTABLE_ADDRESS;
  60. uint32_t winterruptmask;
  61. /* Set winterruptmask variable */
  62. winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
  63. USB_CNTR_SUSPM | USB_CNTR_ERRM |
  64. USB_CNTR_SOFM | USB_CNTR_ESOFM |
  65. USB_CNTR_RESETM;
  66. /* Set interrupt mask */
  67. USB->CNTR = (uint16_t)winterruptmask;
  68. /* Enabling DP Pull-UP bit to Connect internal PU resistor on USB DP line */
  69. USB->BCDR |= (uint16_t)USB_BCDR_DPPU;
  70. return 0;
  71. }
  72. int usb_dc_deinit(uint8_t busid)
  73. {
  74. /* disable all interrupts and force USB reset */
  75. USB->CNTR = (uint16_t)USB_CNTR_FRES;
  76. /* clear interrupt status register */
  77. USB->ISTR = 0U;
  78. /* switch-off device */
  79. USB->CNTR = (uint16_t)(USB_CNTR_FRES | USB_CNTR_PDWN);
  80. usb_dc_low_level_deinit();
  81. return 0;
  82. }
  83. int usbd_set_address(uint8_t busid, const uint8_t addr)
  84. {
  85. if (addr == 0U) {
  86. /* set device address and enable function */
  87. USB->DADDR = (uint16_t)USB_DADDR_EF;
  88. }
  89. g_fsdev_udc.dev_addr = addr;
  90. return 0;
  91. }
  92. int usbd_set_remote_wakeup(uint8_t busid)
  93. {
  94. return -1;
  95. }
  96. uint8_t usbd_get_port_speed(uint8_t busid)
  97. {
  98. return USB_SPEED_FULL;
  99. }
  100. int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep)
  101. {
  102. uint8_t ep_idx = USB_EP_GET_IDX(ep->bEndpointAddress);
  103. if (ep_idx > (CONFIG_USBDEV_EP_NUM - 1)) {
  104. USB_LOG_ERR("Ep addr %02x overflow\r\n", ep->bEndpointAddress);
  105. return -1;
  106. }
  107. uint16_t wEpRegVal;
  108. /* initialize Endpoint */
  109. switch (USB_GET_ENDPOINT_TYPE(ep->bmAttributes)) {
  110. case USB_ENDPOINT_TYPE_CONTROL:
  111. wEpRegVal = USB_EP_CONTROL;
  112. break;
  113. case USB_ENDPOINT_TYPE_BULK:
  114. wEpRegVal = USB_EP_BULK;
  115. break;
  116. case USB_ENDPOINT_TYPE_INTERRUPT:
  117. wEpRegVal = USB_EP_INTERRUPT;
  118. break;
  119. case USB_ENDPOINT_TYPE_ISOCHRONOUS:
  120. wEpRegVal = USB_EP_ISOCHRONOUS;
  121. break;
  122. default:
  123. break;
  124. }
  125. PCD_SET_EPTYPE(USB, ep_idx, wEpRegVal);
  126. PCD_SET_EP_ADDRESS(USB, ep_idx, ep_idx);
  127. if (USB_EP_DIR_IS_OUT(ep->bEndpointAddress)) {
  128. g_fsdev_udc.out_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize);
  129. g_fsdev_udc.out_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes);
  130. g_fsdev_udc.out_ep[ep_idx].ep_enable = true;
  131. if (g_fsdev_udc.out_ep[ep_idx].ep_mps > g_fsdev_udc.out_ep[ep_idx].ep_pma_buf_len) {
  132. if (g_fsdev_udc.pma_offset + g_fsdev_udc.out_ep[ep_idx].ep_mps > CONFIG_USB_FSDEV_RAM_SIZE) {
  133. USB_LOG_ERR("Ep pma %02x overflow\r\n", ep->bEndpointAddress);
  134. return -1;
  135. }
  136. g_fsdev_udc.out_ep[ep_idx].ep_pma_buf_len = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize);
  137. g_fsdev_udc.out_ep[ep_idx].ep_pma_addr = g_fsdev_udc.pma_offset;
  138. /*Set the endpoint Receive buffer address */
  139. PCD_SET_EP_RX_ADDRESS(USB, ep_idx, g_fsdev_udc.pma_offset);
  140. g_fsdev_udc.pma_offset += USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize);
  141. }
  142. /*Set the endpoint Receive buffer counter*/
  143. PCD_SET_EP_RX_CNT(USB, ep_idx, USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize));
  144. PCD_CLEAR_RX_DTOG(USB, ep_idx);
  145. } else {
  146. g_fsdev_udc.in_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize);
  147. g_fsdev_udc.in_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes);
  148. g_fsdev_udc.in_ep[ep_idx].ep_enable = true;
  149. if (g_fsdev_udc.in_ep[ep_idx].ep_mps > g_fsdev_udc.in_ep[ep_idx].ep_pma_buf_len) {
  150. if (g_fsdev_udc.pma_offset + g_fsdev_udc.in_ep[ep_idx].ep_mps > CONFIG_USB_FSDEV_RAM_SIZE) {
  151. USB_LOG_ERR("Ep pma %02x overflow\r\n", ep->bEndpointAddress);
  152. return -1;
  153. }
  154. g_fsdev_udc.in_ep[ep_idx].ep_pma_buf_len = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize);
  155. g_fsdev_udc.in_ep[ep_idx].ep_pma_addr = g_fsdev_udc.pma_offset;
  156. /*Set the endpoint Transmit buffer address */
  157. PCD_SET_EP_TX_ADDRESS(USB, ep_idx, g_fsdev_udc.pma_offset);
  158. g_fsdev_udc.pma_offset += USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize);
  159. }
  160. PCD_CLEAR_TX_DTOG(USB, ep_idx);
  161. if (USB_GET_ENDPOINT_TYPE(ep->bmAttributes) != USB_ENDPOINT_TYPE_ISOCHRONOUS) {
  162. /* Configure NAK status for the Endpoint */
  163. PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_NAK);
  164. } else {
  165. /* Configure TX Endpoint to disabled state */
  166. PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_DIS);
  167. }
  168. }
  169. return 0;
  170. }
  171. int usbd_ep_close(uint8_t busid, const uint8_t ep)
  172. {
  173. uint8_t ep_idx = USB_EP_GET_IDX(ep);
  174. if (USB_EP_DIR_IS_OUT(ep)) {
  175. PCD_CLEAR_RX_DTOG(USB, ep_idx);
  176. /* Configure DISABLE status for the Endpoint*/
  177. PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_DIS);
  178. } else {
  179. PCD_CLEAR_TX_DTOG(USB, ep_idx);
  180. /* Configure DISABLE status for the Endpoint*/
  181. PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_DIS);
  182. }
  183. return 0;
  184. }
  185. int usbd_ep_set_stall(uint8_t busid, const uint8_t ep)
  186. {
  187. uint8_t ep_idx = USB_EP_GET_IDX(ep);
  188. if (USB_EP_DIR_IS_OUT(ep)) {
  189. PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_STALL);
  190. } else {
  191. PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_STALL);
  192. }
  193. return 0;
  194. }
  195. int usbd_ep_clear_stall(uint8_t busid, const uint8_t ep)
  196. {
  197. uint8_t ep_idx = USB_EP_GET_IDX(ep);
  198. if (USB_EP_DIR_IS_OUT(ep)) {
  199. PCD_CLEAR_RX_DTOG(USB, ep_idx);
  200. /* Configure VALID status for the Endpoint */
  201. PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_VALID);
  202. } else {
  203. PCD_CLEAR_TX_DTOG(USB, ep_idx);
  204. if (g_fsdev_udc.in_ep[ep_idx].ep_type != USB_ENDPOINT_TYPE_ISOCHRONOUS) {
  205. /* Configure NAK status for the Endpoint */
  206. PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_NAK);
  207. }
  208. }
  209. return 0;
  210. }
  211. int usbd_ep_is_stalled(uint8_t busid, const uint8_t ep, uint8_t *stalled)
  212. {
  213. uint8_t ep_idx = USB_EP_GET_IDX(ep);
  214. if (USB_EP_DIR_IS_OUT(ep)) {
  215. if (PCD_GET_EP_RX_STATUS(USB, ep_idx) & USB_EP_RX_STALL) {
  216. *stalled = 1;
  217. } else {
  218. *stalled = 0;
  219. }
  220. } else {
  221. if (PCD_GET_EP_TX_STATUS(USB, ep_idx) & USB_EP_TX_STALL) {
  222. *stalled = 1;
  223. } else {
  224. *stalled = 0;
  225. }
  226. }
  227. return 0;
  228. }
  229. int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, uint32_t data_len)
  230. {
  231. uint8_t ep_idx = USB_EP_GET_IDX(ep);
  232. if (!data && data_len) {
  233. return -1;
  234. }
  235. if (!g_fsdev_udc.in_ep[ep_idx].ep_enable) {
  236. return -2;
  237. }
  238. g_fsdev_udc.in_ep[ep_idx].xfer_buf = (uint8_t *)data;
  239. g_fsdev_udc.in_ep[ep_idx].xfer_len = data_len;
  240. g_fsdev_udc.in_ep[ep_idx].actual_xfer_len = 0;
  241. data_len = MIN(data_len, g_fsdev_udc.in_ep[ep_idx].ep_mps);
  242. fsdev_write_pma(USB, (uint8_t *)data, g_fsdev_udc.in_ep[ep_idx].ep_pma_addr, (uint16_t)data_len);
  243. PCD_SET_EP_TX_CNT(USB, ep_idx, (uint16_t)data_len);
  244. PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_VALID);
  245. return 0;
  246. }
  247. int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t data_len)
  248. {
  249. uint8_t ep_idx = USB_EP_GET_IDX(ep);
  250. if (!data && data_len) {
  251. return -1;
  252. }
  253. if (!g_fsdev_udc.out_ep[ep_idx].ep_enable) {
  254. return -2;
  255. }
  256. g_fsdev_udc.out_ep[ep_idx].xfer_buf = data;
  257. g_fsdev_udc.out_ep[ep_idx].xfer_len = data_len;
  258. g_fsdev_udc.out_ep[ep_idx].actual_xfer_len = 0;
  259. PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_VALID);
  260. return 0;
  261. }
  262. void USBD_IRQHandler(uint8_t busid)
  263. {
  264. uint16_t wIstr, wEPVal;
  265. uint8_t ep_idx;
  266. uint8_t read_count;
  267. uint16_t write_count;
  268. uint16_t store_ep[8];
  269. wIstr = USB->ISTR;
  270. if (wIstr & USB_ISTR_CTR) {
  271. while ((USB->ISTR & USB_ISTR_CTR) != 0U) {
  272. wIstr = USB->ISTR;
  273. /* extract highest priority endpoint number */
  274. ep_idx = (uint8_t)(wIstr & USB_ISTR_EP_ID);
  275. if (ep_idx == 0U) {
  276. if ((wIstr & USB_ISTR_DIR) == 0U) {
  277. PCD_CLEAR_TX_EP_CTR(USB, ep_idx);
  278. write_count = PCD_GET_EP_TX_CNT(USB, ep_idx);
  279. g_fsdev_udc.in_ep[ep_idx].xfer_buf += write_count;
  280. g_fsdev_udc.in_ep[ep_idx].xfer_len -= write_count;
  281. g_fsdev_udc.in_ep[ep_idx].actual_xfer_len += write_count;
  282. usbd_event_ep_in_complete_handler(0, ep_idx | 0x80, g_fsdev_udc.in_ep[ep_idx].actual_xfer_len);
  283. if (g_fsdev_udc.setup.wLength == 0) {
  284. /* In status, start reading setup */
  285. usbd_ep_start_read(0, 0x00, NULL, 0);
  286. } else if (g_fsdev_udc.setup.wLength && ((g_fsdev_udc.setup.bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_OUT)) {
  287. /* In status, start reading setup */
  288. usbd_ep_start_read(0, 0x00, NULL, 0);
  289. }
  290. if ((g_fsdev_udc.dev_addr > 0U) && (write_count == 0U)) {
  291. USB->DADDR = ((uint16_t)g_fsdev_udc.dev_addr | USB_DADDR_EF);
  292. g_fsdev_udc.dev_addr = 0U;
  293. }
  294. } else {
  295. wEPVal = PCD_GET_ENDPOINT(USB, ep_idx);
  296. if ((wEPVal & USB_EP_SETUP) != 0U) {
  297. PCD_CLEAR_RX_EP_CTR(USB, ep_idx);
  298. read_count = PCD_GET_EP_RX_CNT(USB, ep_idx);
  299. fsdev_read_pma(USB, (uint8_t *)&g_fsdev_udc.setup, g_fsdev_udc.out_ep[ep_idx].ep_pma_addr, (uint16_t)read_count);
  300. usbd_event_ep0_setup_complete_handler(0, (uint8_t *)&g_fsdev_udc.setup);
  301. } else if ((wEPVal & USB_EP_CTR_RX) != 0U) {
  302. PCD_CLEAR_RX_EP_CTR(USB, ep_idx);
  303. read_count = PCD_GET_EP_RX_CNT(USB, ep_idx);
  304. fsdev_read_pma(USB, g_fsdev_udc.out_ep[ep_idx].xfer_buf, g_fsdev_udc.out_ep[ep_idx].ep_pma_addr, (uint16_t)read_count);
  305. g_fsdev_udc.out_ep[ep_idx].xfer_buf += read_count;
  306. g_fsdev_udc.out_ep[ep_idx].xfer_len -= read_count;
  307. g_fsdev_udc.out_ep[ep_idx].actual_xfer_len += read_count;
  308. usbd_event_ep_out_complete_handler(0, ep_idx, g_fsdev_udc.out_ep[ep_idx].actual_xfer_len);
  309. if (read_count == 0) {
  310. /* Out status, start reading setup */
  311. usbd_ep_start_read(0, 0x00, NULL, 0);
  312. }
  313. }
  314. }
  315. } else {
  316. wEPVal = PCD_GET_ENDPOINT(USB, ep_idx);
  317. if ((wEPVal & USB_EP_CTR_RX) != 0U) {
  318. PCD_CLEAR_RX_EP_CTR(USB, ep_idx);
  319. read_count = PCD_GET_EP_RX_CNT(USB, ep_idx);
  320. fsdev_read_pma(USB, g_fsdev_udc.out_ep[ep_idx].xfer_buf, g_fsdev_udc.out_ep[ep_idx].ep_pma_addr, (uint16_t)read_count);
  321. g_fsdev_udc.out_ep[ep_idx].xfer_buf += read_count;
  322. g_fsdev_udc.out_ep[ep_idx].xfer_len -= read_count;
  323. g_fsdev_udc.out_ep[ep_idx].actual_xfer_len += read_count;
  324. if ((read_count < g_fsdev_udc.out_ep[ep_idx].ep_mps) ||
  325. (g_fsdev_udc.out_ep[ep_idx].xfer_len == 0)) {
  326. usbd_event_ep_out_complete_handler(0, ep_idx, g_fsdev_udc.out_ep[ep_idx].actual_xfer_len);
  327. } else {
  328. PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_VALID);
  329. }
  330. }
  331. if ((wEPVal & USB_EP_CTR_TX) != 0U) {
  332. PCD_CLEAR_TX_EP_CTR(USB, ep_idx);
  333. write_count = PCD_GET_EP_TX_CNT(USB, ep_idx);
  334. g_fsdev_udc.in_ep[ep_idx].xfer_buf += write_count;
  335. g_fsdev_udc.in_ep[ep_idx].xfer_len -= write_count;
  336. g_fsdev_udc.in_ep[ep_idx].actual_xfer_len += write_count;
  337. if (g_fsdev_udc.in_ep[ep_idx].xfer_len == 0) {
  338. usbd_event_ep_in_complete_handler(0, ep_idx | 0x80, g_fsdev_udc.in_ep[ep_idx].actual_xfer_len);
  339. } else {
  340. write_count = MIN(g_fsdev_udc.in_ep[ep_idx].xfer_len, g_fsdev_udc.in_ep[ep_idx].ep_mps);
  341. fsdev_write_pma(USB, g_fsdev_udc.in_ep[ep_idx].xfer_buf, g_fsdev_udc.in_ep[ep_idx].ep_pma_addr, (uint16_t)write_count);
  342. PCD_SET_EP_TX_CNT(USB, ep_idx, write_count);
  343. PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_VALID);
  344. }
  345. }
  346. }
  347. }
  348. }
  349. if (wIstr & USB_ISTR_RESET) {
  350. memset(&g_fsdev_udc, 0, sizeof(struct fsdev_udc));
  351. g_fsdev_udc.pma_offset = USB_BTABLE_SIZE;
  352. usbd_event_reset_handler(0);
  353. /* start reading setup packet */
  354. PCD_SET_EP_RX_STATUS(USB, 0, USB_EP_RX_VALID);
  355. USB->ISTR &= (uint16_t)(~USB_ISTR_RESET);
  356. }
  357. if (wIstr & USB_ISTR_PMAOVR) {
  358. USB->ISTR &= (uint16_t)(~USB_ISTR_PMAOVR);
  359. }
  360. if (wIstr & USB_ISTR_ERR) {
  361. USB->ISTR &= (uint16_t)(~USB_ISTR_ERR);
  362. }
  363. if (wIstr & USB_ISTR_WKUP) {
  364. USB->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
  365. USB->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
  366. USB->ISTR &= (uint16_t)(~USB_ISTR_WKUP);
  367. }
  368. if (wIstr & USB_ISTR_SUSP) {
  369. /* WA: To Clear Wakeup flag if raised with suspend signal */
  370. /* Store Endpoint register */
  371. for (uint8_t i = 0U; i < 8U; i++) {
  372. store_ep[i] = PCD_GET_ENDPOINT(USB, i);
  373. }
  374. /* FORCE RESET */
  375. USB->CNTR |= (uint16_t)(USB_CNTR_FRES);
  376. /* CLEAR RESET */
  377. USB->CNTR &= (uint16_t)(~USB_CNTR_FRES);
  378. /* wait for reset flag in ISTR */
  379. while ((USB->ISTR & USB_ISTR_RESET) == 0U) {
  380. }
  381. /* Clear Reset Flag */
  382. USB->ISTR &= (uint16_t)(~USB_ISTR_RESET);
  383. /* Restore Registre */
  384. for (uint8_t i = 0U; i < 8U; i++) {
  385. PCD_SET_ENDPOINT(USB, i, store_ep[i]);
  386. }
  387. /* Force low-power mode in the macrocell */
  388. USB->CNTR |= (uint16_t)USB_CNTR_FSUSP;
  389. /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
  390. USB->ISTR &= (uint16_t)(~USB_ISTR_SUSP);
  391. USB->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
  392. }
  393. if (wIstr & USB_ISTR_SOF) {
  394. USB->ISTR &= (uint16_t)(~USB_ISTR_SOF);
  395. }
  396. if (wIstr & USB_ISTR_ESOF) {
  397. USB->ISTR &= (uint16_t)(~USB_ISTR_ESOF);
  398. }
  399. }
  400. static void fsdev_write_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
  401. {
  402. uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
  403. uint32_t BaseAddr = (uint32_t)USBx;
  404. uint32_t i, temp1, temp2;
  405. __IO uint16_t *pdwVal;
  406. uint8_t *pBuf = pbUsrBuf;
  407. pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
  408. for (i = n; i != 0U; i--) {
  409. temp1 = *pBuf;
  410. pBuf++;
  411. temp2 = temp1 | ((uint16_t)((uint16_t)*pBuf << 8));
  412. *pdwVal = (uint16_t)temp2;
  413. pdwVal++;
  414. #if PMA_ACCESS > 1U
  415. pdwVal++;
  416. #endif
  417. pBuf++;
  418. }
  419. }
  420. /**
  421. * @brief Copy data from packet memory area (PMA) to user memory buffer
  422. * @param USBx USB peripheral instance register address.
  423. * @param pbUsrBuf pointer to user memory area.
  424. * @param wPMABufAddr address into PMA.
  425. * @param wNBytes no. of bytes to be copied.
  426. * @retval None
  427. */
  428. static void fsdev_read_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
  429. {
  430. uint32_t n = (uint32_t)wNBytes >> 1;
  431. uint32_t BaseAddr = (uint32_t)USBx;
  432. uint32_t i, temp;
  433. __IO uint16_t *pdwVal;
  434. uint8_t *pBuf = pbUsrBuf;
  435. pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
  436. for (i = n; i != 0U; i--) {
  437. temp = *(__IO uint16_t *)pdwVal;
  438. pdwVal++;
  439. *pBuf = (uint8_t)((temp >> 0) & 0xFFU);
  440. pBuf++;
  441. *pBuf = (uint8_t)((temp >> 8) & 0xFFU);
  442. pBuf++;
  443. #if PMA_ACCESS > 1U
  444. pdwVal++;
  445. #endif
  446. }
  447. if ((wNBytes % 2U) != 0U) {
  448. temp = *pdwVal;
  449. *pBuf = (uint8_t)((temp >> 0) & 0xFFU);
  450. }
  451. }