drv_hwtimer.c 8.3 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-07-29 rtthread qiu first version
  9. */
  10. #include "drv_common.h"
  11. #include "drv_hwtimer.h"
  12. #include <board.h>
  13. #ifdef BSP_USING_TIM
  14. //#define DRV_DEBUG
  15. #define LOG_TAG "drv.hwtimer"
  16. #include <drv_log.h>
  17. static void isr_timer(void *callback_arg, cyhal_timer_event_t event);
  18. #ifdef RT_USING_HWTIMER
  19. enum
  20. {
  21. #ifdef BSP_USING_TIM1
  22. TIM1_INDEX,
  23. #endif
  24. #ifdef BSP_USING_TIM2
  25. TIM2_INDEX,
  26. #endif
  27. };
  28. struct cyp_hwtimer
  29. {
  30. rt_hwtimer_t time_device;
  31. cyhal_timer_t tim_handle;
  32. IRQn_Type tim_irqn;
  33. char *name;
  34. };
  35. static struct cyp_hwtimer cyp_hwtimer_obj[] =
  36. {
  37. #ifdef BSP_USING_TIM1
  38. TIM1_CONFIG,
  39. #endif
  40. #ifdef BSP_USING_TIM2
  41. TIM2_CONFIG,
  42. #endif
  43. };
  44. static void timer_init(rt_hwtimer_t *timer, rt_uint32_t state)
  45. {
  46. RT_ASSERT(timer != RT_NULL);
  47. cy_rslt_t result = RT_EOK;
  48. cyhal_timer_t *tim = RT_NULL;
  49. tim = (cyhal_timer_t *)timer->parent.user_data;
  50. const cyhal_timer_cfg_t init_timer_cfg =
  51. {
  52. .compare_value = 0, /* Timer compare value, not used */
  53. .period = 9999, /* Defines the timer period */
  54. .direction = CYHAL_TIMER_DIR_UP, /* Timer counts up */
  55. .is_compare = false, /* Don't use compare mode */
  56. .is_continuous = true, /* Run timer indefinitely */
  57. .value = 0 /* Initial value of counter */
  58. };
  59. if (state)
  60. {
  61. /* Initialize the timer object. Does not use input pin ('pin' is NC) and
  62. * does not use a pre-configured clock source ('clk' is NULL). */
  63. result = cyhal_timer_init(tim, NC, NULL);
  64. if (result != CY_RSLT_SUCCESS)
  65. {
  66. LOG_E("timer init error \r\n");
  67. return;
  68. }
  69. else
  70. {
  71. /* Configure timer period and operation mode such as count direction,
  72. duration */
  73. cyhal_timer_configure(tim, &init_timer_cfg);
  74. /* Set the frequency of timer's clock source */
  75. cyhal_timer_set_frequency(tim, 10000);
  76. cyhal_timer_start(tim);
  77. }
  78. }
  79. else
  80. {
  81. cyhal_timer_free(tim);
  82. LOG_E("free time \r\n");
  83. }
  84. }
  85. static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
  86. {
  87. RT_ASSERT(timer != RT_NULL);
  88. RT_ASSERT(opmode != RT_NULL);
  89. cy_rslt_t result = RT_EOK;
  90. cyhal_timer_t *tim = RT_NULL;
  91. tim = (cyhal_timer_t *)timer->parent.user_data;
  92. const cyhal_timer_cfg_t init_timer_cfg =
  93. {
  94. .compare_value = 0, /* Timer compare value, not used */
  95. .period = t - 1, /* Defines the timer period */
  96. .direction = CYHAL_TIMER_DIR_UP, /* Timer counts up */
  97. .is_compare = false, /* Don't use compare mode */
  98. .is_continuous = true, /* Run timer indefinitely */
  99. .value = 0 /* Initial value of counter */
  100. };
  101. /* Configure timer period and operation mode such as count direction,
  102. duration */
  103. cyhal_timer_configure(tim, &init_timer_cfg);
  104. if (opmode == HWTIMER_MODE_ONESHOT)
  105. {
  106. /* set timer to single mode */
  107. cyhal_timer_stop(tim);
  108. }
  109. else
  110. {
  111. cyhal_timer_reset(tim);
  112. }
  113. result = cyhal_timer_start(tim);
  114. if (result != CY_RSLT_SUCCESS)
  115. {
  116. LOG_E("time start error\r\n");
  117. cyhal_timer_free(tim);
  118. }
  119. /* Assign the ISR to execute on timer interrupt */
  120. cyhal_timer_register_callback(tim, isr_timer, NULL);
  121. /* Set the event on which timer interrupt occurs and enable it */
  122. cyhal_timer_enable_event(tim, CYHAL_TIMER_IRQ_TERMINAL_COUNT, 1, true);
  123. return result;
  124. }
  125. static void timer_stop(rt_hwtimer_t *timer)
  126. {
  127. RT_ASSERT(timer != RT_NULL);
  128. cyhal_timer_t *tim = RT_NULL;
  129. tim = (cyhal_timer_t *)timer->parent.user_data;
  130. cyhal_timer_stop(tim);
  131. }
  132. static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
  133. {
  134. cyhal_timer_t *tim = RT_NULL;
  135. rt_uint32_t count;
  136. RT_ASSERT(timer != RT_NULL);
  137. tim = (cyhal_timer_t *)timer->parent.user_data;
  138. count = cyhal_timer_read(tim);
  139. return count;
  140. }
  141. static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
  142. {
  143. RT_ASSERT(timer != RT_NULL);
  144. RT_ASSERT(arg != RT_NULL);
  145. cyhal_timer_t *tim = RT_NULL;
  146. rt_err_t result = -RT_ERROR;
  147. tim = (cyhal_timer_t *)timer->parent.user_data;
  148. switch (cmd)
  149. {
  150. case HWTIMER_CTRL_FREQ_SET:
  151. {
  152. rt_uint32_t freq;
  153. rt_uint16_t val;
  154. freq = *((rt_uint32_t *)arg);
  155. result = cyhal_timer_set_frequency(tim, freq);
  156. if (result != CY_RSLT_SUCCESS)
  157. {
  158. LOG_E("cyhal_timer_set_frequency error\r\n");
  159. return RT_ERROR;
  160. }
  161. }
  162. break;
  163. default:
  164. {
  165. result = -RT_EINVAL;
  166. }
  167. break;
  168. }
  169. return result;
  170. }
  171. static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG;
  172. static const struct rt_hwtimer_ops _ops =
  173. {
  174. .init = timer_init,
  175. .start = timer_start,
  176. .stop = timer_stop,
  177. .count_get = timer_counter_get,
  178. .control = timer_ctrl,
  179. };
  180. #ifdef BSP_USING_TIM1
  181. static void isr_timer(void *callback_arg, cyhal_timer_event_t event)
  182. {
  183. /* enter interrupt */
  184. rt_interrupt_enter();
  185. (void)callback_arg;
  186. (void)event;
  187. rt_device_hwtimer_isr(&cyp_hwtimer_obj[TIM1_INDEX].time_device);
  188. /* leave interrupt */
  189. rt_interrupt_leave();
  190. }
  191. #endif
  192. #ifdef BSP_USING_TIM2
  193. static void isr_timer(void *callback_arg, cyhal_timer_event_t event)
  194. {
  195. /* enter interrupt */
  196. rt_interrupt_enter();
  197. (void)callback_arg;
  198. (void)event;
  199. rt_device_hwtimer_isr(&cyp_hwtimer_obj[TIM2_INDEX].time_device);
  200. /* leave interrupt */
  201. rt_interrupt_leave();
  202. }
  203. #endif
  204. int cyp_hwtimer_init(void)
  205. {
  206. int i = 0;
  207. int result = RT_EOK;
  208. for (i = 0; i < sizeof(cyp_hwtimer_obj) / sizeof(cyp_hwtimer_obj[0]); i++)
  209. {
  210. cyp_hwtimer_obj[i].time_device.info = &_info;
  211. cyp_hwtimer_obj[i].time_device.ops = &_ops;
  212. if (rt_device_hwtimer_register(&cyp_hwtimer_obj[i].time_device, cyp_hwtimer_obj[i].name, &cyp_hwtimer_obj[i].tim_handle) != RT_EOK)
  213. {
  214. LOG_E("%s register failed", cyp_hwtimer_obj[i].name);
  215. result = -RT_ERROR;
  216. }
  217. }
  218. return result;
  219. }
  220. INIT_BOARD_EXPORT(cyp_hwtimer_init);
  221. #endif /*RT_USING_HWTIMER*/
  222. #endif /*BSP_USING_TIM*/
  223. /* this is a hwtimer test demo*/
  224. #include <rtthread.h>
  225. #include <rtdevice.h>
  226. #define HWTIMER_DEV_NAME "time2" /* device name */
  227. static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size)
  228. {
  229. rt_kprintf("this is hwtimer timeout callback fucntion!\n");
  230. rt_kprintf("tick is :%d !\n", rt_tick_get());
  231. return 0;
  232. }
  233. int hwtimer_sample()
  234. {
  235. rt_err_t ret = RT_EOK;
  236. rt_hwtimerval_t timeout_s;
  237. rt_device_t hw_dev = RT_NULL;
  238. rt_hwtimer_mode_t mode;
  239. rt_uint32_t freq = 10000;
  240. hw_dev = rt_device_find(HWTIMER_DEV_NAME);
  241. if (hw_dev == RT_NULL)
  242. {
  243. rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWTIMER_DEV_NAME);
  244. return RT_ERROR;
  245. }
  246. ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR);
  247. if (ret != RT_EOK)
  248. {
  249. rt_kprintf("open %s device failed!\n", HWTIMER_DEV_NAME);
  250. return ret;
  251. }
  252. rt_device_set_rx_indicate(hw_dev, timeout_cb);
  253. rt_device_control(hw_dev, HWTIMER_CTRL_FREQ_SET, &freq);
  254. mode = HWTIMER_MODE_PERIOD;
  255. ret = rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode);
  256. if (ret != RT_EOK)
  257. {
  258. rt_kprintf("set mode failed! ret is :%d\n", ret);
  259. return ret;
  260. }
  261. /* Example Set the timeout period of the timer */
  262. timeout_s.sec = 3; /* secend */
  263. timeout_s.usec = 0; /* microsecend */
  264. if (rt_device_write(hw_dev, 0, &timeout_s, sizeof(timeout_s)) != sizeof(timeout_s))
  265. {
  266. rt_kprintf("set timeout value failed\n");
  267. return RT_ERROR;
  268. }
  269. while (1)
  270. {
  271. rt_thread_mdelay(1500);
  272. rt_device_read(hw_dev, 0, &timeout_s, sizeof(timeout_s));
  273. rt_kprintf("Read: Sec = %d, Usec = %d\n", timeout_s.sec, timeout_s.usec);
  274. }
  275. return ret;
  276. }
  277. MSH_CMD_EXPORT(hwtimer_sample, hwtimer sample);