drv_pwm.c 6.0 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-07-13 Rbb666 first version
  9. */
  10. #include "drv_pwm.h"
  11. #ifdef RT_USING_PWM
  12. #include <drivers/rt_drv_pwm.h>
  13. #include "drv_gpio.h"
  14. //#define DRV_DEBUG
  15. #define LOG_TAG "drv.pwm"
  16. #include <drv_log.h>
  17. struct rt_device_pwm pwm_device;
  18. struct ifx_pwm
  19. {
  20. struct rt_device_pwm pwm_device;
  21. cyhal_pwm_t *pwm_obj;
  22. rt_uint8_t channel;
  23. char *name;
  24. rt_uint8_t gpio;
  25. };
  26. enum
  27. {
  28. #ifdef BSP_USING_PWM0
  29. PWM0_INDEX,
  30. #endif
  31. };
  32. static struct ifx_pwm ifx_pwm_obj[] =
  33. {
  34. #ifdef BSP_USING_PWM0
  35. PWM0_CONFIG,
  36. #endif
  37. };
  38. static void pwm_get_pin_number(void)
  39. {
  40. #ifdef BSP_USING_PWM0_CH7
  41. #ifdef BSP_USING_PWM0_PORT2
  42. ifx_pwm_obj[PWM0_INDEX].gpio = GET_PIN(2, 2);
  43. #endif
  44. #ifdef BSP_USING_PWM0_PORT5
  45. ifx_pwm_obj[PWM0_INDEX].gpio = GET_PIN(5, 6);
  46. #endif
  47. #ifdef BSP_USING_PWM0_PORT7
  48. ifx_pwm_obj[PWM0_INDEX].gpio = GET_PIN(7, 7);
  49. #endif
  50. #ifdef BSP_USING_PWM0_PORT9
  51. ifx_pwm_obj[PWM0_INDEX].gpio = GET_PIN(9, 4);
  52. #endif
  53. #ifdef BSP_USING_PWM0_PORT10
  54. ifx_pwm_obj[PWM0_INDEX].gpio = GET_PIN(10, 2);
  55. #endif
  56. #ifdef BSP_USING_PWM0_PORT12
  57. ifx_pwm_obj[PWM0_INDEX].gpio = GET_PIN(12, 6);
  58. #endif
  59. #endif
  60. }
  61. static void pwm_get_channel(void)
  62. {
  63. #ifdef BSP_USING_PWM0_CH7
  64. ifx_pwm_obj[PWM0_INDEX].channel = 7;
  65. #endif
  66. }
  67. static rt_err_t drv_pwm_enable(cyhal_pwm_t *htim, struct rt_pwm_configuration *configuration, rt_bool_t enable)
  68. {
  69. /* get the value of channel */
  70. rt_uint32_t channel = configuration->channel;
  71. if (!configuration->complementary || configuration->complementary)
  72. {
  73. if (!enable)
  74. {
  75. if (channel == 7)
  76. {
  77. cyhal_pwm_stop(htim);
  78. }
  79. }
  80. else
  81. {
  82. if (channel == 7)
  83. {
  84. cyhal_pwm_start(htim);
  85. }
  86. }
  87. }
  88. return RT_EOK;
  89. }
  90. static rt_err_t drv_pwm_set(cyhal_pwm_t *htim, struct rt_pwm_configuration *configuration)
  91. {
  92. rt_uint64_t tim_clock;
  93. rt_uint32_t period, pulse;
  94. tim_clock = (rt_uint32_t)(htim->tcpwm.clock_hz);
  95. period = (unsigned long long)configuration->period / 1000ULL;
  96. pulse = (unsigned long long)configuration->pulse / 1000ULL;
  97. cyhal_pwm_set_period(htim, period, pulse);
  98. return RT_EOK;
  99. }
  100. static rt_err_t drv_pwm_get(cyhal_pwm_t *htim, struct rt_pwm_configuration *configuration)
  101. {
  102. uint32_t Period = Cy_TCPWM_PWM_GetPeriod0(htim->tcpwm.base, _CYHAL_TCPWM_CNT_NUMBER(htim->tcpwm.resource));
  103. uint32_t Compare = Cy_TCPWM_PWM_GetCounter(htim->tcpwm.base, _CYHAL_TCPWM_CNT_NUMBER(htim->tcpwm.resource));
  104. configuration->period = Period;
  105. configuration->pulse = Compare;
  106. return RT_EOK;
  107. }
  108. static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
  109. {
  110. struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg;
  111. cyhal_pwm_t *htim = (cyhal_pwm_t *)device->parent.user_data;
  112. switch (cmd)
  113. {
  114. case PWMN_CMD_ENABLE:
  115. configuration->complementary = RT_TRUE;
  116. case PWM_CMD_ENABLE:
  117. return drv_pwm_enable(htim, configuration, RT_TRUE);
  118. case PWMN_CMD_DISABLE:
  119. configuration->complementary = RT_FALSE;
  120. case PWM_CMD_DISABLE:
  121. return drv_pwm_enable(htim, configuration, RT_FALSE);
  122. case PWM_CMD_SET:
  123. return drv_pwm_set(htim, configuration);
  124. case PWM_CMD_GET:
  125. return drv_pwm_get(htim, configuration);
  126. default:
  127. return RT_EINVAL;
  128. }
  129. }
  130. static struct rt_pwm_ops drv_ops =
  131. {
  132. drv_pwm_control
  133. };
  134. static rt_err_t ifx_hw_pwm_init(struct ifx_pwm *device)
  135. {
  136. rt_err_t result = RT_EOK;
  137. RT_ASSERT(device != RT_NULL);
  138. /* config pwm channel */
  139. if (device->channel == 0x07)
  140. {
  141. if (cyhal_pwm_init_adv(device->pwm_obj, device->gpio, NC, CYHAL_PWM_LEFT_ALIGN, true, 0u, false, RT_NULL) != RT_EOK)
  142. {
  143. LOG_E("%s channel7 config failed", device->name);
  144. result = -RT_ERROR;
  145. goto __exit;
  146. }
  147. }
  148. __exit:
  149. return result;
  150. }
  151. static int rt_hw_pwm_init(void)
  152. {
  153. int i = 0;
  154. int result = RT_EOK;
  155. pwm_get_pin_number();
  156. pwm_get_channel();
  157. for (i = 0; i < sizeof(ifx_pwm_obj) / sizeof(ifx_pwm_obj[0]); i++)
  158. {
  159. ifx_pwm_obj[i].pwm_obj = rt_malloc(sizeof(cyhal_pwm_t));
  160. /* pwm init */
  161. if (ifx_hw_pwm_init(&ifx_pwm_obj[i]) != RT_EOK)
  162. {
  163. LOG_E("%s init failed", ifx_pwm_obj[i].name);
  164. result = -RT_ERROR;
  165. goto __exit;
  166. }
  167. else
  168. {
  169. if (rt_device_pwm_register(&ifx_pwm_obj[i].pwm_device, ifx_pwm_obj[i].name, &drv_ops, ifx_pwm_obj[i].pwm_obj) == RT_EOK)
  170. {
  171. LOG_D("%s register success", ifx_pwm_obj[i].name);
  172. }
  173. else
  174. {
  175. LOG_D("%s register failed", ifx_pwm_obj[i].name);
  176. result = -RT_ERROR;
  177. }
  178. }
  179. }
  180. __exit:
  181. rt_free(ifx_pwm_obj[i].pwm_obj);
  182. return result;
  183. }
  184. INIT_BOARD_EXPORT(rt_hw_pwm_init);
  185. #define PWM_DEV_NAME "pwm0"
  186. #define PWM_DEV_CHANNEL 7
  187. struct rt_device_pwm *pwm_dev;
  188. static int pwm_sample(int argc, char *argv[])
  189. {
  190. rt_uint32_t period, pulse, dir;
  191. period = 500000;
  192. dir = 1;
  193. pulse = 0;
  194. pwm_dev = (struct rt_device_pwm *)rt_device_find(PWM_DEV_NAME);
  195. if (pwm_dev == RT_NULL)
  196. {
  197. rt_kprintf("pwm sample run failed! can't find %s device!\n", PWM_DEV_NAME);
  198. return RT_ERROR;
  199. }
  200. rt_pwm_set(pwm_dev, PWM_DEV_CHANNEL, period, pulse);
  201. rt_pwm_enable(pwm_dev, PWM_DEV_CHANNEL);
  202. while (1)
  203. {
  204. rt_thread_mdelay(50);
  205. if (dir)
  206. {
  207. pulse += 5000;
  208. }
  209. else
  210. {
  211. pulse -= 5000;
  212. }
  213. if (pulse >= period)
  214. {
  215. dir = 0;
  216. }
  217. if (0 == pulse)
  218. {
  219. dir = 1;
  220. }
  221. rt_pwm_set(pwm_dev, PWM_DEV_CHANNEL, period, pulse);
  222. }
  223. }
  224. MSH_CMD_EXPORT(pwm_sample, <pwm0> channel7 sample);
  225. #endif