fsl_enc.c 15 KB

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  1. /*
  2. * Copyright (c) 2015, Freescale Semiconductor, Inc.
  3. * Copyright 2016-2017 NXP
  4. *
  5. * Redistribution and use in source and binary forms, with or without modification,
  6. * are permitted provided that the following conditions are met:
  7. *
  8. * o Redistributions of source code must retain the above copyright notice, this list
  9. * of conditions and the following disclaimer.
  10. *
  11. * o Redistributions in binary form must reproduce the above copyright notice, this
  12. * list of conditions and the following disclaimer in the documentation and/or
  13. * other materials provided with the distribution.
  14. *
  15. * o Neither the name of the copyright holder nor the names of its
  16. * contributors may be used to endorse or promote products derived from this
  17. * software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  20. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  22. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  23. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  25. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  26. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  28. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29. */
  30. #include "fsl_enc.h"
  31. /*******************************************************************************
  32. * Definitions
  33. ******************************************************************************/
  34. #define ENC_CTRL_W1C_FLAGS (ENC_CTRL_HIRQ_MASK | ENC_CTRL_XIRQ_MASK | ENC_CTRL_DIRQ_MASK | ENC_CTRL_CMPIRQ_MASK)
  35. #define ENC_CTRL2_W1C_FLAGS (ENC_CTRL2_SABIRQ_MASK | ENC_CTRL2_ROIRQ_MASK | ENC_CTRL2_RUIRQ_MASK)
  36. /*******************************************************************************
  37. * Prototypes
  38. ******************************************************************************/
  39. /*!
  40. * @brief Get instance number for ENC module.
  41. *
  42. * @param base ENC peripheral base address
  43. */
  44. static uint32_t ENC_GetInstance(ENC_Type *base);
  45. /*******************************************************************************
  46. * Variables
  47. ******************************************************************************/
  48. /*! @brief Pointers to ENC bases for each instance. */
  49. static ENC_Type *const s_encBases[] = ENC_BASE_PTRS;
  50. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  51. /*! @brief Pointers to ENC clocks for each instance. */
  52. static const clock_ip_name_t s_encClocks[] = ENC_CLOCKS;
  53. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  54. /*******************************************************************************
  55. * Code
  56. ******************************************************************************/
  57. static uint32_t ENC_GetInstance(ENC_Type *base)
  58. {
  59. uint32_t instance;
  60. /* Find the instance index from base address mappings. */
  61. for (instance = 0; instance < ARRAY_SIZE(s_encBases); instance++)
  62. {
  63. if (s_encBases[instance] == base)
  64. {
  65. break;
  66. }
  67. }
  68. assert(instance < ARRAY_SIZE(s_encBases));
  69. return instance;
  70. }
  71. void ENC_Init(ENC_Type *base, const enc_config_t *config)
  72. {
  73. assert(NULL != config);
  74. uint32_t tmp16;
  75. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  76. /* Enable the clock. */
  77. CLOCK_EnableClock(s_encClocks[ENC_GetInstance(base)]);
  78. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  79. /* ENC_CTRL. */
  80. tmp16 = base->CTRL & (uint16_t)(~(ENC_CTRL_W1C_FLAGS | ENC_CTRL_HIP_MASK | ENC_CTRL_HNE_MASK | ENC_CTRL_REV_MASK |
  81. ENC_CTRL_PH1_MASK | ENC_CTRL_XIP_MASK | ENC_CTRL_XNE_MASK | ENC_CTRL_WDE_MASK));
  82. /* For HOME trigger. */
  83. if (kENC_HOMETriggerDisabled != config->HOMETriggerMode)
  84. {
  85. tmp16 |= ENC_CTRL_HIP_MASK;
  86. if (kENC_HOMETriggerOnFallingEdge == config->HOMETriggerMode)
  87. {
  88. tmp16 |= ENC_CTRL_HNE_MASK;
  89. }
  90. }
  91. /* For encoder work mode. */
  92. if (config->enableReverseDirection)
  93. {
  94. tmp16 |= ENC_CTRL_REV_MASK;
  95. }
  96. if (kENC_DecoderWorkAsSignalPhaseCountMode == config->decoderWorkMode)
  97. {
  98. tmp16 |= ENC_CTRL_PH1_MASK;
  99. }
  100. /* For INDEX trigger. */
  101. if (kENC_INDEXTriggerDisabled != config->INDEXTriggerMode)
  102. {
  103. tmp16 |= ENC_CTRL_XIP_MASK;
  104. if (kENC_INDEXTriggerOnFallingEdge == config->INDEXTriggerMode)
  105. {
  106. tmp16 |= ENC_CTRL_XNE_MASK;
  107. }
  108. }
  109. /* Watchdog. */
  110. if (config->enableWatchdog)
  111. {
  112. tmp16 |= ENC_CTRL_WDE_MASK;
  113. base->WTR = config->watchdogTimeoutValue; /* WDOG can be only available when the feature is enabled. */
  114. }
  115. base->CTRL = tmp16;
  116. /* ENC_FILT. */
  117. base->FILT = ENC_FILT_FILT_CNT(config->filterCount) | ENC_FILT_FILT_PER(config->filterSamplePeriod);
  118. /* ENC_CTRL2. */
  119. tmp16 = base->CTRL2 & (uint16_t)(~(ENC_CTRL2_W1C_FLAGS | ENC_CTRL2_OUTCTL_MASK | ENC_CTRL2_REVMOD_MASK |
  120. ENC_CTRL2_MOD_MASK | ENC_CTRL2_UPDPOS_MASK | ENC_CTRL2_UPDHLD_MASK));
  121. if (kENC_POSMATCHOnReadingAnyPositionCounter == config->positionMatchMode)
  122. {
  123. tmp16 |= ENC_CTRL2_OUTCTL_MASK;
  124. }
  125. if (kENC_RevolutionCountOnRollOverModulus == config->revolutionCountCondition)
  126. {
  127. tmp16 |= ENC_CTRL2_REVMOD_MASK;
  128. }
  129. if (config->enableModuloCountMode)
  130. {
  131. tmp16 |= ENC_CTRL2_MOD_MASK;
  132. /* Set modulus value. */
  133. base->UMOD = (uint16_t)(config->positionModulusValue >> 16U); /* Upper 16 bits. */
  134. base->LMOD = (uint16_t)(config->positionModulusValue); /* Lower 16 bits. */
  135. }
  136. if (config->enableTRIGGERClearPositionCounter)
  137. {
  138. tmp16 |= ENC_CTRL2_UPDPOS_MASK;
  139. }
  140. if (config->enableTRIGGERClearHoldPositionCounter)
  141. {
  142. tmp16 |= ENC_CTRL2_UPDHLD_MASK;
  143. }
  144. base->CTRL2 = tmp16;
  145. /* ENC_UCOMP & ENC_LCOMP. */
  146. base->UCOMP = (uint16_t)(config->positionCompareValue >> 16U); /* Upper 16 bits. */
  147. base->LCOMP = (uint16_t)(config->positionCompareValue); /* Lower 16 bits. */
  148. /* ENC_UINIT & ENC_LINIT. */
  149. base->UINIT = (uint16_t)(config->positionInitialValue >> 16U); /* Upper 16 bits. */
  150. base->LINIT = (uint16_t)(config->positionInitialValue); /* Lower 16 bits. */
  151. }
  152. void ENC_Deinit(ENC_Type *base)
  153. {
  154. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  155. /* Disable the clock. */
  156. CLOCK_DisableClock(s_encClocks[ENC_GetInstance(base)]);
  157. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  158. }
  159. void ENC_GetDefaultConfig(enc_config_t *config)
  160. {
  161. assert(NULL != config);
  162. config->enableReverseDirection = false;
  163. config->decoderWorkMode = kENC_DecoderWorkAsNormalMode;
  164. config->HOMETriggerMode = kENC_HOMETriggerDisabled;
  165. config->INDEXTriggerMode = kENC_INDEXTriggerDisabled;
  166. config->enableTRIGGERClearPositionCounter = false;
  167. config->enableTRIGGERClearHoldPositionCounter = false;
  168. config->enableWatchdog = false;
  169. config->watchdogTimeoutValue = 0U;
  170. config->filterCount = 0U;
  171. config->filterSamplePeriod = 0U;
  172. config->positionMatchMode = kENC_POSMATCHOnPositionCounterEqualToComapreValue;
  173. config->positionCompareValue = 0xFFFFFFFFU;
  174. config->revolutionCountCondition = kENC_RevolutionCountOnINDEXPulse;
  175. config->enableModuloCountMode = false;
  176. config->positionModulusValue = 0U;
  177. config->positionInitialValue = 0U;
  178. }
  179. void ENC_DoSoftwareLoadInitialPositionValue(ENC_Type *base)
  180. {
  181. uint16_t tmp16 = base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS);
  182. tmp16 |= ENC_CTRL_SWIP_MASK; /* Write 1 to trigger the command for loading initial position value. */
  183. base->CTRL = tmp16;
  184. }
  185. void ENC_SetSelfTestConfig(ENC_Type *base, const enc_self_test_config_t *config)
  186. {
  187. uint16_t tmp16 = 0U;
  188. if (NULL == config) /* Pass "NULL" to disable the feature. */
  189. {
  190. base->TST = 0U;
  191. return;
  192. }
  193. tmp16 = ENC_TST_TEN_MASK | ENC_TST_TCE_MASK | ENC_TST_TEST_PERIOD(config->signalPeriod) |
  194. ENC_TST_TEST_COUNT(config->signalCount);
  195. if (kENC_SelfTestDirectionNegative == config->signalDirection)
  196. {
  197. tmp16 |= ENC_TST_QDN_MASK;
  198. }
  199. base->TST = tmp16;
  200. }
  201. void ENC_EnableWatchdog(ENC_Type *base, bool enable)
  202. {
  203. uint16_t tmp16 = base->CTRL & (uint16_t)(~(ENC_CTRL_W1C_FLAGS | ENC_CTRL_WDE_MASK));
  204. if (enable)
  205. {
  206. tmp16 |= ENC_CTRL_WDE_MASK;
  207. }
  208. base->CTRL = tmp16;
  209. }
  210. uint32_t ENC_GetStatusFlags(ENC_Type *base)
  211. {
  212. uint32_t ret32 = 0U;
  213. /* ENC_CTRL. */
  214. if (ENC_CTRL_HIRQ_MASK == (ENC_CTRL_HIRQ_MASK & base->CTRL))
  215. {
  216. ret32 |= kENC_HOMETransitionFlag;
  217. }
  218. if (ENC_CTRL_XIRQ_MASK == (ENC_CTRL_XIRQ_MASK & base->CTRL))
  219. {
  220. ret32 |= kENC_INDEXPulseFlag;
  221. }
  222. if (ENC_CTRL_DIRQ_MASK == (ENC_CTRL_DIRQ_MASK & base->CTRL))
  223. {
  224. ret32 |= kENC_WatchdogTimeoutFlag;
  225. }
  226. if (ENC_CTRL_CMPIRQ_MASK == (ENC_CTRL_CMPIRQ_MASK & base->CTRL))
  227. {
  228. ret32 |= kENC_PositionCompareFlag;
  229. }
  230. /* ENC_CTRL2. */
  231. if (ENC_CTRL2_SABIRQ_MASK == (ENC_CTRL2_SABIRQ_MASK & base->CTRL2))
  232. {
  233. ret32 |= kENC_SimultBothPhaseChangeFlag;
  234. }
  235. if (ENC_CTRL2_ROIRQ_MASK == (ENC_CTRL2_ROIRQ_MASK & base->CTRL2))
  236. {
  237. ret32 |= kENC_PositionRollOverFlag;
  238. }
  239. if (ENC_CTRL2_RUIRQ_MASK == (ENC_CTRL2_RUIRQ_MASK & base->CTRL2))
  240. {
  241. ret32 |= kENC_PositionRollUnderFlag;
  242. }
  243. if (ENC_CTRL2_DIR_MASK == (ENC_CTRL2_DIR_MASK & base->CTRL2))
  244. {
  245. ret32 |= kENC_LastCountDirectionFlag;
  246. }
  247. return ret32;
  248. }
  249. void ENC_ClearStatusFlags(ENC_Type *base, uint32_t mask)
  250. {
  251. uint32_t tmp16 = 0U;
  252. /* ENC_CTRL. */
  253. if (kENC_HOMETransitionFlag == (kENC_HOMETransitionFlag & mask))
  254. {
  255. tmp16 |= ENC_CTRL_HIRQ_MASK;
  256. }
  257. if (kENC_INDEXPulseFlag == (kENC_INDEXPulseFlag & mask))
  258. {
  259. tmp16 |= ENC_CTRL_XIRQ_MASK;
  260. }
  261. if (kENC_WatchdogTimeoutFlag == (kENC_WatchdogTimeoutFlag & mask))
  262. {
  263. tmp16 |= ENC_CTRL_DIRQ_MASK;
  264. }
  265. if (kENC_PositionCompareFlag == (kENC_PositionCompareFlag & mask))
  266. {
  267. tmp16 |= ENC_CTRL_CMPIRQ_MASK;
  268. }
  269. if (0U != tmp16)
  270. {
  271. base->CTRL = (base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS)) | tmp16;
  272. }
  273. /* ENC_CTRL2. */
  274. tmp16 = 0U;
  275. if (kENC_SimultBothPhaseChangeFlag == (kENC_SimultBothPhaseChangeFlag & mask))
  276. {
  277. tmp16 |= ENC_CTRL2_SABIRQ_MASK;
  278. }
  279. if (kENC_PositionRollOverFlag == (kENC_PositionRollOverFlag & mask))
  280. {
  281. tmp16 |= ENC_CTRL2_ROIRQ_MASK;
  282. }
  283. if (kENC_PositionRollUnderFlag == (kENC_PositionRollUnderFlag & mask))
  284. {
  285. tmp16 |= ENC_CTRL2_RUIRQ_MASK;
  286. }
  287. if (0U != tmp16)
  288. {
  289. base->CTRL2 = (base->CTRL2 & (uint16_t)(~ENC_CTRL2_W1C_FLAGS)) | tmp16;
  290. }
  291. }
  292. void ENC_EnableInterrupts(ENC_Type *base, uint32_t mask)
  293. {
  294. uint32_t tmp16 = 0U;
  295. /* ENC_CTRL. */
  296. if (kENC_HOMETransitionInterruptEnable == (kENC_HOMETransitionInterruptEnable & mask))
  297. {
  298. tmp16 |= ENC_CTRL_HIE_MASK;
  299. }
  300. if (kENC_INDEXPulseInterruptEnable == (kENC_INDEXPulseInterruptEnable & mask))
  301. {
  302. tmp16 |= ENC_CTRL_XIE_MASK;
  303. }
  304. if (kENC_WatchdogTimeoutInterruptEnable == (kENC_WatchdogTimeoutInterruptEnable & mask))
  305. {
  306. tmp16 |= ENC_CTRL_DIE_MASK;
  307. }
  308. if (kENC_PositionCompareInerruptEnable == (kENC_PositionCompareInerruptEnable & mask))
  309. {
  310. tmp16 |= ENC_CTRL_CMPIE_MASK;
  311. }
  312. if (tmp16 != 0U)
  313. {
  314. base->CTRL = (base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS)) | tmp16;
  315. }
  316. /* ENC_CTRL2. */
  317. tmp16 = 0U;
  318. if (kENC_SimultBothPhaseChangeInterruptEnable == (kENC_SimultBothPhaseChangeInterruptEnable & mask))
  319. {
  320. tmp16 |= ENC_CTRL2_SABIE_MASK;
  321. }
  322. if (kENC_PositionRollOverInterruptEnable == (kENC_PositionRollOverInterruptEnable & mask))
  323. {
  324. tmp16 |= ENC_CTRL2_ROIE_MASK;
  325. }
  326. if (kENC_PositionRollUnderInterruptEnable == (kENC_PositionRollUnderInterruptEnable & mask))
  327. {
  328. tmp16 |= ENC_CTRL2_RUIE_MASK;
  329. }
  330. if (tmp16 != 0U)
  331. {
  332. base->CTRL2 = (base->CTRL2 & (uint16_t)(~ENC_CTRL2_W1C_FLAGS)) | tmp16;
  333. }
  334. }
  335. void ENC_DisableInterrupts(ENC_Type *base, uint32_t mask)
  336. {
  337. uint16_t tmp16 = 0U;
  338. /* ENC_CTRL. */
  339. if (kENC_HOMETransitionInterruptEnable == (kENC_HOMETransitionInterruptEnable & mask))
  340. {
  341. tmp16 |= ENC_CTRL_HIE_MASK;
  342. }
  343. if (kENC_INDEXPulseInterruptEnable == (kENC_INDEXPulseInterruptEnable & mask))
  344. {
  345. tmp16 |= ENC_CTRL_XIE_MASK;
  346. }
  347. if (kENC_WatchdogTimeoutInterruptEnable == (kENC_WatchdogTimeoutInterruptEnable & mask))
  348. {
  349. tmp16 |= ENC_CTRL_DIE_MASK;
  350. }
  351. if (kENC_PositionCompareInerruptEnable == (kENC_PositionCompareInerruptEnable & mask))
  352. {
  353. tmp16 |= ENC_CTRL_CMPIE_MASK;
  354. }
  355. if (0U != tmp16)
  356. {
  357. base->CTRL = (uint16_t)(base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS)) & (uint16_t)(~tmp16);
  358. }
  359. /* ENC_CTRL2. */
  360. tmp16 = 0U;
  361. if (kENC_SimultBothPhaseChangeInterruptEnable == (kENC_SimultBothPhaseChangeInterruptEnable & mask))
  362. {
  363. tmp16 |= ENC_CTRL2_SABIE_MASK;
  364. }
  365. if (kENC_PositionRollOverInterruptEnable == (kENC_PositionRollOverInterruptEnable & mask))
  366. {
  367. tmp16 |= ENC_CTRL2_ROIE_MASK;
  368. }
  369. if (kENC_PositionRollUnderInterruptEnable == (kENC_PositionRollUnderInterruptEnable & mask))
  370. {
  371. tmp16 |= ENC_CTRL2_RUIE_MASK;
  372. }
  373. if (tmp16 != 0U)
  374. {
  375. base->CTRL2 = (uint16_t)(base->CTRL2 & (uint16_t)(~ENC_CTRL2_W1C_FLAGS)) & (uint16_t)(~tmp16);
  376. }
  377. }
  378. uint32_t ENC_GetEnabledInterrupts(ENC_Type *base)
  379. {
  380. uint32_t ret32 = 0U;
  381. /* ENC_CTRL. */
  382. if (ENC_CTRL_HIE_MASK == (ENC_CTRL_HIE_MASK & base->CTRL))
  383. {
  384. ret32 |= kENC_HOMETransitionInterruptEnable;
  385. }
  386. if (ENC_CTRL_XIE_MASK == (ENC_CTRL_XIE_MASK & base->CTRL))
  387. {
  388. ret32 |= kENC_INDEXPulseInterruptEnable;
  389. }
  390. if (ENC_CTRL_DIE_MASK == (ENC_CTRL_DIE_MASK & base->CTRL))
  391. {
  392. ret32 |= kENC_WatchdogTimeoutInterruptEnable;
  393. }
  394. if (ENC_CTRL_CMPIE_MASK == (ENC_CTRL_CMPIE_MASK & base->CTRL))
  395. {
  396. ret32 |= kENC_PositionCompareInerruptEnable;
  397. }
  398. /* ENC_CTRL2. */
  399. if (ENC_CTRL2_SABIE_MASK == (ENC_CTRL2_SABIE_MASK & base->CTRL2))
  400. {
  401. ret32 |= kENC_SimultBothPhaseChangeInterruptEnable;
  402. }
  403. if (ENC_CTRL2_ROIE_MASK == (ENC_CTRL2_ROIE_MASK & base->CTRL2))
  404. {
  405. ret32 |= kENC_PositionRollOverInterruptEnable;
  406. }
  407. if (ENC_CTRL2_RUIE_MASK == (ENC_CTRL2_RUIE_MASK & base->CTRL2))
  408. {
  409. ret32 |= kENC_PositionRollUnderInterruptEnable;
  410. }
  411. return ret32;
  412. }
  413. void ENC_SetInitialPositionValue(ENC_Type *base, uint32_t value)
  414. {
  415. base->UINIT = (uint16_t)(value >> 16U); /* Set upper 16 bits. */
  416. base->LINIT = (uint16_t)(value); /* Set lower 16 bits. */
  417. }
  418. uint32_t ENC_GetPositionValue(ENC_Type *base)
  419. {
  420. uint32_t ret32;
  421. ret32 = base->UPOS; /* Get upper 16 bits and make a snapshot. */
  422. ret32 <<= 16U;
  423. ret32 |= base->LPOSH; /* Get lower 16 bits from hold register. */
  424. return ret32;
  425. }
  426. uint32_t ENC_GetHoldPositionValue(ENC_Type *base)
  427. {
  428. uint32_t ret32;
  429. ret32 = base->UPOSH; /* Get upper 16 bits and make a snapshot. */
  430. ret32 <<= 16U;
  431. ret32 |= base->LPOSH; /* Get lower 16 bits from hold register. */
  432. return ret32;
  433. }