em_dac.h 12 KB

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  1. /***************************************************************************//**
  2. * @file
  3. * @brief Digital to Analog Converter (DAC) peripheral API
  4. * @author Energy Micro AS
  5. * @version 3.0.0
  6. *******************************************************************************
  7. * @section License
  8. * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
  9. *******************************************************************************
  10. *
  11. * Permission is granted to anyone to use this software for any purpose,
  12. * including commercial applications, and to alter it and redistribute it
  13. * freely, subject to the following restrictions:
  14. *
  15. * 1. The origin of this software must not be misrepresented; you must not
  16. * claim that you wrote the original software.
  17. * 2. Altered source versions must be plainly marked as such, and must not be
  18. * misrepresented as being the original software.
  19. * 3. This notice may not be removed or altered from any source distribution.
  20. *
  21. * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
  22. * obligation to support this Software. Energy Micro AS is providing the
  23. * Software "AS IS", with no express or implied warranties of any kind,
  24. * including, but not limited to, any implied warranties of merchantability
  25. * or fitness for any particular purpose or warranties against infringement
  26. * of any proprietary rights of a third party.
  27. *
  28. * Energy Micro AS will not be liable for any consequential, incidental, or
  29. * special damages, or any other relief, or for any claim by any third party,
  30. * arising from your use of this Software.
  31. *
  32. ******************************************************************************/
  33. #ifndef __EM_DAC_H
  34. #define __EM_DAC_H
  35. #ifdef __cplusplus
  36. extern "C" {
  37. #endif
  38. #include <stdbool.h>
  39. #include "em_part.h"
  40. /***************************************************************************//**
  41. * @addtogroup EM_Library
  42. * @{
  43. ******************************************************************************/
  44. /***************************************************************************//**
  45. * @addtogroup DAC
  46. * @{
  47. ******************************************************************************/
  48. /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
  49. /** Validation of DAC register block pointer reference for assert statements. */
  50. #define DAC_REF_VALID(ref) ((ref) == DAC0)
  51. /** @endcond */
  52. /*******************************************************************************
  53. ******************************** ENUMS ************************************
  54. ******************************************************************************/
  55. /** Conversion mode. */
  56. typedef enum
  57. {
  58. dacConvModeContinuous = _DAC_CTRL_CONVMODE_CONTINUOUS, /**< Continuous mode. */
  59. dacConvModeSampleHold = _DAC_CTRL_CONVMODE_SAMPLEHOLD, /**< Sample/hold mode. */
  60. dacConvModeSampleOff = _DAC_CTRL_CONVMODE_SAMPLEOFF /**< Sample/shut off mode. */
  61. } DAC_ConvMode_TypeDef;
  62. /** Output mode. */
  63. typedef enum
  64. {
  65. dacOutputDisable = _DAC_CTRL_OUTMODE_DISABLE, /**< Output to pin and ADC disabled. */
  66. dacOutputPin = _DAC_CTRL_OUTMODE_PIN, /**< Output to pin only. */
  67. dacOutputADC = _DAC_CTRL_OUTMODE_ADC, /**< Output to ADC only */
  68. dacOutputPinADC = _DAC_CTRL_OUTMODE_PINADC /**< Output to pin and ADC. */
  69. } DAC_Output_TypeDef;
  70. /** Peripheral Reflex System signal used to trigger single sample. */
  71. typedef enum
  72. {
  73. dacPRSSELCh0 = _DAC_CH0CTRL_PRSSEL_PRSCH0, /**< PRS channel 0. */
  74. dacPRSSELCh1 = _DAC_CH0CTRL_PRSSEL_PRSCH1, /**< PRS channel 1. */
  75. dacPRSSELCh2 = _DAC_CH0CTRL_PRSSEL_PRSCH2, /**< PRS channel 2. */
  76. dacPRSSELCh3 = _DAC_CH0CTRL_PRSSEL_PRSCH3, /**< PRS channel 3. */
  77. dacPRSSELCh4 = _DAC_CH0CTRL_PRSSEL_PRSCH4, /**< PRS channel 4. */
  78. dacPRSSELCh5 = _DAC_CH0CTRL_PRSSEL_PRSCH5, /**< PRS channel 5. */
  79. dacPRSSELCh6 = _DAC_CH0CTRL_PRSSEL_PRSCH6, /**< PRS channel 6. */
  80. dacPRSSELCh7 = _DAC_CH0CTRL_PRSSEL_PRSCH7 /**< PRS channel 7. */
  81. } DAC_PRSSEL_TypeDef;
  82. /** Reference voltage for DAC. */
  83. typedef enum
  84. {
  85. dacRef1V25 = _DAC_CTRL_REFSEL_1V25, /**< Internal 1.25V bandgap reference. */
  86. dacRef2V5 = _DAC_CTRL_REFSEL_2V5, /**< Internal 2.5V bandgap reference. */
  87. dacRefVDD = _DAC_CTRL_REFSEL_VDD /**< VDD reference. */
  88. } DAC_Ref_TypeDef;
  89. /** Refresh interval. */
  90. typedef enum
  91. {
  92. dacRefresh8 = _DAC_CTRL_REFRSEL_8CYCLES, /**< Refresh every 8 prescaled cycles. */
  93. dacRefresh16 = _DAC_CTRL_REFRSEL_16CYCLES, /**< Refresh every 16 prescaled cycles. */
  94. dacRefresh32 = _DAC_CTRL_REFRSEL_32CYCLES, /**< Refresh every 32 prescaled cycles. */
  95. dacRefresh64 = _DAC_CTRL_REFRSEL_64CYCLES /**< Refresh every 64 prescaled cycles. */
  96. } DAC_Refresh_TypeDef;
  97. /*******************************************************************************
  98. ******************************* STRUCTS ***********************************
  99. ******************************************************************************/
  100. /** DAC init structure, common for both channels. */
  101. typedef struct
  102. {
  103. /** Refresh interval. Only used if REFREN bit set for a DAC channel. */
  104. DAC_Refresh_TypeDef refresh;
  105. /** Reference voltage to use. */
  106. DAC_Ref_TypeDef reference;
  107. /** Output mode */
  108. DAC_Output_TypeDef outMode;
  109. /** Conversion mode. */
  110. DAC_ConvMode_TypeDef convMode;
  111. /**
  112. * Prescaler used to get DAC clock. Derived as follows:
  113. * DACclk=HFPERclk/(2^prescale). The DAC clock should be <= 1MHz.
  114. */
  115. uint8_t prescale;
  116. /** Enable/disable use of low pass filter on output. */
  117. bool lpEnable;
  118. /** Enable/disable reset of prescaler on ch0 start. */
  119. bool ch0ResetPre;
  120. /** Enable/disable output enable control by CH1 PRS signal. */
  121. bool outEnablePRS;
  122. /** Enable/disable sine mode. */
  123. bool sineEnable;
  124. /** Select if single ended or differential mode. */
  125. bool diff;
  126. } DAC_Init_TypeDef;
  127. /** Default config for DAC init structure. */
  128. #define DAC_INIT_DEFAULT \
  129. { dacRefresh8, /* Refresh every 8 prescaled cycles. */ \
  130. dacRef1V25, /* 1.25V internal reference. */ \
  131. dacOutputPin, /* Output to pin only. */ \
  132. dacConvModeContinuous, /* Continuous mode. */ \
  133. 0, /* No prescaling. */ \
  134. false, /* Do not enable low pass filter. */ \
  135. false, /* Do not reset prescaler on ch0 start. */ \
  136. false, /* DAC output enable always on. */ \
  137. false, /* Disable sine mode. */ \
  138. false /* Single ended mode. */ \
  139. }
  140. /** DAC channel init structure. */
  141. typedef struct
  142. {
  143. /** Enable channel. */
  144. bool enable;
  145. /**
  146. * Peripheral reflex system trigger enable. If false, channel is triggered
  147. * by writing to CHnDATA.
  148. */
  149. bool prsEnable;
  150. /**
  151. * Enable/disable automatic refresh of channel. Refresh interval must be
  152. * defined in common control init, please see DAC_Init().
  153. */
  154. bool refreshEnable;
  155. /**
  156. * Peripheral reflex system trigger selection. Only applicable if @p prsEnable
  157. * is enabled.
  158. */
  159. DAC_PRSSEL_TypeDef prsSel;
  160. } DAC_InitChannel_TypeDef;
  161. /** Default config for DAC channel init structure. */
  162. #define DAC_INITCHANNEL_DEFAULT \
  163. { false, /* Leave channel disabled when init done. */ \
  164. false, /* Disable PRS triggering. */ \
  165. false, /* Channel not refreshed automatically. */ \
  166. dacPRSSELCh0 /* Select PRS ch0 (if PRS triggering enabled). */ \
  167. }
  168. /*******************************************************************************
  169. ***************************** PROTOTYPES **********************************
  170. ******************************************************************************/
  171. void DAC_Enable(DAC_TypeDef *dac, unsigned int ch, bool enable);
  172. void DAC_Init(DAC_TypeDef *dac, const DAC_Init_TypeDef *init);
  173. void DAC_InitChannel(DAC_TypeDef *dac,
  174. const DAC_InitChannel_TypeDef *init,
  175. unsigned int ch);
  176. /***************************************************************************//**
  177. * @brief
  178. * Clear one or more pending DAC interrupts.
  179. *
  180. * @param[in] dac
  181. * Pointer to DAC peripheral register block.
  182. *
  183. * @param[in] flags
  184. * Pending DAC interrupt source to clear. Use a bitwise logic OR combination of
  185. * valid interrupt flags for the DAC module (DAC_IF_nnn).
  186. ******************************************************************************/
  187. __STATIC_INLINE void DAC_IntClear(DAC_TypeDef *dac, uint32_t flags)
  188. {
  189. dac->IFC = flags;
  190. }
  191. /***************************************************************************//**
  192. * @brief
  193. * Disable one or more DAC interrupts.
  194. *
  195. * @param[in] dac
  196. * Pointer to DAC peripheral register block.
  197. *
  198. * @param[in] flags
  199. * DAC interrupt sources to disable. Use a bitwise logic OR combination of
  200. * valid interrupt flags for the DAC module (DAC_IF_nnn).
  201. ******************************************************************************/
  202. __STATIC_INLINE void DAC_IntDisable(DAC_TypeDef *dac, uint32_t flags)
  203. {
  204. dac->IEN &= ~(flags);
  205. }
  206. /***************************************************************************//**
  207. * @brief
  208. * Enable one or more DAC interrupts.
  209. *
  210. * @note
  211. * Depending on the use, a pending interrupt may already be set prior to
  212. * enabling the interrupt. Consider using DAC_IntClear() prior to enabling
  213. * if such a pending interrupt should be ignored.
  214. *
  215. * @param[in] dac
  216. * Pointer to DAC peripheral register block.
  217. *
  218. * @param[in] flags
  219. * DAC interrupt sources to enable. Use a bitwise logic OR combination of
  220. * valid interrupt flags for the DAC module (DAC_IF_nnn).
  221. ******************************************************************************/
  222. __STATIC_INLINE void DAC_IntEnable(DAC_TypeDef *dac, uint32_t flags)
  223. {
  224. dac->IEN |= flags;
  225. }
  226. /***************************************************************************//**
  227. * @brief
  228. * Get pending DAC interrupt flags.
  229. *
  230. * @note
  231. * The event bits are not cleared by the use of this function.
  232. *
  233. * @param[in] dac
  234. * Pointer to DAC peripheral register block.
  235. *
  236. * @return
  237. * DAC interrupt sources pending. A bitwise logic OR combination of valid
  238. * interrupt flags for the DAC module (DAC_IF_nnn).
  239. ******************************************************************************/
  240. __STATIC_INLINE uint32_t DAC_IntGet(DAC_TypeDef *dac)
  241. {
  242. return(dac->IF);
  243. }
  244. /***************************************************************************//**
  245. * @brief
  246. * Set one or more pending DAC interrupts from SW.
  247. *
  248. * @param[in] dac
  249. * Pointer to DAC peripheral register block.
  250. *
  251. * @param[in] flags
  252. * DAC interrupt sources to set to pending. Use a bitwise logic OR combination
  253. * of valid interrupt flags for the DAC module (DAC_IF_nnn).
  254. ******************************************************************************/
  255. __STATIC_INLINE void DAC_IntSet(DAC_TypeDef *dac, uint32_t flags)
  256. {
  257. dac->IFS = flags;
  258. }
  259. uint8_t DAC_PrescaleCalc(uint32_t dacFreq, uint32_t hfperFreq);
  260. void DAC_Reset(DAC_TypeDef *dac);
  261. /** @} (end addtogroup DAC) */
  262. /** @} (end addtogroup EM_Library) */
  263. #ifdef __cplusplus
  264. }
  265. #endif
  266. #endif /* __EM_DAC_H */