startup_LPC122x.s 9.1 KB

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  1. ;/*****************************************************************************
  2. ; * @file: startup_LPC122x.s
  3. ; * @purpose: CMSIS Cortex-M0 Core Device Startup File
  4. ; * for the NXP LPC122x Device Series
  5. ; * @version: V1.0
  6. ; * @date: 25. Nov. 2008
  7. ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
  8. ; *
  9. ; * Copyright (C) 2008 ARM Limited. All rights reserved.
  10. ; * ARM Limited (ARM) is supplying this software for use with Cortex-M0
  11. ; * processor based microcontrollers. This file can be freely distributed
  12. ; * within development tools that are supporting such ARM based processors.
  13. ; *
  14. ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
  15. ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
  16. ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
  17. ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
  18. ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
  19. ; *
  20. ; *****************************************************************************/
  21. ; <h> Stack Configuration
  22. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  23. ; </h>
  24. Stack_Size EQU 0x00000200
  25. AREA STACK, NOINIT, READWRITE, ALIGN=3
  26. Stack_Mem SPACE Stack_Size
  27. __initial_sp
  28. ; <h> Heap Configuration
  29. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  30. ; </h>
  31. Heap_Size EQU 0x00000000
  32. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  33. __heap_base
  34. Heap_Mem SPACE Heap_Size
  35. __heap_limit
  36. PRESERVE8
  37. THUMB
  38. ; Vector Table Mapped to Address 0 at Reset
  39. AREA RESET, DATA, READONLY
  40. EXPORT __Vectors
  41. __Vectors DCD __initial_sp ; Top of Stack
  42. DCD Reset_Handler ; Reset Handler
  43. DCD NMI_Handler ; NMI Handler
  44. DCD HardFault_Handler ; Hard Fault Handler
  45. DCD MemManage_Handler ; MPU Fault Handler
  46. DCD BusFault_Handler ; Bus Fault Handler
  47. DCD UsageFault_Handler ; Usage Fault Handler
  48. DCD 0 ; Reserved
  49. DCD 0 ; Reserved
  50. DCD 0 ; Reserved
  51. DCD 0 ; Reserved
  52. DCD SVC_Handler ; SVCall Handler
  53. DCD DebugMon_Handler ; Debug Monitor Handler
  54. DCD 0 ; Reserved
  55. DCD PendSV_Handler ; PendSV Handler
  56. DCD SysTick_Handler ; SysTick Handler
  57. ; External Interrupts
  58. DCD WAKEUP_IRQHandler ; 12 wakeup sources for all the
  59. DCD WAKEUP_IRQHandler ; I/O pins starting from PIO0 (0:11)
  60. DCD WAKEUP_IRQHandler ; all 40 are routed to the same ISR
  61. DCD WAKEUP_IRQHandler
  62. DCD WAKEUP_IRQHandler
  63. DCD WAKEUP_IRQHandler
  64. DCD WAKEUP_IRQHandler
  65. DCD WAKEUP_IRQHandler
  66. DCD WAKEUP_IRQHandler
  67. DCD WAKEUP_IRQHandler
  68. DCD WAKEUP_IRQHandler
  69. DCD WAKEUP_IRQHandler
  70. DCD I2C_IRQHandler ; I2C
  71. DCD TIMER16_0_IRQHandler ; 16-bit Timer0
  72. DCD TIMER16_1_IRQHandler ; 16-bit Timer1
  73. DCD TIMER32_0_IRQHandler ; 32-bit Timer0
  74. DCD TIMER32_1_IRQHandler ; 32-bit Timer1
  75. DCD SSP_IRQHandler ; SSP
  76. DCD UART0_IRQHandler ; UART0
  77. DCD UART1_IRQHandler ; UART1
  78. DCD COMP_IRQHandler ; Comparator
  79. DCD ADC_IRQHandler ; A/D Converter
  80. DCD WDT_IRQHandler ; Watchdog timer
  81. DCD BOD_IRQHandler ; Brown Out Detect
  82. DCD FMC_IRQHandler ; IP2111 Flash Memory Controller
  83. DCD PIOINT0_IRQHandler ; PIO INT0
  84. DCD PIOINT1_IRQHandler ; PIO INT1
  85. DCD PIOINT2_IRQHandler ; PIO INT2
  86. DCD PMU_IRQHandler ; PMU/Wakeup
  87. DCD DMA_IRQHandler ; DMA
  88. DCD RTC_IRQHandler ; RTC
  89. DCD EDM_IRQHandler ; Event Driven Micro
  90. IF :LNOT::DEF:NO_CRP
  91. AREA |.ARM.__at_0x02FC|, CODE, READONLY
  92. CRP_Key DCD 0xFFFFFFFF
  93. ENDIF
  94. AREA |.text|, CODE, READONLY
  95. ; Reset Handler
  96. Reset_Handler PROC
  97. EXPORT Reset_Handler [WEAK]
  98. IMPORT __main
  99. LDR R0, =__main
  100. BX R0
  101. ENDP
  102. ; Dummy Exception Handlers (infinite loops which can be modified)
  103. ; now, under COMMON NMI.c and NMI.h, a real NMI handler is created if NMI is enabled
  104. ; for particular peripheral.
  105. ;NMI_Handler PROC
  106. ; EXPORT NMI_Handler [WEAK]
  107. ; B .
  108. ; ENDP
  109. HardFault_Handler\
  110. PROC
  111. EXPORT HardFault_Handler [WEAK]
  112. B .
  113. ENDP
  114. MemManage_Handler\
  115. PROC
  116. EXPORT MemManage_Handler [WEAK]
  117. B .
  118. ENDP
  119. BusFault_Handler\
  120. PROC
  121. EXPORT BusFault_Handler [WEAK]
  122. B .
  123. ENDP
  124. UsageFault_Handler\
  125. PROC
  126. EXPORT UsageFault_Handler [WEAK]
  127. B .
  128. ENDP
  129. SVC_Handler PROC
  130. EXPORT SVC_Handler [WEAK]
  131. B .
  132. ENDP
  133. DebugMon_Handler\
  134. PROC
  135. EXPORT DebugMon_Handler [WEAK]
  136. B .
  137. ENDP
  138. PendSV_Handler PROC
  139. EXPORT PendSV_Handler [WEAK]
  140. B .
  141. ENDP
  142. SysTick_Handler PROC
  143. EXPORT SysTick_Handler [WEAK]
  144. B .
  145. ENDP
  146. Default_Handler PROC
  147. EXPORT NMI_Handler [WEAK]
  148. EXPORT WAKEUP_IRQHandler [WEAK]
  149. EXPORT I2C_IRQHandler [WEAK]
  150. EXPORT TIMER16_0_IRQHandler [WEAK]
  151. EXPORT TIMER16_1_IRQHandler [WEAK]
  152. EXPORT TIMER32_0_IRQHandler [WEAK]
  153. EXPORT TIMER32_1_IRQHandler [WEAK]
  154. EXPORT SSP_IRQHandler [WEAK]
  155. EXPORT UART0_IRQHandler [WEAK]
  156. EXPORT UART1_IRQHandler [WEAK]
  157. EXPORT COMP_IRQHandler [WEAK]
  158. EXPORT ADC_IRQHandler [WEAK]
  159. EXPORT WDT_IRQHandler [WEAK]
  160. EXPORT BOD_IRQHandler [WEAK]
  161. EXPORT FMC_IRQHandler [WEAK]
  162. EXPORT PIOINT0_IRQHandler [WEAK]
  163. EXPORT PIOINT1_IRQHandler [WEAK]
  164. EXPORT PIOINT2_IRQHandler [WEAK]
  165. EXPORT PMU_IRQHandler [WEAK]
  166. EXPORT DMA_IRQHandler [WEAK]
  167. EXPORT RTC_IRQHandler [WEAK]
  168. EXPORT EDM_IRQHandler [WEAK]
  169. NMI_Handler
  170. WAKEUP_IRQHandler
  171. I2C_IRQHandler
  172. TIMER16_0_IRQHandler
  173. TIMER16_1_IRQHandler
  174. TIMER32_0_IRQHandler
  175. TIMER32_1_IRQHandler
  176. SSP_IRQHandler
  177. UART0_IRQHandler
  178. UART1_IRQHandler
  179. COMP_IRQHandler
  180. ADC_IRQHandler
  181. WDT_IRQHandler
  182. BOD_IRQHandler
  183. FMC_IRQHandler
  184. PIOINT0_IRQHandler
  185. PIOINT1_IRQHandler
  186. PIOINT2_IRQHandler
  187. PMU_IRQHandler
  188. DMA_IRQHandler
  189. RTC_IRQHandler
  190. EDM_IRQHandler
  191. B .
  192. ENDP
  193. ALIGN
  194. ; User Initial Stack & Heap
  195. IF :DEF:__MICROLIB
  196. EXPORT __initial_sp
  197. EXPORT __heap_base
  198. EXPORT __heap_limit
  199. ELSE
  200. IMPORT __use_two_region_memory
  201. EXPORT __user_initial_stackheap
  202. __user_initial_stackheap
  203. LDR R0, = Heap_Mem
  204. LDR R1, =(Stack_Mem + Stack_Size)
  205. LDR R2, = (Heap_Mem + Heap_Size)
  206. LDR R3, = Stack_Mem
  207. BX LR
  208. ALIGN
  209. ENDIF
  210. END