drv_gpio.c 12 KB

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  1. /*
  2. * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2019-07-11 wangyq the first version
  9. */
  10. #include <rthw.h>
  11. #include <rtdevice.h>
  12. #include "board.h"
  13. #include "drv_gpio.h"
  14. #include <lib_scu.h>
  15. #include <lib_gpio.h>
  16. #ifdef RT_USING_PIN
  17. #define __ES8P_PIN(index, gpio, gpio_index) {index, GPIO##gpio, GPIO_Pin_##gpio_index}
  18. #define __ES8P_PIN_DEFAULT {-1, GPIOA, GPIO_Pin_0}
  19. /* es8p GPIO driver */
  20. struct pin_index
  21. {
  22. int index;
  23. GPIO_TYPE gpio;
  24. GPIO_TYPE_PIN pin;
  25. };
  26. static const struct pin_index pins[] =
  27. {
  28. __ES8P_PIN_DEFAULT,
  29. __ES8P_PIN(1, B, 0),
  30. __ES8P_PIN(2, B, 1),
  31. __ES8P_PIN(3, B, 2),
  32. __ES8P_PIN(4, B, 3),
  33. __ES8P_PIN(5, B, 4),
  34. __ES8P_PIN(6, B, 5),
  35. __ES8P_PIN(7, B, 6),
  36. __ES8P_PIN(8, B, 7),
  37. __ES8P_PIN(9, B, 8),
  38. __ES8P_PIN(10, B, 9),
  39. __ES8P_PIN(11, B, 10),
  40. __ES8P_PIN(12, B, 11),
  41. __ES8P_PIN(13, B, 12),
  42. __ES8P_PIN(14, B, 13),
  43. __ES8P_PIN(15, A, 0),
  44. __ES8P_PIN(16, A, 1),
  45. __ES8P_PIN(17, A, 2),
  46. __ES8P_PIN(18, A, 3),
  47. __ES8P_PIN(19, A, 4),
  48. __ES8P_PIN(20, A, 5),
  49. __ES8P_PIN(21, A, 6),
  50. __ES8P_PIN(22, A, 7),
  51. __ES8P_PIN(23, A, 8),
  52. __ES8P_PIN(24, A, 9),
  53. __ES8P_PIN(25, A, 10),
  54. __ES8P_PIN(26, A, 11),
  55. __ES8P_PIN(27, A, 12),
  56. __ES8P_PIN(28, A, 13),
  57. __ES8P_PIN(29, A, 14),
  58. __ES8P_PIN(30, A, 15),
  59. __ES8P_PIN(31, A, 16),
  60. __ES8P_PIN_DEFAULT,
  61. __ES8P_PIN_DEFAULT,
  62. __ES8P_PIN(34, A, 17),
  63. __ES8P_PIN(35, A, 18),
  64. __ES8P_PIN_DEFAULT,
  65. __ES8P_PIN(37, A, 20),
  66. __ES8P_PIN(38, A, 21),
  67. __ES8P_PIN(39, A, 22),
  68. __ES8P_PIN(40, A, 23),
  69. __ES8P_PIN(41, A, 24),
  70. __ES8P_PIN(42, A, 25),
  71. __ES8P_PIN(43, A, 26),
  72. __ES8P_PIN(44, A, 27),
  73. __ES8P_PIN(45, A, 28),
  74. __ES8P_PIN(46, A, 29),
  75. __ES8P_PIN(47, A, 30),
  76. __ES8P_PIN(48, A, 31),
  77. };
  78. struct irq_map
  79. {
  80. PINT_TYPE pinno;
  81. IRQn_Type irqno;
  82. };
  83. static const struct irq_map irq_map[] =
  84. {
  85. {PINT0, PINT0_IRQn},
  86. {PINT1, PINT1_IRQn},
  87. {PINT2, PINT2_IRQn},
  88. {PINT3, PINT3_IRQn},
  89. {PINT4, PINT4_IRQn},
  90. {PINT5, PINT5_IRQn},
  91. {PINT6, PINT6_IRQn},
  92. {PINT7, PINT7_IRQn},
  93. };
  94. struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
  95. {
  96. {-1, 0, RT_NULL, RT_NULL},
  97. {-1, 0, RT_NULL, RT_NULL},
  98. {-1, 0, RT_NULL, RT_NULL},
  99. {-1, 0, RT_NULL, RT_NULL},
  100. {-1, 0, RT_NULL, RT_NULL},
  101. {-1, 0, RT_NULL, RT_NULL},
  102. {-1, 0, RT_NULL, RT_NULL},
  103. {-1, 0, RT_NULL, RT_NULL},
  104. };
  105. #define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
  106. const struct pin_index *get_pin(uint8_t pin)
  107. {
  108. const struct pin_index *index;
  109. if (pin < ITEM_NUM(pins))
  110. {
  111. index = &pins[pin];
  112. if (index->index == -1)
  113. index = RT_NULL;
  114. }
  115. else
  116. {
  117. index = RT_NULL;
  118. }
  119. return index;
  120. };
  121. void es8p_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
  122. {
  123. const struct pin_index *index;
  124. index = get_pin(pin);
  125. if (index == RT_NULL)
  126. {
  127. return;
  128. }
  129. if (value == 0)
  130. {
  131. if (index->gpio == GPIOA)
  132. GPIOA_ResetBit(index->pin);
  133. else if (index->gpio == GPIOB)
  134. GPIOB_ResetBit(index->pin);
  135. }
  136. else
  137. {
  138. if (index->gpio == GPIOA)
  139. GPIOA_SetBit(index->pin);
  140. else if (index->gpio == GPIOB)
  141. GPIOB_SetBit(index->pin);
  142. }
  143. }
  144. int es8p_pin_read(rt_device_t dev, rt_base_t pin)
  145. {
  146. int value;
  147. const struct pin_index *index;
  148. value = PIN_LOW;
  149. index = get_pin(pin);
  150. if (index == RT_NULL)
  151. {
  152. return value;
  153. }
  154. value = GPIO_ReadBit(index->gpio, index->pin);
  155. return value;
  156. }
  157. void es8p_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
  158. {
  159. const struct pin_index *index;
  160. GPIO_InitStruType gpio_initstruct;
  161. index = get_pin(pin);
  162. if (index == RT_NULL)
  163. {
  164. return;
  165. }
  166. /* Configure GPIO_InitStructure */
  167. gpio_initstruct.GPIO_Signal = GPIO_Pin_Signal_Digital;
  168. gpio_initstruct.GPIO_Func = GPIO_Func_0;
  169. gpio_initstruct.GPIO_OD = GPIO_ODE_Output_Disable;
  170. gpio_initstruct.GPIO_PUEN = GPIO_PUE_Input_Disable;
  171. gpio_initstruct.GPIO_PDEN = GPIO_PDE_Input_Disable;
  172. gpio_initstruct.GPIO_DS = GPIO_DS_Output_Normal;
  173. if (mode == PIN_MODE_OUTPUT)
  174. {
  175. /* output setting */
  176. gpio_initstruct.GPIO_Direction = GPIO_Dir_Out;
  177. }
  178. else if (mode == PIN_MODE_INPUT)
  179. {
  180. /* input setting: not pull. */
  181. gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
  182. }
  183. else if (mode == PIN_MODE_INPUT_PULLUP)
  184. {
  185. /* input setting: pull up. */
  186. gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
  187. gpio_initstruct.GPIO_PUEN = GPIO_PUE_Input_Enable;
  188. }
  189. else if (mode == PIN_MODE_INPUT_PULLDOWN)
  190. {
  191. /* input setting: pull down. */
  192. gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
  193. gpio_initstruct.GPIO_PDEN = GPIO_PDE_Input_Enable;
  194. }
  195. else if (mode == PIN_MODE_OUTPUT_OD)
  196. {
  197. /* output setting: od. */
  198. gpio_initstruct.GPIO_Direction = GPIO_Dir_Out;
  199. gpio_initstruct.GPIO_OD = GPIO_ODE_Output_Enable;
  200. }
  201. GPIO_Init(index->gpio, index->pin, &gpio_initstruct);
  202. }
  203. rt_inline const struct irq_map *get_pin_irq_map(rt_uint16_t gpio_pin)
  204. {
  205. rt_int32_t mapindex = gpio_pin & 0x00FF;
  206. if (mapindex < 0 || mapindex >= 32)
  207. {
  208. return RT_NULL;
  209. }
  210. return &irq_map[mapindex % 8];
  211. };
  212. rt_err_t es8p_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
  213. rt_uint32_t mode, void (*hdr)(void *args), void *args)
  214. {
  215. const struct pin_index *index;
  216. rt_base_t level;
  217. rt_int32_t irqindex;
  218. index = get_pin(pin);
  219. if (index == RT_NULL)
  220. {
  221. return RT_ENOSYS;
  222. }
  223. irqindex = index->pin % 8;
  224. level = rt_hw_interrupt_disable();
  225. if (pin_irq_hdr_tab[irqindex].pin == pin &&
  226. pin_irq_hdr_tab[irqindex].hdr == hdr &&
  227. pin_irq_hdr_tab[irqindex].mode == mode &&
  228. pin_irq_hdr_tab[irqindex].args == args)
  229. {
  230. rt_hw_interrupt_enable(level);
  231. return RT_EOK;
  232. }
  233. if (pin_irq_hdr_tab[irqindex].pin != -1)
  234. {
  235. rt_hw_interrupt_enable(level);
  236. return RT_EBUSY;
  237. }
  238. pin_irq_hdr_tab[irqindex].pin = pin;
  239. pin_irq_hdr_tab[irqindex].hdr = hdr;
  240. pin_irq_hdr_tab[irqindex].mode = mode;
  241. pin_irq_hdr_tab[irqindex].args = args;
  242. rt_hw_interrupt_enable(level);
  243. return RT_EOK;
  244. }
  245. rt_err_t es8p_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
  246. {
  247. const struct pin_index *index;
  248. rt_base_t level;
  249. rt_int32_t irqindex = -1;
  250. index = get_pin(pin);
  251. if (index == RT_NULL)
  252. {
  253. return RT_ENOSYS;
  254. }
  255. irqindex = index->pin % 8;
  256. level = rt_hw_interrupt_disable();
  257. if (pin_irq_hdr_tab[irqindex].pin == -1)
  258. {
  259. rt_hw_interrupt_enable(level);
  260. return RT_EOK;
  261. }
  262. pin_irq_hdr_tab[irqindex].pin = -1;
  263. pin_irq_hdr_tab[irqindex].hdr = RT_NULL;
  264. pin_irq_hdr_tab[irqindex].mode = 0;
  265. pin_irq_hdr_tab[irqindex].args = RT_NULL;
  266. rt_hw_interrupt_enable(level);
  267. return RT_EOK;
  268. }
  269. rt_err_t es8p_pin_irq_enable(struct rt_device *device, rt_base_t pin,
  270. rt_uint32_t enabled)
  271. {
  272. const struct pin_index *index;
  273. const struct irq_map *irqmap;
  274. rt_base_t level;
  275. rt_int32_t irqindex = -1;
  276. /* Configure GPIO_InitStructure */
  277. GPIO_InitStruType gpio_initstruct;
  278. index = get_pin(pin);
  279. if (index == RT_NULL)
  280. {
  281. return RT_ENOSYS;
  282. }
  283. if (enabled == PIN_IRQ_ENABLE)
  284. {
  285. irqindex = pin % 8;
  286. level = rt_hw_interrupt_disable();
  287. if (pin_irq_hdr_tab[irqindex].pin == -1)
  288. {
  289. rt_hw_interrupt_enable(level);
  290. return RT_ENOSYS;
  291. }
  292. irqmap = &irq_map[irqindex];
  293. /* Configure GPIO_InitStructure */
  294. gpio_initstruct.GPIO_Signal = GPIO_Pin_Signal_Digital;
  295. gpio_initstruct.GPIO_Func = GPIO_Func_0;
  296. gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
  297. gpio_initstruct.GPIO_OD = GPIO_ODE_Output_Disable;
  298. gpio_initstruct.GPIO_DS = GPIO_DS_Output_Normal;
  299. switch (pin_irq_hdr_tab[irqindex].mode)
  300. {
  301. case PIN_IRQ_MODE_RISING:
  302. gpio_initstruct.GPIO_PUEN = GPIO_PUE_Input_Disable;
  303. gpio_initstruct.GPIO_PDEN = GPIO_PDE_Input_Enable;
  304. if (index->gpio == GPIOA)
  305. PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)(pin >> 3), PINT_Trig_Rise);
  306. else
  307. PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)((pin >> 3) + 4), PINT_Trig_Rise);
  308. break;
  309. case PIN_IRQ_MODE_FALLING:
  310. gpio_initstruct.GPIO_PUEN = GPIO_PUE_Input_Enable;
  311. gpio_initstruct.GPIO_PDEN = GPIO_PDE_Input_Disable;
  312. if (index->gpio == GPIOA)
  313. PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)(pin >> 3), PINT_Trig_Fall);
  314. else
  315. PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)((pin >> 3) + 4), PINT_Trig_Fall);
  316. break;
  317. case PIN_IRQ_MODE_RISING_FALLING:
  318. gpio_initstruct.GPIO_PUEN = GPIO_PUE_Input_Disable;
  319. gpio_initstruct.GPIO_PDEN = GPIO_PDE_Input_Disable;
  320. if (index->gpio == GPIOA)
  321. PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)(pin >> 3), PINT_Trig_Change);
  322. else
  323. PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)((pin >> 3) + 4), PINT_Trig_Change);
  324. break;
  325. default:
  326. break;
  327. }
  328. GPIO_Init(index->gpio, index->pin, &gpio_initstruct);
  329. NVIC_EnableIRQ(irqmap->irqno);
  330. rt_hw_interrupt_enable(level);
  331. }
  332. else if (enabled == PIN_IRQ_DISABLE)
  333. {
  334. irqmap = get_pin_irq_map(index->pin);
  335. if (irqmap == RT_NULL)
  336. {
  337. return RT_ENOSYS;
  338. }
  339. NVIC_DisableIRQ(irqmap->irqno);
  340. }
  341. else
  342. {
  343. return RT_ENOSYS;
  344. }
  345. return RT_EOK;
  346. }
  347. const static struct rt_pin_ops _es8p_pin_ops =
  348. {
  349. es8p_pin_mode,
  350. es8p_pin_write,
  351. es8p_pin_read,
  352. es8p_pin_attach_irq,
  353. es8p_pin_detach_irq,
  354. es8p_pin_irq_enable,
  355. };
  356. int rt_hw_pin_init(void)
  357. {
  358. int result;
  359. SCU_GPIOCLK_Enable();
  360. result = rt_device_pin_register("pin", &_es8p_pin_ops, RT_NULL);
  361. return result;
  362. }
  363. INIT_BOARD_EXPORT(rt_hw_pin_init);
  364. rt_inline void pin_irq_hdr(PINT_TYPE_IT GPIO_Pin)
  365. {
  366. uint16_t irqno;
  367. /* pin no. convert to dec no. */
  368. for (irqno = 0; irqno < 16; irqno++)
  369. {
  370. if ((0x01 << irqno) == GPIO_Pin)
  371. {
  372. break;
  373. }
  374. }
  375. if (pin_irq_hdr_tab[irqno].hdr)
  376. {
  377. pin_irq_hdr_tab[irqno].hdr(pin_irq_hdr_tab[irqno].args);
  378. }
  379. }
  380. rt_inline void GPIO_EXTI_Callback(PINT_TYPE_IT GPIO_Pin)
  381. {
  382. if (PINT_GetIFStatus(GPIO_Pin) != RESET)
  383. {
  384. PINT_ClearITPendingBit(GPIO_Pin);
  385. pin_irq_hdr(GPIO_Pin);
  386. }
  387. }
  388. void PINT0_IRQHandler(void)
  389. {
  390. rt_interrupt_enter();
  391. GPIO_EXTI_Callback(PINT_IT_PINT0);
  392. rt_interrupt_leave();
  393. }
  394. void PINT1_IRQHandler(void)
  395. {
  396. rt_interrupt_enter();
  397. GPIO_EXTI_Callback(PINT_IT_PINT1);
  398. rt_interrupt_leave();
  399. }
  400. void PINT2_IRQHandler(void)
  401. {
  402. rt_interrupt_enter();
  403. GPIO_EXTI_Callback(PINT_IT_PINT2);
  404. rt_interrupt_leave();
  405. }
  406. void PINT3_IRQHandler(void)
  407. {
  408. rt_interrupt_enter();
  409. GPIO_EXTI_Callback(PINT_IT_PINT3);
  410. rt_interrupt_leave();
  411. }
  412. void PINT4_IRQHandler(void)
  413. {
  414. rt_interrupt_enter();
  415. GPIO_EXTI_Callback(PINT_IT_PINT4);
  416. rt_interrupt_leave();
  417. }
  418. void PINT5_IRQHandler(void)
  419. {
  420. rt_interrupt_enter();
  421. GPIO_EXTI_Callback(PINT_IT_PINT5);
  422. rt_interrupt_leave();
  423. }
  424. void PINT6_IRQHandler(void)
  425. {
  426. rt_interrupt_enter();
  427. GPIO_EXTI_Callback(PINT_IT_PINT6);
  428. rt_interrupt_leave();
  429. }
  430. void PINT7_IRQHandler(void)
  431. {
  432. rt_interrupt_enter();
  433. GPIO_EXTI_Callback(PINT_IT_PINT7);
  434. rt_interrupt_leave();
  435. }
  436. #endif