entry.S 5.1 KB

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  1. // See LICENSE for license details
  2. #ifndef ENTRY_S
  3. #define ENTRY_S
  4. #include "riscv_encoding.h"
  5. #include "riscv_bits.h"
  6. #include "n22_eclic.h"
  7. #include "n22_tmr.h"
  8. ###############################################
  9. ###############################################
  10. # Disable Interrupt
  11. #
  12. .macro DISABLE_MIE
  13. csrc CSR_MSTATUS, MSTATUS_MIE
  14. .endm
  15. ###############################################
  16. ###############################################
  17. #Save caller registers
  18. .macro SAVE_CONTEXT
  19. STORE x1, 0*REGBYTES(sp)
  20. STORE x5, 1*REGBYTES(sp)
  21. STORE x6, 2*REGBYTES(sp)
  22. STORE x7, 3*REGBYTES(sp)
  23. STORE x10, 4*REGBYTES(sp)
  24. STORE x11, 5*REGBYTES(sp)
  25. STORE x12, 6*REGBYTES(sp)
  26. STORE x13, 7*REGBYTES(sp)
  27. STORE x14, 8*REGBYTES(sp)
  28. STORE x15, 9*REGBYTES(sp)
  29. STORE x16, 10*REGBYTES(sp)
  30. STORE x17, 11*REGBYTES(sp)
  31. STORE x28, 12*REGBYTES(sp)
  32. STORE x29, 13*REGBYTES(sp)
  33. STORE x30, 14*REGBYTES(sp)
  34. STORE x31, 15*REGBYTES(sp)
  35. .endm
  36. ###############################################
  37. ###############################################
  38. #restore caller registers
  39. .macro RESTORE_CONTEXT
  40. LOAD x1, 0*REGBYTES(sp)
  41. LOAD x5, 1*REGBYTES(sp)
  42. LOAD x6, 2*REGBYTES(sp)
  43. LOAD x7, 3*REGBYTES(sp)
  44. LOAD x10, 4*REGBYTES(sp)
  45. LOAD x11, 5*REGBYTES(sp)
  46. LOAD x12, 6*REGBYTES(sp)
  47. LOAD x13, 7*REGBYTES(sp)
  48. LOAD x14, 8*REGBYTES(sp)
  49. LOAD x15, 9*REGBYTES(sp)
  50. LOAD x16, 10*REGBYTES(sp)
  51. LOAD x17, 11*REGBYTES(sp)
  52. LOAD x28, 12*REGBYTES(sp)
  53. LOAD x29, 13*REGBYTES(sp)
  54. LOAD x30, 14*REGBYTES(sp)
  55. LOAD x31, 15*REGBYTES(sp)
  56. .endm
  57. ###############################################
  58. ###############################################
  59. #restore caller registers
  60. .macro RESTORE_CONTEXT_EXCPT_X5
  61. LOAD x1, 0*REGBYTES(sp)
  62. LOAD x6, 2*REGBYTES(sp)
  63. LOAD x7, 3*REGBYTES(sp)
  64. LOAD x10, 4*REGBYTES(sp)
  65. LOAD x11, 5*REGBYTES(sp)
  66. LOAD x12, 6*REGBYTES(sp)
  67. LOAD x13, 7*REGBYTES(sp)
  68. LOAD x14, 8*REGBYTES(sp)
  69. LOAD x15, 9*REGBYTES(sp)
  70. LOAD x16, 10*REGBYTES(sp)
  71. LOAD x17, 11*REGBYTES(sp)
  72. LOAD x28, 12*REGBYTES(sp)
  73. LOAD x29, 13*REGBYTES(sp)
  74. LOAD x30, 14*REGBYTES(sp)
  75. LOAD x31, 15*REGBYTES(sp)
  76. .endm
  77. ###############################################
  78. ###############################################
  79. #restore caller registers
  80. .macro RESTORE_CONTEXT_ONLY_X5
  81. LOAD x5, 1*REGBYTES(sp)
  82. .endm
  83. ###############################################
  84. ###############################################
  85. # Save the mepc and mstatus
  86. #
  87. .macro SAVE_MEPC_MSTATUS
  88. csrr x5, CSR_MEPC
  89. STORE x5, 16*REGBYTES(sp)
  90. csrr x5, CSR_MSTATUS
  91. STORE x5, 17*REGBYTES(sp)
  92. csrr x5, CSR_MXSTATUS
  93. STORE x5, 18*REGBYTES(sp)
  94. .endm
  95. ###############################################
  96. ###############################################
  97. # Restore the mepc and mstatus
  98. #
  99. .macro RESTORE_MEPC_MSTATUS
  100. LOAD x5, 16*REGBYTES(sp)
  101. csrw CSR_MEPC, x5
  102. LOAD x5, 17*REGBYTES(sp)
  103. csrw CSR_MSTATUS, x5
  104. LOAD x5, 18*REGBYTES(sp)
  105. csrw CSR_MXSTATUS, x5
  106. .endm
  107. ###############################################
  108. ###############################################
  109. // trap entry point
  110. //
  111. .section .text.entry
  112. .align 6 // In ECLIC mode, the trap entry must be 64bytes aligned
  113. .global trap_entry
  114. .weak trap_entry
  115. trap_entry:
  116. // Allocate the stack space
  117. addi sp, sp, -19*REGBYTES
  118. // Save the caller saving registers (context)
  119. SAVE_CONTEXT
  120. // Save the MEPC/MStatus reg
  121. SAVE_MEPC_MSTATUS
  122. // Set the function argument
  123. csrr a0, mcause
  124. mv a1, sp
  125. // Call the function
  126. call handle_trap
  127. // Restore the MEPC/MStatus reg
  128. RESTORE_MEPC_MSTATUS
  129. // Restore the caller saving registers (context)
  130. RESTORE_CONTEXT
  131. // De-allocate the stack space
  132. addi sp, sp, 19*REGBYTES
  133. // Return to regular code
  134. mret
  135. ###############################################
  136. ###############################################
  137. // IRQ entry point
  138. //
  139. .section .text.irq
  140. .align 2
  141. .global irq_entry
  142. .weak irq_entry
  143. irq_entry: // -------------> This label will be set to MTVT2 register
  144. // Allocate the stack space
  145. addi sp, sp, -19*REGBYTES
  146. SAVE_CONTEXT// Save 16 regs
  147. //------This special CSR read operation, which is actually use mcause as operand to directly store it to memory
  148. csrrwi x0, CSR_PUSHMCAUSE, 16
  149. //------This special CSR read operation, which is actually use mepc as operand to directly store it to memory
  150. csrrwi x0, CSR_PUSHMEPC, 17
  151. //------This special CSR read operation, which is actually use mxstatus as operand to directly store it to memory
  152. csrrwi x0, CSR_PUSHMXSTATUS, 18
  153. service_loop:
  154. //------This special CSR read/write operation, which is actually Claim the ECLIC to find its pending highest
  155. // ID, if the ID is not 0, then automatically enable the mstatus.MIE, and jump to its vector-entry-label, and
  156. // update the link register
  157. csrrw ra, CSR_MINTSEL_JAL, ra
  158. RESTORE_CONTEXT_EXCPT_X5
  159. #---- Critical section with interrupts disabled -----------------------
  160. DISABLE_MIE # Disable interrupts
  161. LOAD x5, 18*REGBYTES(sp)
  162. csrw CSR_MXSTATUS, x5
  163. LOAD x5, 17*REGBYTES(sp)
  164. csrw CSR_MEPC, x5
  165. LOAD x5, 16*REGBYTES(sp)
  166. csrw CSR_MCAUSE, x5
  167. RESTORE_CONTEXT_ONLY_X5
  168. // De-allocate the stack space
  169. addi sp, sp, 19*REGBYTES
  170. // Return to regular code
  171. mret
  172. #endif