drv_qspi.c 10 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-11-27 zylx first version
  9. */
  10. #include "board.h"
  11. #include "drv_qspi.h"
  12. #include "drv_config.h"
  13. #ifdef RT_USING_QSPI
  14. #define DRV_DEBUG
  15. #define LOG_TAG "drv.qspi"
  16. #include <drv_log.h>
  17. #if defined(BSP_USING_QSPI)
  18. struct stm32_hw_spi_cs
  19. {
  20. uint16_t Pin;
  21. };
  22. struct stm32_qspi_bus
  23. {
  24. QSPI_HandleTypeDef QSPI_Handler;
  25. char *bus_name;
  26. #ifdef BSP_QSPI_USING_DMA
  27. DMA_HandleTypeDef hdma_quadspi;
  28. #endif
  29. };
  30. struct rt_spi_bus _qspi_bus1;
  31. struct stm32_qspi_bus _stm32_qspi_bus;
  32. static int stm32_qspi_init(struct rt_qspi_device *device, struct rt_qspi_configuration *qspi_cfg)
  33. {
  34. int result = RT_EOK;
  35. unsigned int i = 1;
  36. RT_ASSERT(device != RT_NULL);
  37. RT_ASSERT(qspi_cfg != RT_NULL);
  38. struct rt_spi_configuration *cfg = &qspi_cfg->parent;
  39. struct stm32_qspi_bus *qspi_bus = device->parent.bus->parent.user_data;
  40. rt_memset(&qspi_bus->QSPI_Handler, 0, sizeof(qspi_bus->QSPI_Handler));
  41. QSPI_HandleTypeDef QSPI_Handler_config = QSPI_BUS_CONFIG;
  42. qspi_bus->QSPI_Handler = QSPI_Handler_config;
  43. while (cfg->max_hz < HAL_RCC_GetHCLKFreq() / (i + 1))
  44. {
  45. i++;
  46. if (i == 255)
  47. {
  48. LOG_E("QSPI init failed, QSPI frequency(%d) is too low.", cfg->max_hz);
  49. return -RT_ERROR;
  50. }
  51. }
  52. /* 80/(1+i) */
  53. qspi_bus->QSPI_Handler.Init.ClockPrescaler = i;
  54. if (!(cfg->mode & RT_SPI_CPOL))
  55. {
  56. /* QSPI MODE0 */
  57. qspi_bus->QSPI_Handler.Init.ClockMode = QSPI_CLOCK_MODE_0;
  58. }
  59. else
  60. {
  61. /* QSPI MODE3 */
  62. qspi_bus->QSPI_Handler.Init.ClockMode = QSPI_CLOCK_MODE_3;
  63. }
  64. /* flash size */
  65. qspi_bus->QSPI_Handler.Init.FlashSize = POSITION_VAL(qspi_cfg->medium_size) - 1;
  66. result = HAL_QSPI_Init(&qspi_bus->QSPI_Handler);
  67. if (result == HAL_OK)
  68. {
  69. LOG_D("qspi init succsee!");
  70. }
  71. else
  72. {
  73. LOG_E("qspi init failed (%d)!", result);
  74. }
  75. #ifdef BSP_QSPI_USING_DMA
  76. /* QSPI interrupts must be enabled when using the HAL_QSPI_Receive_DMA */
  77. HAL_NVIC_SetPriority(QSPI_IRQn, 0, 0);
  78. HAL_NVIC_EnableIRQ(QSPI_IRQn);
  79. HAL_NVIC_SetPriority(QSPI_DMA_IRQn, 0, 0);
  80. HAL_NVIC_EnableIRQ(QSPI_DMA_IRQn);
  81. /* init QSPI DMA */
  82. QSPI_DMA_CLK_ENABLE;
  83. HAL_DMA_DeInit(qspi_bus->QSPI_Handler.hdma);
  84. DMA_HandleTypeDef hdma_quadspi_config = QSPI_DMA_CONFIG;
  85. qspi_bus->hdma_quadspi = hdma_quadspi_config;
  86. if (HAL_DMA_Init(&qspi_bus->hdma_quadspi) != HAL_OK)
  87. {
  88. LOG_E("qspi dma init failed (%d)!", result);
  89. }
  90. __HAL_LINKDMA(&qspi_bus->QSPI_Handler, hdma, qspi_bus->hdma_quadspi);
  91. #endif /* BSP_QSPI_USING_DMA */
  92. return result;
  93. }
  94. static void qspi_send_cmd(struct stm32_qspi_bus *qspi_bus, struct rt_qspi_message *message)
  95. {
  96. RT_ASSERT(qspi_bus != RT_NULL);
  97. RT_ASSERT(message != RT_NULL);
  98. QSPI_CommandTypeDef Cmdhandler;
  99. /* set QSPI cmd struct */
  100. Cmdhandler.Instruction = message->instruction.content;
  101. Cmdhandler.Address = message->address.content;
  102. Cmdhandler.DummyCycles = message->dummy_cycles;
  103. if (message->instruction.qspi_lines == 0)
  104. {
  105. Cmdhandler.InstructionMode = QSPI_INSTRUCTION_NONE;
  106. }
  107. else if (message->instruction.qspi_lines == 1)
  108. {
  109. Cmdhandler.InstructionMode = QSPI_INSTRUCTION_1_LINE;
  110. }
  111. else if (message->instruction.qspi_lines == 2)
  112. {
  113. Cmdhandler.InstructionMode = QSPI_INSTRUCTION_2_LINES;
  114. }
  115. else if (message->instruction.qspi_lines == 4)
  116. {
  117. Cmdhandler.InstructionMode = QSPI_INSTRUCTION_4_LINES;
  118. }
  119. if (message->address.qspi_lines == 0)
  120. {
  121. Cmdhandler.AddressMode = QSPI_ADDRESS_NONE;
  122. }
  123. else if (message->address.qspi_lines == 1)
  124. {
  125. Cmdhandler.AddressMode = QSPI_ADDRESS_1_LINE;
  126. }
  127. else if (message->address.qspi_lines == 2)
  128. {
  129. Cmdhandler.AddressMode = QSPI_ADDRESS_2_LINES;
  130. }
  131. else if (message->address.qspi_lines == 4)
  132. {
  133. Cmdhandler.AddressMode = QSPI_ADDRESS_4_LINES;
  134. }
  135. if (message->address.size == 24)
  136. {
  137. Cmdhandler.AddressSize = QSPI_ADDRESS_24_BITS;
  138. }
  139. else
  140. {
  141. Cmdhandler.AddressSize = QSPI_ADDRESS_32_BITS;
  142. }
  143. if (message->qspi_data_lines == 0)
  144. {
  145. Cmdhandler.DataMode = QSPI_DATA_NONE;
  146. }
  147. else if (message->qspi_data_lines == 1)
  148. {
  149. Cmdhandler.DataMode = QSPI_DATA_1_LINE;
  150. }
  151. else if (message->qspi_data_lines == 2)
  152. {
  153. Cmdhandler.DataMode = QSPI_DATA_2_LINES;
  154. }
  155. else if (message->qspi_data_lines == 4)
  156. {
  157. Cmdhandler.DataMode = QSPI_DATA_4_LINES;
  158. }
  159. Cmdhandler.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
  160. Cmdhandler.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
  161. Cmdhandler.DdrMode = QSPI_DDR_MODE_DISABLE;
  162. Cmdhandler.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
  163. Cmdhandler.NbData = message->parent.length;
  164. HAL_QSPI_Command(&qspi_bus->QSPI_Handler, &Cmdhandler, 5000);
  165. }
  166. static rt_uint32_t qspixfer(struct rt_spi_device *device, struct rt_spi_message *message)
  167. {
  168. rt_size_t len = 0;
  169. RT_ASSERT(device != RT_NULL);
  170. RT_ASSERT(device->bus != RT_NULL);
  171. struct rt_qspi_message *qspi_message = (struct rt_qspi_message *)message;
  172. struct stm32_qspi_bus *qspi_bus = device->bus->parent.user_data;
  173. #ifdef BSP_QSPI_USING_SOFTCS
  174. struct stm32_hw_spi_cs *cs = device->parent.user_data;
  175. #endif
  176. const rt_uint8_t *sndb = message->send_buf;
  177. rt_uint8_t *rcvb = message->recv_buf;
  178. rt_int32_t length = message->length;
  179. #ifdef BSP_QSPI_USING_SOFTCS
  180. if (message->cs_take)
  181. {
  182. rt_pin_write(cs->pin, 0);
  183. }
  184. #endif
  185. /* send data */
  186. if (sndb)
  187. {
  188. qspi_send_cmd(qspi_bus, qspi_message);
  189. if (qspi_message->parent.length != 0)
  190. {
  191. if (HAL_QSPI_Transmit(&qspi_bus->QSPI_Handler, (rt_uint8_t *)sndb, 5000) == HAL_OK)
  192. {
  193. len = length;
  194. }
  195. else
  196. {
  197. LOG_E("QSPI send data failed(%d)!", qspi_bus->QSPI_Handler.ErrorCode);
  198. qspi_bus->QSPI_Handler.State = HAL_QSPI_STATE_READY;
  199. goto __exit;
  200. }
  201. }
  202. else
  203. {
  204. len = 1;
  205. }
  206. }
  207. else if (rcvb)/* recv data */
  208. {
  209. qspi_send_cmd(qspi_bus, qspi_message);
  210. #ifdef BSP_QSPI_USING_DMA
  211. if (HAL_QSPI_Receive_DMA(&qspi_bus->QSPI_Handler, rcvb) == HAL_OK)
  212. #else
  213. if (HAL_QSPI_Receive(&qspi_bus->QSPI_Handler, rcvb, 5000) == HAL_OK)
  214. #endif
  215. {
  216. len = length;
  217. #ifdef BSP_QSPI_USING_DMA
  218. while (qspi_bus->QSPI_Handler.RxXferCount != 0);
  219. #endif
  220. }
  221. else
  222. {
  223. LOG_E("QSPI recv data failed(%d)!", qspi_bus->QSPI_Handler.ErrorCode);
  224. qspi_bus->QSPI_Handler.State = HAL_QSPI_STATE_READY;
  225. goto __exit;
  226. }
  227. }
  228. __exit:
  229. #ifdef BSP_QSPI_USING_SOFTCS
  230. if (message->cs_release)
  231. {
  232. rt_pin_write(cs->pin, 1);
  233. }
  234. #endif
  235. return len;
  236. }
  237. static rt_err_t qspi_configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration)
  238. {
  239. RT_ASSERT(device != RT_NULL);
  240. RT_ASSERT(configuration != RT_NULL);
  241. struct rt_qspi_device *qspi_device = (struct rt_qspi_device *)device;
  242. return stm32_qspi_init(qspi_device, &qspi_device->config);
  243. }
  244. static const struct rt_spi_ops stm32_qspi_ops =
  245. {
  246. .configure = qspi_configure,
  247. .xfer = qspixfer,
  248. };
  249. static int stm32_qspi_register_bus(struct stm32_qspi_bus *qspi_bus, const char *name)
  250. {
  251. RT_ASSERT(qspi_bus != RT_NULL);
  252. RT_ASSERT(name != RT_NULL);
  253. _qspi_bus1.parent.user_data = qspi_bus;
  254. return rt_qspi_bus_register(&_qspi_bus1, name, &stm32_qspi_ops);
  255. }
  256. /**
  257. * @brief This function attach device to QSPI bus.
  258. * @param device_name QSPI device name
  259. * @param pin QSPI cs pin number
  260. * @param data_line_width QSPI data lines width, such as 1, 2, 4
  261. * @param enter_qspi_mode Callback function that lets FLASH enter QSPI mode
  262. * @param exit_qspi_mode Callback function that lets FLASH exit QSPI mode
  263. * @retval 0 : success
  264. * -1 : failed
  265. */
  266. rt_err_t stm32_qspi_bus_attach_device(const char *bus_name, const char *device_name, rt_uint32_t pin, rt_uint8_t data_line_width, void (*enter_qspi_mode)(), void (*exit_qspi_mode)())
  267. {
  268. struct rt_qspi_device *qspi_device = RT_NULL;
  269. struct stm32_hw_spi_cs *cs_pin = RT_NULL;
  270. rt_err_t result = RT_EOK;
  271. RT_ASSERT(bus_name != RT_NULL);
  272. RT_ASSERT(device_name != RT_NULL);
  273. RT_ASSERT(data_line_width == 1 || data_line_width == 2 || data_line_width == 4);
  274. qspi_device = (struct rt_qspi_device *)rt_malloc(sizeof(struct rt_qspi_device));
  275. if (qspi_device == RT_NULL)
  276. {
  277. LOG_E("no memory, qspi bus attach device failed!");
  278. result = RT_ENOMEM;
  279. goto __exit;
  280. }
  281. cs_pin = (struct stm32_hw_spi_cs *)rt_malloc(sizeof(struct stm32_hw_spi_cs));
  282. if (qspi_device == RT_NULL)
  283. {
  284. LOG_E("no memory, qspi bus attach device failed!");
  285. result = RT_ENOMEM;
  286. goto __exit;
  287. }
  288. qspi_device->enter_qspi_mode = enter_qspi_mode;
  289. qspi_device->exit_qspi_mode = exit_qspi_mode;
  290. qspi_device->config.qspi_dl_width = data_line_width;
  291. cs_pin->Pin = pin;
  292. #ifdef BSP_QSPI_USING_SOFTCS
  293. rt_pin_mode(pin, PIN_MODE_OUTPUT);
  294. rt_pin_write(pin, 1);
  295. #endif
  296. result = rt_spi_bus_attach_device(&qspi_device->parent, device_name, bus_name, (void *)cs_pin);
  297. __exit:
  298. if (result != RT_EOK)
  299. {
  300. if (qspi_device)
  301. {
  302. rt_free(qspi_device);
  303. }
  304. if (cs_pin)
  305. {
  306. rt_free(cs_pin);
  307. }
  308. }
  309. return result;
  310. }
  311. #ifdef BSP_QSPI_USING_DMA
  312. void QSPI_IRQHandler(void)
  313. {
  314. /* enter interrupt */
  315. rt_interrupt_enter();
  316. HAL_QSPI_IRQHandler(&_stm32_qspi_bus.QSPI_Handler);
  317. /* leave interrupt */
  318. rt_interrupt_leave();
  319. }
  320. void QSPI_DMA_IRQHandler(void)
  321. {
  322. /* enter interrupt */
  323. rt_interrupt_enter();
  324. HAL_DMA_IRQHandler(&_stm32_qspi_bus.hdma_quadspi);
  325. /* leave interrupt */
  326. rt_interrupt_leave();
  327. }
  328. #endif /* BSP_QSPI_USING_DMA */
  329. static int rt_hw_qspi_bus_init(void)
  330. {
  331. return stm32_qspi_register_bus(&_stm32_qspi_bus, "qspi1");
  332. }
  333. INIT_BOARD_EXPORT(rt_hw_qspi_bus_init);
  334. #endif /* BSP_USING_QSPI */
  335. #endif /* RT_USING_QSPI */