usart.c 11 KB

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  1. /*
  2. * File : usart.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006-2013, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2009-01-05 Bernard the first version
  13. * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
  14. * 2013-05-13 aozima update for kehong-lingtai.
  15. * 2015-01-31 armink make sure the serial transmit complete in putc()
  16. * 2018-08-17 whj add to usart3
  17. */
  18. #include "stm32f10x.h"
  19. #include "usart.h"
  20. #include "board.h"
  21. #include <rtdevice.h>
  22. /* USART1 */
  23. #define UART1_GPIO_TX GPIO_Pin_9
  24. #define UART1_GPIO_RX GPIO_Pin_10
  25. #define UART1_GPIO GPIOA
  26. /* USART2 */
  27. #if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL)
  28. #define UART2_GPIO_TX GPIO_Pin_5
  29. #define UART2_GPIO_RX GPIO_Pin_6
  30. #define UART2_GPIO GPIOD
  31. #else /* for STM32F10X_HD */
  32. /* USART2_REMAP = 0 */
  33. #define UART2_GPIO_TX GPIO_Pin_2
  34. #define UART2_GPIO_RX GPIO_Pin_3
  35. #define UART2_GPIO GPIOA
  36. #endif
  37. /* USART3_REMAP = 1 */
  38. #define UART3_GPIO_TX GPIO_Pin_10
  39. #define UART3_GPIO_RX GPIO_Pin_11
  40. #define UART3_GPIO GPIOC
  41. /* STM32 uart driver */
  42. struct stm32_uart
  43. {
  44. USART_TypeDef* uart_device;
  45. IRQn_Type irq;
  46. };
  47. static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  48. {
  49. struct stm32_uart* uart;
  50. USART_InitTypeDef USART_InitStructure;
  51. RT_ASSERT(serial != RT_NULL);
  52. RT_ASSERT(cfg != RT_NULL);
  53. uart = (struct stm32_uart *)serial->parent.user_data;
  54. USART_InitStructure.USART_BaudRate = cfg->baud_rate;
  55. if (cfg->data_bits == DATA_BITS_8){
  56. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  57. } else if (cfg->data_bits == DATA_BITS_9) {
  58. USART_InitStructure.USART_WordLength = USART_WordLength_9b;
  59. }
  60. if (cfg->stop_bits == STOP_BITS_1){
  61. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  62. } else if (cfg->stop_bits == STOP_BITS_2){
  63. USART_InitStructure.USART_StopBits = USART_StopBits_2;
  64. }
  65. if (cfg->parity == PARITY_NONE){
  66. USART_InitStructure.USART_Parity = USART_Parity_No;
  67. } else if (cfg->parity == PARITY_ODD) {
  68. USART_InitStructure.USART_Parity = USART_Parity_Odd;
  69. } else if (cfg->parity == PARITY_EVEN) {
  70. USART_InitStructure.USART_Parity = USART_Parity_Even;
  71. }
  72. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  73. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  74. USART_Init(uart->uart_device, &USART_InitStructure);
  75. /* Enable USART */
  76. USART_Cmd(uart->uart_device, ENABLE);
  77. return RT_EOK;
  78. }
  79. static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
  80. {
  81. struct stm32_uart* uart;
  82. RT_ASSERT(serial != RT_NULL);
  83. uart = (struct stm32_uart *)serial->parent.user_data;
  84. switch (cmd)
  85. {
  86. /* disable interrupt */
  87. case RT_DEVICE_CTRL_CLR_INT:
  88. /* disable rx irq */
  89. UART_DISABLE_IRQ(uart->irq);
  90. /* disable interrupt */
  91. USART_ITConfig(uart->uart_device, USART_IT_RXNE, DISABLE);
  92. break;
  93. /* enable interrupt */
  94. case RT_DEVICE_CTRL_SET_INT:
  95. /* enable rx irq */
  96. UART_ENABLE_IRQ(uart->irq);
  97. /* enable interrupt */
  98. USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE);
  99. break;
  100. }
  101. return RT_EOK;
  102. }
  103. static int stm32_putc(struct rt_serial_device *serial, char c)
  104. {
  105. struct stm32_uart* uart;
  106. RT_ASSERT(serial != RT_NULL);
  107. uart = (struct stm32_uart *)serial->parent.user_data;
  108. uart->uart_device->DR = c;
  109. while (!(uart->uart_device->SR & USART_FLAG_TC));
  110. return 1;
  111. }
  112. static int stm32_getc(struct rt_serial_device *serial)
  113. {
  114. int ch;
  115. struct stm32_uart* uart;
  116. RT_ASSERT(serial != RT_NULL);
  117. uart = (struct stm32_uart *)serial->parent.user_data;
  118. ch = -1;
  119. if (uart->uart_device->SR & USART_FLAG_RXNE)
  120. {
  121. ch = uart->uart_device->DR & 0xff;
  122. }
  123. return ch;
  124. }
  125. static const struct rt_uart_ops stm32_uart_ops =
  126. {
  127. stm32_configure,
  128. stm32_control,
  129. stm32_putc,
  130. stm32_getc,
  131. };
  132. #if defined(RT_USING_UART1)
  133. /* UART1 device driver structure */
  134. struct stm32_uart uart1 =
  135. {
  136. USART1,
  137. USART1_IRQn,
  138. };
  139. struct rt_serial_device serial1;
  140. void USART1_IRQHandler(void)
  141. {
  142. struct stm32_uart* uart;
  143. uart = &uart1;
  144. /* enter interrupt */
  145. rt_interrupt_enter();
  146. if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
  147. {
  148. rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND);
  149. /* clear interrupt */
  150. USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
  151. }
  152. if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
  153. {
  154. /* clear interrupt */
  155. USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
  156. }
  157. if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
  158. {
  159. stm32_getc(&serial1);
  160. }
  161. /* leave interrupt */
  162. rt_interrupt_leave();
  163. }
  164. #endif /* RT_USING_UART1 */
  165. #if defined(RT_USING_UART2)
  166. /* UART1 device driver structure */
  167. struct stm32_uart uart2 =
  168. {
  169. USART2,
  170. USART2_IRQn,
  171. };
  172. struct rt_serial_device serial2;
  173. void USART2_IRQHandler(void)
  174. {
  175. struct stm32_uart* uart;
  176. uart = &uart2;
  177. /* enter interrupt */
  178. rt_interrupt_enter();
  179. if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
  180. {
  181. rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND);
  182. /* clear interrupt */
  183. USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
  184. }
  185. if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
  186. {
  187. /* clear interrupt */
  188. USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
  189. }
  190. if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
  191. {
  192. stm32_getc(&serial2);
  193. }
  194. /* leave interrupt */
  195. rt_interrupt_leave();
  196. }
  197. #endif /* RT_USING_UART2 */
  198. #if defined(RT_USING_UART3)
  199. /* UART1 device driver structure */
  200. struct stm32_uart uart3 =
  201. {
  202. USART3,
  203. USART3_IRQn,
  204. };
  205. struct rt_serial_device serial3;
  206. void USART3_IRQHandler(void)
  207. {
  208. struct stm32_uart* uart;
  209. uart = &uart3;
  210. /* enter interrupt */
  211. rt_interrupt_enter();
  212. if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
  213. {
  214. rt_hw_serial_isr(&serial3, RT_SERIAL_EVENT_RX_IND);
  215. /* clear interrupt */
  216. USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
  217. }
  218. if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
  219. {
  220. /* clear interrupt */
  221. USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
  222. }
  223. if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
  224. {
  225. stm32_getc(&serial3);
  226. }
  227. /* leave interrupt */
  228. rt_interrupt_leave();
  229. }
  230. #endif /* RT_USING_UART3 */
  231. static void RCC_Configuration(void)
  232. {
  233. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
  234. #if defined(RT_USING_UART1)
  235. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
  236. RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
  237. #endif /* RT_USING_UART1 */
  238. #if defined(RT_USING_UART2)
  239. #if (defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL))
  240. /* Enable AFIO and GPIOD clock */
  241. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOD, ENABLE);
  242. /* Enable the USART2 Pins Software Remapping */
  243. GPIO_PinRemapConfig(GPIO_Remap_USART2, ENABLE);
  244. #else
  245. /* Enable AFIO and GPIOA clock */
  246. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOA, ENABLE);
  247. #endif
  248. RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
  249. #endif /* RT_USING_UART2 */
  250. #if defined(RT_USING_UART3)
  251. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOC, ENABLE);
  252. GPIO_PinRemapConfig(GPIO_PartialRemap_USART3, ENABLE);
  253. #endif /* RT_USING_UART3 */
  254. }
  255. static void GPIO_Configuration(void)
  256. {
  257. GPIO_InitTypeDef GPIO_InitStructure;
  258. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  259. #if defined(RT_USING_UART1)
  260. /* Configure USART1 Rx (PA.10) as input floating */
  261. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  262. GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
  263. GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
  264. /* Configure USART1 Tx (PA.09) as alternate function push-pull */
  265. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  266. GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX;
  267. GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
  268. #endif /* RT_USING_UART1 */
  269. #if defined(RT_USING_UART2)
  270. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  271. GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX;
  272. GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
  273. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  274. GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX;
  275. GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
  276. #endif /* RT_USING_UART2 */
  277. #if defined(RT_USING_UART3)
  278. /* Configure USART3 Rx (PC.11) as input floating */
  279. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  280. GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX;
  281. GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
  282. /* Configure USART3 Tx (PC.10) as alternate function push-pull */
  283. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  284. GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX;
  285. GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
  286. #endif /* RT_USING_UART3 */
  287. }
  288. static void NVIC_Configuration(struct stm32_uart* uart)
  289. {
  290. NVIC_InitTypeDef NVIC_InitStructure;
  291. /* Enable the USART1 Interrupt */
  292. NVIC_InitStructure.NVIC_IRQChannel = uart->irq;
  293. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
  294. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
  295. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  296. NVIC_Init(&NVIC_InitStructure);
  297. }
  298. void rt_hw_usart_init(void)
  299. {
  300. struct stm32_uart* uart;
  301. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  302. RCC_Configuration();
  303. GPIO_Configuration();
  304. #if defined(RT_USING_UART1)
  305. uart = &uart1;
  306. config.baud_rate = BAUD_RATE_115200;
  307. serial1.ops = &stm32_uart_ops;
  308. serial1.config = config;
  309. NVIC_Configuration(&uart1);
  310. /* register UART1 device */
  311. rt_hw_serial_register(&serial1, "uart1",
  312. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX ,
  313. uart);
  314. #endif /* RT_USING_UART1 */
  315. #if defined(RT_USING_UART2)
  316. uart = &uart2;
  317. config.baud_rate = BAUD_RATE_115200;
  318. serial2.ops = &stm32_uart_ops;
  319. serial2.config = config;
  320. NVIC_Configuration(&uart2);
  321. /* register UART2 device */
  322. rt_hw_serial_register(&serial2, "uart2",
  323. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  324. uart);
  325. #endif /* RT_USING_UART2 */
  326. #if defined(RT_USING_UART3)
  327. uart = &uart3;
  328. config.baud_rate = BAUD_RATE_115200;
  329. serial2.ops = &stm32_uart_ops;
  330. serial2.config = config;
  331. NVIC_Configuration(&uart3);
  332. /* register UART3 device */
  333. rt_hw_serial_register(&serial3, "uart3",
  334. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  335. uart);
  336. #endif /* RT_USING_UART3 */
  337. }