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dma_config.h

dma_config.h 3.3 KB
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  1. /*
    2. 

  2.  * Copyright (c) 2006-2018, RT-Thread Development Team
    3. 

  3.  *
    4. 

  4.  * SPDX-License-Identifier: Apache-2.0
    5. 

  5.  *
    6. 

  6.  * Change Logs:
    7. 

  7.  * Date           Author       Notes
    8. 

  8.  * 2018-01-02     SummerGift   first version
    9. 

  9.  */
    10. 

  10. 

  11. #ifndef __DMA_CONFIG_H__
    12. 

  12. #define __DMA_CONFIG_H__
    13. 

  13. 

  14. #include <rtthread.h>
    15. 

  15. 

  16. /* DMA1 channel1 */
    17. 

  17. /* DMA1 channel2 */
    18. 

  18. #if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_CHANNEL)
    19. 

  19. #define SPI1_DMA_RX_IRQHandler          DMA1_Channel2_IRQHandler
    20. 

  20. #define SPI1_RX_DMA_RCC                 RCC_AHBENR_DMA1EN
    21. 

  21. #define SPI1_RX_DMA_INSTANCE            DMA1_Channel2
    22. 

  22. #define SPI1_RX_DMA_IRQ                 DMA1_Channel2_IRQn
    23. 

  23. #endif
    24. 

  24. 

  25. /* DMA1 channel3 */
    26. 

  26. #if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_CHANNEL)
    27. 

  27. #define SPI1_DMA_TX_IRQHandler          DMA1_Channel3_IRQHandler
    28. 

  28. #define SPI1_TX_DMA_RCC                 RCC_AHBENR_DMA1EN
    29. 

  29. #define SPI1_TX_DMA_INSTANCE            DMA1_Channel3
    30. 

  30. #define SPI1_TX_DMA_IRQ                 DMA1_Channel3_IRQn
    31. 

  31. 

  32. #elif defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_CHANNEL)
    33. 

  33. #define USART3_DMA_RX_IRQHandler          DMA1_Channel3_IRQHandler
    34. 

  34. #define USART3_RX_DMA_RCC                 RCC_AHBENR_DMA1EN
    35. 

  35. #define USART3_RX_DMA_INSTANCE            DMA1_Channel3
    36. 

  36. #define USART3_RX_DMA_IRQ                 DMA1_Channel3_IRQn
    37. 

  37. #endif
    38. 

  38. 

  39. /* DMA1 channel4 */
    40. 

  40. #if defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_CHANNEL)
    41. 

  41. #define SPI2_DMA_RX_IRQHandler          DMA1_Channel4_IRQHandler
    42. 

  42. #define SPI2_RX_DMA_RCC                 RCC_AHBENR_DMA1EN
    43. 

  43. #define SPI2_RX_DMA_INSTANCE            DMA1_Channel4
    44. 

  44. #define SPI2_RX_DMA_IRQ                 DMA1_Channel4_IRQn
    45. 

  45. #endif
    46. 

  46. 

  47. /* DMA1 channel5 */
    48. 

  48. #if defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_CHANNEL)
    49. 

  49. #define SPI2_DMA_TX_IRQHandler          DMA1_Channel5_IRQHandler
    50. 

  50. #define SPI2_TX_DMA_RCC                 RCC_AHBENR_DMA1EN
    51. 

  51. #define SPI2_TX_DMA_INSTANCE            DMA1_Channel5
    52. 

  52. #define SPI2_TX_DMA_IRQ                 DMA1_Channel5_IRQn
    53. 

  53. 

  54. #elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_CHANNEL)
    55. 

  55. #define USART1_DMA_RX_IRQHandler          DMA1_Channel5_IRQHandler
    56. 

  56. #define USART1_RX_DMA_RCC                RCC_AHBENR_DMA1EN
    57. 

  57. #define USART1_RX_DMA_INSTANCE           DMA1_Channel5
    58. 

  58. #define USART1_RX_DMA_IRQ                DMA1_Channel5_IRQn
    59. 

  59. #endif
    60. 

  60. 

  61. /* DMA1 channel6 */
    62. 

  62. #if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_CHANNEL)
    63. 

  63. #define USART2_DMA_RX_IRQHandler          DMA1_Channel6_IRQHandler
    64. 

  64. #define USART2_RX_DMA_RCC                 RCC_AHBENR_DMA1EN
    65. 

  65. #define USART2_RX_DMA_INSTANCE            DMA1_Channel6
    66. 

  66. #define USART2_RX_DMA_IRQ                 DMA1_Channel6_IRQn
    67. 

  67. #endif
    68. 

  68. 

  69. 

  70. /* DMA1 channel7 */
    71. 

  71. 

  72. /* DMA2 channel1 */
    73. 

  73. #if defined(BSP_SPI3_RX_USING_DMA) && !defined(SPI3_RX_DMA_CHANNEL)
    74. 

  74. #define SPI3_DMA_RX_IRQHandler          DMA2_Channel1_IRQHandler
    75. 

  75. #define SPI3_RX_DMA_RCC                 RCC_AHBENR_DMA2EN
    76. 

  76. #define SPI3_RX_DMA_INSTANCE            DMA2_Channel1
    77. 

  77. #define SPI3_RX_DMA_IRQ                 DMA2_Channel1_IRQn
    78. 

  78. #endif
    79. 

  79. 

  80. /* DMA2 channel2 */
    81. 

  81. #if defined(BSP_SPI3_TX_USING_DMA) && !defined(SPI3_TX_DMA_CHANNEL)
    82. 

  82. #define SPI3_DMA_TX_IRQHandler          DMA2_Channel2_IRQHandler
    83. 

  83. #define SPI3_TX_DMA_RCC                 RCC_AHBENR_DMA2EN
    84. 

  84. #define SPI3_TX_DMA_INSTANCE            DMA2_Channel2
    85. 

  85. #define SPI3_TX_DMA_IRQ                 DMA2_Channel2_IRQn
    86. 

  86. /* DMA1 channel4 */
    87. 

  87. #endif
    88. 

  88. 

  89. /* DMA2 channel3 */
    90. 

  90. /* DMA2 channel4 */
    91. 

  91. /* DMA2 channel5 */
    92. 

  92. 

  93. 

  94. #endif /* __DMA_CONFIG_H__ */
    95.