drv_gpio.c 4.1 KB

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  1. /*
  2. * Copyright (c) 2006-2020, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2020-11-19 greedyhao first version
  9. */
  10. #include "drv_gpio.h"
  11. #ifdef RT_USING_PIN
  12. // #define DRV_DEBUG
  13. #define LOG_TAG "drv.gpio"
  14. #include <drv_log.h>
  15. struct port_info
  16. {
  17. uint8_t start_pin;
  18. uint8_t delta_pin;
  19. uint8_t total_pin;
  20. };
  21. /* It needs to be adjusted to the hardware. */
  22. static const struct port_info port_table[] =
  23. {
  24. {0, 8, 0}, /* PA0-PA7 */
  25. {0, 5, 8}, /* PB0-PB5 */
  26. {0, 8, 13}, /* PE0-PE7 */
  27. {0, 6, 21}, /* PF0-PF6 */
  28. };
  29. static const hal_sfr_t port_sfr[] =
  30. {
  31. GPIOA_BASE,
  32. GPIOB_BASE,
  33. GPIOE_BASE,
  34. GPIOF_BASE,
  35. };
  36. #define PIN_NUM(port, no) ((uint8_t)(port_table[port].total_pin + no - port_table[port].start_pin))
  37. #define _PIN_PORT(pin) (uint8_t)(((pin) >> 3) & 0xFu)
  38. #define PIN_PORT(pin) ((port_table[_PIN_PORT(pin)].delta_pin == 8) ? _PIN_PORT(pin) : _PIN_PORT(pin) + 1)
  39. #define PORT_SFR(port) (port_sfr[(port)])
  40. #define PIN_NO(pin) (uint8_t)((pin) & 0xFu)
  41. // #define PIN_ABPIN(pin) (uint8_t)(port_table[PIN_PORT(pin)].total_pin + PIN_NO(pin))
  42. static rt_base_t ab32_pin_get(const char *name)
  43. {
  44. rt_base_t pin = 0;
  45. int hw_port_num, hw_pin_num = 0;
  46. int i, name_len;
  47. name_len = rt_strlen(name);
  48. if ((name_len < 4) || (name_len >= 6))
  49. {
  50. return -RT_EINVAL;
  51. }
  52. if ((name[0] != 'P') || (name[2] != '.'))
  53. {
  54. return -RT_EINVAL;
  55. }
  56. if ((name[1] >= 'A') && (name[1] <= 'B'))
  57. {
  58. hw_port_num = (int)(name[1] - 'A');
  59. }
  60. else if ((name[1] >= 'E') && (name[1] <= 'G'))
  61. {
  62. hw_port_num = (int)(name[1] - 'A') - 2; /* Without 'C' and 'D'. */
  63. }
  64. else
  65. {
  66. return -RT_EINVAL;
  67. }
  68. for (i = 3; i < name_len; i++)
  69. {
  70. hw_pin_num *= 10;
  71. hw_pin_num += name[i] - '0';
  72. }
  73. pin = PIN_NUM(hw_port_num, hw_pin_num);
  74. LOG_D("name=%s", name);
  75. LOG_D("hw_port_num=%d hw_pin_num=%d pin=%d", hw_port_num, hw_pin_num, pin);
  76. return pin;
  77. }
  78. static void ab32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
  79. {
  80. uint8_t port = PIN_PORT(pin);
  81. uint8_t gpio_pin = pin - port_table[port].total_pin;
  82. hal_gpio_write(PORT_SFR(port), gpio_pin, value);
  83. }
  84. static int ab32_pin_read(rt_device_t dev, rt_base_t pin)
  85. {
  86. uint8_t port = PIN_PORT(pin);
  87. uint8_t gpio_pin = pin - port_table[port].total_pin;
  88. return hal_gpio_read(PORT_SFR(port), gpio_pin);
  89. }
  90. static void ab32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
  91. {
  92. struct gpio_init gpio_init;
  93. uint8_t port = PIN_PORT(pin);
  94. gpio_init.pin = BIT(pin - port_table[port].total_pin);
  95. gpio_init.de = GPIO_DIGITAL;
  96. gpio_init.af_con = GPIO_AFDIS;
  97. LOG_D("port=%d pin=%d", port, gpio_init.pin);
  98. switch (mode)
  99. {
  100. case PIN_MODE_INPUT:
  101. case PIN_MODE_INPUT_PULLUP:
  102. gpio_init.pull = GPIO_PULLUP;
  103. gpio_init.dir = GPIO_DIR_INPUT;
  104. break;
  105. case PIN_MODE_INPUT_PULLDOWN:
  106. gpio_init.pull = GPIO_PULLDOWN;
  107. gpio_init.dir = GPIO_DIR_INPUT;
  108. break;
  109. case PIN_MODE_OUTPUT:
  110. case PIN_MODE_OUTPUT_OD:
  111. default:
  112. gpio_init.pull = GPIO_NOPULL;
  113. gpio_init.dir = GPIO_DIR_OUTPUT;
  114. break;
  115. }
  116. hal_gpio_init(PORT_SFR(port), &gpio_init);
  117. }
  118. static rt_err_t ab32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
  119. rt_uint32_t mode, void (*hdr)(void *args), void *args)
  120. {
  121. return -RT_ERROR;
  122. }
  123. static rt_err_t ab32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
  124. {
  125. return -RT_ERROR;
  126. }
  127. static rt_err_t ab32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
  128. rt_uint32_t enabled)
  129. {
  130. return -RT_ERROR;
  131. }
  132. const static struct rt_pin_ops _ab32_pin_ops =
  133. {
  134. ab32_pin_mode,
  135. ab32_pin_write,
  136. ab32_pin_read,
  137. ab32_pin_attach_irq,
  138. ab32_pin_dettach_irq,
  139. ab32_pin_irq_enable,
  140. ab32_pin_get,
  141. };
  142. int rt_hw_pin_init(void)
  143. {
  144. return rt_device_pin_register("pin", &_ab32_pin_ops, RT_NULL);
  145. }
  146. #endif