gh_debug_idsp.h 43 KB

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  1. /*!
  2. *******************************************************************************
  3. **
  4. ** \file gh_debug_idsp.h
  5. **
  6. ** \brief IDSP Debug Registers.
  7. **
  8. ** Copyright: 2012 - 2013 (C) GoKe Microelectronics ShangHai Branch
  9. **
  10. ** \attention THIS SAMPLE CODE IS PROVIDED AS IS. GOKE MICROELECTRONICS
  11. ** ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
  12. ** OMMISSIONS.
  13. **
  14. ** \note Do not modify this file as it is generated automatically.
  15. **
  16. ******************************************************************************/
  17. #ifndef _GH_DEBUG_IDSP_H
  18. #define _GH_DEBUG_IDSP_H
  19. #ifdef __LINUX__
  20. #include "reg4linux.h"
  21. #else
  22. #define FIO_ADDRESS(block,address) (address)
  23. #define FIO_MOFFSET(block,moffset) (moffset)
  24. #endif
  25. #ifndef __LINUX__
  26. #include "gtypes.h" /* global type definitions */
  27. #include "gh_lib_cfg.h" /* configuration */
  28. #endif
  29. #define GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT 0
  30. #ifdef __LINUX__
  31. #define GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION printk
  32. #else
  33. #define GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION printf
  34. #endif
  35. #ifndef __LINUX__
  36. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  37. #include <stdio.h>
  38. #endif
  39. #endif
  40. /* check configuration */
  41. #ifndef GH_INLINE_LEVEL
  42. #error "GH_INLINE_LEVEL is not defined!"
  43. #endif
  44. #if GH_INLINE_LEVEL > 2
  45. #error "GH_INLINE_LEVEL must be set 0, 1 or 2!"
  46. #endif
  47. #ifndef GH_INLINE
  48. #error "GH_INLINE is not defined!"
  49. #endif
  50. /* disable inlining for debugging */
  51. #ifdef DEBUG
  52. #undef GH_INLINE_LEVEL
  53. #define GH_INLINE_LEVEL 0
  54. #endif
  55. /*----------------------------------------------------------------------------*/
  56. /* registers */
  57. /*----------------------------------------------------------------------------*/
  58. #define REG_DEBUG_IDSP_ADDRESS FIO_ADDRESS(DEBUG_IDSP,0x70118000) /* read/write */
  59. #define REG_DEBUG_IDSP_CONFIG FIO_ADDRESS(DEBUG_IDSP,0x70118004) /* read */
  60. #define REG_DEBUG_IDSP_SECTION_RESET FIO_ADDRESS(DEBUG_IDSP,0x7011801C) /* write */
  61. #define REG_DEBUG_IDSP_ERROR FIO_ADDRESS(DEBUG_IDSP,0x70118020) /* read/write */
  62. #define REG_DEBUG_IDSP_CLOCK_GATING_DISABLE FIO_ADDRESS(DEBUG_IDSP,0x70118024) /* read/write */
  63. #define REG_DEBUG_IDSP_SECTION_COMMAND_START FIO_ADDRESS(DEBUG_IDSP,0x70118040) /* read */
  64. #define REG_DEBUG_IDSP_SECTION_DEBUG1 FIO_ADDRESS(DEBUG_IDSP,0x70118078) /* read */
  65. #define REG_DEBUG_IDSP_SECTION_DEBUG2 FIO_ADDRESS(DEBUG_IDSP,0x7011807C) /* read */
  66. #define REG_DEBUG_IDSP_FILTER FIO_ADDRESS(DEBUG_IDSP,0xA011FF00) /* read/write */
  67. /*----------------------------------------------------------------------------*/
  68. /* bit group structures */
  69. /*----------------------------------------------------------------------------*/
  70. typedef union { /* DEBUG_IDSP_Address */
  71. U32 all;
  72. struct {
  73. U32 filter_address_msb : 3;
  74. U32 : 1;
  75. U32 filter_number : 4;
  76. U32 section_number : 3;
  77. U32 : 21;
  78. } bitc;
  79. } GH_DEBUG_IDSP_ADDRESS_S;
  80. typedef union { /* DEBUG_IDSP_Config */
  81. U32 all;
  82. struct {
  83. U32 write_data : 1;
  84. U32 second_half : 1;
  85. U32 data : 6;
  86. U32 section_id : 3;
  87. U32 : 21;
  88. } bitc;
  89. } GH_DEBUG_IDSP_CONFIG_S;
  90. typedef union { /* DEBUG_IDSP_Section_reset */
  91. U32 all;
  92. struct {
  93. U32 reset : 7;
  94. U32 : 25;
  95. } bitc;
  96. } GH_DEBUG_IDSP_SECTION_RESET_S;
  97. typedef union { /* DEBUG_IDSP_error */
  98. U32 all;
  99. struct {
  100. U32 : 1;
  101. U32 reset : 7;
  102. U32 : 24;
  103. } bitc;
  104. } GH_DEBUG_IDSP_ERROR_S;
  105. typedef union { /* DEBUG_IDSP_clock_gating_disable */
  106. U32 all;
  107. struct {
  108. U32 smem : 1;
  109. U32 section : 7;
  110. U32 smem_tile : 1;
  111. U32 : 23;
  112. } bitc;
  113. } GH_DEBUG_IDSP_CLOCK_GATING_DISABLE_S;
  114. typedef union { /* DEBUG_IDSP_Section_debug1 */
  115. U32 all;
  116. struct {
  117. U32 config_fsm_state : 4;
  118. U32 config_fsm_done : 1;
  119. U32 pending_secondary_stores : 3;
  120. U32 pending_primary_stores : 3;
  121. U32 line_sync_needed : 1;
  122. U32 line_sync_pending : 1;
  123. U32 store_fsm_state : 3;
  124. U32 store_fsm_top_state : 3;
  125. U32 pending_loads : 2;
  126. U32 load_fsm_state : 4;
  127. U32 load_fsm_top_state : 3;
  128. U32 main_fsm_state : 4;
  129. } bitc;
  130. } GH_DEBUG_IDSP_SECTION_DEBUG1_S;
  131. typedef union { /* DEBUG_IDSP_Section_debug2 */
  132. U32 all;
  133. struct {
  134. U32 store_count0 : 8;
  135. U32 store_count1 : 8;
  136. U32 store_count2 : 8;
  137. U32 last_half : 1;
  138. U32 last_word : 1;
  139. U32 more : 1;
  140. U32 filter : 4;
  141. U32 section : 1;
  142. } bitc;
  143. } GH_DEBUG_IDSP_SECTION_DEBUG2_S;
  144. /*----------------------------------------------------------------------------*/
  145. /* mirror variables */
  146. /*----------------------------------------------------------------------------*/
  147. extern GH_DEBUG_IDSP_SECTION_RESET_S m_debug_idsp_section_reset;
  148. #ifdef __cplusplus
  149. extern "C" {
  150. #endif
  151. /*----------------------------------------------------------------------------*/
  152. /* register DEBUG_IDSP_Address (read/write) */
  153. /*----------------------------------------------------------------------------*/
  154. #if GH_INLINE_LEVEL == 0
  155. /*! \brief Writes the register 'DEBUG_IDSP_Address'. */
  156. void GH_DEBUG_IDSP_set_Address(U32 data);
  157. /*! \brief Reads the register 'DEBUG_IDSP_Address'. */
  158. U32 GH_DEBUG_IDSP_get_Address(void);
  159. /*! \brief Writes the bit group 'filter_address_MSB' of register 'DEBUG_IDSP_Address'. */
  160. void GH_DEBUG_IDSP_set_Address_filter_address_MSB(U8 data);
  161. /*! \brief Reads the bit group 'filter_address_MSB' of register 'DEBUG_IDSP_Address'. */
  162. U8 GH_DEBUG_IDSP_get_Address_filter_address_MSB(void);
  163. /*! \brief Writes the bit group 'filter_number' of register 'DEBUG_IDSP_Address'. */
  164. void GH_DEBUG_IDSP_set_Address_filter_number(U8 data);
  165. /*! \brief Reads the bit group 'filter_number' of register 'DEBUG_IDSP_Address'. */
  166. U8 GH_DEBUG_IDSP_get_Address_filter_number(void);
  167. /*! \brief Writes the bit group 'section_number' of register 'DEBUG_IDSP_Address'. */
  168. void GH_DEBUG_IDSP_set_Address_section_number(U8 data);
  169. /*! \brief Reads the bit group 'section_number' of register 'DEBUG_IDSP_Address'. */
  170. U8 GH_DEBUG_IDSP_get_Address_section_number(void);
  171. #else /* GH_INLINE_LEVEL == 0 */
  172. GH_INLINE void GH_DEBUG_IDSP_set_Address(U32 data)
  173. {
  174. *(volatile U32 *)REG_DEBUG_IDSP_ADDRESS = data;
  175. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  176. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_DEBUG_IDSP_set_Address] <-- 0x%08x\n",
  177. REG_DEBUG_IDSP_ADDRESS,data,data);
  178. #endif
  179. }
  180. GH_INLINE U32 GH_DEBUG_IDSP_get_Address(void)
  181. {
  182. U32 value = (*(volatile U32 *)REG_DEBUG_IDSP_ADDRESS);
  183. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  184. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Address] --> 0x%08x\n",
  185. REG_DEBUG_IDSP_ADDRESS,value);
  186. #endif
  187. return value;
  188. }
  189. GH_INLINE void GH_DEBUG_IDSP_set_Address_filter_address_MSB(U8 data)
  190. {
  191. GH_DEBUG_IDSP_ADDRESS_S d;
  192. d.all = *(volatile U32 *)REG_DEBUG_IDSP_ADDRESS;
  193. d.bitc.filter_address_msb = data;
  194. *(volatile U32 *)REG_DEBUG_IDSP_ADDRESS = d.all;
  195. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  196. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_DEBUG_IDSP_set_Address_filter_address_MSB] <-- 0x%08x\n",
  197. REG_DEBUG_IDSP_ADDRESS,d.all,d.all);
  198. #endif
  199. }
  200. GH_INLINE U8 GH_DEBUG_IDSP_get_Address_filter_address_MSB(void)
  201. {
  202. GH_DEBUG_IDSP_ADDRESS_S tmp_value;
  203. U32 value = (*(volatile U32 *)REG_DEBUG_IDSP_ADDRESS);
  204. tmp_value.all = value;
  205. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  206. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Address_filter_address_MSB] --> 0x%08x\n",
  207. REG_DEBUG_IDSP_ADDRESS,value);
  208. #endif
  209. return tmp_value.bitc.filter_address_msb;
  210. }
  211. GH_INLINE void GH_DEBUG_IDSP_set_Address_filter_number(U8 data)
  212. {
  213. GH_DEBUG_IDSP_ADDRESS_S d;
  214. d.all = *(volatile U32 *)REG_DEBUG_IDSP_ADDRESS;
  215. d.bitc.filter_number = data;
  216. *(volatile U32 *)REG_DEBUG_IDSP_ADDRESS = d.all;
  217. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  218. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_DEBUG_IDSP_set_Address_filter_number] <-- 0x%08x\n",
  219. REG_DEBUG_IDSP_ADDRESS,d.all,d.all);
  220. #endif
  221. }
  222. GH_INLINE U8 GH_DEBUG_IDSP_get_Address_filter_number(void)
  223. {
  224. GH_DEBUG_IDSP_ADDRESS_S tmp_value;
  225. U32 value = (*(volatile U32 *)REG_DEBUG_IDSP_ADDRESS);
  226. tmp_value.all = value;
  227. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  228. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Address_filter_number] --> 0x%08x\n",
  229. REG_DEBUG_IDSP_ADDRESS,value);
  230. #endif
  231. return tmp_value.bitc.filter_number;
  232. }
  233. GH_INLINE void GH_DEBUG_IDSP_set_Address_section_number(U8 data)
  234. {
  235. GH_DEBUG_IDSP_ADDRESS_S d;
  236. d.all = *(volatile U32 *)REG_DEBUG_IDSP_ADDRESS;
  237. d.bitc.section_number = data;
  238. *(volatile U32 *)REG_DEBUG_IDSP_ADDRESS = d.all;
  239. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  240. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_DEBUG_IDSP_set_Address_section_number] <-- 0x%08x\n",
  241. REG_DEBUG_IDSP_ADDRESS,d.all,d.all);
  242. #endif
  243. }
  244. GH_INLINE U8 GH_DEBUG_IDSP_get_Address_section_number(void)
  245. {
  246. GH_DEBUG_IDSP_ADDRESS_S tmp_value;
  247. U32 value = (*(volatile U32 *)REG_DEBUG_IDSP_ADDRESS);
  248. tmp_value.all = value;
  249. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  250. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Address_section_number] --> 0x%08x\n",
  251. REG_DEBUG_IDSP_ADDRESS,value);
  252. #endif
  253. return tmp_value.bitc.section_number;
  254. }
  255. #endif /* GH_INLINE_LEVEL == 0 */
  256. /*----------------------------------------------------------------------------*/
  257. /* register DEBUG_IDSP_Config (read) */
  258. /*----------------------------------------------------------------------------*/
  259. #if GH_INLINE_LEVEL == 0
  260. /*! \brief Reads the register 'DEBUG_IDSP_Config'. */
  261. U32 GH_DEBUG_IDSP_get_Config(void);
  262. /*! \brief Reads the bit group 'write_data' of register 'DEBUG_IDSP_Config'. */
  263. U8 GH_DEBUG_IDSP_get_Config_write_data(void);
  264. /*! \brief Reads the bit group 'second_half' of register 'DEBUG_IDSP_Config'. */
  265. U8 GH_DEBUG_IDSP_get_Config_second_half(void);
  266. /*! \brief Reads the bit group 'data' of register 'DEBUG_IDSP_Config'. */
  267. U8 GH_DEBUG_IDSP_get_Config_data(void);
  268. /*! \brief Reads the bit group 'section_ID' of register 'DEBUG_IDSP_Config'. */
  269. U8 GH_DEBUG_IDSP_get_Config_section_ID(void);
  270. #else /* GH_INLINE_LEVEL == 0 */
  271. GH_INLINE U32 GH_DEBUG_IDSP_get_Config(void)
  272. {
  273. U32 value = (*(volatile U32 *)REG_DEBUG_IDSP_CONFIG);
  274. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  275. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Config] --> 0x%08x\n",
  276. REG_DEBUG_IDSP_CONFIG,value);
  277. #endif
  278. return value;
  279. }
  280. GH_INLINE U8 GH_DEBUG_IDSP_get_Config_write_data(void)
  281. {
  282. GH_DEBUG_IDSP_CONFIG_S tmp_value;
  283. U32 value = (*(volatile U32 *)REG_DEBUG_IDSP_CONFIG);
  284. tmp_value.all = value;
  285. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  286. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Config_write_data] --> 0x%08x\n",
  287. REG_DEBUG_IDSP_CONFIG,value);
  288. #endif
  289. return tmp_value.bitc.write_data;
  290. }
  291. GH_INLINE U8 GH_DEBUG_IDSP_get_Config_second_half(void)
  292. {
  293. GH_DEBUG_IDSP_CONFIG_S tmp_value;
  294. U32 value = (*(volatile U32 *)REG_DEBUG_IDSP_CONFIG);
  295. tmp_value.all = value;
  296. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  297. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Config_second_half] --> 0x%08x\n",
  298. REG_DEBUG_IDSP_CONFIG,value);
  299. #endif
  300. return tmp_value.bitc.second_half;
  301. }
  302. GH_INLINE U8 GH_DEBUG_IDSP_get_Config_data(void)
  303. {
  304. GH_DEBUG_IDSP_CONFIG_S tmp_value;
  305. U32 value = (*(volatile U32 *)REG_DEBUG_IDSP_CONFIG);
  306. tmp_value.all = value;
  307. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  308. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Config_data] --> 0x%08x\n",
  309. REG_DEBUG_IDSP_CONFIG,value);
  310. #endif
  311. return tmp_value.bitc.data;
  312. }
  313. GH_INLINE U8 GH_DEBUG_IDSP_get_Config_section_ID(void)
  314. {
  315. GH_DEBUG_IDSP_CONFIG_S tmp_value;
  316. U32 value = (*(volatile U32 *)REG_DEBUG_IDSP_CONFIG);
  317. tmp_value.all = value;
  318. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  319. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Config_section_ID] --> 0x%08x\n",
  320. REG_DEBUG_IDSP_CONFIG,value);
  321. #endif
  322. return tmp_value.bitc.section_id;
  323. }
  324. #endif /* GH_INLINE_LEVEL == 0 */
  325. /*----------------------------------------------------------------------------*/
  326. /* register DEBUG_IDSP_Section_reset (write) */
  327. /*----------------------------------------------------------------------------*/
  328. #if GH_INLINE_LEVEL < 2
  329. /*! \brief Writes the register 'DEBUG_IDSP_Section_reset'. */
  330. void GH_DEBUG_IDSP_set_Section_reset(U32 data);
  331. /*! \brief Reads the mirror variable of the register 'DEBUG_IDSP_Section_reset'. */
  332. U32 GH_DEBUG_IDSP_getm_Section_reset(void);
  333. /*! \brief Writes the bit group 'reset' of register 'DEBUG_IDSP_Section_reset'. */
  334. void GH_DEBUG_IDSP_set_Section_reset_reset(U8 data);
  335. /*! \brief Reads the bit group 'reset' from the mirror variable of register 'DEBUG_IDSP_Section_reset'. */
  336. U8 GH_DEBUG_IDSP_getm_Section_reset_reset(void);
  337. #else /* GH_INLINE_LEVEL < 2 */
  338. GH_INLINE void GH_DEBUG_IDSP_set_Section_reset(U32 data)
  339. {
  340. m_debug_idsp_section_reset.all = data;
  341. *(volatile U32 *)REG_DEBUG_IDSP_SECTION_RESET = data;
  342. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  343. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_DEBUG_IDSP_set_Section_reset] <-- 0x%08x\n",
  344. REG_DEBUG_IDSP_SECTION_RESET,data,data);
  345. #endif
  346. }
  347. GH_INLINE U32 GH_DEBUG_IDSP_getm_Section_reset(void)
  348. {
  349. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  350. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "[GH_DEBUG_IDSP_getm_Section_reset] --> 0x%08x\n",
  351. m_debug_idsp_section_reset.all);
  352. #endif
  353. return m_debug_idsp_section_reset.all;
  354. }
  355. GH_INLINE void GH_DEBUG_IDSP_set_Section_reset_reset(U8 data)
  356. {
  357. m_debug_idsp_section_reset.bitc.reset = data;
  358. *(volatile U32 *)REG_DEBUG_IDSP_SECTION_RESET = m_debug_idsp_section_reset.all;
  359. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  360. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_DEBUG_IDSP_set_Section_reset_reset] <-- 0x%08x\n",
  361. REG_DEBUG_IDSP_SECTION_RESET,m_debug_idsp_section_reset.all,m_debug_idsp_section_reset.all);
  362. #endif
  363. }
  364. GH_INLINE U8 GH_DEBUG_IDSP_getm_Section_reset_reset(void)
  365. {
  366. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  367. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "[GH_DEBUG_IDSP_getm_Section_reset_reset] --> 0x%08x\n",
  368. m_debug_idsp_section_reset.bitc.reset);
  369. #endif
  370. return m_debug_idsp_section_reset.bitc.reset;
  371. }
  372. #endif /* GH_INLINE_LEVEL < 2 */
  373. /*----------------------------------------------------------------------------*/
  374. /* register DEBUG_IDSP_error (read/write) */
  375. /*----------------------------------------------------------------------------*/
  376. #if GH_INLINE_LEVEL == 0
  377. /*! \brief Writes the register 'DEBUG_IDSP_error'. */
  378. void GH_DEBUG_IDSP_set_error(U32 data);
  379. /*! \brief Reads the register 'DEBUG_IDSP_error'. */
  380. U32 GH_DEBUG_IDSP_get_error(void);
  381. /*! \brief Writes the bit group 'reset' of register 'DEBUG_IDSP_error'. */
  382. void GH_DEBUG_IDSP_set_error_reset(U8 data);
  383. /*! \brief Reads the bit group 'reset' of register 'DEBUG_IDSP_error'. */
  384. U8 GH_DEBUG_IDSP_get_error_reset(void);
  385. #else /* GH_INLINE_LEVEL == 0 */
  386. GH_INLINE void GH_DEBUG_IDSP_set_error(U32 data)
  387. {
  388. *(volatile U32 *)REG_DEBUG_IDSP_ERROR = data;
  389. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  390. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_DEBUG_IDSP_set_error] <-- 0x%08x\n",
  391. REG_DEBUG_IDSP_ERROR,data,data);
  392. #endif
  393. }
  394. GH_INLINE U32 GH_DEBUG_IDSP_get_error(void)
  395. {
  396. U32 value = (*(volatile U32 *)REG_DEBUG_IDSP_ERROR);
  397. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  398. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_error] --> 0x%08x\n",
  399. REG_DEBUG_IDSP_ERROR,value);
  400. #endif
  401. return value;
  402. }
  403. GH_INLINE void GH_DEBUG_IDSP_set_error_reset(U8 data)
  404. {
  405. GH_DEBUG_IDSP_ERROR_S d;
  406. d.all = *(volatile U32 *)REG_DEBUG_IDSP_ERROR;
  407. d.bitc.reset = data;
  408. *(volatile U32 *)REG_DEBUG_IDSP_ERROR = d.all;
  409. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  410. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_DEBUG_IDSP_set_error_reset] <-- 0x%08x\n",
  411. REG_DEBUG_IDSP_ERROR,d.all,d.all);
  412. #endif
  413. }
  414. GH_INLINE U8 GH_DEBUG_IDSP_get_error_reset(void)
  415. {
  416. GH_DEBUG_IDSP_ERROR_S tmp_value;
  417. U32 value = (*(volatile U32 *)REG_DEBUG_IDSP_ERROR);
  418. tmp_value.all = value;
  419. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  420. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_error_reset] --> 0x%08x\n",
  421. REG_DEBUG_IDSP_ERROR,value);
  422. #endif
  423. return tmp_value.bitc.reset;
  424. }
  425. #endif /* GH_INLINE_LEVEL == 0 */
  426. /*----------------------------------------------------------------------------*/
  427. /* register DEBUG_IDSP_clock_gating_disable (read/write) */
  428. /*----------------------------------------------------------------------------*/
  429. #if GH_INLINE_LEVEL == 0
  430. /*! \brief Writes the register 'DEBUG_IDSP_clock_gating_disable'. */
  431. void GH_DEBUG_IDSP_set_clock_gating_disable(U32 data);
  432. /*! \brief Reads the register 'DEBUG_IDSP_clock_gating_disable'. */
  433. U32 GH_DEBUG_IDSP_get_clock_gating_disable(void);
  434. /*! \brief Writes the bit group 'smem' of register 'DEBUG_IDSP_clock_gating_disable'. */
  435. void GH_DEBUG_IDSP_set_clock_gating_disable_smem(U8 data);
  436. /*! \brief Reads the bit group 'smem' of register 'DEBUG_IDSP_clock_gating_disable'. */
  437. U8 GH_DEBUG_IDSP_get_clock_gating_disable_smem(void);
  438. /*! \brief Writes the bit group 'section' of register 'DEBUG_IDSP_clock_gating_disable'. */
  439. void GH_DEBUG_IDSP_set_clock_gating_disable_section(U8 data);
  440. /*! \brief Reads the bit group 'section' of register 'DEBUG_IDSP_clock_gating_disable'. */
  441. U8 GH_DEBUG_IDSP_get_clock_gating_disable_section(void);
  442. /*! \brief Writes the bit group 'smem_tile' of register 'DEBUG_IDSP_clock_gating_disable'. */
  443. void GH_DEBUG_IDSP_set_clock_gating_disable_smem_tile(U8 data);
  444. /*! \brief Reads the bit group 'smem_tile' of register 'DEBUG_IDSP_clock_gating_disable'. */
  445. U8 GH_DEBUG_IDSP_get_clock_gating_disable_smem_tile(void);
  446. #else /* GH_INLINE_LEVEL == 0 */
  447. GH_INLINE void GH_DEBUG_IDSP_set_clock_gating_disable(U32 data)
  448. {
  449. *(volatile U32 *)REG_DEBUG_IDSP_CLOCK_GATING_DISABLE = data;
  450. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  451. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_DEBUG_IDSP_set_clock_gating_disable] <-- 0x%08x\n",
  452. REG_DEBUG_IDSP_CLOCK_GATING_DISABLE,data,data);
  453. #endif
  454. }
  455. GH_INLINE U32 GH_DEBUG_IDSP_get_clock_gating_disable(void)
  456. {
  457. U32 value = (*(volatile U32 *)REG_DEBUG_IDSP_CLOCK_GATING_DISABLE);
  458. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  459. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_clock_gating_disable] --> 0x%08x\n",
  460. REG_DEBUG_IDSP_CLOCK_GATING_DISABLE,value);
  461. #endif
  462. return value;
  463. }
  464. GH_INLINE void GH_DEBUG_IDSP_set_clock_gating_disable_smem(U8 data)
  465. {
  466. GH_DEBUG_IDSP_CLOCK_GATING_DISABLE_S d;
  467. d.all = *(volatile U32 *)REG_DEBUG_IDSP_CLOCK_GATING_DISABLE;
  468. d.bitc.smem = data;
  469. *(volatile U32 *)REG_DEBUG_IDSP_CLOCK_GATING_DISABLE = d.all;
  470. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  471. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_DEBUG_IDSP_set_clock_gating_disable_smem] <-- 0x%08x\n",
  472. REG_DEBUG_IDSP_CLOCK_GATING_DISABLE,d.all,d.all);
  473. #endif
  474. }
  475. GH_INLINE U8 GH_DEBUG_IDSP_get_clock_gating_disable_smem(void)
  476. {
  477. GH_DEBUG_IDSP_CLOCK_GATING_DISABLE_S tmp_value;
  478. U32 value = (*(volatile U32 *)REG_DEBUG_IDSP_CLOCK_GATING_DISABLE);
  479. tmp_value.all = value;
  480. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  481. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_clock_gating_disable_smem] --> 0x%08x\n",
  482. REG_DEBUG_IDSP_CLOCK_GATING_DISABLE,value);
  483. #endif
  484. return tmp_value.bitc.smem;
  485. }
  486. GH_INLINE void GH_DEBUG_IDSP_set_clock_gating_disable_section(U8 data)
  487. {
  488. GH_DEBUG_IDSP_CLOCK_GATING_DISABLE_S d;
  489. d.all = *(volatile U32 *)REG_DEBUG_IDSP_CLOCK_GATING_DISABLE;
  490. d.bitc.section = data;
  491. *(volatile U32 *)REG_DEBUG_IDSP_CLOCK_GATING_DISABLE = d.all;
  492. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  493. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_DEBUG_IDSP_set_clock_gating_disable_section] <-- 0x%08x\n",
  494. REG_DEBUG_IDSP_CLOCK_GATING_DISABLE,d.all,d.all);
  495. #endif
  496. }
  497. GH_INLINE U8 GH_DEBUG_IDSP_get_clock_gating_disable_section(void)
  498. {
  499. GH_DEBUG_IDSP_CLOCK_GATING_DISABLE_S tmp_value;
  500. U32 value = (*(volatile U32 *)REG_DEBUG_IDSP_CLOCK_GATING_DISABLE);
  501. tmp_value.all = value;
  502. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  503. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_clock_gating_disable_section] --> 0x%08x\n",
  504. REG_DEBUG_IDSP_CLOCK_GATING_DISABLE,value);
  505. #endif
  506. return tmp_value.bitc.section;
  507. }
  508. GH_INLINE void GH_DEBUG_IDSP_set_clock_gating_disable_smem_tile(U8 data)
  509. {
  510. GH_DEBUG_IDSP_CLOCK_GATING_DISABLE_S d;
  511. d.all = *(volatile U32 *)REG_DEBUG_IDSP_CLOCK_GATING_DISABLE;
  512. d.bitc.smem_tile = data;
  513. *(volatile U32 *)REG_DEBUG_IDSP_CLOCK_GATING_DISABLE = d.all;
  514. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  515. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_DEBUG_IDSP_set_clock_gating_disable_smem_tile] <-- 0x%08x\n",
  516. REG_DEBUG_IDSP_CLOCK_GATING_DISABLE,d.all,d.all);
  517. #endif
  518. }
  519. GH_INLINE U8 GH_DEBUG_IDSP_get_clock_gating_disable_smem_tile(void)
  520. {
  521. GH_DEBUG_IDSP_CLOCK_GATING_DISABLE_S tmp_value;
  522. U32 value = (*(volatile U32 *)REG_DEBUG_IDSP_CLOCK_GATING_DISABLE);
  523. tmp_value.all = value;
  524. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  525. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_clock_gating_disable_smem_tile] --> 0x%08x\n",
  526. REG_DEBUG_IDSP_CLOCK_GATING_DISABLE,value);
  527. #endif
  528. return tmp_value.bitc.smem_tile;
  529. }
  530. #endif /* GH_INLINE_LEVEL == 0 */
  531. /*----------------------------------------------------------------------------*/
  532. /* register DEBUG_IDSP_Section_command_start (read) */
  533. /*----------------------------------------------------------------------------*/
  534. #if GH_INLINE_LEVEL == 0
  535. /*! \brief Reads the register 'DEBUG_IDSP_Section_command_start'. */
  536. U32 GH_DEBUG_IDSP_get_Section_command_start(U8 index);
  537. #else /* GH_INLINE_LEVEL == 0 */
  538. GH_INLINE U32 GH_DEBUG_IDSP_get_Section_command_start(U8 index)
  539. {
  540. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_COMMAND_START + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  541. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  542. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_command_start] --> 0x%08x\n",
  543. (REG_DEBUG_IDSP_SECTION_COMMAND_START + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  544. #endif
  545. return value;
  546. }
  547. #endif /* GH_INLINE_LEVEL == 0 */
  548. /*----------------------------------------------------------------------------*/
  549. /* register DEBUG_IDSP_Section_debug1 (read) */
  550. /*----------------------------------------------------------------------------*/
  551. #if GH_INLINE_LEVEL == 0
  552. /*! \brief Reads the register 'DEBUG_IDSP_Section_debug1'. */
  553. U32 GH_DEBUG_IDSP_get_Section_debug1(U8 index);
  554. /*! \brief Reads the bit group 'config_FSM_state' of register 'DEBUG_IDSP_Section_debug1'. */
  555. U8 GH_DEBUG_IDSP_get_Section_debug1_config_FSM_state(U8 index);
  556. /*! \brief Reads the bit group 'config_FSM_done' of register 'DEBUG_IDSP_Section_debug1'. */
  557. U8 GH_DEBUG_IDSP_get_Section_debug1_config_FSM_done(U8 index);
  558. /*! \brief Reads the bit group 'pending_secondary_stores' of register 'DEBUG_IDSP_Section_debug1'. */
  559. U8 GH_DEBUG_IDSP_get_Section_debug1_pending_secondary_stores(U8 index);
  560. /*! \brief Reads the bit group 'pending_primary_stores' of register 'DEBUG_IDSP_Section_debug1'. */
  561. U8 GH_DEBUG_IDSP_get_Section_debug1_pending_primary_stores(U8 index);
  562. /*! \brief Reads the bit group 'line_sync_needed' of register 'DEBUG_IDSP_Section_debug1'. */
  563. U8 GH_DEBUG_IDSP_get_Section_debug1_line_sync_needed(U8 index);
  564. /*! \brief Reads the bit group 'line_sync_pending' of register 'DEBUG_IDSP_Section_debug1'. */
  565. U8 GH_DEBUG_IDSP_get_Section_debug1_line_sync_pending(U8 index);
  566. /*! \brief Reads the bit group 'store_FSM_state' of register 'DEBUG_IDSP_Section_debug1'. */
  567. U8 GH_DEBUG_IDSP_get_Section_debug1_store_FSM_state(U8 index);
  568. /*! \brief Reads the bit group 'store_FSM_top_state' of register 'DEBUG_IDSP_Section_debug1'. */
  569. U8 GH_DEBUG_IDSP_get_Section_debug1_store_FSM_top_state(U8 index);
  570. /*! \brief Reads the bit group 'pending_loads' of register 'DEBUG_IDSP_Section_debug1'. */
  571. U8 GH_DEBUG_IDSP_get_Section_debug1_pending_loads(U8 index);
  572. /*! \brief Reads the bit group 'load_FSM_state' of register 'DEBUG_IDSP_Section_debug1'. */
  573. U8 GH_DEBUG_IDSP_get_Section_debug1_load_FSM_state(U8 index);
  574. /*! \brief Reads the bit group 'load_FSM_top_state' of register 'DEBUG_IDSP_Section_debug1'. */
  575. U8 GH_DEBUG_IDSP_get_Section_debug1_load_FSM_top_state(U8 index);
  576. /*! \brief Reads the bit group 'main_FSM_state' of register 'DEBUG_IDSP_Section_debug1'. */
  577. U8 GH_DEBUG_IDSP_get_Section_debug1_main_FSM_state(U8 index);
  578. #else /* GH_INLINE_LEVEL == 0 */
  579. GH_INLINE U32 GH_DEBUG_IDSP_get_Section_debug1(U8 index)
  580. {
  581. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  582. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  583. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug1] --> 0x%08x\n",
  584. (REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  585. #endif
  586. return value;
  587. }
  588. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug1_config_FSM_state(U8 index)
  589. {
  590. GH_DEBUG_IDSP_SECTION_DEBUG1_S tmp_value;
  591. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  592. tmp_value.all = value;
  593. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  594. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug1_config_FSM_state] --> 0x%08x\n",
  595. (REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  596. #endif
  597. return tmp_value.bitc.config_fsm_state;
  598. }
  599. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug1_config_FSM_done(U8 index)
  600. {
  601. GH_DEBUG_IDSP_SECTION_DEBUG1_S tmp_value;
  602. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  603. tmp_value.all = value;
  604. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  605. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug1_config_FSM_done] --> 0x%08x\n",
  606. (REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  607. #endif
  608. return tmp_value.bitc.config_fsm_done;
  609. }
  610. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug1_pending_secondary_stores(U8 index)
  611. {
  612. GH_DEBUG_IDSP_SECTION_DEBUG1_S tmp_value;
  613. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  614. tmp_value.all = value;
  615. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  616. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug1_pending_secondary_stores] --> 0x%08x\n",
  617. (REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  618. #endif
  619. return tmp_value.bitc.pending_secondary_stores;
  620. }
  621. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug1_pending_primary_stores(U8 index)
  622. {
  623. GH_DEBUG_IDSP_SECTION_DEBUG1_S tmp_value;
  624. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  625. tmp_value.all = value;
  626. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  627. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug1_pending_primary_stores] --> 0x%08x\n",
  628. (REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  629. #endif
  630. return tmp_value.bitc.pending_primary_stores;
  631. }
  632. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug1_line_sync_needed(U8 index)
  633. {
  634. GH_DEBUG_IDSP_SECTION_DEBUG1_S tmp_value;
  635. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  636. tmp_value.all = value;
  637. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  638. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug1_line_sync_needed] --> 0x%08x\n",
  639. (REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  640. #endif
  641. return tmp_value.bitc.line_sync_needed;
  642. }
  643. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug1_line_sync_pending(U8 index)
  644. {
  645. GH_DEBUG_IDSP_SECTION_DEBUG1_S tmp_value;
  646. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  647. tmp_value.all = value;
  648. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  649. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug1_line_sync_pending] --> 0x%08x\n",
  650. (REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  651. #endif
  652. return tmp_value.bitc.line_sync_pending;
  653. }
  654. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug1_store_FSM_state(U8 index)
  655. {
  656. GH_DEBUG_IDSP_SECTION_DEBUG1_S tmp_value;
  657. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  658. tmp_value.all = value;
  659. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  660. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug1_store_FSM_state] --> 0x%08x\n",
  661. (REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  662. #endif
  663. return tmp_value.bitc.store_fsm_state;
  664. }
  665. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug1_store_FSM_top_state(U8 index)
  666. {
  667. GH_DEBUG_IDSP_SECTION_DEBUG1_S tmp_value;
  668. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  669. tmp_value.all = value;
  670. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  671. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug1_store_FSM_top_state] --> 0x%08x\n",
  672. (REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  673. #endif
  674. return tmp_value.bitc.store_fsm_top_state;
  675. }
  676. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug1_pending_loads(U8 index)
  677. {
  678. GH_DEBUG_IDSP_SECTION_DEBUG1_S tmp_value;
  679. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  680. tmp_value.all = value;
  681. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  682. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug1_pending_loads] --> 0x%08x\n",
  683. (REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  684. #endif
  685. return tmp_value.bitc.pending_loads;
  686. }
  687. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug1_load_FSM_state(U8 index)
  688. {
  689. GH_DEBUG_IDSP_SECTION_DEBUG1_S tmp_value;
  690. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  691. tmp_value.all = value;
  692. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  693. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug1_load_FSM_state] --> 0x%08x\n",
  694. (REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  695. #endif
  696. return tmp_value.bitc.load_fsm_state;
  697. }
  698. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug1_load_FSM_top_state(U8 index)
  699. {
  700. GH_DEBUG_IDSP_SECTION_DEBUG1_S tmp_value;
  701. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  702. tmp_value.all = value;
  703. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  704. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug1_load_FSM_top_state] --> 0x%08x\n",
  705. (REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  706. #endif
  707. return tmp_value.bitc.load_fsm_top_state;
  708. }
  709. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug1_main_FSM_state(U8 index)
  710. {
  711. GH_DEBUG_IDSP_SECTION_DEBUG1_S tmp_value;
  712. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  713. tmp_value.all = value;
  714. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  715. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug1_main_FSM_state] --> 0x%08x\n",
  716. (REG_DEBUG_IDSP_SECTION_DEBUG1 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  717. #endif
  718. return tmp_value.bitc.main_fsm_state;
  719. }
  720. #endif /* GH_INLINE_LEVEL == 0 */
  721. /*----------------------------------------------------------------------------*/
  722. /* register DEBUG_IDSP_Section_debug2 (read) */
  723. /*----------------------------------------------------------------------------*/
  724. #if GH_INLINE_LEVEL == 0
  725. /*! \brief Reads the register 'DEBUG_IDSP_Section_debug2'. */
  726. U32 GH_DEBUG_IDSP_get_Section_debug2(U8 index);
  727. /*! \brief Reads the bit group 'store_count0' of register 'DEBUG_IDSP_Section_debug2'. */
  728. U8 GH_DEBUG_IDSP_get_Section_debug2_store_count0(U8 index);
  729. /*! \brief Reads the bit group 'store_count1' of register 'DEBUG_IDSP_Section_debug2'. */
  730. U8 GH_DEBUG_IDSP_get_Section_debug2_store_count1(U8 index);
  731. /*! \brief Reads the bit group 'store_count2' of register 'DEBUG_IDSP_Section_debug2'. */
  732. U8 GH_DEBUG_IDSP_get_Section_debug2_store_count2(U8 index);
  733. /*! \brief Reads the bit group 'last_half' of register 'DEBUG_IDSP_Section_debug2'. */
  734. U8 GH_DEBUG_IDSP_get_Section_debug2_last_half(U8 index);
  735. /*! \brief Reads the bit group 'last_word' of register 'DEBUG_IDSP_Section_debug2'. */
  736. U8 GH_DEBUG_IDSP_get_Section_debug2_last_word(U8 index);
  737. /*! \brief Reads the bit group 'more' of register 'DEBUG_IDSP_Section_debug2'. */
  738. U8 GH_DEBUG_IDSP_get_Section_debug2_more(U8 index);
  739. /*! \brief Reads the bit group 'filter' of register 'DEBUG_IDSP_Section_debug2'. */
  740. U8 GH_DEBUG_IDSP_get_Section_debug2_filter(U8 index);
  741. /*! \brief Reads the bit group 'section' of register 'DEBUG_IDSP_Section_debug2'. */
  742. U8 GH_DEBUG_IDSP_get_Section_debug2_section(U8 index);
  743. #else /* GH_INLINE_LEVEL == 0 */
  744. GH_INLINE U32 GH_DEBUG_IDSP_get_Section_debug2(U8 index)
  745. {
  746. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  747. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  748. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug2] --> 0x%08x\n",
  749. (REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  750. #endif
  751. return value;
  752. }
  753. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug2_store_count0(U8 index)
  754. {
  755. GH_DEBUG_IDSP_SECTION_DEBUG2_S tmp_value;
  756. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  757. tmp_value.all = value;
  758. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  759. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug2_store_count0] --> 0x%08x\n",
  760. (REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  761. #endif
  762. return tmp_value.bitc.store_count0;
  763. }
  764. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug2_store_count1(U8 index)
  765. {
  766. GH_DEBUG_IDSP_SECTION_DEBUG2_S tmp_value;
  767. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  768. tmp_value.all = value;
  769. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  770. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug2_store_count1] --> 0x%08x\n",
  771. (REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  772. #endif
  773. return tmp_value.bitc.store_count1;
  774. }
  775. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug2_store_count2(U8 index)
  776. {
  777. GH_DEBUG_IDSP_SECTION_DEBUG2_S tmp_value;
  778. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  779. tmp_value.all = value;
  780. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  781. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug2_store_count2] --> 0x%08x\n",
  782. (REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  783. #endif
  784. return tmp_value.bitc.store_count2;
  785. }
  786. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug2_last_half(U8 index)
  787. {
  788. GH_DEBUG_IDSP_SECTION_DEBUG2_S tmp_value;
  789. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  790. tmp_value.all = value;
  791. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  792. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug2_last_half] --> 0x%08x\n",
  793. (REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  794. #endif
  795. return tmp_value.bitc.last_half;
  796. }
  797. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug2_last_word(U8 index)
  798. {
  799. GH_DEBUG_IDSP_SECTION_DEBUG2_S tmp_value;
  800. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  801. tmp_value.all = value;
  802. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  803. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug2_last_word] --> 0x%08x\n",
  804. (REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  805. #endif
  806. return tmp_value.bitc.last_word;
  807. }
  808. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug2_more(U8 index)
  809. {
  810. GH_DEBUG_IDSP_SECTION_DEBUG2_S tmp_value;
  811. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  812. tmp_value.all = value;
  813. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  814. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug2_more] --> 0x%08x\n",
  815. (REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  816. #endif
  817. return tmp_value.bitc.more;
  818. }
  819. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug2_filter(U8 index)
  820. {
  821. GH_DEBUG_IDSP_SECTION_DEBUG2_S tmp_value;
  822. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  823. tmp_value.all = value;
  824. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  825. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug2_filter] --> 0x%08x\n",
  826. (REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  827. #endif
  828. return tmp_value.bitc.filter;
  829. }
  830. GH_INLINE U8 GH_DEBUG_IDSP_get_Section_debug2_section(U8 index)
  831. {
  832. GH_DEBUG_IDSP_SECTION_DEBUG2_S tmp_value;
  833. U32 value = (*(volatile U32 *)(REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)));
  834. tmp_value.all = value;
  835. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  836. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Section_debug2_section] --> 0x%08x\n",
  837. (REG_DEBUG_IDSP_SECTION_DEBUG2 + index * FIO_MOFFSET(DEBUG_IDSP,0x00000040)),value);
  838. #endif
  839. return tmp_value.bitc.section;
  840. }
  841. #endif /* GH_INLINE_LEVEL == 0 */
  842. /*----------------------------------------------------------------------------*/
  843. /* register DEBUG_IDSP_Filter (read/write) */
  844. /*----------------------------------------------------------------------------*/
  845. #if GH_INLINE_LEVEL == 0
  846. /*! \brief Writes the register 'DEBUG_IDSP_Filter'. */
  847. void GH_DEBUG_IDSP_set_Filter(U32 data);
  848. /*! \brief Reads the register 'DEBUG_IDSP_Filter'. */
  849. U32 GH_DEBUG_IDSP_get_Filter(void);
  850. #else /* GH_INLINE_LEVEL == 0 */
  851. GH_INLINE void GH_DEBUG_IDSP_set_Filter(U32 data)
  852. {
  853. *(volatile U32 *)REG_DEBUG_IDSP_FILTER = data;
  854. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  855. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_DEBUG_IDSP_set_Filter] <-- 0x%08x\n",
  856. REG_DEBUG_IDSP_FILTER,data,data);
  857. #endif
  858. }
  859. GH_INLINE U32 GH_DEBUG_IDSP_get_Filter(void)
  860. {
  861. U32 value = (*(volatile U32 *)REG_DEBUG_IDSP_FILTER);
  862. #if GH_DEBUG_IDSP_ENABLE_DEBUG_PRINT
  863. GH_DEBUG_IDSP_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_DEBUG_IDSP_get_Filter] --> 0x%08x\n",
  864. REG_DEBUG_IDSP_FILTER,value);
  865. #endif
  866. return value;
  867. }
  868. #endif /* GH_INLINE_LEVEL == 0 */
  869. /*----------------------------------------------------------------------------*/
  870. /* init function */
  871. /*----------------------------------------------------------------------------*/
  872. /*! \brief Initialises the registers and mirror variables. */
  873. void GH_DEBUG_IDSP_init(void);
  874. #ifdef __cplusplus
  875. }
  876. #endif
  877. #endif /* _GH_DEBUG_IDSP_H */
  878. /*----------------------------------------------------------------------------*/
  879. /* end of file */
  880. /*----------------------------------------------------------------------------*/