gh_sdio1.h 186 KB

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  1. /*!
  2. *******************************************************************************
  3. **
  4. ** \file gh_sdio1.h
  5. **
  6. ** \brief SDIO1 Host Controller.
  7. **
  8. ** Copyright: 2012 - 2013 (C) GoKe Microelectronics ShangHai Branch
  9. **
  10. ** \attention THIS SAMPLE CODE IS PROVIDED AS IS. GOKE MICROELECTRONICS
  11. ** ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
  12. ** OMMISSIONS.
  13. **
  14. ** \note Do not modify this file as it is generated automatically.
  15. **
  16. ******************************************************************************/
  17. #ifndef _GH_SDIO1_H
  18. #define _GH_SDIO1_H
  19. #ifdef __LINUX__
  20. #include "reg4linux.h"
  21. #else
  22. #define FIO_ADDRESS(block,address) (address)
  23. #define FIO_MOFFSET(block,moffset) (moffset)
  24. #endif
  25. #ifndef __LINUX__
  26. #include "gtypes.h" /* global type definitions */
  27. #include "gh_lib_cfg.h" /* configuration */
  28. #endif
  29. #define GH_SDIO1_ENABLE_DEBUG_PRINT 0
  30. #ifdef __LINUX__
  31. #define GH_SDIO1_DEBUG_PRINT_FUNCTION printk
  32. #else
  33. #define GH_SDIO1_DEBUG_PRINT_FUNCTION printf
  34. #endif
  35. #ifndef __LINUX__
  36. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  37. #include <stdio.h>
  38. #endif
  39. #endif
  40. /* check configuration */
  41. #ifndef GH_INLINE_LEVEL
  42. #error "GH_INLINE_LEVEL is not defined!"
  43. #endif
  44. #if GH_INLINE_LEVEL > 2
  45. #error "GH_INLINE_LEVEL must be set 0, 1 or 2!"
  46. #endif
  47. #ifndef GH_INLINE
  48. #error "GH_INLINE is not defined!"
  49. #endif
  50. /* disable inlining for debugging */
  51. #ifdef DEBUG
  52. #undef GH_INLINE_LEVEL
  53. #define GH_INLINE_LEVEL 0
  54. #endif
  55. /*----------------------------------------------------------------------------*/
  56. /* registers */
  57. /*----------------------------------------------------------------------------*/
  58. #define REG_SDIO1_SYSADDRREG FIO_ADDRESS(SDIO1,0x90010000) /* read/write */
  59. #define REG_SDIO1_TRANMODEREG FIO_ADDRESS(SDIO1,0x90010004) /* read/write */
  60. #define REG_SDIO1_NORINTSIGENREG FIO_ADDRESS(SDIO1,0x90010006) /* read/write */
  61. #define REG_SDIO1_ERRINTSIGENREG FIO_ADDRESS(SDIO1,0x90010008) /* read/write */
  62. #define REG_SDIO1_BLKCOUREG FIO_ADDRESS(SDIO1,0x9001000A) /* read/write */
  63. #define REG_SDIO1_BLKSIZEREG FIO_ADDRESS(SDIO1,0x9001000C) /* read/write */
  64. #define REG_SDIO1_NORINTSTAENREG FIO_ADDRESS(SDIO1,0x9001000E) /* read/write */
  65. #define REG_SDIO1_ERRINTSTAENREG FIO_ADDRESS(SDIO1,0x90010010) /* read/write */
  66. #define REG_SDIO1_NORINTSTAREG FIO_ADDRESS(SDIO1,0x90010012) /* read/write */
  67. #define REG_SDIO1_ERRINTSTATUSREG FIO_ADDRESS(SDIO1,0x90010014) /* read/write */
  68. #define REG_SDIO1_COMMONDREG FIO_ADDRESS(SDIO1,0x90010016) /* read/write */
  69. #define REG_SDIO1_SOFTRESETREG FIO_ADDRESS(SDIO1,0x90010018) /* read/write */
  70. #define REG_SDIO1_CLKCONTROLREG FIO_ADDRESS(SDIO1,0x9001001A) /* read/write */
  71. #define REG_SDIO1_RESP0REG FIO_ADDRESS(SDIO1,0x9001001C) /* read */
  72. #define REG_SDIO1_RESP1REG FIO_ADDRESS(SDIO1,0x90010020) /* read */
  73. #define REG_SDIO1_RESP2REG FIO_ADDRESS(SDIO1,0x90010024) /* read */
  74. #define REG_SDIO1_RESP3REG FIO_ADDRESS(SDIO1,0x90010028) /* read */
  75. #define REG_SDIO1_CONTROL00REG FIO_ADDRESS(SDIO1,0x9001002C) /* read/write */
  76. #define REG_SDIO1_PRESENTSTATEREG FIO_ADDRESS(SDIO1,0x90010030) /* read */
  77. #define REG_SDIO1_ARGREG FIO_ADDRESS(SDIO1,0x90010034) /* read/write */
  78. #define REG_SDIO1_CAPREG FIO_ADDRESS(SDIO1,0x90010038) /* read */
  79. #define REG_SDIO1_AUTOCMD12ERRSTATUSREG FIO_ADDRESS(SDIO1,0x9001003C) /* read */
  80. #define REG_SDIO1_BUFFERDATAPORTREG FIO_ADDRESS(SDIO1,0x90010040) /* read/write */
  81. #define REG_SDIO1_MAXCURCAPREG FIO_ADDRESS(SDIO1,0x90010048) /* read/write */
  82. #define REG_SDIO1_SLOTINTSTATUSREG FIO_ADDRESS(SDIO1,0x900100FC) /* read */
  83. /*----------------------------------------------------------------------------*/
  84. /* bit group structures */
  85. /*----------------------------------------------------------------------------*/
  86. typedef union { /* SDIO1_TranModeReg */
  87. U16 all;
  88. struct {
  89. U16 blkcounten : 1;
  90. U16 autocmd12en : 1;
  91. U16 dmaen : 1;
  92. U16 : 1;
  93. U16 msblkselect : 1;
  94. U16 datatradirselect : 1;
  95. U16 : 10;
  96. } bitc;
  97. } GH_SDIO1_TRANMODEREG_S;
  98. typedef union { /* SDIO1_NorIntSigEnReg */
  99. U16 all;
  100. struct {
  101. U16 cmdcompletesigen : 1;
  102. U16 tracompletesigen : 1;
  103. U16 blkgapevesigen : 1;
  104. U16 dmaintsigen : 1;
  105. U16 bufwreadysigen : 1;
  106. U16 bufrreadysigen : 1;
  107. U16 cardinsertionsigen : 1;
  108. U16 cardremsigen : 1;
  109. U16 cardintsigen : 1;
  110. U16 : 6;
  111. U16 fixedto0 : 1;
  112. } bitc;
  113. } GH_SDIO1_NORINTSIGENREG_S;
  114. typedef union { /* SDIO1_ErrIntSigEnReg */
  115. U16 all;
  116. struct {
  117. U16 cmdtimeouterrsigen : 1;
  118. U16 cmdendbiterrsigen : 1;
  119. U16 cmdindexerrsigen : 1;
  120. U16 datatimeouterrsigen : 1;
  121. U16 cmdcrcerrsigen : 1;
  122. U16 datacrcerrsigen : 1;
  123. U16 dataendbiterrsigen : 1;
  124. U16 curlimiterrsigen : 1;
  125. U16 autocmd12errsigen : 1;
  126. U16 : 5;
  127. U16 vendorspecificerrsigen : 2;
  128. } bitc;
  129. } GH_SDIO1_ERRINTSIGENREG_S;
  130. typedef union { /* SDIO1_BlkCouReg */
  131. U16 all;
  132. struct {
  133. U16 blkcountforcurtra : 16;
  134. } bitc;
  135. } GH_SDIO1_BLKCOUREG_S;
  136. typedef union { /* SDIO1_BlkSizeReg */
  137. U16 all;
  138. struct {
  139. U16 trablksize : 12;
  140. U16 hostsdmabufsize : 3;
  141. U16 : 1;
  142. } bitc;
  143. } GH_SDIO1_BLKSIZEREG_S;
  144. typedef union { /* SDIO1_NorIntStaEnReg */
  145. U16 all;
  146. struct {
  147. U16 cmdcompletestatusen : 1;
  148. U16 tracompletestatusen : 1;
  149. U16 blkgapevestatusen : 1;
  150. U16 dmaintstatusen : 1;
  151. U16 bufwreadystatusen : 1;
  152. U16 bufrreadystatusen : 1;
  153. U16 cardinsertionstatusen : 1;
  154. U16 cardremstatusen : 1;
  155. U16 cardintstatusen : 1;
  156. U16 : 6;
  157. U16 fixedto0 : 1;
  158. } bitc;
  159. } GH_SDIO1_NORINTSTAENREG_S;
  160. typedef union { /* SDIO1_ErrIntStaEnReg */
  161. U16 all;
  162. struct {
  163. U16 cmdtimeouterrstatusen : 1;
  164. U16 cmdendbiterrstatusen : 1;
  165. U16 cmdcrcerrstatusen : 1;
  166. U16 cmdindexerrstatusen : 1;
  167. U16 datacrcerrstatusen : 1;
  168. U16 datatimeouterrstatusen : 1;
  169. U16 dataendbiterrstatusen : 1;
  170. U16 curlimiterrstatusen : 1;
  171. U16 autocmd12errstatusen : 1;
  172. U16 : 5;
  173. U16 vendorspecificerrstatusen : 2;
  174. } bitc;
  175. } GH_SDIO1_ERRINTSTAENREG_S;
  176. typedef union { /* SDIO1_NorIntStaReg */
  177. U16 all;
  178. struct {
  179. U16 cmdcomplete : 1;
  180. U16 blkgapevent : 1;
  181. U16 dmaint : 1;
  182. U16 tracomplete : 1;
  183. U16 bufwready : 1;
  184. U16 cardinsertion : 1;
  185. U16 bufrready : 1;
  186. U16 cardremoval : 1;
  187. U16 cardint : 1;
  188. U16 bootackrcv : 1;
  189. U16 : 5;
  190. U16 errint : 1;
  191. } bitc;
  192. } GH_SDIO1_NORINTSTAREG_S;
  193. typedef union { /* SDIO1_ErrIntStatusReg */
  194. U16 all;
  195. struct {
  196. U16 cmdtimeouterr : 1;
  197. U16 cmdcrcerr : 1;
  198. U16 cmdendbiterr : 1;
  199. U16 cmdindexerr : 1;
  200. U16 datatimeouterr : 1;
  201. U16 datacrcerr : 1;
  202. U16 dataendbiterr : 1;
  203. U16 curlimiterr : 1;
  204. U16 autocmd12err : 1;
  205. U16 : 5;
  206. U16 vendorspecificerrstatus : 2;
  207. } bitc;
  208. } GH_SDIO1_ERRINTSTATUSREG_S;
  209. typedef union { /* SDIO1_CommondReg */
  210. U16 all;
  211. struct {
  212. U16 reptypeselect : 2;
  213. U16 : 1;
  214. U16 cmdcrcchecken : 1;
  215. U16 datapreselect : 1;
  216. U16 cmdindexchecken : 1;
  217. U16 cmdtype : 2;
  218. U16 cmdindex : 6;
  219. U16 : 2;
  220. } bitc;
  221. } GH_SDIO1_COMMONDREG_S;
  222. typedef union { /* SDIO1_SoftResetReg */
  223. U16 all;
  224. struct {
  225. U16 datatimeoutcountervalue : 4;
  226. U16 : 4;
  227. U16 softwareresetcmdline : 1;
  228. U16 softwareresetall : 1;
  229. U16 softwareresetdatline : 1;
  230. U16 : 5;
  231. } bitc;
  232. } GH_SDIO1_SOFTRESETREG_S;
  233. typedef union { /* SDIO1_ClkControlReg */
  234. U16 all;
  235. struct {
  236. U16 internalclken : 1;
  237. U16 internalclkstable : 1;
  238. U16 sdclken : 1;
  239. U16 : 5;
  240. U16 sdclkfreselect : 8;
  241. } bitc;
  242. } GH_SDIO1_CLKCONTROLREG_S;
  243. typedef union { /* SDIO1_Control00Reg */
  244. U32 all;
  245. struct {
  246. U32 ledcontrol : 1;
  247. U32 datatrawidth : 1;
  248. U32 sd8bitmode : 1;
  249. U32 hostspeeden : 1;
  250. U32 : 2;
  251. U32 carddetecttestlevel : 1;
  252. U32 carddetectsigdet : 1;
  253. U32 sdbuspower : 1;
  254. U32 sdbusvoltageselect : 3;
  255. U32 : 4;
  256. U32 stopatblkgapreq : 1;
  257. U32 rwaitcontrol : 1;
  258. U32 continuereq : 1;
  259. U32 intatblkgap : 1;
  260. U32 driveccsd : 1;
  261. U32 spimode : 1;
  262. U32 booten : 1;
  263. U32 altbooten : 1;
  264. U32 wakeupevetenoncardins : 1;
  265. U32 wakeupevetenoncardint : 1;
  266. U32 wakeupevetenoncardrem : 1;
  267. U32 : 5;
  268. } bitc;
  269. } GH_SDIO1_CONTROL00REG_S;
  270. typedef union { /* SDIO1_PresentStateReg */
  271. U32 all;
  272. struct {
  273. U32 cmdinhibitcmd : 1;
  274. U32 datalineactive : 1;
  275. U32 cmdinhibitdata : 1;
  276. U32 : 5;
  277. U32 rtraactive : 1;
  278. U32 bufwen : 1;
  279. U32 wtraactive : 1;
  280. U32 bufren : 1;
  281. U32 : 4;
  282. U32 cardinserted : 1;
  283. U32 carddetectpinlevel : 1;
  284. U32 cardstatestable : 1;
  285. U32 wproswipinlevel : 1;
  286. U32 data03linesiglevel : 4;
  287. U32 cmdlinesiglevel : 1;
  288. U32 data47linesiglevel : 4;
  289. U32 : 3;
  290. } bitc;
  291. } GH_SDIO1_PRESENTSTATEREG_S;
  292. typedef union { /* SDIO1_CapReg */
  293. U32 all;
  294. struct {
  295. U32 timeoutclkfre : 6;
  296. U32 : 1;
  297. U32 timeoutclkunit : 1;
  298. U32 baseclkfreforsdclk : 6;
  299. U32 : 2;
  300. U32 maxblklen : 2;
  301. U32 extendedmediabussup : 1;
  302. U32 : 2;
  303. U32 highspeedsup : 1;
  304. U32 susressup : 1;
  305. U32 sdmasup : 1;
  306. U32 voltagesup33v : 1;
  307. U32 voltagesup30v : 1;
  308. U32 voltagesup18v : 1;
  309. U32 intmode : 1;
  310. U32 : 4;
  311. } bitc;
  312. } GH_SDIO1_CAPREG_S;
  313. typedef union { /* SDIO1_AutoCmd12ErrStatusReg */
  314. U32 all;
  315. struct {
  316. U32 autocmd12timeouterr : 1;
  317. U32 autocmd12crcerr : 1;
  318. U32 autocmd12endbiterr : 1;
  319. U32 autocmd12notexe : 1;
  320. U32 autocmd12indexerr : 1;
  321. U32 : 2;
  322. U32 cmdnotissuedbyautocmd12err : 1;
  323. U32 : 24;
  324. } bitc;
  325. } GH_SDIO1_AUTOCMD12ERRSTATUSREG_S;
  326. typedef union { /* SDIO1_MaxCurCapReg */
  327. U32 all;
  328. struct {
  329. U32 maxcurfor33v : 8;
  330. U32 maxcurfor30v : 8;
  331. U32 maxcurfor18v : 8;
  332. U32 : 8;
  333. } bitc;
  334. } GH_SDIO1_MAXCURCAPREG_S;
  335. typedef union { /* SDIO1_SlotIntStatusReg */
  336. U32 all;
  337. struct {
  338. U32 intsigforeachslot : 8;
  339. U32 : 8;
  340. U32 specifivernum : 8;
  341. U32 vendorvernum : 8;
  342. } bitc;
  343. } GH_SDIO1_SLOTINTSTATUSREG_S;
  344. /*----------------------------------------------------------------------------*/
  345. /* mirror variables */
  346. /*----------------------------------------------------------------------------*/
  347. #ifdef __cplusplus
  348. extern "C" {
  349. #endif
  350. /*----------------------------------------------------------------------------*/
  351. /* register SDIO1_SysAddrReg (read/write) */
  352. /*----------------------------------------------------------------------------*/
  353. #if GH_INLINE_LEVEL == 0
  354. /*! \brief Writes the register 'SDIO1_SysAddrReg'. */
  355. void GH_SDIO1_set_SysAddrReg(U32 data);
  356. /*! \brief Reads the register 'SDIO1_SysAddrReg'. */
  357. U32 GH_SDIO1_get_SysAddrReg(void);
  358. #else /* GH_INLINE_LEVEL == 0 */
  359. GH_INLINE void GH_SDIO1_set_SysAddrReg(U32 data)
  360. {
  361. *(volatile U32 *)REG_SDIO1_SYSADDRREG = data;
  362. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  363. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_SysAddrReg] <-- 0x%08x\n",
  364. REG_SDIO1_SYSADDRREG,data,data);
  365. #endif
  366. }
  367. GH_INLINE U32 GH_SDIO1_get_SysAddrReg(void)
  368. {
  369. U32 value = (*(volatile U32 *)REG_SDIO1_SYSADDRREG);
  370. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  371. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_SysAddrReg] --> 0x%08x\n",
  372. REG_SDIO1_SYSADDRREG,value);
  373. #endif
  374. return value;
  375. }
  376. #endif /* GH_INLINE_LEVEL == 0 */
  377. /*----------------------------------------------------------------------------*/
  378. /* register SDIO1_TranModeReg (read/write) */
  379. /*----------------------------------------------------------------------------*/
  380. #if GH_INLINE_LEVEL == 0
  381. /*! \brief Writes the register 'SDIO1_TranModeReg'. */
  382. void GH_SDIO1_set_TranModeReg(U16 data);
  383. /*! \brief Reads the register 'SDIO1_TranModeReg'. */
  384. U16 GH_SDIO1_get_TranModeReg(void);
  385. /*! \brief Writes the bit group 'BlkCountEn' of register 'SDIO1_TranModeReg'. */
  386. void GH_SDIO1_set_TranModeReg_BlkCountEn(U8 data);
  387. /*! \brief Reads the bit group 'BlkCountEn' of register 'SDIO1_TranModeReg'. */
  388. U8 GH_SDIO1_get_TranModeReg_BlkCountEn(void);
  389. /*! \brief Writes the bit group 'AutoCmd12En' of register 'SDIO1_TranModeReg'. */
  390. void GH_SDIO1_set_TranModeReg_AutoCmd12En(U8 data);
  391. /*! \brief Reads the bit group 'AutoCmd12En' of register 'SDIO1_TranModeReg'. */
  392. U8 GH_SDIO1_get_TranModeReg_AutoCmd12En(void);
  393. /*! \brief Writes the bit group 'DmaEn' of register 'SDIO1_TranModeReg'. */
  394. void GH_SDIO1_set_TranModeReg_DmaEn(U8 data);
  395. /*! \brief Reads the bit group 'DmaEn' of register 'SDIO1_TranModeReg'. */
  396. U8 GH_SDIO1_get_TranModeReg_DmaEn(void);
  397. /*! \brief Writes the bit group 'MSBlkSelect' of register 'SDIO1_TranModeReg'. */
  398. void GH_SDIO1_set_TranModeReg_MSBlkSelect(U8 data);
  399. /*! \brief Reads the bit group 'MSBlkSelect' of register 'SDIO1_TranModeReg'. */
  400. U8 GH_SDIO1_get_TranModeReg_MSBlkSelect(void);
  401. /*! \brief Writes the bit group 'DataTraDirSelect' of register 'SDIO1_TranModeReg'. */
  402. void GH_SDIO1_set_TranModeReg_DataTraDirSelect(U8 data);
  403. /*! \brief Reads the bit group 'DataTraDirSelect' of register 'SDIO1_TranModeReg'. */
  404. U8 GH_SDIO1_get_TranModeReg_DataTraDirSelect(void);
  405. #else /* GH_INLINE_LEVEL == 0 */
  406. GH_INLINE void GH_SDIO1_set_TranModeReg(U16 data)
  407. {
  408. *(volatile U16 *)REG_SDIO1_TRANMODEREG = data;
  409. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  410. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeReg] <-- 0x%08x\n",
  411. REG_SDIO1_TRANMODEREG,data,data);
  412. #endif
  413. }
  414. GH_INLINE U16 GH_SDIO1_get_TranModeReg(void)
  415. {
  416. U16 value = (*(volatile U16 *)REG_SDIO1_TRANMODEREG);
  417. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  418. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeReg] --> 0x%08x\n",
  419. REG_SDIO1_TRANMODEREG,value);
  420. #endif
  421. return value;
  422. }
  423. GH_INLINE void GH_SDIO1_set_TranModeReg_BlkCountEn(U8 data)
  424. {
  425. GH_SDIO1_TRANMODEREG_S d;
  426. d.all = *(volatile U16 *)REG_SDIO1_TRANMODEREG;
  427. d.bitc.blkcounten = data;
  428. *(volatile U16 *)REG_SDIO1_TRANMODEREG = d.all;
  429. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  430. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeReg_BlkCountEn] <-- 0x%08x\n",
  431. REG_SDIO1_TRANMODEREG,d.all,d.all);
  432. #endif
  433. }
  434. GH_INLINE U8 GH_SDIO1_get_TranModeReg_BlkCountEn(void)
  435. {
  436. GH_SDIO1_TRANMODEREG_S tmp_value;
  437. U16 value = (*(volatile U16 *)REG_SDIO1_TRANMODEREG);
  438. tmp_value.all = value;
  439. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  440. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeReg_BlkCountEn] --> 0x%08x\n",
  441. REG_SDIO1_TRANMODEREG,value);
  442. #endif
  443. return tmp_value.bitc.blkcounten;
  444. }
  445. GH_INLINE void GH_SDIO1_set_TranModeReg_AutoCmd12En(U8 data)
  446. {
  447. GH_SDIO1_TRANMODEREG_S d;
  448. d.all = *(volatile U16 *)REG_SDIO1_TRANMODEREG;
  449. d.bitc.autocmd12en = data;
  450. *(volatile U16 *)REG_SDIO1_TRANMODEREG = d.all;
  451. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  452. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeReg_AutoCmd12En] <-- 0x%08x\n",
  453. REG_SDIO1_TRANMODEREG,d.all,d.all);
  454. #endif
  455. }
  456. GH_INLINE U8 GH_SDIO1_get_TranModeReg_AutoCmd12En(void)
  457. {
  458. GH_SDIO1_TRANMODEREG_S tmp_value;
  459. U16 value = (*(volatile U16 *)REG_SDIO1_TRANMODEREG);
  460. tmp_value.all = value;
  461. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  462. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeReg_AutoCmd12En] --> 0x%08x\n",
  463. REG_SDIO1_TRANMODEREG,value);
  464. #endif
  465. return tmp_value.bitc.autocmd12en;
  466. }
  467. GH_INLINE void GH_SDIO1_set_TranModeReg_DmaEn(U8 data)
  468. {
  469. GH_SDIO1_TRANMODEREG_S d;
  470. d.all = *(volatile U16 *)REG_SDIO1_TRANMODEREG;
  471. d.bitc.dmaen = data;
  472. *(volatile U16 *)REG_SDIO1_TRANMODEREG = d.all;
  473. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  474. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeReg_DmaEn] <-- 0x%08x\n",
  475. REG_SDIO1_TRANMODEREG,d.all,d.all);
  476. #endif
  477. }
  478. GH_INLINE U8 GH_SDIO1_get_TranModeReg_DmaEn(void)
  479. {
  480. GH_SDIO1_TRANMODEREG_S tmp_value;
  481. U16 value = (*(volatile U16 *)REG_SDIO1_TRANMODEREG);
  482. tmp_value.all = value;
  483. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  484. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeReg_DmaEn] --> 0x%08x\n",
  485. REG_SDIO1_TRANMODEREG,value);
  486. #endif
  487. return tmp_value.bitc.dmaen;
  488. }
  489. GH_INLINE void GH_SDIO1_set_TranModeReg_MSBlkSelect(U8 data)
  490. {
  491. GH_SDIO1_TRANMODEREG_S d;
  492. d.all = *(volatile U16 *)REG_SDIO1_TRANMODEREG;
  493. d.bitc.msblkselect = data;
  494. *(volatile U16 *)REG_SDIO1_TRANMODEREG = d.all;
  495. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  496. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeReg_MSBlkSelect] <-- 0x%08x\n",
  497. REG_SDIO1_TRANMODEREG,d.all,d.all);
  498. #endif
  499. }
  500. GH_INLINE U8 GH_SDIO1_get_TranModeReg_MSBlkSelect(void)
  501. {
  502. GH_SDIO1_TRANMODEREG_S tmp_value;
  503. U16 value = (*(volatile U16 *)REG_SDIO1_TRANMODEREG);
  504. tmp_value.all = value;
  505. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  506. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeReg_MSBlkSelect] --> 0x%08x\n",
  507. REG_SDIO1_TRANMODEREG,value);
  508. #endif
  509. return tmp_value.bitc.msblkselect;
  510. }
  511. GH_INLINE void GH_SDIO1_set_TranModeReg_DataTraDirSelect(U8 data)
  512. {
  513. GH_SDIO1_TRANMODEREG_S d;
  514. d.all = *(volatile U16 *)REG_SDIO1_TRANMODEREG;
  515. d.bitc.datatradirselect = data;
  516. *(volatile U16 *)REG_SDIO1_TRANMODEREG = d.all;
  517. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  518. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeReg_DataTraDirSelect] <-- 0x%08x\n",
  519. REG_SDIO1_TRANMODEREG,d.all,d.all);
  520. #endif
  521. }
  522. GH_INLINE U8 GH_SDIO1_get_TranModeReg_DataTraDirSelect(void)
  523. {
  524. GH_SDIO1_TRANMODEREG_S tmp_value;
  525. U16 value = (*(volatile U16 *)REG_SDIO1_TRANMODEREG);
  526. tmp_value.all = value;
  527. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  528. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeReg_DataTraDirSelect] --> 0x%08x\n",
  529. REG_SDIO1_TRANMODEREG,value);
  530. #endif
  531. return tmp_value.bitc.datatradirselect;
  532. }
  533. #endif /* GH_INLINE_LEVEL == 0 */
  534. /*----------------------------------------------------------------------------*/
  535. /* register SDIO1_NorIntSigEnReg (read/write) */
  536. /*----------------------------------------------------------------------------*/
  537. #if GH_INLINE_LEVEL == 0
  538. /*! \brief Writes the register 'SDIO1_NorIntSigEnReg'. */
  539. void GH_SDIO1_set_NorIntSigEnReg(U16 data);
  540. /*! \brief Reads the register 'SDIO1_NorIntSigEnReg'. */
  541. U16 GH_SDIO1_get_NorIntSigEnReg(void);
  542. /*! \brief Writes the bit group 'CmdCompleteSigEn' of register 'SDIO1_NorIntSigEnReg'. */
  543. void GH_SDIO1_set_NorIntSigEnReg_CmdCompleteSigEn(U8 data);
  544. /*! \brief Reads the bit group 'CmdCompleteSigEn' of register 'SDIO1_NorIntSigEnReg'. */
  545. U8 GH_SDIO1_get_NorIntSigEnReg_CmdCompleteSigEn(void);
  546. /*! \brief Writes the bit group 'TraCompleteSigEn' of register 'SDIO1_NorIntSigEnReg'. */
  547. void GH_SDIO1_set_NorIntSigEnReg_TraCompleteSigEn(U8 data);
  548. /*! \brief Reads the bit group 'TraCompleteSigEn' of register 'SDIO1_NorIntSigEnReg'. */
  549. U8 GH_SDIO1_get_NorIntSigEnReg_TraCompleteSigEn(void);
  550. /*! \brief Writes the bit group 'BlkGapEveSigEn' of register 'SDIO1_NorIntSigEnReg'. */
  551. void GH_SDIO1_set_NorIntSigEnReg_BlkGapEveSigEn(U8 data);
  552. /*! \brief Reads the bit group 'BlkGapEveSigEn' of register 'SDIO1_NorIntSigEnReg'. */
  553. U8 GH_SDIO1_get_NorIntSigEnReg_BlkGapEveSigEn(void);
  554. /*! \brief Writes the bit group 'DmaIntSigEn' of register 'SDIO1_NorIntSigEnReg'. */
  555. void GH_SDIO1_set_NorIntSigEnReg_DmaIntSigEn(U8 data);
  556. /*! \brief Reads the bit group 'DmaIntSigEn' of register 'SDIO1_NorIntSigEnReg'. */
  557. U8 GH_SDIO1_get_NorIntSigEnReg_DmaIntSigEn(void);
  558. /*! \brief Writes the bit group 'BufWReadySigEn' of register 'SDIO1_NorIntSigEnReg'. */
  559. void GH_SDIO1_set_NorIntSigEnReg_BufWReadySigEn(U8 data);
  560. /*! \brief Reads the bit group 'BufWReadySigEn' of register 'SDIO1_NorIntSigEnReg'. */
  561. U8 GH_SDIO1_get_NorIntSigEnReg_BufWReadySigEn(void);
  562. /*! \brief Writes the bit group 'BufRReadySigEn' of register 'SDIO1_NorIntSigEnReg'. */
  563. void GH_SDIO1_set_NorIntSigEnReg_BufRReadySigEn(U8 data);
  564. /*! \brief Reads the bit group 'BufRReadySigEn' of register 'SDIO1_NorIntSigEnReg'. */
  565. U8 GH_SDIO1_get_NorIntSigEnReg_BufRReadySigEn(void);
  566. /*! \brief Writes the bit group 'CardInsertionSigEn' of register 'SDIO1_NorIntSigEnReg'. */
  567. void GH_SDIO1_set_NorIntSigEnReg_CardInsertionSigEn(U8 data);
  568. /*! \brief Reads the bit group 'CardInsertionSigEn' of register 'SDIO1_NorIntSigEnReg'. */
  569. U8 GH_SDIO1_get_NorIntSigEnReg_CardInsertionSigEn(void);
  570. /*! \brief Writes the bit group 'CardRemSigEn' of register 'SDIO1_NorIntSigEnReg'. */
  571. void GH_SDIO1_set_NorIntSigEnReg_CardRemSigEn(U8 data);
  572. /*! \brief Reads the bit group 'CardRemSigEn' of register 'SDIO1_NorIntSigEnReg'. */
  573. U8 GH_SDIO1_get_NorIntSigEnReg_CardRemSigEn(void);
  574. /*! \brief Writes the bit group 'CardIntSigEN' of register 'SDIO1_NorIntSigEnReg'. */
  575. void GH_SDIO1_set_NorIntSigEnReg_CardIntSigEN(U8 data);
  576. /*! \brief Reads the bit group 'CardIntSigEN' of register 'SDIO1_NorIntSigEnReg'. */
  577. U8 GH_SDIO1_get_NorIntSigEnReg_CardIntSigEN(void);
  578. /*! \brief Writes the bit group 'FixedTo0' of register 'SDIO1_NorIntSigEnReg'. */
  579. void GH_SDIO1_set_NorIntSigEnReg_FixedTo0(U8 data);
  580. /*! \brief Reads the bit group 'FixedTo0' of register 'SDIO1_NorIntSigEnReg'. */
  581. U8 GH_SDIO1_get_NorIntSigEnReg_FixedTo0(void);
  582. #else /* GH_INLINE_LEVEL == 0 */
  583. GH_INLINE void GH_SDIO1_set_NorIntSigEnReg(U16 data)
  584. {
  585. *(volatile U16 *)REG_SDIO1_NORINTSIGENREG = data;
  586. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  587. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntSigEnReg] <-- 0x%08x\n",
  588. REG_SDIO1_NORINTSIGENREG,data,data);
  589. #endif
  590. }
  591. GH_INLINE U16 GH_SDIO1_get_NorIntSigEnReg(void)
  592. {
  593. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSIGENREG);
  594. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  595. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntSigEnReg] --> 0x%08x\n",
  596. REG_SDIO1_NORINTSIGENREG,value);
  597. #endif
  598. return value;
  599. }
  600. GH_INLINE void GH_SDIO1_set_NorIntSigEnReg_CmdCompleteSigEn(U8 data)
  601. {
  602. GH_SDIO1_NORINTSIGENREG_S d;
  603. d.all = *(volatile U16 *)REG_SDIO1_NORINTSIGENREG;
  604. d.bitc.cmdcompletesigen = data;
  605. *(volatile U16 *)REG_SDIO1_NORINTSIGENREG = d.all;
  606. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  607. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntSigEnReg_CmdCompleteSigEn] <-- 0x%08x\n",
  608. REG_SDIO1_NORINTSIGENREG,d.all,d.all);
  609. #endif
  610. }
  611. GH_INLINE U8 GH_SDIO1_get_NorIntSigEnReg_CmdCompleteSigEn(void)
  612. {
  613. GH_SDIO1_NORINTSIGENREG_S tmp_value;
  614. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSIGENREG);
  615. tmp_value.all = value;
  616. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  617. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntSigEnReg_CmdCompleteSigEn] --> 0x%08x\n",
  618. REG_SDIO1_NORINTSIGENREG,value);
  619. #endif
  620. return tmp_value.bitc.cmdcompletesigen;
  621. }
  622. GH_INLINE void GH_SDIO1_set_NorIntSigEnReg_TraCompleteSigEn(U8 data)
  623. {
  624. GH_SDIO1_NORINTSIGENREG_S d;
  625. d.all = *(volatile U16 *)REG_SDIO1_NORINTSIGENREG;
  626. d.bitc.tracompletesigen = data;
  627. *(volatile U16 *)REG_SDIO1_NORINTSIGENREG = d.all;
  628. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  629. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntSigEnReg_TraCompleteSigEn] <-- 0x%08x\n",
  630. REG_SDIO1_NORINTSIGENREG,d.all,d.all);
  631. #endif
  632. }
  633. GH_INLINE U8 GH_SDIO1_get_NorIntSigEnReg_TraCompleteSigEn(void)
  634. {
  635. GH_SDIO1_NORINTSIGENREG_S tmp_value;
  636. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSIGENREG);
  637. tmp_value.all = value;
  638. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  639. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntSigEnReg_TraCompleteSigEn] --> 0x%08x\n",
  640. REG_SDIO1_NORINTSIGENREG,value);
  641. #endif
  642. return tmp_value.bitc.tracompletesigen;
  643. }
  644. GH_INLINE void GH_SDIO1_set_NorIntSigEnReg_BlkGapEveSigEn(U8 data)
  645. {
  646. GH_SDIO1_NORINTSIGENREG_S d;
  647. d.all = *(volatile U16 *)REG_SDIO1_NORINTSIGENREG;
  648. d.bitc.blkgapevesigen = data;
  649. *(volatile U16 *)REG_SDIO1_NORINTSIGENREG = d.all;
  650. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  651. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntSigEnReg_BlkGapEveSigEn] <-- 0x%08x\n",
  652. REG_SDIO1_NORINTSIGENREG,d.all,d.all);
  653. #endif
  654. }
  655. GH_INLINE U8 GH_SDIO1_get_NorIntSigEnReg_BlkGapEveSigEn(void)
  656. {
  657. GH_SDIO1_NORINTSIGENREG_S tmp_value;
  658. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSIGENREG);
  659. tmp_value.all = value;
  660. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  661. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntSigEnReg_BlkGapEveSigEn] --> 0x%08x\n",
  662. REG_SDIO1_NORINTSIGENREG,value);
  663. #endif
  664. return tmp_value.bitc.blkgapevesigen;
  665. }
  666. GH_INLINE void GH_SDIO1_set_NorIntSigEnReg_DmaIntSigEn(U8 data)
  667. {
  668. GH_SDIO1_NORINTSIGENREG_S d;
  669. d.all = *(volatile U16 *)REG_SDIO1_NORINTSIGENREG;
  670. d.bitc.dmaintsigen = data;
  671. *(volatile U16 *)REG_SDIO1_NORINTSIGENREG = d.all;
  672. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  673. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntSigEnReg_DmaIntSigEn] <-- 0x%08x\n",
  674. REG_SDIO1_NORINTSIGENREG,d.all,d.all);
  675. #endif
  676. }
  677. GH_INLINE U8 GH_SDIO1_get_NorIntSigEnReg_DmaIntSigEn(void)
  678. {
  679. GH_SDIO1_NORINTSIGENREG_S tmp_value;
  680. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSIGENREG);
  681. tmp_value.all = value;
  682. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  683. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntSigEnReg_DmaIntSigEn] --> 0x%08x\n",
  684. REG_SDIO1_NORINTSIGENREG,value);
  685. #endif
  686. return tmp_value.bitc.dmaintsigen;
  687. }
  688. GH_INLINE void GH_SDIO1_set_NorIntSigEnReg_BufWReadySigEn(U8 data)
  689. {
  690. GH_SDIO1_NORINTSIGENREG_S d;
  691. d.all = *(volatile U16 *)REG_SDIO1_NORINTSIGENREG;
  692. d.bitc.bufwreadysigen = data;
  693. *(volatile U16 *)REG_SDIO1_NORINTSIGENREG = d.all;
  694. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  695. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntSigEnReg_BufWReadySigEn] <-- 0x%08x\n",
  696. REG_SDIO1_NORINTSIGENREG,d.all,d.all);
  697. #endif
  698. }
  699. GH_INLINE U8 GH_SDIO1_get_NorIntSigEnReg_BufWReadySigEn(void)
  700. {
  701. GH_SDIO1_NORINTSIGENREG_S tmp_value;
  702. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSIGENREG);
  703. tmp_value.all = value;
  704. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  705. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntSigEnReg_BufWReadySigEn] --> 0x%08x\n",
  706. REG_SDIO1_NORINTSIGENREG,value);
  707. #endif
  708. return tmp_value.bitc.bufwreadysigen;
  709. }
  710. GH_INLINE void GH_SDIO1_set_NorIntSigEnReg_BufRReadySigEn(U8 data)
  711. {
  712. GH_SDIO1_NORINTSIGENREG_S d;
  713. d.all = *(volatile U16 *)REG_SDIO1_NORINTSIGENREG;
  714. d.bitc.bufrreadysigen = data;
  715. *(volatile U16 *)REG_SDIO1_NORINTSIGENREG = d.all;
  716. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  717. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntSigEnReg_BufRReadySigEn] <-- 0x%08x\n",
  718. REG_SDIO1_NORINTSIGENREG,d.all,d.all);
  719. #endif
  720. }
  721. GH_INLINE U8 GH_SDIO1_get_NorIntSigEnReg_BufRReadySigEn(void)
  722. {
  723. GH_SDIO1_NORINTSIGENREG_S tmp_value;
  724. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSIGENREG);
  725. tmp_value.all = value;
  726. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  727. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntSigEnReg_BufRReadySigEn] --> 0x%08x\n",
  728. REG_SDIO1_NORINTSIGENREG,value);
  729. #endif
  730. return tmp_value.bitc.bufrreadysigen;
  731. }
  732. GH_INLINE void GH_SDIO1_set_NorIntSigEnReg_CardInsertionSigEn(U8 data)
  733. {
  734. GH_SDIO1_NORINTSIGENREG_S d;
  735. d.all = *(volatile U16 *)REG_SDIO1_NORINTSIGENREG;
  736. d.bitc.cardinsertionsigen = data;
  737. *(volatile U16 *)REG_SDIO1_NORINTSIGENREG = d.all;
  738. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  739. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntSigEnReg_CardInsertionSigEn] <-- 0x%08x\n",
  740. REG_SDIO1_NORINTSIGENREG,d.all,d.all);
  741. #endif
  742. }
  743. GH_INLINE U8 GH_SDIO1_get_NorIntSigEnReg_CardInsertionSigEn(void)
  744. {
  745. GH_SDIO1_NORINTSIGENREG_S tmp_value;
  746. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSIGENREG);
  747. tmp_value.all = value;
  748. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  749. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntSigEnReg_CardInsertionSigEn] --> 0x%08x\n",
  750. REG_SDIO1_NORINTSIGENREG,value);
  751. #endif
  752. return tmp_value.bitc.cardinsertionsigen;
  753. }
  754. GH_INLINE void GH_SDIO1_set_NorIntSigEnReg_CardRemSigEn(U8 data)
  755. {
  756. GH_SDIO1_NORINTSIGENREG_S d;
  757. d.all = *(volatile U16 *)REG_SDIO1_NORINTSIGENREG;
  758. d.bitc.cardremsigen = data;
  759. *(volatile U16 *)REG_SDIO1_NORINTSIGENREG = d.all;
  760. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  761. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntSigEnReg_CardRemSigEn] <-- 0x%08x\n",
  762. REG_SDIO1_NORINTSIGENREG,d.all,d.all);
  763. #endif
  764. }
  765. GH_INLINE U8 GH_SDIO1_get_NorIntSigEnReg_CardRemSigEn(void)
  766. {
  767. GH_SDIO1_NORINTSIGENREG_S tmp_value;
  768. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSIGENREG);
  769. tmp_value.all = value;
  770. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  771. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntSigEnReg_CardRemSigEn] --> 0x%08x\n",
  772. REG_SDIO1_NORINTSIGENREG,value);
  773. #endif
  774. return tmp_value.bitc.cardremsigen;
  775. }
  776. GH_INLINE void GH_SDIO1_set_NorIntSigEnReg_CardIntSigEN(U8 data)
  777. {
  778. GH_SDIO1_NORINTSIGENREG_S d;
  779. d.all = *(volatile U16 *)REG_SDIO1_NORINTSIGENREG;
  780. d.bitc.cardintsigen = data;
  781. *(volatile U16 *)REG_SDIO1_NORINTSIGENREG = d.all;
  782. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  783. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntSigEnReg_CardIntSigEN] <-- 0x%08x\n",
  784. REG_SDIO1_NORINTSIGENREG,d.all,d.all);
  785. #endif
  786. }
  787. GH_INLINE U8 GH_SDIO1_get_NorIntSigEnReg_CardIntSigEN(void)
  788. {
  789. GH_SDIO1_NORINTSIGENREG_S tmp_value;
  790. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSIGENREG);
  791. tmp_value.all = value;
  792. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  793. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntSigEnReg_CardIntSigEN] --> 0x%08x\n",
  794. REG_SDIO1_NORINTSIGENREG,value);
  795. #endif
  796. return tmp_value.bitc.cardintsigen;
  797. }
  798. GH_INLINE void GH_SDIO1_set_NorIntSigEnReg_FixedTo0(U8 data)
  799. {
  800. GH_SDIO1_NORINTSIGENREG_S d;
  801. d.all = *(volatile U16 *)REG_SDIO1_NORINTSIGENREG;
  802. d.bitc.fixedto0 = data;
  803. *(volatile U16 *)REG_SDIO1_NORINTSIGENREG = d.all;
  804. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  805. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntSigEnReg_FixedTo0] <-- 0x%08x\n",
  806. REG_SDIO1_NORINTSIGENREG,d.all,d.all);
  807. #endif
  808. }
  809. GH_INLINE U8 GH_SDIO1_get_NorIntSigEnReg_FixedTo0(void)
  810. {
  811. GH_SDIO1_NORINTSIGENREG_S tmp_value;
  812. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSIGENREG);
  813. tmp_value.all = value;
  814. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  815. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntSigEnReg_FixedTo0] --> 0x%08x\n",
  816. REG_SDIO1_NORINTSIGENREG,value);
  817. #endif
  818. return tmp_value.bitc.fixedto0;
  819. }
  820. #endif /* GH_INLINE_LEVEL == 0 */
  821. /*----------------------------------------------------------------------------*/
  822. /* register SDIO1_ErrIntSigEnReg (read/write) */
  823. /*----------------------------------------------------------------------------*/
  824. #if GH_INLINE_LEVEL == 0
  825. /*! \brief Writes the register 'SDIO1_ErrIntSigEnReg'. */
  826. void GH_SDIO1_set_ErrIntSigEnReg(U16 data);
  827. /*! \brief Reads the register 'SDIO1_ErrIntSigEnReg'. */
  828. U16 GH_SDIO1_get_ErrIntSigEnReg(void);
  829. /*! \brief Writes the bit group 'CmdTimeoutErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  830. void GH_SDIO1_set_ErrIntSigEnReg_CmdTimeoutErrSigEn(U8 data);
  831. /*! \brief Reads the bit group 'CmdTimeoutErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  832. U8 GH_SDIO1_get_ErrIntSigEnReg_CmdTimeoutErrSigEn(void);
  833. /*! \brief Writes the bit group 'CmdEndBitErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  834. void GH_SDIO1_set_ErrIntSigEnReg_CmdEndBitErrSigEn(U8 data);
  835. /*! \brief Reads the bit group 'CmdEndBitErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  836. U8 GH_SDIO1_get_ErrIntSigEnReg_CmdEndBitErrSigEn(void);
  837. /*! \brief Writes the bit group 'CmdIndexErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  838. void GH_SDIO1_set_ErrIntSigEnReg_CmdIndexErrSigEn(U8 data);
  839. /*! \brief Reads the bit group 'CmdIndexErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  840. U8 GH_SDIO1_get_ErrIntSigEnReg_CmdIndexErrSigEn(void);
  841. /*! \brief Writes the bit group 'DataTimeoutErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  842. void GH_SDIO1_set_ErrIntSigEnReg_DataTimeoutErrSigEn(U8 data);
  843. /*! \brief Reads the bit group 'DataTimeoutErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  844. U8 GH_SDIO1_get_ErrIntSigEnReg_DataTimeoutErrSigEn(void);
  845. /*! \brief Writes the bit group 'CmdCrcErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  846. void GH_SDIO1_set_ErrIntSigEnReg_CmdCrcErrSigEn(U8 data);
  847. /*! \brief Reads the bit group 'CmdCrcErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  848. U8 GH_SDIO1_get_ErrIntSigEnReg_CmdCrcErrSigEn(void);
  849. /*! \brief Writes the bit group 'DataCrcErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  850. void GH_SDIO1_set_ErrIntSigEnReg_DataCrcErrSigEn(U8 data);
  851. /*! \brief Reads the bit group 'DataCrcErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  852. U8 GH_SDIO1_get_ErrIntSigEnReg_DataCrcErrSigEn(void);
  853. /*! \brief Writes the bit group 'DataEndBitErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  854. void GH_SDIO1_set_ErrIntSigEnReg_DataEndBitErrSigEn(U8 data);
  855. /*! \brief Reads the bit group 'DataEndBitErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  856. U8 GH_SDIO1_get_ErrIntSigEnReg_DataEndBitErrSigEn(void);
  857. /*! \brief Writes the bit group 'CurLimitErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  858. void GH_SDIO1_set_ErrIntSigEnReg_CurLimitErrSigEn(U8 data);
  859. /*! \brief Reads the bit group 'CurLimitErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  860. U8 GH_SDIO1_get_ErrIntSigEnReg_CurLimitErrSigEn(void);
  861. /*! \brief Writes the bit group 'AutoCmd12ErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  862. void GH_SDIO1_set_ErrIntSigEnReg_AutoCmd12ErrSigEn(U8 data);
  863. /*! \brief Reads the bit group 'AutoCmd12ErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  864. U8 GH_SDIO1_get_ErrIntSigEnReg_AutoCmd12ErrSigEn(void);
  865. /*! \brief Writes the bit group 'VendorSpecificErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  866. void GH_SDIO1_set_ErrIntSigEnReg_VendorSpecificErrSigEn(U8 data);
  867. /*! \brief Reads the bit group 'VendorSpecificErrSigEn' of register 'SDIO1_ErrIntSigEnReg'. */
  868. U8 GH_SDIO1_get_ErrIntSigEnReg_VendorSpecificErrSigEn(void);
  869. #else /* GH_INLINE_LEVEL == 0 */
  870. GH_INLINE void GH_SDIO1_set_ErrIntSigEnReg(U16 data)
  871. {
  872. *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG = data;
  873. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  874. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnReg] <-- 0x%08x\n",
  875. REG_SDIO1_ERRINTSIGENREG,data,data);
  876. #endif
  877. }
  878. GH_INLINE U16 GH_SDIO1_get_ErrIntSigEnReg(void)
  879. {
  880. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSIGENREG);
  881. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  882. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnReg] --> 0x%08x\n",
  883. REG_SDIO1_ERRINTSIGENREG,value);
  884. #endif
  885. return value;
  886. }
  887. GH_INLINE void GH_SDIO1_set_ErrIntSigEnReg_CmdTimeoutErrSigEn(U8 data)
  888. {
  889. GH_SDIO1_ERRINTSIGENREG_S d;
  890. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG;
  891. d.bitc.cmdtimeouterrsigen = data;
  892. *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG = d.all;
  893. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  894. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnReg_CmdTimeoutErrSigEn] <-- 0x%08x\n",
  895. REG_SDIO1_ERRINTSIGENREG,d.all,d.all);
  896. #endif
  897. }
  898. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnReg_CmdTimeoutErrSigEn(void)
  899. {
  900. GH_SDIO1_ERRINTSIGENREG_S tmp_value;
  901. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSIGENREG);
  902. tmp_value.all = value;
  903. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  904. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnReg_CmdTimeoutErrSigEn] --> 0x%08x\n",
  905. REG_SDIO1_ERRINTSIGENREG,value);
  906. #endif
  907. return tmp_value.bitc.cmdtimeouterrsigen;
  908. }
  909. GH_INLINE void GH_SDIO1_set_ErrIntSigEnReg_CmdEndBitErrSigEn(U8 data)
  910. {
  911. GH_SDIO1_ERRINTSIGENREG_S d;
  912. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG;
  913. d.bitc.cmdendbiterrsigen = data;
  914. *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG = d.all;
  915. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  916. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnReg_CmdEndBitErrSigEn] <-- 0x%08x\n",
  917. REG_SDIO1_ERRINTSIGENREG,d.all,d.all);
  918. #endif
  919. }
  920. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnReg_CmdEndBitErrSigEn(void)
  921. {
  922. GH_SDIO1_ERRINTSIGENREG_S tmp_value;
  923. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSIGENREG);
  924. tmp_value.all = value;
  925. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  926. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnReg_CmdEndBitErrSigEn] --> 0x%08x\n",
  927. REG_SDIO1_ERRINTSIGENREG,value);
  928. #endif
  929. return tmp_value.bitc.cmdendbiterrsigen;
  930. }
  931. GH_INLINE void GH_SDIO1_set_ErrIntSigEnReg_CmdIndexErrSigEn(U8 data)
  932. {
  933. GH_SDIO1_ERRINTSIGENREG_S d;
  934. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG;
  935. d.bitc.cmdindexerrsigen = data;
  936. *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG = d.all;
  937. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  938. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnReg_CmdIndexErrSigEn] <-- 0x%08x\n",
  939. REG_SDIO1_ERRINTSIGENREG,d.all,d.all);
  940. #endif
  941. }
  942. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnReg_CmdIndexErrSigEn(void)
  943. {
  944. GH_SDIO1_ERRINTSIGENREG_S tmp_value;
  945. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSIGENREG);
  946. tmp_value.all = value;
  947. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  948. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnReg_CmdIndexErrSigEn] --> 0x%08x\n",
  949. REG_SDIO1_ERRINTSIGENREG,value);
  950. #endif
  951. return tmp_value.bitc.cmdindexerrsigen;
  952. }
  953. GH_INLINE void GH_SDIO1_set_ErrIntSigEnReg_DataTimeoutErrSigEn(U8 data)
  954. {
  955. GH_SDIO1_ERRINTSIGENREG_S d;
  956. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG;
  957. d.bitc.datatimeouterrsigen = data;
  958. *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG = d.all;
  959. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  960. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnReg_DataTimeoutErrSigEn] <-- 0x%08x\n",
  961. REG_SDIO1_ERRINTSIGENREG,d.all,d.all);
  962. #endif
  963. }
  964. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnReg_DataTimeoutErrSigEn(void)
  965. {
  966. GH_SDIO1_ERRINTSIGENREG_S tmp_value;
  967. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSIGENREG);
  968. tmp_value.all = value;
  969. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  970. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnReg_DataTimeoutErrSigEn] --> 0x%08x\n",
  971. REG_SDIO1_ERRINTSIGENREG,value);
  972. #endif
  973. return tmp_value.bitc.datatimeouterrsigen;
  974. }
  975. GH_INLINE void GH_SDIO1_set_ErrIntSigEnReg_CmdCrcErrSigEn(U8 data)
  976. {
  977. GH_SDIO1_ERRINTSIGENREG_S d;
  978. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG;
  979. d.bitc.cmdcrcerrsigen = data;
  980. *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG = d.all;
  981. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  982. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnReg_CmdCrcErrSigEn] <-- 0x%08x\n",
  983. REG_SDIO1_ERRINTSIGENREG,d.all,d.all);
  984. #endif
  985. }
  986. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnReg_CmdCrcErrSigEn(void)
  987. {
  988. GH_SDIO1_ERRINTSIGENREG_S tmp_value;
  989. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSIGENREG);
  990. tmp_value.all = value;
  991. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  992. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnReg_CmdCrcErrSigEn] --> 0x%08x\n",
  993. REG_SDIO1_ERRINTSIGENREG,value);
  994. #endif
  995. return tmp_value.bitc.cmdcrcerrsigen;
  996. }
  997. GH_INLINE void GH_SDIO1_set_ErrIntSigEnReg_DataCrcErrSigEn(U8 data)
  998. {
  999. GH_SDIO1_ERRINTSIGENREG_S d;
  1000. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG;
  1001. d.bitc.datacrcerrsigen = data;
  1002. *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG = d.all;
  1003. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1004. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnReg_DataCrcErrSigEn] <-- 0x%08x\n",
  1005. REG_SDIO1_ERRINTSIGENREG,d.all,d.all);
  1006. #endif
  1007. }
  1008. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnReg_DataCrcErrSigEn(void)
  1009. {
  1010. GH_SDIO1_ERRINTSIGENREG_S tmp_value;
  1011. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSIGENREG);
  1012. tmp_value.all = value;
  1013. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1014. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnReg_DataCrcErrSigEn] --> 0x%08x\n",
  1015. REG_SDIO1_ERRINTSIGENREG,value);
  1016. #endif
  1017. return tmp_value.bitc.datacrcerrsigen;
  1018. }
  1019. GH_INLINE void GH_SDIO1_set_ErrIntSigEnReg_DataEndBitErrSigEn(U8 data)
  1020. {
  1021. GH_SDIO1_ERRINTSIGENREG_S d;
  1022. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG;
  1023. d.bitc.dataendbiterrsigen = data;
  1024. *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG = d.all;
  1025. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1026. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnReg_DataEndBitErrSigEn] <-- 0x%08x\n",
  1027. REG_SDIO1_ERRINTSIGENREG,d.all,d.all);
  1028. #endif
  1029. }
  1030. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnReg_DataEndBitErrSigEn(void)
  1031. {
  1032. GH_SDIO1_ERRINTSIGENREG_S tmp_value;
  1033. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSIGENREG);
  1034. tmp_value.all = value;
  1035. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1036. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnReg_DataEndBitErrSigEn] --> 0x%08x\n",
  1037. REG_SDIO1_ERRINTSIGENREG,value);
  1038. #endif
  1039. return tmp_value.bitc.dataendbiterrsigen;
  1040. }
  1041. GH_INLINE void GH_SDIO1_set_ErrIntSigEnReg_CurLimitErrSigEn(U8 data)
  1042. {
  1043. GH_SDIO1_ERRINTSIGENREG_S d;
  1044. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG;
  1045. d.bitc.curlimiterrsigen = data;
  1046. *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG = d.all;
  1047. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1048. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnReg_CurLimitErrSigEn] <-- 0x%08x\n",
  1049. REG_SDIO1_ERRINTSIGENREG,d.all,d.all);
  1050. #endif
  1051. }
  1052. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnReg_CurLimitErrSigEn(void)
  1053. {
  1054. GH_SDIO1_ERRINTSIGENREG_S tmp_value;
  1055. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSIGENREG);
  1056. tmp_value.all = value;
  1057. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1058. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnReg_CurLimitErrSigEn] --> 0x%08x\n",
  1059. REG_SDIO1_ERRINTSIGENREG,value);
  1060. #endif
  1061. return tmp_value.bitc.curlimiterrsigen;
  1062. }
  1063. GH_INLINE void GH_SDIO1_set_ErrIntSigEnReg_AutoCmd12ErrSigEn(U8 data)
  1064. {
  1065. GH_SDIO1_ERRINTSIGENREG_S d;
  1066. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG;
  1067. d.bitc.autocmd12errsigen = data;
  1068. *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG = d.all;
  1069. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1070. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnReg_AutoCmd12ErrSigEn] <-- 0x%08x\n",
  1071. REG_SDIO1_ERRINTSIGENREG,d.all,d.all);
  1072. #endif
  1073. }
  1074. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnReg_AutoCmd12ErrSigEn(void)
  1075. {
  1076. GH_SDIO1_ERRINTSIGENREG_S tmp_value;
  1077. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSIGENREG);
  1078. tmp_value.all = value;
  1079. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1080. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnReg_AutoCmd12ErrSigEn] --> 0x%08x\n",
  1081. REG_SDIO1_ERRINTSIGENREG,value);
  1082. #endif
  1083. return tmp_value.bitc.autocmd12errsigen;
  1084. }
  1085. GH_INLINE void GH_SDIO1_set_ErrIntSigEnReg_VendorSpecificErrSigEn(U8 data)
  1086. {
  1087. GH_SDIO1_ERRINTSIGENREG_S d;
  1088. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG;
  1089. d.bitc.vendorspecificerrsigen = data;
  1090. *(volatile U16 *)REG_SDIO1_ERRINTSIGENREG = d.all;
  1091. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1092. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnReg_VendorSpecificErrSigEn] <-- 0x%08x\n",
  1093. REG_SDIO1_ERRINTSIGENREG,d.all,d.all);
  1094. #endif
  1095. }
  1096. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnReg_VendorSpecificErrSigEn(void)
  1097. {
  1098. GH_SDIO1_ERRINTSIGENREG_S tmp_value;
  1099. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSIGENREG);
  1100. tmp_value.all = value;
  1101. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1102. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnReg_VendorSpecificErrSigEn] --> 0x%08x\n",
  1103. REG_SDIO1_ERRINTSIGENREG,value);
  1104. #endif
  1105. return tmp_value.bitc.vendorspecificerrsigen;
  1106. }
  1107. #endif /* GH_INLINE_LEVEL == 0 */
  1108. /*----------------------------------------------------------------------------*/
  1109. /* register SDIO1_BlkCouReg (read/write) */
  1110. /*----------------------------------------------------------------------------*/
  1111. #if GH_INLINE_LEVEL == 0
  1112. /*! \brief Writes the register 'SDIO1_BlkCouReg'. */
  1113. void GH_SDIO1_set_BlkCouReg(U16 data);
  1114. /*! \brief Reads the register 'SDIO1_BlkCouReg'. */
  1115. U16 GH_SDIO1_get_BlkCouReg(void);
  1116. /*! \brief Writes the bit group 'BlkCountForCurTra' of register 'SDIO1_BlkCouReg'. */
  1117. void GH_SDIO1_set_BlkCouReg_BlkCountForCurTra(U16 data);
  1118. /*! \brief Reads the bit group 'BlkCountForCurTra' of register 'SDIO1_BlkCouReg'. */
  1119. U16 GH_SDIO1_get_BlkCouReg_BlkCountForCurTra(void);
  1120. #else /* GH_INLINE_LEVEL == 0 */
  1121. GH_INLINE void GH_SDIO1_set_BlkCouReg(U16 data)
  1122. {
  1123. *(volatile U16 *)REG_SDIO1_BLKCOUREG = data;
  1124. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1125. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkCouReg] <-- 0x%08x\n",
  1126. REG_SDIO1_BLKCOUREG,data,data);
  1127. #endif
  1128. }
  1129. GH_INLINE U16 GH_SDIO1_get_BlkCouReg(void)
  1130. {
  1131. U16 value = (*(volatile U16 *)REG_SDIO1_BLKCOUREG);
  1132. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1133. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkCouReg] --> 0x%08x\n",
  1134. REG_SDIO1_BLKCOUREG,value);
  1135. #endif
  1136. return value;
  1137. }
  1138. GH_INLINE void GH_SDIO1_set_BlkCouReg_BlkCountForCurTra(U16 data)
  1139. {
  1140. GH_SDIO1_BLKCOUREG_S d;
  1141. d.all = *(volatile U16 *)REG_SDIO1_BLKCOUREG;
  1142. d.bitc.blkcountforcurtra = data;
  1143. *(volatile U16 *)REG_SDIO1_BLKCOUREG = d.all;
  1144. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1145. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkCouReg_BlkCountForCurTra] <-- 0x%08x\n",
  1146. REG_SDIO1_BLKCOUREG,d.all,d.all);
  1147. #endif
  1148. }
  1149. GH_INLINE U16 GH_SDIO1_get_BlkCouReg_BlkCountForCurTra(void)
  1150. {
  1151. GH_SDIO1_BLKCOUREG_S tmp_value;
  1152. U16 value = (*(volatile U16 *)REG_SDIO1_BLKCOUREG);
  1153. tmp_value.all = value;
  1154. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1155. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkCouReg_BlkCountForCurTra] --> 0x%08x\n",
  1156. REG_SDIO1_BLKCOUREG,value);
  1157. #endif
  1158. return tmp_value.bitc.blkcountforcurtra;
  1159. }
  1160. #endif /* GH_INLINE_LEVEL == 0 */
  1161. /*----------------------------------------------------------------------------*/
  1162. /* register SDIO1_BlkSizeReg (read/write) */
  1163. /*----------------------------------------------------------------------------*/
  1164. #if GH_INLINE_LEVEL == 0
  1165. /*! \brief Writes the register 'SDIO1_BlkSizeReg'. */
  1166. void GH_SDIO1_set_BlkSizeReg(U16 data);
  1167. /*! \brief Reads the register 'SDIO1_BlkSizeReg'. */
  1168. U16 GH_SDIO1_get_BlkSizeReg(void);
  1169. /*! \brief Writes the bit group 'TraBlkSize' of register 'SDIO1_BlkSizeReg'. */
  1170. void GH_SDIO1_set_BlkSizeReg_TraBlkSize(U16 data);
  1171. /*! \brief Reads the bit group 'TraBlkSize' of register 'SDIO1_BlkSizeReg'. */
  1172. U16 GH_SDIO1_get_BlkSizeReg_TraBlkSize(void);
  1173. /*! \brief Writes the bit group 'HostSdmaBufSize' of register 'SDIO1_BlkSizeReg'. */
  1174. void GH_SDIO1_set_BlkSizeReg_HostSdmaBufSize(U8 data);
  1175. /*! \brief Reads the bit group 'HostSdmaBufSize' of register 'SDIO1_BlkSizeReg'. */
  1176. U8 GH_SDIO1_get_BlkSizeReg_HostSdmaBufSize(void);
  1177. #else /* GH_INLINE_LEVEL == 0 */
  1178. GH_INLINE void GH_SDIO1_set_BlkSizeReg(U16 data)
  1179. {
  1180. *(volatile U16 *)REG_SDIO1_BLKSIZEREG = data;
  1181. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1182. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkSizeReg] <-- 0x%08x\n",
  1183. REG_SDIO1_BLKSIZEREG,data,data);
  1184. #endif
  1185. }
  1186. GH_INLINE U16 GH_SDIO1_get_BlkSizeReg(void)
  1187. {
  1188. U16 value = (*(volatile U16 *)REG_SDIO1_BLKSIZEREG);
  1189. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1190. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkSizeReg] --> 0x%08x\n",
  1191. REG_SDIO1_BLKSIZEREG,value);
  1192. #endif
  1193. return value;
  1194. }
  1195. GH_INLINE void GH_SDIO1_set_BlkSizeReg_TraBlkSize(U16 data)
  1196. {
  1197. GH_SDIO1_BLKSIZEREG_S d;
  1198. d.all = *(volatile U16 *)REG_SDIO1_BLKSIZEREG;
  1199. d.bitc.trablksize = data;
  1200. *(volatile U16 *)REG_SDIO1_BLKSIZEREG = d.all;
  1201. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1202. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkSizeReg_TraBlkSize] <-- 0x%08x\n",
  1203. REG_SDIO1_BLKSIZEREG,d.all,d.all);
  1204. #endif
  1205. }
  1206. GH_INLINE U16 GH_SDIO1_get_BlkSizeReg_TraBlkSize(void)
  1207. {
  1208. GH_SDIO1_BLKSIZEREG_S tmp_value;
  1209. U32 value = (*(volatile U32 *)REG_SDIO1_BLKSIZEREG);
  1210. tmp_value.all = value;
  1211. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1212. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkSizeReg_TraBlkSize] --> 0x%08x\n",
  1213. REG_SDIO1_BLKSIZEREG,value);
  1214. #endif
  1215. return tmp_value.bitc.trablksize;
  1216. }
  1217. GH_INLINE void GH_SDIO1_set_BlkSizeReg_HostSdmaBufSize(U8 data)
  1218. {
  1219. GH_SDIO1_BLKSIZEREG_S d;
  1220. d.all = *(volatile U16 *)REG_SDIO1_BLKSIZEREG;
  1221. d.bitc.hostsdmabufsize = data;
  1222. *(volatile U16 *)REG_SDIO1_BLKSIZEREG = d.all;
  1223. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1224. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkSizeReg_HostSdmaBufSize] <-- 0x%08x\n",
  1225. REG_SDIO1_BLKSIZEREG,d.all,d.all);
  1226. #endif
  1227. }
  1228. GH_INLINE U8 GH_SDIO1_get_BlkSizeReg_HostSdmaBufSize(void)
  1229. {
  1230. GH_SDIO1_BLKSIZEREG_S tmp_value;
  1231. U16 value = (*(volatile U16 *)REG_SDIO1_BLKSIZEREG);
  1232. tmp_value.all = value;
  1233. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1234. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkSizeReg_HostSdmaBufSize] --> 0x%08x\n",
  1235. REG_SDIO1_BLKSIZEREG,value);
  1236. #endif
  1237. return tmp_value.bitc.hostsdmabufsize;
  1238. }
  1239. #endif /* GH_INLINE_LEVEL == 0 */
  1240. /*----------------------------------------------------------------------------*/
  1241. /* register SDIO1_NorIntStaEnReg (read/write) */
  1242. /*----------------------------------------------------------------------------*/
  1243. #if GH_INLINE_LEVEL == 0
  1244. /*! \brief Writes the register 'SDIO1_NorIntStaEnReg'. */
  1245. void GH_SDIO1_set_NorIntStaEnReg(U16 data);
  1246. /*! \brief Reads the register 'SDIO1_NorIntStaEnReg'. */
  1247. U16 GH_SDIO1_get_NorIntStaEnReg(void);
  1248. /*! \brief Writes the bit group 'CmdCompleteStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1249. void GH_SDIO1_set_NorIntStaEnReg_CmdCompleteStatusEn(U8 data);
  1250. /*! \brief Reads the bit group 'CmdCompleteStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1251. U8 GH_SDIO1_get_NorIntStaEnReg_CmdCompleteStatusEn(void);
  1252. /*! \brief Writes the bit group 'TraCompleteStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1253. void GH_SDIO1_set_NorIntStaEnReg_TraCompleteStatusEn(U8 data);
  1254. /*! \brief Reads the bit group 'TraCompleteStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1255. U8 GH_SDIO1_get_NorIntStaEnReg_TraCompleteStatusEn(void);
  1256. /*! \brief Writes the bit group 'BlkGapEveStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1257. void GH_SDIO1_set_NorIntStaEnReg_BlkGapEveStatusEn(U8 data);
  1258. /*! \brief Reads the bit group 'BlkGapEveStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1259. U8 GH_SDIO1_get_NorIntStaEnReg_BlkGapEveStatusEn(void);
  1260. /*! \brief Writes the bit group 'DmaIntStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1261. void GH_SDIO1_set_NorIntStaEnReg_DmaIntStatusEn(U8 data);
  1262. /*! \brief Reads the bit group 'DmaIntStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1263. U8 GH_SDIO1_get_NorIntStaEnReg_DmaIntStatusEn(void);
  1264. /*! \brief Writes the bit group 'BufWReadyStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1265. void GH_SDIO1_set_NorIntStaEnReg_BufWReadyStatusEn(U8 data);
  1266. /*! \brief Reads the bit group 'BufWReadyStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1267. U8 GH_SDIO1_get_NorIntStaEnReg_BufWReadyStatusEn(void);
  1268. /*! \brief Writes the bit group 'BufRReadyStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1269. void GH_SDIO1_set_NorIntStaEnReg_BufRReadyStatusEn(U8 data);
  1270. /*! \brief Reads the bit group 'BufRReadyStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1271. U8 GH_SDIO1_get_NorIntStaEnReg_BufRReadyStatusEn(void);
  1272. /*! \brief Writes the bit group 'CardInsertionStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1273. void GH_SDIO1_set_NorIntStaEnReg_CardInsertionStatusEn(U8 data);
  1274. /*! \brief Reads the bit group 'CardInsertionStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1275. U8 GH_SDIO1_get_NorIntStaEnReg_CardInsertionStatusEn(void);
  1276. /*! \brief Writes the bit group 'CardRemStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1277. void GH_SDIO1_set_NorIntStaEnReg_CardRemStatusEn(U8 data);
  1278. /*! \brief Reads the bit group 'CardRemStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1279. U8 GH_SDIO1_get_NorIntStaEnReg_CardRemStatusEn(void);
  1280. /*! \brief Writes the bit group 'CardIntStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1281. void GH_SDIO1_set_NorIntStaEnReg_CardIntStatusEn(U8 data);
  1282. /*! \brief Reads the bit group 'CardIntStatusEn' of register 'SDIO1_NorIntStaEnReg'. */
  1283. U8 GH_SDIO1_get_NorIntStaEnReg_CardIntStatusEn(void);
  1284. /*! \brief Writes the bit group 'FixedTo0' of register 'SDIO1_NorIntStaEnReg'. */
  1285. void GH_SDIO1_set_NorIntStaEnReg_FixedTo0(U8 data);
  1286. /*! \brief Reads the bit group 'FixedTo0' of register 'SDIO1_NorIntStaEnReg'. */
  1287. U8 GH_SDIO1_get_NorIntStaEnReg_FixedTo0(void);
  1288. #else /* GH_INLINE_LEVEL == 0 */
  1289. GH_INLINE void GH_SDIO1_set_NorIntStaEnReg(U16 data)
  1290. {
  1291. *(volatile U16 *)REG_SDIO1_NORINTSTAENREG = data;
  1292. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1293. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaEnReg] <-- 0x%08x\n",
  1294. REG_SDIO1_NORINTSTAENREG,data,data);
  1295. #endif
  1296. }
  1297. GH_INLINE U16 GH_SDIO1_get_NorIntStaEnReg(void)
  1298. {
  1299. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAENREG);
  1300. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1301. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaEnReg] --> 0x%08x\n",
  1302. REG_SDIO1_NORINTSTAENREG,value);
  1303. #endif
  1304. return value;
  1305. }
  1306. GH_INLINE void GH_SDIO1_set_NorIntStaEnReg_CmdCompleteStatusEn(U8 data)
  1307. {
  1308. GH_SDIO1_NORINTSTAENREG_S d;
  1309. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAENREG;
  1310. d.bitc.cmdcompletestatusen = data;
  1311. *(volatile U16 *)REG_SDIO1_NORINTSTAENREG = d.all;
  1312. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1313. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaEnReg_CmdCompleteStatusEn] <-- 0x%08x\n",
  1314. REG_SDIO1_NORINTSTAENREG,d.all,d.all);
  1315. #endif
  1316. }
  1317. GH_INLINE U8 GH_SDIO1_get_NorIntStaEnReg_CmdCompleteStatusEn(void)
  1318. {
  1319. GH_SDIO1_NORINTSTAENREG_S tmp_value;
  1320. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAENREG);
  1321. tmp_value.all = value;
  1322. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1323. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaEnReg_CmdCompleteStatusEn] --> 0x%08x\n",
  1324. REG_SDIO1_NORINTSTAENREG,value);
  1325. #endif
  1326. return tmp_value.bitc.cmdcompletestatusen;
  1327. }
  1328. GH_INLINE void GH_SDIO1_set_NorIntStaEnReg_TraCompleteStatusEn(U8 data)
  1329. {
  1330. GH_SDIO1_NORINTSTAENREG_S d;
  1331. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAENREG;
  1332. d.bitc.tracompletestatusen = data;
  1333. *(volatile U16 *)REG_SDIO1_NORINTSTAENREG = d.all;
  1334. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1335. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaEnReg_TraCompleteStatusEn] <-- 0x%08x\n",
  1336. REG_SDIO1_NORINTSTAENREG,d.all,d.all);
  1337. #endif
  1338. }
  1339. GH_INLINE U8 GH_SDIO1_get_NorIntStaEnReg_TraCompleteStatusEn(void)
  1340. {
  1341. GH_SDIO1_NORINTSTAENREG_S tmp_value;
  1342. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAENREG);
  1343. tmp_value.all = value;
  1344. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1345. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaEnReg_TraCompleteStatusEn] --> 0x%08x\n",
  1346. REG_SDIO1_NORINTSTAENREG,value);
  1347. #endif
  1348. return tmp_value.bitc.tracompletestatusen;
  1349. }
  1350. GH_INLINE void GH_SDIO1_set_NorIntStaEnReg_BlkGapEveStatusEn(U8 data)
  1351. {
  1352. GH_SDIO1_NORINTSTAENREG_S d;
  1353. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAENREG;
  1354. d.bitc.blkgapevestatusen = data;
  1355. *(volatile U16 *)REG_SDIO1_NORINTSTAENREG = d.all;
  1356. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1357. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaEnReg_BlkGapEveStatusEn] <-- 0x%08x\n",
  1358. REG_SDIO1_NORINTSTAENREG,d.all,d.all);
  1359. #endif
  1360. }
  1361. GH_INLINE U8 GH_SDIO1_get_NorIntStaEnReg_BlkGapEveStatusEn(void)
  1362. {
  1363. GH_SDIO1_NORINTSTAENREG_S tmp_value;
  1364. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAENREG);
  1365. tmp_value.all = value;
  1366. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1367. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaEnReg_BlkGapEveStatusEn] --> 0x%08x\n",
  1368. REG_SDIO1_NORINTSTAENREG,value);
  1369. #endif
  1370. return tmp_value.bitc.blkgapevestatusen;
  1371. }
  1372. GH_INLINE void GH_SDIO1_set_NorIntStaEnReg_DmaIntStatusEn(U8 data)
  1373. {
  1374. GH_SDIO1_NORINTSTAENREG_S d;
  1375. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAENREG;
  1376. d.bitc.dmaintstatusen = data;
  1377. *(volatile U16 *)REG_SDIO1_NORINTSTAENREG = d.all;
  1378. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1379. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaEnReg_DmaIntStatusEn] <-- 0x%08x\n",
  1380. REG_SDIO1_NORINTSTAENREG,d.all,d.all);
  1381. #endif
  1382. }
  1383. GH_INLINE U8 GH_SDIO1_get_NorIntStaEnReg_DmaIntStatusEn(void)
  1384. {
  1385. GH_SDIO1_NORINTSTAENREG_S tmp_value;
  1386. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAENREG);
  1387. tmp_value.all = value;
  1388. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1389. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaEnReg_DmaIntStatusEn] --> 0x%08x\n",
  1390. REG_SDIO1_NORINTSTAENREG,value);
  1391. #endif
  1392. return tmp_value.bitc.dmaintstatusen;
  1393. }
  1394. GH_INLINE void GH_SDIO1_set_NorIntStaEnReg_BufWReadyStatusEn(U8 data)
  1395. {
  1396. GH_SDIO1_NORINTSTAENREG_S d;
  1397. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAENREG;
  1398. d.bitc.bufwreadystatusen = data;
  1399. *(volatile U16 *)REG_SDIO1_NORINTSTAENREG = d.all;
  1400. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1401. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaEnReg_BufWReadyStatusEn] <-- 0x%08x\n",
  1402. REG_SDIO1_NORINTSTAENREG,d.all,d.all);
  1403. #endif
  1404. }
  1405. GH_INLINE U8 GH_SDIO1_get_NorIntStaEnReg_BufWReadyStatusEn(void)
  1406. {
  1407. GH_SDIO1_NORINTSTAENREG_S tmp_value;
  1408. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAENREG);
  1409. tmp_value.all = value;
  1410. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1411. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaEnReg_BufWReadyStatusEn] --> 0x%08x\n",
  1412. REG_SDIO1_NORINTSTAENREG,value);
  1413. #endif
  1414. return tmp_value.bitc.bufwreadystatusen;
  1415. }
  1416. GH_INLINE void GH_SDIO1_set_NorIntStaEnReg_BufRReadyStatusEn(U8 data)
  1417. {
  1418. GH_SDIO1_NORINTSTAENREG_S d;
  1419. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAENREG;
  1420. d.bitc.bufrreadystatusen = data;
  1421. *(volatile U16 *)REG_SDIO1_NORINTSTAENREG = d.all;
  1422. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1423. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaEnReg_BufRReadyStatusEn] <-- 0x%08x\n",
  1424. REG_SDIO1_NORINTSTAENREG,d.all,d.all);
  1425. #endif
  1426. }
  1427. GH_INLINE U8 GH_SDIO1_get_NorIntStaEnReg_BufRReadyStatusEn(void)
  1428. {
  1429. GH_SDIO1_NORINTSTAENREG_S tmp_value;
  1430. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAENREG);
  1431. tmp_value.all = value;
  1432. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1433. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaEnReg_BufRReadyStatusEn] --> 0x%08x\n",
  1434. REG_SDIO1_NORINTSTAENREG,value);
  1435. #endif
  1436. return tmp_value.bitc.bufrreadystatusen;
  1437. }
  1438. GH_INLINE void GH_SDIO1_set_NorIntStaEnReg_CardInsertionStatusEn(U8 data)
  1439. {
  1440. GH_SDIO1_NORINTSTAENREG_S d;
  1441. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAENREG;
  1442. d.bitc.cardinsertionstatusen = data;
  1443. *(volatile U16 *)REG_SDIO1_NORINTSTAENREG = d.all;
  1444. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1445. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaEnReg_CardInsertionStatusEn] <-- 0x%08x\n",
  1446. REG_SDIO1_NORINTSTAENREG,d.all,d.all);
  1447. #endif
  1448. }
  1449. GH_INLINE U8 GH_SDIO1_get_NorIntStaEnReg_CardInsertionStatusEn(void)
  1450. {
  1451. GH_SDIO1_NORINTSTAENREG_S tmp_value;
  1452. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAENREG);
  1453. tmp_value.all = value;
  1454. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1455. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaEnReg_CardInsertionStatusEn] --> 0x%08x\n",
  1456. REG_SDIO1_NORINTSTAENREG,value);
  1457. #endif
  1458. return tmp_value.bitc.cardinsertionstatusen;
  1459. }
  1460. GH_INLINE void GH_SDIO1_set_NorIntStaEnReg_CardRemStatusEn(U8 data)
  1461. {
  1462. GH_SDIO1_NORINTSTAENREG_S d;
  1463. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAENREG;
  1464. d.bitc.cardremstatusen = data;
  1465. *(volatile U16 *)REG_SDIO1_NORINTSTAENREG = d.all;
  1466. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1467. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaEnReg_CardRemStatusEn] <-- 0x%08x\n",
  1468. REG_SDIO1_NORINTSTAENREG,d.all,d.all);
  1469. #endif
  1470. }
  1471. GH_INLINE U8 GH_SDIO1_get_NorIntStaEnReg_CardRemStatusEn(void)
  1472. {
  1473. GH_SDIO1_NORINTSTAENREG_S tmp_value;
  1474. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAENREG);
  1475. tmp_value.all = value;
  1476. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1477. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaEnReg_CardRemStatusEn] --> 0x%08x\n",
  1478. REG_SDIO1_NORINTSTAENREG,value);
  1479. #endif
  1480. return tmp_value.bitc.cardremstatusen;
  1481. }
  1482. GH_INLINE void GH_SDIO1_set_NorIntStaEnReg_CardIntStatusEn(U8 data)
  1483. {
  1484. GH_SDIO1_NORINTSTAENREG_S d;
  1485. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAENREG;
  1486. d.bitc.cardintstatusen = data;
  1487. *(volatile U16 *)REG_SDIO1_NORINTSTAENREG = d.all;
  1488. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1489. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaEnReg_CardIntStatusEn] <-- 0x%08x\n",
  1490. REG_SDIO1_NORINTSTAENREG,d.all,d.all);
  1491. #endif
  1492. }
  1493. GH_INLINE U8 GH_SDIO1_get_NorIntStaEnReg_CardIntStatusEn(void)
  1494. {
  1495. GH_SDIO1_NORINTSTAENREG_S tmp_value;
  1496. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAENREG);
  1497. tmp_value.all = value;
  1498. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1499. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaEnReg_CardIntStatusEn] --> 0x%08x\n",
  1500. REG_SDIO1_NORINTSTAENREG,value);
  1501. #endif
  1502. return tmp_value.bitc.cardintstatusen;
  1503. }
  1504. GH_INLINE void GH_SDIO1_set_NorIntStaEnReg_FixedTo0(U8 data)
  1505. {
  1506. GH_SDIO1_NORINTSTAENREG_S d;
  1507. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAENREG;
  1508. d.bitc.fixedto0 = data;
  1509. *(volatile U16 *)REG_SDIO1_NORINTSTAENREG = d.all;
  1510. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1511. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaEnReg_FixedTo0] <-- 0x%08x\n",
  1512. REG_SDIO1_NORINTSTAENREG,d.all,d.all);
  1513. #endif
  1514. }
  1515. GH_INLINE U8 GH_SDIO1_get_NorIntStaEnReg_FixedTo0(void)
  1516. {
  1517. GH_SDIO1_NORINTSTAENREG_S tmp_value;
  1518. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAENREG);
  1519. tmp_value.all = value;
  1520. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1521. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaEnReg_FixedTo0] --> 0x%08x\n",
  1522. REG_SDIO1_NORINTSTAENREG,value);
  1523. #endif
  1524. return tmp_value.bitc.fixedto0;
  1525. }
  1526. #endif /* GH_INLINE_LEVEL == 0 */
  1527. /*----------------------------------------------------------------------------*/
  1528. /* register SDIO1_ErrIntStaEnReg (read/write) */
  1529. /*----------------------------------------------------------------------------*/
  1530. #if GH_INLINE_LEVEL == 0
  1531. /*! \brief Writes the register 'SDIO1_ErrIntStaEnReg'. */
  1532. void GH_SDIO1_set_ErrIntStaEnReg(U16 data);
  1533. /*! \brief Reads the register 'SDIO1_ErrIntStaEnReg'. */
  1534. U16 GH_SDIO1_get_ErrIntStaEnReg(void);
  1535. /*! \brief Writes the bit group 'CmdTimeoutErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1536. void GH_SDIO1_set_ErrIntStaEnReg_CmdTimeoutErrStatusEn(U8 data);
  1537. /*! \brief Reads the bit group 'CmdTimeoutErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1538. U8 GH_SDIO1_get_ErrIntStaEnReg_CmdTimeoutErrStatusEn(void);
  1539. /*! \brief Writes the bit group 'CmdEndBitErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1540. void GH_SDIO1_set_ErrIntStaEnReg_CmdEndBitErrStatusEn(U8 data);
  1541. /*! \brief Reads the bit group 'CmdEndBitErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1542. U8 GH_SDIO1_get_ErrIntStaEnReg_CmdEndBitErrStatusEn(void);
  1543. /*! \brief Writes the bit group 'CmdCrcErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1544. void GH_SDIO1_set_ErrIntStaEnReg_CmdCrcErrStatusEn(U8 data);
  1545. /*! \brief Reads the bit group 'CmdCrcErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1546. U8 GH_SDIO1_get_ErrIntStaEnReg_CmdCrcErrStatusEn(void);
  1547. /*! \brief Writes the bit group 'CmdIndexErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1548. void GH_SDIO1_set_ErrIntStaEnReg_CmdIndexErrStatusEn(U8 data);
  1549. /*! \brief Reads the bit group 'CmdIndexErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1550. U8 GH_SDIO1_get_ErrIntStaEnReg_CmdIndexErrStatusEn(void);
  1551. /*! \brief Writes the bit group 'DataCrcErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1552. void GH_SDIO1_set_ErrIntStaEnReg_DataCrcErrStatusEn(U8 data);
  1553. /*! \brief Reads the bit group 'DataCrcErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1554. U8 GH_SDIO1_get_ErrIntStaEnReg_DataCrcErrStatusEn(void);
  1555. /*! \brief Writes the bit group 'DataTimeoutErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1556. void GH_SDIO1_set_ErrIntStaEnReg_DataTimeoutErrStatusEn(U8 data);
  1557. /*! \brief Reads the bit group 'DataTimeoutErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1558. U8 GH_SDIO1_get_ErrIntStaEnReg_DataTimeoutErrStatusEn(void);
  1559. /*! \brief Writes the bit group 'DataEndBitErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1560. void GH_SDIO1_set_ErrIntStaEnReg_DataEndBitErrStatusEn(U8 data);
  1561. /*! \brief Reads the bit group 'DataEndBitErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1562. U8 GH_SDIO1_get_ErrIntStaEnReg_DataEndBitErrStatusEn(void);
  1563. /*! \brief Writes the bit group 'CurLimitErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1564. void GH_SDIO1_set_ErrIntStaEnReg_CurLimitErrStatusEn(U8 data);
  1565. /*! \brief Reads the bit group 'CurLimitErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1566. U8 GH_SDIO1_get_ErrIntStaEnReg_CurLimitErrStatusEn(void);
  1567. /*! \brief Writes the bit group 'AutoCmd12ErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1568. void GH_SDIO1_set_ErrIntStaEnReg_AutoCmd12ErrStatusEn(U8 data);
  1569. /*! \brief Reads the bit group 'AutoCmd12ErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1570. U8 GH_SDIO1_get_ErrIntStaEnReg_AutoCmd12ErrStatusEn(void);
  1571. /*! \brief Writes the bit group 'VendorSpecificErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1572. void GH_SDIO1_set_ErrIntStaEnReg_VendorSpecificErrStatusEn(U8 data);
  1573. /*! \brief Reads the bit group 'VendorSpecificErrStatusEn' of register 'SDIO1_ErrIntStaEnReg'. */
  1574. U8 GH_SDIO1_get_ErrIntStaEnReg_VendorSpecificErrStatusEn(void);
  1575. #else /* GH_INLINE_LEVEL == 0 */
  1576. GH_INLINE void GH_SDIO1_set_ErrIntStaEnReg(U16 data)
  1577. {
  1578. *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG = data;
  1579. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1580. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnReg] <-- 0x%08x\n",
  1581. REG_SDIO1_ERRINTSTAENREG,data,data);
  1582. #endif
  1583. }
  1584. GH_INLINE U16 GH_SDIO1_get_ErrIntStaEnReg(void)
  1585. {
  1586. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTAENREG);
  1587. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1588. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnReg] --> 0x%08x\n",
  1589. REG_SDIO1_ERRINTSTAENREG,value);
  1590. #endif
  1591. return value;
  1592. }
  1593. GH_INLINE void GH_SDIO1_set_ErrIntStaEnReg_CmdTimeoutErrStatusEn(U8 data)
  1594. {
  1595. GH_SDIO1_ERRINTSTAENREG_S d;
  1596. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG;
  1597. d.bitc.cmdtimeouterrstatusen = data;
  1598. *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG = d.all;
  1599. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1600. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnReg_CmdTimeoutErrStatusEn] <-- 0x%08x\n",
  1601. REG_SDIO1_ERRINTSTAENREG,d.all,d.all);
  1602. #endif
  1603. }
  1604. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnReg_CmdTimeoutErrStatusEn(void)
  1605. {
  1606. GH_SDIO1_ERRINTSTAENREG_S tmp_value;
  1607. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTAENREG);
  1608. tmp_value.all = value;
  1609. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1610. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnReg_CmdTimeoutErrStatusEn] --> 0x%08x\n",
  1611. REG_SDIO1_ERRINTSTAENREG,value);
  1612. #endif
  1613. return tmp_value.bitc.cmdtimeouterrstatusen;
  1614. }
  1615. GH_INLINE void GH_SDIO1_set_ErrIntStaEnReg_CmdEndBitErrStatusEn(U8 data)
  1616. {
  1617. GH_SDIO1_ERRINTSTAENREG_S d;
  1618. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG;
  1619. d.bitc.cmdendbiterrstatusen = data;
  1620. *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG = d.all;
  1621. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1622. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnReg_CmdEndBitErrStatusEn] <-- 0x%08x\n",
  1623. REG_SDIO1_ERRINTSTAENREG,d.all,d.all);
  1624. #endif
  1625. }
  1626. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnReg_CmdEndBitErrStatusEn(void)
  1627. {
  1628. GH_SDIO1_ERRINTSTAENREG_S tmp_value;
  1629. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTAENREG);
  1630. tmp_value.all = value;
  1631. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1632. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnReg_CmdEndBitErrStatusEn] --> 0x%08x\n",
  1633. REG_SDIO1_ERRINTSTAENREG,value);
  1634. #endif
  1635. return tmp_value.bitc.cmdendbiterrstatusen;
  1636. }
  1637. GH_INLINE void GH_SDIO1_set_ErrIntStaEnReg_CmdCrcErrStatusEn(U8 data)
  1638. {
  1639. GH_SDIO1_ERRINTSTAENREG_S d;
  1640. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG;
  1641. d.bitc.cmdcrcerrstatusen = data;
  1642. *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG = d.all;
  1643. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1644. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnReg_CmdCrcErrStatusEn] <-- 0x%08x\n",
  1645. REG_SDIO1_ERRINTSTAENREG,d.all,d.all);
  1646. #endif
  1647. }
  1648. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnReg_CmdCrcErrStatusEn(void)
  1649. {
  1650. GH_SDIO1_ERRINTSTAENREG_S tmp_value;
  1651. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTAENREG);
  1652. tmp_value.all = value;
  1653. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1654. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnReg_CmdCrcErrStatusEn] --> 0x%08x\n",
  1655. REG_SDIO1_ERRINTSTAENREG,value);
  1656. #endif
  1657. return tmp_value.bitc.cmdcrcerrstatusen;
  1658. }
  1659. GH_INLINE void GH_SDIO1_set_ErrIntStaEnReg_CmdIndexErrStatusEn(U8 data)
  1660. {
  1661. GH_SDIO1_ERRINTSTAENREG_S d;
  1662. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG;
  1663. d.bitc.cmdindexerrstatusen = data;
  1664. *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG = d.all;
  1665. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1666. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnReg_CmdIndexErrStatusEn] <-- 0x%08x\n",
  1667. REG_SDIO1_ERRINTSTAENREG,d.all,d.all);
  1668. #endif
  1669. }
  1670. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnReg_CmdIndexErrStatusEn(void)
  1671. {
  1672. GH_SDIO1_ERRINTSTAENREG_S tmp_value;
  1673. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTAENREG);
  1674. tmp_value.all = value;
  1675. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1676. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnReg_CmdIndexErrStatusEn] --> 0x%08x\n",
  1677. REG_SDIO1_ERRINTSTAENREG,value);
  1678. #endif
  1679. return tmp_value.bitc.cmdindexerrstatusen;
  1680. }
  1681. GH_INLINE void GH_SDIO1_set_ErrIntStaEnReg_DataCrcErrStatusEn(U8 data)
  1682. {
  1683. GH_SDIO1_ERRINTSTAENREG_S d;
  1684. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG;
  1685. d.bitc.datacrcerrstatusen = data;
  1686. *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG = d.all;
  1687. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1688. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnReg_DataCrcErrStatusEn] <-- 0x%08x\n",
  1689. REG_SDIO1_ERRINTSTAENREG,d.all,d.all);
  1690. #endif
  1691. }
  1692. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnReg_DataCrcErrStatusEn(void)
  1693. {
  1694. GH_SDIO1_ERRINTSTAENREG_S tmp_value;
  1695. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTAENREG);
  1696. tmp_value.all = value;
  1697. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1698. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnReg_DataCrcErrStatusEn] --> 0x%08x\n",
  1699. REG_SDIO1_ERRINTSTAENREG,value);
  1700. #endif
  1701. return tmp_value.bitc.datacrcerrstatusen;
  1702. }
  1703. GH_INLINE void GH_SDIO1_set_ErrIntStaEnReg_DataTimeoutErrStatusEn(U8 data)
  1704. {
  1705. GH_SDIO1_ERRINTSTAENREG_S d;
  1706. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG;
  1707. d.bitc.datatimeouterrstatusen = data;
  1708. *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG = d.all;
  1709. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1710. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnReg_DataTimeoutErrStatusEn] <-- 0x%08x\n",
  1711. REG_SDIO1_ERRINTSTAENREG,d.all,d.all);
  1712. #endif
  1713. }
  1714. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnReg_DataTimeoutErrStatusEn(void)
  1715. {
  1716. GH_SDIO1_ERRINTSTAENREG_S tmp_value;
  1717. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTAENREG);
  1718. tmp_value.all = value;
  1719. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1720. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnReg_DataTimeoutErrStatusEn] --> 0x%08x\n",
  1721. REG_SDIO1_ERRINTSTAENREG,value);
  1722. #endif
  1723. return tmp_value.bitc.datatimeouterrstatusen;
  1724. }
  1725. GH_INLINE void GH_SDIO1_set_ErrIntStaEnReg_DataEndBitErrStatusEn(U8 data)
  1726. {
  1727. GH_SDIO1_ERRINTSTAENREG_S d;
  1728. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG;
  1729. d.bitc.dataendbiterrstatusen = data;
  1730. *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG = d.all;
  1731. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1732. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnReg_DataEndBitErrStatusEn] <-- 0x%08x\n",
  1733. REG_SDIO1_ERRINTSTAENREG,d.all,d.all);
  1734. #endif
  1735. }
  1736. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnReg_DataEndBitErrStatusEn(void)
  1737. {
  1738. GH_SDIO1_ERRINTSTAENREG_S tmp_value;
  1739. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTAENREG);
  1740. tmp_value.all = value;
  1741. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1742. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnReg_DataEndBitErrStatusEn] --> 0x%08x\n",
  1743. REG_SDIO1_ERRINTSTAENREG,value);
  1744. #endif
  1745. return tmp_value.bitc.dataendbiterrstatusen;
  1746. }
  1747. GH_INLINE void GH_SDIO1_set_ErrIntStaEnReg_CurLimitErrStatusEn(U8 data)
  1748. {
  1749. GH_SDIO1_ERRINTSTAENREG_S d;
  1750. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG;
  1751. d.bitc.curlimiterrstatusen = data;
  1752. *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG = d.all;
  1753. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1754. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnReg_CurLimitErrStatusEn] <-- 0x%08x\n",
  1755. REG_SDIO1_ERRINTSTAENREG,d.all,d.all);
  1756. #endif
  1757. }
  1758. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnReg_CurLimitErrStatusEn(void)
  1759. {
  1760. GH_SDIO1_ERRINTSTAENREG_S tmp_value;
  1761. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTAENREG);
  1762. tmp_value.all = value;
  1763. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1764. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnReg_CurLimitErrStatusEn] --> 0x%08x\n",
  1765. REG_SDIO1_ERRINTSTAENREG,value);
  1766. #endif
  1767. return tmp_value.bitc.curlimiterrstatusen;
  1768. }
  1769. GH_INLINE void GH_SDIO1_set_ErrIntStaEnReg_AutoCmd12ErrStatusEn(U8 data)
  1770. {
  1771. GH_SDIO1_ERRINTSTAENREG_S d;
  1772. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG;
  1773. d.bitc.autocmd12errstatusen = data;
  1774. *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG = d.all;
  1775. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1776. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnReg_AutoCmd12ErrStatusEn] <-- 0x%08x\n",
  1777. REG_SDIO1_ERRINTSTAENREG,d.all,d.all);
  1778. #endif
  1779. }
  1780. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnReg_AutoCmd12ErrStatusEn(void)
  1781. {
  1782. GH_SDIO1_ERRINTSTAENREG_S tmp_value;
  1783. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTAENREG);
  1784. tmp_value.all = value;
  1785. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1786. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnReg_AutoCmd12ErrStatusEn] --> 0x%08x\n",
  1787. REG_SDIO1_ERRINTSTAENREG,value);
  1788. #endif
  1789. return tmp_value.bitc.autocmd12errstatusen;
  1790. }
  1791. GH_INLINE void GH_SDIO1_set_ErrIntStaEnReg_VendorSpecificErrStatusEn(U8 data)
  1792. {
  1793. GH_SDIO1_ERRINTSTAENREG_S d;
  1794. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG;
  1795. d.bitc.vendorspecificerrstatusen = data;
  1796. *(volatile U16 *)REG_SDIO1_ERRINTSTAENREG = d.all;
  1797. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1798. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnReg_VendorSpecificErrStatusEn] <-- 0x%08x\n",
  1799. REG_SDIO1_ERRINTSTAENREG,d.all,d.all);
  1800. #endif
  1801. }
  1802. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnReg_VendorSpecificErrStatusEn(void)
  1803. {
  1804. GH_SDIO1_ERRINTSTAENREG_S tmp_value;
  1805. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTAENREG);
  1806. tmp_value.all = value;
  1807. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1808. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnReg_VendorSpecificErrStatusEn] --> 0x%08x\n",
  1809. REG_SDIO1_ERRINTSTAENREG,value);
  1810. #endif
  1811. return tmp_value.bitc.vendorspecificerrstatusen;
  1812. }
  1813. #endif /* GH_INLINE_LEVEL == 0 */
  1814. /*----------------------------------------------------------------------------*/
  1815. /* register SDIO1_NorIntStaReg (read/write) */
  1816. /*----------------------------------------------------------------------------*/
  1817. #if GH_INLINE_LEVEL == 0
  1818. /*! \brief Writes the register 'SDIO1_NorIntStaReg'. */
  1819. void GH_SDIO1_set_NorIntStaReg(U16 data);
  1820. /*! \brief Reads the register 'SDIO1_NorIntStaReg'. */
  1821. U16 GH_SDIO1_get_NorIntStaReg(void);
  1822. /*! \brief Writes the bit group 'CmdComplete' of register 'SDIO1_NorIntStaReg'. */
  1823. void GH_SDIO1_set_NorIntStaReg_CmdComplete(U8 data);
  1824. /*! \brief Reads the bit group 'CmdComplete' of register 'SDIO1_NorIntStaReg'. */
  1825. U8 GH_SDIO1_get_NorIntStaReg_CmdComplete(void);
  1826. /*! \brief Writes the bit group 'BlkGapEvent' of register 'SDIO1_NorIntStaReg'. */
  1827. void GH_SDIO1_set_NorIntStaReg_BlkGapEvent(U8 data);
  1828. /*! \brief Reads the bit group 'BlkGapEvent' of register 'SDIO1_NorIntStaReg'. */
  1829. U8 GH_SDIO1_get_NorIntStaReg_BlkGapEvent(void);
  1830. /*! \brief Writes the bit group 'DmaInt' of register 'SDIO1_NorIntStaReg'. */
  1831. void GH_SDIO1_set_NorIntStaReg_DmaInt(U8 data);
  1832. /*! \brief Reads the bit group 'DmaInt' of register 'SDIO1_NorIntStaReg'. */
  1833. U8 GH_SDIO1_get_NorIntStaReg_DmaInt(void);
  1834. /*! \brief Writes the bit group 'TraComplete' of register 'SDIO1_NorIntStaReg'. */
  1835. void GH_SDIO1_set_NorIntStaReg_TraComplete(U8 data);
  1836. /*! \brief Reads the bit group 'TraComplete' of register 'SDIO1_NorIntStaReg'. */
  1837. U8 GH_SDIO1_get_NorIntStaReg_TraComplete(void);
  1838. /*! \brief Writes the bit group 'BufWReady' of register 'SDIO1_NorIntStaReg'. */
  1839. void GH_SDIO1_set_NorIntStaReg_BufWReady(U8 data);
  1840. /*! \brief Reads the bit group 'BufWReady' of register 'SDIO1_NorIntStaReg'. */
  1841. U8 GH_SDIO1_get_NorIntStaReg_BufWReady(void);
  1842. /*! \brief Writes the bit group 'CardInsertion' of register 'SDIO1_NorIntStaReg'. */
  1843. void GH_SDIO1_set_NorIntStaReg_CardInsertion(U8 data);
  1844. /*! \brief Reads the bit group 'CardInsertion' of register 'SDIO1_NorIntStaReg'. */
  1845. U8 GH_SDIO1_get_NorIntStaReg_CardInsertion(void);
  1846. /*! \brief Writes the bit group 'BufRReady' of register 'SDIO1_NorIntStaReg'. */
  1847. void GH_SDIO1_set_NorIntStaReg_BufRReady(U8 data);
  1848. /*! \brief Reads the bit group 'BufRReady' of register 'SDIO1_NorIntStaReg'. */
  1849. U8 GH_SDIO1_get_NorIntStaReg_BufRReady(void);
  1850. /*! \brief Writes the bit group 'CardRemoval' of register 'SDIO1_NorIntStaReg'. */
  1851. void GH_SDIO1_set_NorIntStaReg_CardRemoval(U8 data);
  1852. /*! \brief Reads the bit group 'CardRemoval' of register 'SDIO1_NorIntStaReg'. */
  1853. U8 GH_SDIO1_get_NorIntStaReg_CardRemoval(void);
  1854. /*! \brief Writes the bit group 'CardInt' of register 'SDIO1_NorIntStaReg'. */
  1855. void GH_SDIO1_set_NorIntStaReg_CardInt(U8 data);
  1856. /*! \brief Reads the bit group 'CardInt' of register 'SDIO1_NorIntStaReg'. */
  1857. U8 GH_SDIO1_get_NorIntStaReg_CardInt(void);
  1858. /*! \brief Writes the bit group 'BootAckRcv' of register 'SDIO1_NorIntStaReg'. */
  1859. void GH_SDIO1_set_NorIntStaReg_BootAckRcv(U8 data);
  1860. /*! \brief Reads the bit group 'BootAckRcv' of register 'SDIO1_NorIntStaReg'. */
  1861. U8 GH_SDIO1_get_NorIntStaReg_BootAckRcv(void);
  1862. /*! \brief Writes the bit group 'ErrInt' of register 'SDIO1_NorIntStaReg'. */
  1863. void GH_SDIO1_set_NorIntStaReg_ErrInt(U8 data);
  1864. /*! \brief Reads the bit group 'ErrInt' of register 'SDIO1_NorIntStaReg'. */
  1865. U8 GH_SDIO1_get_NorIntStaReg_ErrInt(void);
  1866. #else /* GH_INLINE_LEVEL == 0 */
  1867. GH_INLINE void GH_SDIO1_set_NorIntStaReg(U16 data)
  1868. {
  1869. *(volatile U16 *)REG_SDIO1_NORINTSTAREG = data;
  1870. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1871. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaReg] <-- 0x%08x\n",
  1872. REG_SDIO1_NORINTSTAREG,data,data);
  1873. #endif
  1874. }
  1875. GH_INLINE U16 GH_SDIO1_get_NorIntStaReg(void)
  1876. {
  1877. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAREG);
  1878. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1879. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaReg] --> 0x%08x\n",
  1880. REG_SDIO1_NORINTSTAREG,value);
  1881. #endif
  1882. return value;
  1883. }
  1884. GH_INLINE void GH_SDIO1_set_NorIntStaReg_CmdComplete(U8 data)
  1885. {
  1886. GH_SDIO1_NORINTSTAREG_S d;
  1887. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAREG;
  1888. d.bitc.cmdcomplete = data;
  1889. *(volatile U16 *)REG_SDIO1_NORINTSTAREG = d.all;
  1890. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1891. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaReg_CmdComplete] <-- 0x%08x\n",
  1892. REG_SDIO1_NORINTSTAREG,d.all,d.all);
  1893. #endif
  1894. }
  1895. GH_INLINE U8 GH_SDIO1_get_NorIntStaReg_CmdComplete(void)
  1896. {
  1897. GH_SDIO1_NORINTSTAREG_S tmp_value;
  1898. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAREG);
  1899. tmp_value.all = value;
  1900. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1901. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaReg_CmdComplete] --> 0x%08x\n",
  1902. REG_SDIO1_NORINTSTAREG,value);
  1903. #endif
  1904. return tmp_value.bitc.cmdcomplete;
  1905. }
  1906. GH_INLINE void GH_SDIO1_set_NorIntStaReg_BlkGapEvent(U8 data)
  1907. {
  1908. GH_SDIO1_NORINTSTAREG_S d;
  1909. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAREG;
  1910. d.bitc.blkgapevent = data;
  1911. *(volatile U16 *)REG_SDIO1_NORINTSTAREG = d.all;
  1912. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1913. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaReg_BlkGapEvent] <-- 0x%08x\n",
  1914. REG_SDIO1_NORINTSTAREG,d.all,d.all);
  1915. #endif
  1916. }
  1917. GH_INLINE U8 GH_SDIO1_get_NorIntStaReg_BlkGapEvent(void)
  1918. {
  1919. GH_SDIO1_NORINTSTAREG_S tmp_value;
  1920. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAREG);
  1921. tmp_value.all = value;
  1922. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1923. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaReg_BlkGapEvent] --> 0x%08x\n",
  1924. REG_SDIO1_NORINTSTAREG,value);
  1925. #endif
  1926. return tmp_value.bitc.blkgapevent;
  1927. }
  1928. GH_INLINE void GH_SDIO1_set_NorIntStaReg_DmaInt(U8 data)
  1929. {
  1930. GH_SDIO1_NORINTSTAREG_S d;
  1931. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAREG;
  1932. d.bitc.dmaint = data;
  1933. *(volatile U16 *)REG_SDIO1_NORINTSTAREG = d.all;
  1934. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1935. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaReg_DmaInt] <-- 0x%08x\n",
  1936. REG_SDIO1_NORINTSTAREG,d.all,d.all);
  1937. #endif
  1938. }
  1939. GH_INLINE U8 GH_SDIO1_get_NorIntStaReg_DmaInt(void)
  1940. {
  1941. GH_SDIO1_NORINTSTAREG_S tmp_value;
  1942. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAREG);
  1943. tmp_value.all = value;
  1944. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1945. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaReg_DmaInt] --> 0x%08x\n",
  1946. REG_SDIO1_NORINTSTAREG,value);
  1947. #endif
  1948. return tmp_value.bitc.dmaint;
  1949. }
  1950. GH_INLINE void GH_SDIO1_set_NorIntStaReg_TraComplete(U8 data)
  1951. {
  1952. GH_SDIO1_NORINTSTAREG_S d;
  1953. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAREG;
  1954. d.bitc.tracomplete = data;
  1955. *(volatile U16 *)REG_SDIO1_NORINTSTAREG = d.all;
  1956. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1957. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaReg_TraComplete] <-- 0x%08x\n",
  1958. REG_SDIO1_NORINTSTAREG,d.all,d.all);
  1959. #endif
  1960. }
  1961. GH_INLINE U8 GH_SDIO1_get_NorIntStaReg_TraComplete(void)
  1962. {
  1963. GH_SDIO1_NORINTSTAREG_S tmp_value;
  1964. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAREG);
  1965. tmp_value.all = value;
  1966. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1967. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaReg_TraComplete] --> 0x%08x\n",
  1968. REG_SDIO1_NORINTSTAREG,value);
  1969. #endif
  1970. return tmp_value.bitc.tracomplete;
  1971. }
  1972. GH_INLINE void GH_SDIO1_set_NorIntStaReg_BufWReady(U8 data)
  1973. {
  1974. GH_SDIO1_NORINTSTAREG_S d;
  1975. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAREG;
  1976. d.bitc.bufwready = data;
  1977. *(volatile U16 *)REG_SDIO1_NORINTSTAREG = d.all;
  1978. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1979. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaReg_BufWReady] <-- 0x%08x\n",
  1980. REG_SDIO1_NORINTSTAREG,d.all,d.all);
  1981. #endif
  1982. }
  1983. GH_INLINE U8 GH_SDIO1_get_NorIntStaReg_BufWReady(void)
  1984. {
  1985. GH_SDIO1_NORINTSTAREG_S tmp_value;
  1986. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAREG);
  1987. tmp_value.all = value;
  1988. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1989. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaReg_BufWReady] --> 0x%08x\n",
  1990. REG_SDIO1_NORINTSTAREG,value);
  1991. #endif
  1992. return tmp_value.bitc.bufwready;
  1993. }
  1994. GH_INLINE void GH_SDIO1_set_NorIntStaReg_CardInsertion(U8 data)
  1995. {
  1996. GH_SDIO1_NORINTSTAREG_S d;
  1997. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAREG;
  1998. d.bitc.cardinsertion = data;
  1999. *(volatile U16 *)REG_SDIO1_NORINTSTAREG = d.all;
  2000. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2001. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaReg_CardInsertion] <-- 0x%08x\n",
  2002. REG_SDIO1_NORINTSTAREG,d.all,d.all);
  2003. #endif
  2004. }
  2005. GH_INLINE U8 GH_SDIO1_get_NorIntStaReg_CardInsertion(void)
  2006. {
  2007. GH_SDIO1_NORINTSTAREG_S tmp_value;
  2008. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAREG);
  2009. tmp_value.all = value;
  2010. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2011. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaReg_CardInsertion] --> 0x%08x\n",
  2012. REG_SDIO1_NORINTSTAREG,value);
  2013. #endif
  2014. return tmp_value.bitc.cardinsertion;
  2015. }
  2016. GH_INLINE void GH_SDIO1_set_NorIntStaReg_BufRReady(U8 data)
  2017. {
  2018. GH_SDIO1_NORINTSTAREG_S d;
  2019. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAREG;
  2020. d.bitc.bufrready = data;
  2021. *(volatile U16 *)REG_SDIO1_NORINTSTAREG = d.all;
  2022. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2023. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaReg_BufRReady] <-- 0x%08x\n",
  2024. REG_SDIO1_NORINTSTAREG,d.all,d.all);
  2025. #endif
  2026. }
  2027. GH_INLINE U8 GH_SDIO1_get_NorIntStaReg_BufRReady(void)
  2028. {
  2029. GH_SDIO1_NORINTSTAREG_S tmp_value;
  2030. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAREG);
  2031. tmp_value.all = value;
  2032. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2033. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaReg_BufRReady] --> 0x%08x\n",
  2034. REG_SDIO1_NORINTSTAREG,value);
  2035. #endif
  2036. return tmp_value.bitc.bufrready;
  2037. }
  2038. GH_INLINE void GH_SDIO1_set_NorIntStaReg_CardRemoval(U8 data)
  2039. {
  2040. GH_SDIO1_NORINTSTAREG_S d;
  2041. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAREG;
  2042. d.bitc.cardremoval = data;
  2043. *(volatile U16 *)REG_SDIO1_NORINTSTAREG = d.all;
  2044. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2045. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaReg_CardRemoval] <-- 0x%08x\n",
  2046. REG_SDIO1_NORINTSTAREG,d.all,d.all);
  2047. #endif
  2048. }
  2049. GH_INLINE U8 GH_SDIO1_get_NorIntStaReg_CardRemoval(void)
  2050. {
  2051. GH_SDIO1_NORINTSTAREG_S tmp_value;
  2052. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAREG);
  2053. tmp_value.all = value;
  2054. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2055. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaReg_CardRemoval] --> 0x%08x\n",
  2056. REG_SDIO1_NORINTSTAREG,value);
  2057. #endif
  2058. return tmp_value.bitc.cardremoval;
  2059. }
  2060. GH_INLINE void GH_SDIO1_set_NorIntStaReg_CardInt(U8 data)
  2061. {
  2062. GH_SDIO1_NORINTSTAREG_S d;
  2063. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAREG;
  2064. d.bitc.cardint = data;
  2065. *(volatile U16 *)REG_SDIO1_NORINTSTAREG = d.all;
  2066. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2067. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaReg_CardInt] <-- 0x%08x\n",
  2068. REG_SDIO1_NORINTSTAREG,d.all,d.all);
  2069. #endif
  2070. }
  2071. GH_INLINE U8 GH_SDIO1_get_NorIntStaReg_CardInt(void)
  2072. {
  2073. GH_SDIO1_NORINTSTAREG_S tmp_value;
  2074. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAREG);
  2075. tmp_value.all = value;
  2076. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2077. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaReg_CardInt] --> 0x%08x\n",
  2078. REG_SDIO1_NORINTSTAREG,value);
  2079. #endif
  2080. return tmp_value.bitc.cardint;
  2081. }
  2082. GH_INLINE void GH_SDIO1_set_NorIntStaReg_BootAckRcv(U8 data)
  2083. {
  2084. GH_SDIO1_NORINTSTAREG_S d;
  2085. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAREG;
  2086. d.bitc.bootackrcv = data;
  2087. *(volatile U16 *)REG_SDIO1_NORINTSTAREG = d.all;
  2088. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2089. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaReg_BootAckRcv] <-- 0x%08x\n",
  2090. REG_SDIO1_NORINTSTAREG,d.all,d.all);
  2091. #endif
  2092. }
  2093. GH_INLINE U8 GH_SDIO1_get_NorIntStaReg_BootAckRcv(void)
  2094. {
  2095. GH_SDIO1_NORINTSTAREG_S tmp_value;
  2096. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAREG);
  2097. tmp_value.all = value;
  2098. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2099. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaReg_BootAckRcv] --> 0x%08x\n",
  2100. REG_SDIO1_NORINTSTAREG,value);
  2101. #endif
  2102. return tmp_value.bitc.bootackrcv;
  2103. }
  2104. GH_INLINE void GH_SDIO1_set_NorIntStaReg_ErrInt(U8 data)
  2105. {
  2106. GH_SDIO1_NORINTSTAREG_S d;
  2107. d.all = *(volatile U16 *)REG_SDIO1_NORINTSTAREG;
  2108. d.bitc.errint = data;
  2109. *(volatile U16 *)REG_SDIO1_NORINTSTAREG = d.all;
  2110. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2111. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_NorIntStaReg_ErrInt] <-- 0x%08x\n",
  2112. REG_SDIO1_NORINTSTAREG,d.all,d.all);
  2113. #endif
  2114. }
  2115. GH_INLINE U8 GH_SDIO1_get_NorIntStaReg_ErrInt(void)
  2116. {
  2117. GH_SDIO1_NORINTSTAREG_S tmp_value;
  2118. U16 value = (*(volatile U16 *)REG_SDIO1_NORINTSTAREG);
  2119. tmp_value.all = value;
  2120. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2121. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_NorIntStaReg_ErrInt] --> 0x%08x\n",
  2122. REG_SDIO1_NORINTSTAREG,value);
  2123. #endif
  2124. return tmp_value.bitc.errint;
  2125. }
  2126. #endif /* GH_INLINE_LEVEL == 0 */
  2127. /*----------------------------------------------------------------------------*/
  2128. /* register SDIO1_ErrIntStatusReg (read/write) */
  2129. /*----------------------------------------------------------------------------*/
  2130. #if GH_INLINE_LEVEL == 0
  2131. /*! \brief Writes the register 'SDIO1_ErrIntStatusReg'. */
  2132. void GH_SDIO1_set_ErrIntStatusReg(U16 data);
  2133. /*! \brief Reads the register 'SDIO1_ErrIntStatusReg'. */
  2134. U16 GH_SDIO1_get_ErrIntStatusReg(void);
  2135. /*! \brief Writes the bit group 'CmdTimeoutErr' of register 'SDIO1_ErrIntStatusReg'. */
  2136. void GH_SDIO1_set_ErrIntStatusReg_CmdTimeoutErr(U8 data);
  2137. /*! \brief Reads the bit group 'CmdTimeoutErr' of register 'SDIO1_ErrIntStatusReg'. */
  2138. U8 GH_SDIO1_get_ErrIntStatusReg_CmdTimeoutErr(void);
  2139. /*! \brief Writes the bit group 'CmdCrcErr' of register 'SDIO1_ErrIntStatusReg'. */
  2140. void GH_SDIO1_set_ErrIntStatusReg_CmdCrcErr(U8 data);
  2141. /*! \brief Reads the bit group 'CmdCrcErr' of register 'SDIO1_ErrIntStatusReg'. */
  2142. U8 GH_SDIO1_get_ErrIntStatusReg_CmdCrcErr(void);
  2143. /*! \brief Writes the bit group 'CmdEndBitErr' of register 'SDIO1_ErrIntStatusReg'. */
  2144. void GH_SDIO1_set_ErrIntStatusReg_CmdEndBitErr(U8 data);
  2145. /*! \brief Reads the bit group 'CmdEndBitErr' of register 'SDIO1_ErrIntStatusReg'. */
  2146. U8 GH_SDIO1_get_ErrIntStatusReg_CmdEndBitErr(void);
  2147. /*! \brief Writes the bit group 'CmdIndexErr' of register 'SDIO1_ErrIntStatusReg'. */
  2148. void GH_SDIO1_set_ErrIntStatusReg_CmdIndexErr(U8 data);
  2149. /*! \brief Reads the bit group 'CmdIndexErr' of register 'SDIO1_ErrIntStatusReg'. */
  2150. U8 GH_SDIO1_get_ErrIntStatusReg_CmdIndexErr(void);
  2151. /*! \brief Writes the bit group 'DataTimeoutErr' of register 'SDIO1_ErrIntStatusReg'. */
  2152. void GH_SDIO1_set_ErrIntStatusReg_DataTimeoutErr(U8 data);
  2153. /*! \brief Reads the bit group 'DataTimeoutErr' of register 'SDIO1_ErrIntStatusReg'. */
  2154. U8 GH_SDIO1_get_ErrIntStatusReg_DataTimeoutErr(void);
  2155. /*! \brief Writes the bit group 'DataCrcErr' of register 'SDIO1_ErrIntStatusReg'. */
  2156. void GH_SDIO1_set_ErrIntStatusReg_DataCrcErr(U8 data);
  2157. /*! \brief Reads the bit group 'DataCrcErr' of register 'SDIO1_ErrIntStatusReg'. */
  2158. U8 GH_SDIO1_get_ErrIntStatusReg_DataCrcErr(void);
  2159. /*! \brief Writes the bit group 'DataEndBitErr' of register 'SDIO1_ErrIntStatusReg'. */
  2160. void GH_SDIO1_set_ErrIntStatusReg_DataEndBitErr(U8 data);
  2161. /*! \brief Reads the bit group 'DataEndBitErr' of register 'SDIO1_ErrIntStatusReg'. */
  2162. U8 GH_SDIO1_get_ErrIntStatusReg_DataEndBitErr(void);
  2163. /*! \brief Writes the bit group 'CurLimitErr' of register 'SDIO1_ErrIntStatusReg'. */
  2164. void GH_SDIO1_set_ErrIntStatusReg_CurLimitErr(U8 data);
  2165. /*! \brief Reads the bit group 'CurLimitErr' of register 'SDIO1_ErrIntStatusReg'. */
  2166. U8 GH_SDIO1_get_ErrIntStatusReg_CurLimitErr(void);
  2167. /*! \brief Writes the bit group 'AutoCmd12Err' of register 'SDIO1_ErrIntStatusReg'. */
  2168. void GH_SDIO1_set_ErrIntStatusReg_AutoCmd12Err(U8 data);
  2169. /*! \brief Reads the bit group 'AutoCmd12Err' of register 'SDIO1_ErrIntStatusReg'. */
  2170. U8 GH_SDIO1_get_ErrIntStatusReg_AutoCmd12Err(void);
  2171. /*! \brief Writes the bit group 'VendorSpecificErrStatus' of register 'SDIO1_ErrIntStatusReg'. */
  2172. void GH_SDIO1_set_ErrIntStatusReg_VendorSpecificErrStatus(U8 data);
  2173. /*! \brief Reads the bit group 'VendorSpecificErrStatus' of register 'SDIO1_ErrIntStatusReg'. */
  2174. U8 GH_SDIO1_get_ErrIntStatusReg_VendorSpecificErrStatus(void);
  2175. #else /* GH_INLINE_LEVEL == 0 */
  2176. GH_INLINE void GH_SDIO1_set_ErrIntStatusReg(U32 data)
  2177. {
  2178. *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG = data;
  2179. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2180. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusReg] <-- 0x%08x\n",
  2181. REG_SDIO1_ERRINTSTATUSREG,data,data);
  2182. #endif
  2183. }
  2184. GH_INLINE U16 GH_SDIO1_get_ErrIntStatusReg(void)
  2185. {
  2186. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG);
  2187. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2188. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusReg] --> 0x%08x\n",
  2189. REG_SDIO1_ERRINTSTATUSREG,value);
  2190. #endif
  2191. return value;
  2192. }
  2193. GH_INLINE void GH_SDIO1_set_ErrIntStatusReg_CmdTimeoutErr(U8 data)
  2194. {
  2195. GH_SDIO1_ERRINTSTATUSREG_S d;
  2196. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG;
  2197. d.bitc.cmdtimeouterr = data;
  2198. *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG = d.all;
  2199. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2200. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusReg_CmdTimeoutErr] <-- 0x%08x\n",
  2201. REG_SDIO1_ERRINTSTATUSREG,d.all,d.all);
  2202. #endif
  2203. }
  2204. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusReg_CmdTimeoutErr(void)
  2205. {
  2206. GH_SDIO1_ERRINTSTATUSREG_S tmp_value;
  2207. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG);
  2208. tmp_value.all = value;
  2209. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2210. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusReg_CmdTimeoutErr] --> 0x%08x\n",
  2211. REG_SDIO1_ERRINTSTATUSREG,value);
  2212. #endif
  2213. return tmp_value.bitc.cmdtimeouterr;
  2214. }
  2215. GH_INLINE void GH_SDIO1_set_ErrIntStatusReg_CmdCrcErr(U8 data)
  2216. {
  2217. GH_SDIO1_ERRINTSTATUSREG_S d;
  2218. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG;
  2219. d.bitc.cmdcrcerr = data;
  2220. *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG = d.all;
  2221. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2222. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusReg_CmdCrcErr] <-- 0x%08x\n",
  2223. REG_SDIO1_ERRINTSTATUSREG,d.all,d.all);
  2224. #endif
  2225. }
  2226. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusReg_CmdCrcErr(void)
  2227. {
  2228. GH_SDIO1_ERRINTSTATUSREG_S tmp_value;
  2229. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG);
  2230. tmp_value.all = value;
  2231. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2232. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusReg_CmdCrcErr] --> 0x%08x\n",
  2233. REG_SDIO1_ERRINTSTATUSREG,value);
  2234. #endif
  2235. return tmp_value.bitc.cmdcrcerr;
  2236. }
  2237. GH_INLINE void GH_SDIO1_set_ErrIntStatusReg_CmdEndBitErr(U8 data)
  2238. {
  2239. GH_SDIO1_ERRINTSTATUSREG_S d;
  2240. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG;
  2241. d.bitc.cmdendbiterr = data;
  2242. *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG = d.all;
  2243. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2244. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusReg_CmdEndBitErr] <-- 0x%08x\n",
  2245. REG_SDIO1_ERRINTSTATUSREG,d.all,d.all);
  2246. #endif
  2247. }
  2248. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusReg_CmdEndBitErr(void)
  2249. {
  2250. GH_SDIO1_ERRINTSTATUSREG_S tmp_value;
  2251. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG);
  2252. tmp_value.all = value;
  2253. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2254. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusReg_CmdEndBitErr] --> 0x%08x\n",
  2255. REG_SDIO1_ERRINTSTATUSREG,value);
  2256. #endif
  2257. return tmp_value.bitc.cmdendbiterr;
  2258. }
  2259. GH_INLINE void GH_SDIO1_set_ErrIntStatusReg_CmdIndexErr(U8 data)
  2260. {
  2261. GH_SDIO1_ERRINTSTATUSREG_S d;
  2262. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG;
  2263. d.bitc.cmdindexerr = data;
  2264. *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG = d.all;
  2265. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2266. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusReg_CmdIndexErr] <-- 0x%08x\n",
  2267. REG_SDIO1_ERRINTSTATUSREG,d.all,d.all);
  2268. #endif
  2269. }
  2270. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusReg_CmdIndexErr(void)
  2271. {
  2272. GH_SDIO1_ERRINTSTATUSREG_S tmp_value;
  2273. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG);
  2274. tmp_value.all = value;
  2275. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2276. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusReg_CmdIndexErr] --> 0x%08x\n",
  2277. REG_SDIO1_ERRINTSTATUSREG,value);
  2278. #endif
  2279. return tmp_value.bitc.cmdindexerr;
  2280. }
  2281. GH_INLINE void GH_SDIO1_set_ErrIntStatusReg_DataTimeoutErr(U8 data)
  2282. {
  2283. GH_SDIO1_ERRINTSTATUSREG_S d;
  2284. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG;
  2285. d.bitc.datatimeouterr = data;
  2286. *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG = d.all;
  2287. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2288. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusReg_DataTimeoutErr] <-- 0x%08x\n",
  2289. REG_SDIO1_ERRINTSTATUSREG,d.all,d.all);
  2290. #endif
  2291. }
  2292. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusReg_DataTimeoutErr(void)
  2293. {
  2294. GH_SDIO1_ERRINTSTATUSREG_S tmp_value;
  2295. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG);
  2296. tmp_value.all = value;
  2297. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2298. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusReg_DataTimeoutErr] --> 0x%08x\n",
  2299. REG_SDIO1_ERRINTSTATUSREG,value);
  2300. #endif
  2301. return tmp_value.bitc.datatimeouterr;
  2302. }
  2303. GH_INLINE void GH_SDIO1_set_ErrIntStatusReg_DataCrcErr(U8 data)
  2304. {
  2305. GH_SDIO1_ERRINTSTATUSREG_S d;
  2306. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG;
  2307. d.bitc.datacrcerr = data;
  2308. *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG = d.all;
  2309. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2310. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusReg_DataCrcErr] <-- 0x%08x\n",
  2311. REG_SDIO1_ERRINTSTATUSREG,d.all,d.all);
  2312. #endif
  2313. }
  2314. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusReg_DataCrcErr(void)
  2315. {
  2316. GH_SDIO1_ERRINTSTATUSREG_S tmp_value;
  2317. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG);
  2318. tmp_value.all = value;
  2319. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2320. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusReg_DataCrcErr] --> 0x%08x\n",
  2321. REG_SDIO1_ERRINTSTATUSREG,value);
  2322. #endif
  2323. return tmp_value.bitc.datacrcerr;
  2324. }
  2325. GH_INLINE void GH_SDIO1_set_ErrIntStatusReg_DataEndBitErr(U8 data)
  2326. {
  2327. GH_SDIO1_ERRINTSTATUSREG_S d;
  2328. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG;
  2329. d.bitc.dataendbiterr = data;
  2330. *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG = d.all;
  2331. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2332. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusReg_DataEndBitErr] <-- 0x%08x\n",
  2333. REG_SDIO1_ERRINTSTATUSREG,d.all,d.all);
  2334. #endif
  2335. }
  2336. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusReg_DataEndBitErr(void)
  2337. {
  2338. GH_SDIO1_ERRINTSTATUSREG_S tmp_value;
  2339. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG);
  2340. tmp_value.all = value;
  2341. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2342. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusReg_DataEndBitErr] --> 0x%08x\n",
  2343. REG_SDIO1_ERRINTSTATUSREG,value);
  2344. #endif
  2345. return tmp_value.bitc.dataendbiterr;
  2346. }
  2347. GH_INLINE void GH_SDIO1_set_ErrIntStatusReg_CurLimitErr(U8 data)
  2348. {
  2349. GH_SDIO1_ERRINTSTATUSREG_S d;
  2350. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG;
  2351. d.bitc.curlimiterr = data;
  2352. *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG = d.all;
  2353. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2354. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusReg_CurLimitErr] <-- 0x%08x\n",
  2355. REG_SDIO1_ERRINTSTATUSREG,d.all,d.all);
  2356. #endif
  2357. }
  2358. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusReg_CurLimitErr(void)
  2359. {
  2360. GH_SDIO1_ERRINTSTATUSREG_S tmp_value;
  2361. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG);
  2362. tmp_value.all = value;
  2363. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2364. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusReg_CurLimitErr] --> 0x%08x\n",
  2365. REG_SDIO1_ERRINTSTATUSREG,value);
  2366. #endif
  2367. return tmp_value.bitc.curlimiterr;
  2368. }
  2369. GH_INLINE void GH_SDIO1_set_ErrIntStatusReg_AutoCmd12Err(U8 data)
  2370. {
  2371. GH_SDIO1_ERRINTSTATUSREG_S d;
  2372. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG;
  2373. d.bitc.autocmd12err = data;
  2374. *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG = d.all;
  2375. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2376. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusReg_AutoCmd12Err] <-- 0x%08x\n",
  2377. REG_SDIO1_ERRINTSTATUSREG,d.all,d.all);
  2378. #endif
  2379. }
  2380. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusReg_AutoCmd12Err(void)
  2381. {
  2382. GH_SDIO1_ERRINTSTATUSREG_S tmp_value;
  2383. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG);
  2384. tmp_value.all = value;
  2385. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2386. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusReg_AutoCmd12Err] --> 0x%08x\n",
  2387. REG_SDIO1_ERRINTSTATUSREG,value);
  2388. #endif
  2389. return tmp_value.bitc.autocmd12err;
  2390. }
  2391. GH_INLINE void GH_SDIO1_set_ErrIntStatusReg_VendorSpecificErrStatus(U8 data)
  2392. {
  2393. GH_SDIO1_ERRINTSTATUSREG_S d;
  2394. d.all = *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG;
  2395. d.bitc.vendorspecificerrstatus = data;
  2396. *(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG = d.all;
  2397. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2398. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusReg_VendorSpecificErrStatus] <-- 0x%08x\n",
  2399. REG_SDIO1_ERRINTSTATUSREG,d.all,d.all);
  2400. #endif
  2401. }
  2402. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusReg_VendorSpecificErrStatus(void)
  2403. {
  2404. GH_SDIO1_ERRINTSTATUSREG_S tmp_value;
  2405. U16 value = (*(volatile U16 *)REG_SDIO1_ERRINTSTATUSREG);
  2406. tmp_value.all = value;
  2407. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2408. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusReg_VendorSpecificErrStatus] --> 0x%08x\n",
  2409. REG_SDIO1_ERRINTSTATUSREG,value);
  2410. #endif
  2411. return tmp_value.bitc.vendorspecificerrstatus;
  2412. }
  2413. #endif /* GH_INLINE_LEVEL == 0 */
  2414. /*----------------------------------------------------------------------------*/
  2415. /* register SDIO1_CommondReg (read/write) */
  2416. /*----------------------------------------------------------------------------*/
  2417. #if GH_INLINE_LEVEL == 0
  2418. /*! \brief Writes the register 'SDIO1_CommondReg'. */
  2419. void GH_SDIO1_set_CommondReg(U16 data);
  2420. /*! \brief Reads the register 'SDIO1_CommondReg'. */
  2421. U16 GH_SDIO1_get_CommondReg(void);
  2422. /*! \brief Writes the bit group 'RepTypeSelect' of register 'SDIO1_CommondReg'. */
  2423. void GH_SDIO1_set_CommondReg_RepTypeSelect(U8 data);
  2424. /*! \brief Reads the bit group 'RepTypeSelect' of register 'SDIO1_CommondReg'. */
  2425. U8 GH_SDIO1_get_CommondReg_RepTypeSelect(void);
  2426. /*! \brief Writes the bit group 'CmdCrcCheckEn' of register 'SDIO1_CommondReg'. */
  2427. void GH_SDIO1_set_CommondReg_CmdCrcCheckEn(U8 data);
  2428. /*! \brief Reads the bit group 'CmdCrcCheckEn' of register 'SDIO1_CommondReg'. */
  2429. U8 GH_SDIO1_get_CommondReg_CmdCrcCheckEn(void);
  2430. /*! \brief Writes the bit group 'DataPreSelect' of register 'SDIO1_CommondReg'. */
  2431. void GH_SDIO1_set_CommondReg_DataPreSelect(U8 data);
  2432. /*! \brief Reads the bit group 'DataPreSelect' of register 'SDIO1_CommondReg'. */
  2433. U8 GH_SDIO1_get_CommondReg_DataPreSelect(void);
  2434. /*! \brief Writes the bit group 'CmdIndexCheckEn' of register 'SDIO1_CommondReg'. */
  2435. void GH_SDIO1_set_CommondReg_CmdIndexCheckEn(U8 data);
  2436. /*! \brief Reads the bit group 'CmdIndexCheckEn' of register 'SDIO1_CommondReg'. */
  2437. U8 GH_SDIO1_get_CommondReg_CmdIndexCheckEn(void);
  2438. /*! \brief Writes the bit group 'CmdType' of register 'SDIO1_CommondReg'. */
  2439. void GH_SDIO1_set_CommondReg_CmdType(U8 data);
  2440. /*! \brief Reads the bit group 'CmdType' of register 'SDIO1_CommondReg'. */
  2441. U8 GH_SDIO1_get_CommondReg_CmdType(void);
  2442. /*! \brief Writes the bit group 'CmdIndex' of register 'SDIO1_CommondReg'. */
  2443. void GH_SDIO1_set_CommondReg_CmdIndex(U8 data);
  2444. /*! \brief Reads the bit group 'CmdIndex' of register 'SDIO1_CommondReg'. */
  2445. U8 GH_SDIO1_get_CommondReg_CmdIndex(void);
  2446. #else /* GH_INLINE_LEVEL == 0 */
  2447. GH_INLINE void GH_SDIO1_set_CommondReg(U16 data)
  2448. {
  2449. *(volatile U16 *)REG_SDIO1_COMMONDREG = data;
  2450. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2451. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_CommondReg] <-- 0x%08x\n",
  2452. REG_SDIO1_COMMONDREG,data,data);
  2453. #endif
  2454. }
  2455. GH_INLINE U16 GH_SDIO1_get_CommondReg(void)
  2456. {
  2457. U16 value = (*(volatile U16 *)REG_SDIO1_COMMONDREG);
  2458. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2459. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CommondReg] --> 0x%08x\n",
  2460. REG_SDIO1_COMMONDREG,value);
  2461. #endif
  2462. return value;
  2463. }
  2464. GH_INLINE void GH_SDIO1_set_CommondReg_RepTypeSelect(U8 data)
  2465. {
  2466. GH_SDIO1_COMMONDREG_S d;
  2467. d.all = *(volatile U16 *)REG_SDIO1_COMMONDREG;
  2468. d.bitc.reptypeselect = data;
  2469. *(volatile U16 *)REG_SDIO1_COMMONDREG = d.all;
  2470. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2471. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_CommondReg_RepTypeSelect] <-- 0x%08x\n",
  2472. REG_SDIO1_COMMONDREG,d.all,d.all);
  2473. #endif
  2474. }
  2475. GH_INLINE U8 GH_SDIO1_get_CommondReg_RepTypeSelect(void)
  2476. {
  2477. GH_SDIO1_COMMONDREG_S tmp_value;
  2478. U16 value = (*(volatile U16 *)REG_SDIO1_COMMONDREG);
  2479. tmp_value.all = value;
  2480. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2481. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CommondReg_RepTypeSelect] --> 0x%08x\n",
  2482. REG_SDIO1_COMMONDREG,value);
  2483. #endif
  2484. return tmp_value.bitc.reptypeselect;
  2485. }
  2486. GH_INLINE void GH_SDIO1_set_CommondReg_CmdCrcCheckEn(U8 data)
  2487. {
  2488. GH_SDIO1_COMMONDREG_S d;
  2489. d.all = *(volatile U16 *)REG_SDIO1_COMMONDREG;
  2490. d.bitc.cmdcrcchecken = data;
  2491. *(volatile U16 *)REG_SDIO1_COMMONDREG = d.all;
  2492. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2493. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_CommondReg_CmdCrcCheckEn] <-- 0x%08x\n",
  2494. REG_SDIO1_COMMONDREG,d.all,d.all);
  2495. #endif
  2496. }
  2497. GH_INLINE U8 GH_SDIO1_get_CommondReg_CmdCrcCheckEn(void)
  2498. {
  2499. GH_SDIO1_COMMONDREG_S tmp_value;
  2500. U16 value = (*(volatile U16 *)REG_SDIO1_COMMONDREG);
  2501. tmp_value.all = value;
  2502. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2503. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CommondReg_CmdCrcCheckEn] --> 0x%08x\n",
  2504. REG_SDIO1_COMMONDREG,value);
  2505. #endif
  2506. return tmp_value.bitc.cmdcrcchecken;
  2507. }
  2508. GH_INLINE void GH_SDIO1_set_CommondReg_DataPreSelect(U8 data)
  2509. {
  2510. GH_SDIO1_COMMONDREG_S d;
  2511. d.all = *(volatile U16 *)REG_SDIO1_COMMONDREG;
  2512. d.bitc.datapreselect = data;
  2513. *(volatile U16 *)REG_SDIO1_COMMONDREG = d.all;
  2514. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2515. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_CommondReg_DataPreSelect] <-- 0x%08x\n",
  2516. REG_SDIO1_COMMONDREG,d.all,d.all);
  2517. #endif
  2518. }
  2519. GH_INLINE U8 GH_SDIO1_get_CommondReg_DataPreSelect(void)
  2520. {
  2521. GH_SDIO1_COMMONDREG_S tmp_value;
  2522. U16 value = (*(volatile U16 *)REG_SDIO1_COMMONDREG);
  2523. tmp_value.all = value;
  2524. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2525. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CommondReg_DataPreSelect] --> 0x%08x\n",
  2526. REG_SDIO1_COMMONDREG,value);
  2527. #endif
  2528. return tmp_value.bitc.datapreselect;
  2529. }
  2530. GH_INLINE void GH_SDIO1_set_CommondReg_CmdIndexCheckEn(U8 data)
  2531. {
  2532. GH_SDIO1_COMMONDREG_S d;
  2533. d.all = *(volatile U16 *)REG_SDIO1_COMMONDREG;
  2534. d.bitc.cmdindexchecken = data;
  2535. *(volatile U16 *)REG_SDIO1_COMMONDREG = d.all;
  2536. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2537. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_CommondReg_CmdIndexCheckEn] <-- 0x%08x\n",
  2538. REG_SDIO1_COMMONDREG,d.all,d.all);
  2539. #endif
  2540. }
  2541. GH_INLINE U8 GH_SDIO1_get_CommondReg_CmdIndexCheckEn(void)
  2542. {
  2543. GH_SDIO1_COMMONDREG_S tmp_value;
  2544. U16 value = (*(volatile U16 *)REG_SDIO1_COMMONDREG);
  2545. tmp_value.all = value;
  2546. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2547. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CommondReg_CmdIndexCheckEn] --> 0x%08x\n",
  2548. REG_SDIO1_COMMONDREG,value);
  2549. #endif
  2550. return tmp_value.bitc.cmdindexchecken;
  2551. }
  2552. GH_INLINE void GH_SDIO1_set_CommondReg_CmdType(U8 data)
  2553. {
  2554. GH_SDIO1_COMMONDREG_S d;
  2555. d.all = *(volatile U16 *)REG_SDIO1_COMMONDREG;
  2556. d.bitc.cmdtype = data;
  2557. *(volatile U16 *)REG_SDIO1_COMMONDREG = d.all;
  2558. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2559. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_CommondReg_CmdType] <-- 0x%08x\n",
  2560. REG_SDIO1_COMMONDREG,d.all,d.all);
  2561. #endif
  2562. }
  2563. GH_INLINE U8 GH_SDIO1_get_CommondReg_CmdType(void)
  2564. {
  2565. GH_SDIO1_COMMONDREG_S tmp_value;
  2566. U16 value = (*(volatile U16 *)REG_SDIO1_COMMONDREG);
  2567. tmp_value.all = value;
  2568. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2569. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CommondReg_CmdType] --> 0x%08x\n",
  2570. REG_SDIO1_COMMONDREG,value);
  2571. #endif
  2572. return tmp_value.bitc.cmdtype;
  2573. }
  2574. GH_INLINE void GH_SDIO1_set_CommondReg_CmdIndex(U8 data)
  2575. {
  2576. GH_SDIO1_COMMONDREG_S d;
  2577. d.all = *(volatile U16 *)REG_SDIO1_COMMONDREG;
  2578. d.bitc.cmdindex = data;
  2579. *(volatile U16 *)REG_SDIO1_COMMONDREG = d.all;
  2580. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2581. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_CommondReg_CmdIndex] <-- 0x%08x\n",
  2582. REG_SDIO1_COMMONDREG,d.all,d.all);
  2583. #endif
  2584. }
  2585. GH_INLINE U8 GH_SDIO1_get_CommondReg_CmdIndex(void)
  2586. {
  2587. GH_SDIO1_COMMONDREG_S tmp_value;
  2588. U16 value = (*(volatile U16 *)REG_SDIO1_COMMONDREG);
  2589. tmp_value.all = value;
  2590. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2591. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CommondReg_CmdIndex] --> 0x%08x\n",
  2592. REG_SDIO1_COMMONDREG,value);
  2593. #endif
  2594. return tmp_value.bitc.cmdindex;
  2595. }
  2596. #endif /* GH_INLINE_LEVEL == 0 */
  2597. /*----------------------------------------------------------------------------*/
  2598. /* register SDIO1_SoftResetReg (read/write) */
  2599. /*----------------------------------------------------------------------------*/
  2600. #if GH_INLINE_LEVEL == 0
  2601. /*! \brief Writes the register 'SDIO1_SoftResetReg'. */
  2602. void GH_SDIO1_set_SoftResetReg(U16 data);
  2603. /*! \brief Reads the register 'SDIO1_SoftResetReg'. */
  2604. U16 GH_SDIO1_get_SoftResetReg(void);
  2605. /*! \brief Writes the bit group 'DataTimeoutCounterValue' of register 'SDIO1_SoftResetReg'. */
  2606. void GH_SDIO1_set_SoftResetReg_DataTimeoutCounterValue(U8 data);
  2607. /*! \brief Reads the bit group 'DataTimeoutCounterValue' of register 'SDIO1_SoftResetReg'. */
  2608. U8 GH_SDIO1_get_SoftResetReg_DataTimeoutCounterValue(void);
  2609. /*! \brief Writes the bit group 'SoftwareResetCmdLine' of register 'SDIO1_SoftResetReg'. */
  2610. void GH_SDIO1_set_SoftResetReg_SoftwareResetCmdLine(U8 data);
  2611. /*! \brief Reads the bit group 'SoftwareResetCmdLine' of register 'SDIO1_SoftResetReg'. */
  2612. U8 GH_SDIO1_get_SoftResetReg_SoftwareResetCmdLine(void);
  2613. /*! \brief Writes the bit group 'SoftwareResetAll' of register 'SDIO1_SoftResetReg'. */
  2614. void GH_SDIO1_set_SoftResetReg_SoftwareResetAll(U8 data);
  2615. /*! \brief Reads the bit group 'SoftwareResetAll' of register 'SDIO1_SoftResetReg'. */
  2616. U8 GH_SDIO1_get_SoftResetReg_SoftwareResetAll(void);
  2617. /*! \brief Writes the bit group 'SoftwareResetDatLine' of register 'SDIO1_SoftResetReg'. */
  2618. void GH_SDIO1_set_SoftResetReg_SoftwareResetDatLine(U8 data);
  2619. /*! \brief Reads the bit group 'SoftwareResetDatLine' of register 'SDIO1_SoftResetReg'. */
  2620. U8 GH_SDIO1_get_SoftResetReg_SoftwareResetDatLine(void);
  2621. #else /* GH_INLINE_LEVEL == 0 */
  2622. GH_INLINE void GH_SDIO1_set_SoftResetReg(U16 data)
  2623. {
  2624. *(volatile U16 *)REG_SDIO1_SOFTRESETREG = data;
  2625. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2626. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_SoftResetReg] <-- 0x%08x\n",
  2627. REG_SDIO1_SOFTRESETREG,data,data);
  2628. #endif
  2629. }
  2630. GH_INLINE U16 GH_SDIO1_get_SoftResetReg(void)
  2631. {
  2632. U16 value = (*(volatile U16 *)REG_SDIO1_SOFTRESETREG);
  2633. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2634. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_SoftResetReg] --> 0x%08x\n",
  2635. REG_SDIO1_SOFTRESETREG,value);
  2636. #endif
  2637. return value;
  2638. }
  2639. GH_INLINE void GH_SDIO1_set_SoftResetReg_DataTimeoutCounterValue(U8 data)
  2640. {
  2641. GH_SDIO1_SOFTRESETREG_S d;
  2642. d.all = *(volatile U16 *)REG_SDIO1_SOFTRESETREG;
  2643. d.bitc.datatimeoutcountervalue = data;
  2644. *(volatile U16 *)REG_SDIO1_SOFTRESETREG = d.all;
  2645. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2646. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_SoftResetReg_DataTimeoutCounterValue] <-- 0x%08x\n",
  2647. REG_SDIO1_SOFTRESETREG,d.all,d.all);
  2648. #endif
  2649. }
  2650. GH_INLINE U8 GH_SDIO1_get_SoftResetReg_DataTimeoutCounterValue(void)
  2651. {
  2652. GH_SDIO1_SOFTRESETREG_S tmp_value;
  2653. U16 value = (*(volatile U16 *)REG_SDIO1_SOFTRESETREG);
  2654. tmp_value.all = value;
  2655. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2656. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_SoftResetReg_DataTimeoutCounterValue] --> 0x%08x\n",
  2657. REG_SDIO1_SOFTRESETREG,value);
  2658. #endif
  2659. return tmp_value.bitc.datatimeoutcountervalue;
  2660. }
  2661. GH_INLINE void GH_SDIO1_set_SoftResetReg_SoftwareResetCmdLine(U8 data)
  2662. {
  2663. GH_SDIO1_SOFTRESETREG_S d;
  2664. d.all = *(volatile U16 *)REG_SDIO1_SOFTRESETREG;
  2665. d.bitc.softwareresetcmdline = data;
  2666. *(volatile U16 *)REG_SDIO1_SOFTRESETREG = d.all;
  2667. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2668. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_SoftResetReg_SoftwareResetCmdLine] <-- 0x%08x\n",
  2669. REG_SDIO1_SOFTRESETREG,d.all,d.all);
  2670. #endif
  2671. }
  2672. GH_INLINE U8 GH_SDIO1_get_SoftResetReg_SoftwareResetCmdLine(void)
  2673. {
  2674. GH_SDIO1_SOFTRESETREG_S tmp_value;
  2675. U16 value = (*(volatile U16 *)REG_SDIO1_SOFTRESETREG);
  2676. tmp_value.all = value;
  2677. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2678. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_SoftResetReg_SoftwareResetCmdLine] --> 0x%08x\n",
  2679. REG_SDIO1_SOFTRESETREG,value);
  2680. #endif
  2681. return tmp_value.bitc.softwareresetcmdline;
  2682. }
  2683. GH_INLINE void GH_SDIO1_set_SoftResetReg_SoftwareResetAll(U8 data)
  2684. {
  2685. GH_SDIO1_SOFTRESETREG_S d;
  2686. d.all = *(volatile U16 *)REG_SDIO1_SOFTRESETREG;
  2687. d.bitc.softwareresetall = data;
  2688. *(volatile U16 *)REG_SDIO1_SOFTRESETREG = d.all;
  2689. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2690. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_SoftResetReg_SoftwareResetAll] <-- 0x%08x\n",
  2691. REG_SDIO1_SOFTRESETREG,d.all,d.all);
  2692. #endif
  2693. }
  2694. GH_INLINE U8 GH_SDIO1_get_SoftResetReg_SoftwareResetAll(void)
  2695. {
  2696. GH_SDIO1_SOFTRESETREG_S tmp_value;
  2697. U16 value = (*(volatile U16 *)REG_SDIO1_SOFTRESETREG);
  2698. tmp_value.all = value;
  2699. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2700. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_SoftResetReg_SoftwareResetAll] --> 0x%08x\n",
  2701. REG_SDIO1_SOFTRESETREG,value);
  2702. #endif
  2703. return tmp_value.bitc.softwareresetall;
  2704. }
  2705. GH_INLINE void GH_SDIO1_set_SoftResetReg_SoftwareResetDatLine(U8 data)
  2706. {
  2707. GH_SDIO1_SOFTRESETREG_S d;
  2708. d.all = *(volatile U16 *)REG_SDIO1_SOFTRESETREG;
  2709. d.bitc.softwareresetdatline = data;
  2710. *(volatile U16 *)REG_SDIO1_SOFTRESETREG = d.all;
  2711. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2712. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_SoftResetReg_SoftwareResetDatLine] <-- 0x%08x\n",
  2713. REG_SDIO1_SOFTRESETREG,d.all,d.all);
  2714. #endif
  2715. }
  2716. GH_INLINE U8 GH_SDIO1_get_SoftResetReg_SoftwareResetDatLine(void)
  2717. {
  2718. GH_SDIO1_SOFTRESETREG_S tmp_value;
  2719. U16 value = (*(volatile U16 *)REG_SDIO1_SOFTRESETREG);
  2720. tmp_value.all = value;
  2721. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2722. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_SoftResetReg_SoftwareResetDatLine] --> 0x%08x\n",
  2723. REG_SDIO1_SOFTRESETREG,value);
  2724. #endif
  2725. return tmp_value.bitc.softwareresetdatline;
  2726. }
  2727. #endif /* GH_INLINE_LEVEL == 0 */
  2728. /*----------------------------------------------------------------------------*/
  2729. /* register SDIO1_ClkControlReg (read/write) */
  2730. /*----------------------------------------------------------------------------*/
  2731. #if GH_INLINE_LEVEL == 0
  2732. /*! \brief Writes the register 'SDIO1_ClkControlReg'. */
  2733. void GH_SDIO1_set_ClkControlReg(U16 data);
  2734. /*! \brief Reads the register 'SDIO1_ClkControlReg'. */
  2735. U16 GH_SDIO1_get_ClkControlReg(void);
  2736. /*! \brief Writes the bit group 'InternalClkEn' of register 'SDIO1_ClkControlReg'. */
  2737. void GH_SDIO1_set_ClkControlReg_InternalClkEn(U8 data);
  2738. /*! \brief Reads the bit group 'InternalClkEn' of register 'SDIO1_ClkControlReg'. */
  2739. U8 GH_SDIO1_get_ClkControlReg_InternalClkEn(void);
  2740. /*! \brief Writes the bit group 'InternalClkStable' of register 'SDIO1_ClkControlReg'. */
  2741. void GH_SDIO1_set_ClkControlReg_InternalClkStable(U8 data);
  2742. /*! \brief Reads the bit group 'InternalClkStable' of register 'SDIO1_ClkControlReg'. */
  2743. U8 GH_SDIO1_get_ClkControlReg_InternalClkStable(void);
  2744. /*! \brief Writes the bit group 'SdClkEn' of register 'SDIO1_ClkControlReg'. */
  2745. void GH_SDIO1_set_ClkControlReg_SdClkEn(U8 data);
  2746. /*! \brief Reads the bit group 'SdClkEn' of register 'SDIO1_ClkControlReg'. */
  2747. U8 GH_SDIO1_get_ClkControlReg_SdClkEn(void);
  2748. /*! \brief Writes the bit group 'SdclkFreSelect' of register 'SDIO1_ClkControlReg'. */
  2749. void GH_SDIO1_set_ClkControlReg_SdclkFreSelect(U8 data);
  2750. /*! \brief Reads the bit group 'SdclkFreSelect' of register 'SDIO1_ClkControlReg'. */
  2751. U8 GH_SDIO1_get_ClkControlReg_SdclkFreSelect(void);
  2752. #else /* GH_INLINE_LEVEL == 0 */
  2753. GH_INLINE void GH_SDIO1_set_ClkControlReg(U32 data)
  2754. {
  2755. *(volatile U16 *)REG_SDIO1_CLKCONTROLREG = data;
  2756. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2757. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ClkControlReg] <-- 0x%08x\n",
  2758. REG_SDIO1_CLKCONTROLREG,data,data);
  2759. #endif
  2760. }
  2761. GH_INLINE U16 GH_SDIO1_get_ClkControlReg(void)
  2762. {
  2763. U16 value = (*(volatile U16 *)REG_SDIO1_CLKCONTROLREG);
  2764. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2765. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ClkControlReg] --> 0x%08x\n",
  2766. REG_SDIO1_CLKCONTROLREG,value);
  2767. #endif
  2768. return value;
  2769. }
  2770. GH_INLINE void GH_SDIO1_set_ClkControlReg_InternalClkEn(U8 data)
  2771. {
  2772. GH_SDIO1_CLKCONTROLREG_S d;
  2773. d.all = *(volatile U16 *)REG_SDIO1_CLKCONTROLREG;
  2774. d.bitc.internalclken = data;
  2775. *(volatile U16 *)REG_SDIO1_CLKCONTROLREG = d.all;
  2776. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2777. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ClkControlReg_InternalClkEn] <-- 0x%08x\n",
  2778. REG_SDIO1_CLKCONTROLREG,d.all,d.all);
  2779. #endif
  2780. }
  2781. GH_INLINE U8 GH_SDIO1_get_ClkControlReg_InternalClkEn(void)
  2782. {
  2783. GH_SDIO1_CLKCONTROLREG_S tmp_value;
  2784. U16 value = (*(volatile U16 *)REG_SDIO1_CLKCONTROLREG);
  2785. tmp_value.all = value;
  2786. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2787. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ClkControlReg_InternalClkEn] --> 0x%08x\n",
  2788. REG_SDIO1_CLKCONTROLREG,value);
  2789. #endif
  2790. return tmp_value.bitc.internalclken;
  2791. }
  2792. GH_INLINE void GH_SDIO1_set_ClkControlReg_InternalClkStable(U8 data)
  2793. {
  2794. GH_SDIO1_CLKCONTROLREG_S d;
  2795. d.all = *(volatile U16 *)REG_SDIO1_CLKCONTROLREG;
  2796. d.bitc.internalclkstable = data;
  2797. *(volatile U16 *)REG_SDIO1_CLKCONTROLREG = d.all;
  2798. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2799. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ClkControlReg_InternalClkStable] <-- 0x%08x\n",
  2800. REG_SDIO1_CLKCONTROLREG,d.all,d.all);
  2801. #endif
  2802. }
  2803. GH_INLINE U8 GH_SDIO1_get_ClkControlReg_InternalClkStable(void)
  2804. {
  2805. GH_SDIO1_CLKCONTROLREG_S tmp_value;
  2806. U16 value = (*(volatile U16 *)REG_SDIO1_CLKCONTROLREG);
  2807. tmp_value.all = value;
  2808. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2809. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ClkControlReg_InternalClkStable] --> 0x%08x\n",
  2810. REG_SDIO1_CLKCONTROLREG,value);
  2811. #endif
  2812. return tmp_value.bitc.internalclkstable;
  2813. }
  2814. GH_INLINE void GH_SDIO1_set_ClkControlReg_SdClkEn(U8 data)
  2815. {
  2816. GH_SDIO1_CLKCONTROLREG_S d;
  2817. d.all = *(volatile U16 *)REG_SDIO1_CLKCONTROLREG;
  2818. d.bitc.sdclken = data;
  2819. *(volatile U16 *)REG_SDIO1_CLKCONTROLREG = d.all;
  2820. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2821. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ClkControlReg_SdClkEn] <-- 0x%08x\n",
  2822. REG_SDIO1_CLKCONTROLREG,d.all,d.all);
  2823. #endif
  2824. }
  2825. GH_INLINE U8 GH_SDIO1_get_ClkControlReg_SdClkEn(void)
  2826. {
  2827. GH_SDIO1_CLKCONTROLREG_S tmp_value;
  2828. U16 value = (*(volatile U16 *)REG_SDIO1_CLKCONTROLREG);
  2829. tmp_value.all = value;
  2830. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2831. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ClkControlReg_SdClkEn] --> 0x%08x\n",
  2832. REG_SDIO1_CLKCONTROLREG,value);
  2833. #endif
  2834. return tmp_value.bitc.sdclken;
  2835. }
  2836. GH_INLINE void GH_SDIO1_set_ClkControlReg_SdclkFreSelect(U8 data)
  2837. {
  2838. GH_SDIO1_CLKCONTROLREG_S d;
  2839. d.all = *(volatile U16 *)REG_SDIO1_CLKCONTROLREG;
  2840. d.bitc.sdclkfreselect = data;
  2841. *(volatile U16 *)REG_SDIO1_CLKCONTROLREG = d.all;
  2842. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2843. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ClkControlReg_SdclkFreSelect] <-- 0x%08x\n",
  2844. REG_SDIO1_CLKCONTROLREG,d.all,d.all);
  2845. #endif
  2846. }
  2847. GH_INLINE U8 GH_SDIO1_get_ClkControlReg_SdclkFreSelect(void)
  2848. {
  2849. GH_SDIO1_CLKCONTROLREG_S tmp_value;
  2850. U16 value = (*(volatile U16 *)REG_SDIO1_CLKCONTROLREG);
  2851. tmp_value.all = value;
  2852. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2853. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ClkControlReg_SdclkFreSelect] --> 0x%08x\n",
  2854. REG_SDIO1_CLKCONTROLREG,value);
  2855. #endif
  2856. return tmp_value.bitc.sdclkfreselect;
  2857. }
  2858. #endif /* GH_INLINE_LEVEL == 0 */
  2859. /*----------------------------------------------------------------------------*/
  2860. /* register SDIO1_Resp0Reg (read) */
  2861. /*----------------------------------------------------------------------------*/
  2862. #if GH_INLINE_LEVEL == 0
  2863. /*! \brief Reads the register 'SDIO1_Resp0Reg'. */
  2864. U32 GH_SDIO1_get_Resp0Reg(void);
  2865. #else /* GH_INLINE_LEVEL == 0 */
  2866. GH_INLINE U32 GH_SDIO1_get_Resp0Reg(void)
  2867. {
  2868. U32 value = (*(volatile U32 *)REG_SDIO1_RESP0REG);
  2869. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2870. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Resp0Reg] --> 0x%08x\n",
  2871. REG_SDIO1_RESP0REG,value);
  2872. #endif
  2873. return value;
  2874. }
  2875. #endif /* GH_INLINE_LEVEL == 0 */
  2876. /*----------------------------------------------------------------------------*/
  2877. /* register SDIO1_Resp1Reg (read) */
  2878. /*----------------------------------------------------------------------------*/
  2879. #if GH_INLINE_LEVEL == 0
  2880. /*! \brief Reads the register 'SDIO1_Resp1Reg'. */
  2881. U32 GH_SDIO1_get_Resp1Reg(void);
  2882. #else /* GH_INLINE_LEVEL == 0 */
  2883. GH_INLINE U32 GH_SDIO1_get_Resp1Reg(void)
  2884. {
  2885. U32 value = (*(volatile U32 *)REG_SDIO1_RESP1REG);
  2886. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2887. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Resp1Reg] --> 0x%08x\n",
  2888. REG_SDIO1_RESP1REG,value);
  2889. #endif
  2890. return value;
  2891. }
  2892. #endif /* GH_INLINE_LEVEL == 0 */
  2893. /*----------------------------------------------------------------------------*/
  2894. /* register SDIO1_Resp2Reg (read) */
  2895. /*----------------------------------------------------------------------------*/
  2896. #if GH_INLINE_LEVEL == 0
  2897. /*! \brief Reads the register 'SDIO1_Resp2Reg'. */
  2898. U32 GH_SDIO1_get_Resp2Reg(void);
  2899. #else /* GH_INLINE_LEVEL == 0 */
  2900. GH_INLINE U32 GH_SDIO1_get_Resp2Reg(void)
  2901. {
  2902. U32 value = (*(volatile U32 *)REG_SDIO1_RESP2REG);
  2903. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2904. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Resp2Reg] --> 0x%08x\n",
  2905. REG_SDIO1_RESP2REG,value);
  2906. #endif
  2907. return value;
  2908. }
  2909. #endif /* GH_INLINE_LEVEL == 0 */
  2910. /*----------------------------------------------------------------------------*/
  2911. /* register SDIO1_Resp3Reg (read) */
  2912. /*----------------------------------------------------------------------------*/
  2913. #if GH_INLINE_LEVEL == 0
  2914. /*! \brief Reads the register 'SDIO1_Resp3Reg'. */
  2915. U32 GH_SDIO1_get_Resp3Reg(void);
  2916. #else /* GH_INLINE_LEVEL == 0 */
  2917. GH_INLINE U32 GH_SDIO1_get_Resp3Reg(void)
  2918. {
  2919. U32 value = (*(volatile U32 *)REG_SDIO1_RESP3REG);
  2920. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2921. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Resp3Reg] --> 0x%08x\n",
  2922. REG_SDIO1_RESP3REG,value);
  2923. #endif
  2924. return value;
  2925. }
  2926. #endif /* GH_INLINE_LEVEL == 0 */
  2927. /*----------------------------------------------------------------------------*/
  2928. /* register SDIO1_Control00Reg (read/write) */
  2929. /*----------------------------------------------------------------------------*/
  2930. #if GH_INLINE_LEVEL == 0
  2931. /*! \brief Writes the register 'SDIO1_Control00Reg'. */
  2932. void GH_SDIO1_set_Control00Reg(U32 data);
  2933. /*! \brief Reads the register 'SDIO1_Control00Reg'. */
  2934. U32 GH_SDIO1_get_Control00Reg(void);
  2935. /*! \brief Writes the bit group 'LedControl' of register 'SDIO1_Control00Reg'. */
  2936. void GH_SDIO1_set_Control00Reg_LedControl(U8 data);
  2937. /*! \brief Reads the bit group 'LedControl' of register 'SDIO1_Control00Reg'. */
  2938. U8 GH_SDIO1_get_Control00Reg_LedControl(void);
  2939. /*! \brief Writes the bit group 'DataTraWidth' of register 'SDIO1_Control00Reg'. */
  2940. void GH_SDIO1_set_Control00Reg_DataTraWidth(U8 data);
  2941. /*! \brief Reads the bit group 'DataTraWidth' of register 'SDIO1_Control00Reg'. */
  2942. U8 GH_SDIO1_get_Control00Reg_DataTraWidth(void);
  2943. /*! \brief Writes the bit group 'Sd8BitMode' of register 'SDIO1_Control00Reg'. */
  2944. void GH_SDIO1_set_Control00Reg_Sd8BitMode(U8 data);
  2945. /*! \brief Reads the bit group 'Sd8BitMode' of register 'SDIO1_Control00Reg'. */
  2946. U8 GH_SDIO1_get_Control00Reg_Sd8BitMode(void);
  2947. /*! \brief Writes the bit group 'HostSpeedEn' of register 'SDIO1_Control00Reg'. */
  2948. void GH_SDIO1_set_Control00Reg_HostSpeedEn(U8 data);
  2949. /*! \brief Reads the bit group 'HostSpeedEn' of register 'SDIO1_Control00Reg'. */
  2950. U8 GH_SDIO1_get_Control00Reg_HostSpeedEn(void);
  2951. /*! \brief Writes the bit group 'CardDetectTestLevel' of register 'SDIO1_Control00Reg'. */
  2952. void GH_SDIO1_set_Control00Reg_CardDetectTestLevel(U8 data);
  2953. /*! \brief Reads the bit group 'CardDetectTestLevel' of register 'SDIO1_Control00Reg'. */
  2954. U8 GH_SDIO1_get_Control00Reg_CardDetectTestLevel(void);
  2955. /*! \brief Writes the bit group 'CardDetectSigDet' of register 'SDIO1_Control00Reg'. */
  2956. void GH_SDIO1_set_Control00Reg_CardDetectSigDet(U8 data);
  2957. /*! \brief Reads the bit group 'CardDetectSigDet' of register 'SDIO1_Control00Reg'. */
  2958. U8 GH_SDIO1_get_Control00Reg_CardDetectSigDet(void);
  2959. /*! \brief Writes the bit group 'SdBusPower' of register 'SDIO1_Control00Reg'. */
  2960. void GH_SDIO1_set_Control00Reg_SdBusPower(U8 data);
  2961. /*! \brief Reads the bit group 'SdBusPower' of register 'SDIO1_Control00Reg'. */
  2962. U8 GH_SDIO1_get_Control00Reg_SdBusPower(void);
  2963. /*! \brief Writes the bit group 'SdBusVoltageSelect' of register 'SDIO1_Control00Reg'. */
  2964. void GH_SDIO1_set_Control00Reg_SdBusVoltageSelect(U8 data);
  2965. /*! \brief Reads the bit group 'SdBusVoltageSelect' of register 'SDIO1_Control00Reg'. */
  2966. U8 GH_SDIO1_get_Control00Reg_SdBusVoltageSelect(void);
  2967. /*! \brief Writes the bit group 'StopAtBlkGapReq' of register 'SDIO1_Control00Reg'. */
  2968. void GH_SDIO1_set_Control00Reg_StopAtBlkGapReq(U8 data);
  2969. /*! \brief Reads the bit group 'StopAtBlkGapReq' of register 'SDIO1_Control00Reg'. */
  2970. U8 GH_SDIO1_get_Control00Reg_StopAtBlkGapReq(void);
  2971. /*! \brief Writes the bit group 'RWaitControl' of register 'SDIO1_Control00Reg'. */
  2972. void GH_SDIO1_set_Control00Reg_RWaitControl(U8 data);
  2973. /*! \brief Reads the bit group 'RWaitControl' of register 'SDIO1_Control00Reg'. */
  2974. U8 GH_SDIO1_get_Control00Reg_RWaitControl(void);
  2975. /*! \brief Writes the bit group 'ContinueReq' of register 'SDIO1_Control00Reg'. */
  2976. void GH_SDIO1_set_Control00Reg_ContinueReq(U8 data);
  2977. /*! \brief Reads the bit group 'ContinueReq' of register 'SDIO1_Control00Reg'. */
  2978. U8 GH_SDIO1_get_Control00Reg_ContinueReq(void);
  2979. /*! \brief Writes the bit group 'IntAtBlkGap' of register 'SDIO1_Control00Reg'. */
  2980. void GH_SDIO1_set_Control00Reg_IntAtBlkGap(U8 data);
  2981. /*! \brief Reads the bit group 'IntAtBlkGap' of register 'SDIO1_Control00Reg'. */
  2982. U8 GH_SDIO1_get_Control00Reg_IntAtBlkGap(void);
  2983. /*! \brief Writes the bit group 'DriveCcsd' of register 'SDIO1_Control00Reg'. */
  2984. void GH_SDIO1_set_Control00Reg_DriveCcsd(U8 data);
  2985. /*! \brief Reads the bit group 'DriveCcsd' of register 'SDIO1_Control00Reg'. */
  2986. U8 GH_SDIO1_get_Control00Reg_DriveCcsd(void);
  2987. /*! \brief Writes the bit group 'SpiMode' of register 'SDIO1_Control00Reg'. */
  2988. void GH_SDIO1_set_Control00Reg_SpiMode(U8 data);
  2989. /*! \brief Reads the bit group 'SpiMode' of register 'SDIO1_Control00Reg'. */
  2990. U8 GH_SDIO1_get_Control00Reg_SpiMode(void);
  2991. /*! \brief Writes the bit group 'BootEn' of register 'SDIO1_Control00Reg'. */
  2992. void GH_SDIO1_set_Control00Reg_BootEn(U8 data);
  2993. /*! \brief Reads the bit group 'BootEn' of register 'SDIO1_Control00Reg'. */
  2994. U8 GH_SDIO1_get_Control00Reg_BootEn(void);
  2995. /*! \brief Writes the bit group 'AltBootEn' of register 'SDIO1_Control00Reg'. */
  2996. void GH_SDIO1_set_Control00Reg_AltBootEn(U8 data);
  2997. /*! \brief Reads the bit group 'AltBootEn' of register 'SDIO1_Control00Reg'. */
  2998. U8 GH_SDIO1_get_Control00Reg_AltBootEn(void);
  2999. /*! \brief Writes the bit group 'WakeupEvetEnOnCardIns' of register 'SDIO1_Control00Reg'. */
  3000. void GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardIns(U8 data);
  3001. /*! \brief Reads the bit group 'WakeupEvetEnOnCardIns' of register 'SDIO1_Control00Reg'. */
  3002. U8 GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardIns(void);
  3003. /*! \brief Writes the bit group 'WakeupEvetEnOnCardInt' of register 'SDIO1_Control00Reg'. */
  3004. void GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardInt(U8 data);
  3005. /*! \brief Reads the bit group 'WakeupEvetEnOnCardInt' of register 'SDIO1_Control00Reg'. */
  3006. U8 GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardInt(void);
  3007. /*! \brief Writes the bit group 'WakeupEvetEnOnCardRem' of register 'SDIO1_Control00Reg'. */
  3008. void GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardRem(U8 data);
  3009. /*! \brief Reads the bit group 'WakeupEvetEnOnCardRem' of register 'SDIO1_Control00Reg'. */
  3010. U8 GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardRem(void);
  3011. #else /* GH_INLINE_LEVEL == 0 */
  3012. GH_INLINE void GH_SDIO1_set_Control00Reg(U32 data)
  3013. {
  3014. *(volatile U32 *)REG_SDIO1_CONTROL00REG = data;
  3015. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3016. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg] <-- 0x%08x\n",
  3017. REG_SDIO1_CONTROL00REG,data,data);
  3018. #endif
  3019. }
  3020. GH_INLINE U32 GH_SDIO1_get_Control00Reg(void)
  3021. {
  3022. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3023. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3024. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg] --> 0x%08x\n",
  3025. REG_SDIO1_CONTROL00REG,value);
  3026. #endif
  3027. return value;
  3028. }
  3029. GH_INLINE void GH_SDIO1_set_Control00Reg_LedControl(U8 data)
  3030. {
  3031. GH_SDIO1_CONTROL00REG_S d;
  3032. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3033. d.bitc.ledcontrol = data;
  3034. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3035. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3036. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_LedControl] <-- 0x%08x\n",
  3037. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3038. #endif
  3039. }
  3040. GH_INLINE U8 GH_SDIO1_get_Control00Reg_LedControl(void)
  3041. {
  3042. GH_SDIO1_CONTROL00REG_S tmp_value;
  3043. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3044. tmp_value.all = value;
  3045. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3046. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_LedControl] --> 0x%08x\n",
  3047. REG_SDIO1_CONTROL00REG,value);
  3048. #endif
  3049. return tmp_value.bitc.ledcontrol;
  3050. }
  3051. GH_INLINE void GH_SDIO1_set_Control00Reg_DataTraWidth(U8 data)
  3052. {
  3053. GH_SDIO1_CONTROL00REG_S d;
  3054. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3055. d.bitc.datatrawidth = data;
  3056. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3057. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3058. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_DataTraWidth] <-- 0x%08x\n",
  3059. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3060. #endif
  3061. }
  3062. GH_INLINE U8 GH_SDIO1_get_Control00Reg_DataTraWidth(void)
  3063. {
  3064. GH_SDIO1_CONTROL00REG_S tmp_value;
  3065. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3066. tmp_value.all = value;
  3067. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3068. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_DataTraWidth] --> 0x%08x\n",
  3069. REG_SDIO1_CONTROL00REG,value);
  3070. #endif
  3071. return tmp_value.bitc.datatrawidth;
  3072. }
  3073. GH_INLINE void GH_SDIO1_set_Control00Reg_Sd8BitMode(U8 data)
  3074. {
  3075. GH_SDIO1_CONTROL00REG_S d;
  3076. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3077. d.bitc.sd8bitmode = data;
  3078. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3079. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3080. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_Sd8BitMode] <-- 0x%08x\n",
  3081. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3082. #endif
  3083. }
  3084. GH_INLINE U8 GH_SDIO1_get_Control00Reg_Sd8BitMode(void)
  3085. {
  3086. GH_SDIO1_CONTROL00REG_S tmp_value;
  3087. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3088. tmp_value.all = value;
  3089. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3090. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_Sd8BitMode] --> 0x%08x\n",
  3091. REG_SDIO1_CONTROL00REG,value);
  3092. #endif
  3093. return tmp_value.bitc.sd8bitmode;
  3094. }
  3095. GH_INLINE void GH_SDIO1_set_Control00Reg_HostSpeedEn(U8 data)
  3096. {
  3097. GH_SDIO1_CONTROL00REG_S d;
  3098. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3099. d.bitc.hostspeeden = data;
  3100. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3101. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3102. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_HostSpeedEn] <-- 0x%08x\n",
  3103. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3104. #endif
  3105. }
  3106. GH_INLINE U8 GH_SDIO1_get_Control00Reg_HostSpeedEn(void)
  3107. {
  3108. GH_SDIO1_CONTROL00REG_S tmp_value;
  3109. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3110. tmp_value.all = value;
  3111. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3112. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_HostSpeedEn] --> 0x%08x\n",
  3113. REG_SDIO1_CONTROL00REG,value);
  3114. #endif
  3115. return tmp_value.bitc.hostspeeden;
  3116. }
  3117. GH_INLINE void GH_SDIO1_set_Control00Reg_CardDetectTestLevel(U8 data)
  3118. {
  3119. GH_SDIO1_CONTROL00REG_S d;
  3120. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3121. d.bitc.carddetecttestlevel = data;
  3122. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3123. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3124. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_CardDetectTestLevel] <-- 0x%08x\n",
  3125. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3126. #endif
  3127. }
  3128. GH_INLINE U8 GH_SDIO1_get_Control00Reg_CardDetectTestLevel(void)
  3129. {
  3130. GH_SDIO1_CONTROL00REG_S tmp_value;
  3131. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3132. tmp_value.all = value;
  3133. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3134. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_CardDetectTestLevel] --> 0x%08x\n",
  3135. REG_SDIO1_CONTROL00REG,value);
  3136. #endif
  3137. return tmp_value.bitc.carddetecttestlevel;
  3138. }
  3139. GH_INLINE void GH_SDIO1_set_Control00Reg_CardDetectSigDet(U8 data)
  3140. {
  3141. GH_SDIO1_CONTROL00REG_S d;
  3142. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3143. d.bitc.carddetectsigdet = data;
  3144. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3145. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3146. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_CardDetectSigDet] <-- 0x%08x\n",
  3147. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3148. #endif
  3149. }
  3150. GH_INLINE U8 GH_SDIO1_get_Control00Reg_CardDetectSigDet(void)
  3151. {
  3152. GH_SDIO1_CONTROL00REG_S tmp_value;
  3153. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3154. tmp_value.all = value;
  3155. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3156. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_CardDetectSigDet] --> 0x%08x\n",
  3157. REG_SDIO1_CONTROL00REG,value);
  3158. #endif
  3159. return tmp_value.bitc.carddetectsigdet;
  3160. }
  3161. GH_INLINE void GH_SDIO1_set_Control00Reg_SdBusPower(U8 data)
  3162. {
  3163. GH_SDIO1_CONTROL00REG_S d;
  3164. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3165. d.bitc.sdbuspower = data;
  3166. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3167. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3168. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_SdBusPower] <-- 0x%08x\n",
  3169. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3170. #endif
  3171. }
  3172. GH_INLINE U8 GH_SDIO1_get_Control00Reg_SdBusPower(void)
  3173. {
  3174. GH_SDIO1_CONTROL00REG_S tmp_value;
  3175. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3176. tmp_value.all = value;
  3177. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3178. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_SdBusPower] --> 0x%08x\n",
  3179. REG_SDIO1_CONTROL00REG,value);
  3180. #endif
  3181. return tmp_value.bitc.sdbuspower;
  3182. }
  3183. GH_INLINE void GH_SDIO1_set_Control00Reg_SdBusVoltageSelect(U8 data)
  3184. {
  3185. GH_SDIO1_CONTROL00REG_S d;
  3186. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3187. d.bitc.sdbusvoltageselect = data;
  3188. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3189. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3190. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_SdBusVoltageSelect] <-- 0x%08x\n",
  3191. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3192. #endif
  3193. }
  3194. GH_INLINE U8 GH_SDIO1_get_Control00Reg_SdBusVoltageSelect(void)
  3195. {
  3196. GH_SDIO1_CONTROL00REG_S tmp_value;
  3197. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3198. tmp_value.all = value;
  3199. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3200. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_SdBusVoltageSelect] --> 0x%08x\n",
  3201. REG_SDIO1_CONTROL00REG,value);
  3202. #endif
  3203. return tmp_value.bitc.sdbusvoltageselect;
  3204. }
  3205. GH_INLINE void GH_SDIO1_set_Control00Reg_StopAtBlkGapReq(U8 data)
  3206. {
  3207. GH_SDIO1_CONTROL00REG_S d;
  3208. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3209. d.bitc.stopatblkgapreq = data;
  3210. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3211. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3212. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_StopAtBlkGapReq] <-- 0x%08x\n",
  3213. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3214. #endif
  3215. }
  3216. GH_INLINE U8 GH_SDIO1_get_Control00Reg_StopAtBlkGapReq(void)
  3217. {
  3218. GH_SDIO1_CONTROL00REG_S tmp_value;
  3219. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3220. tmp_value.all = value;
  3221. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3222. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_StopAtBlkGapReq] --> 0x%08x\n",
  3223. REG_SDIO1_CONTROL00REG,value);
  3224. #endif
  3225. return tmp_value.bitc.stopatblkgapreq;
  3226. }
  3227. GH_INLINE void GH_SDIO1_set_Control00Reg_RWaitControl(U8 data)
  3228. {
  3229. GH_SDIO1_CONTROL00REG_S d;
  3230. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3231. d.bitc.rwaitcontrol = data;
  3232. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3233. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3234. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_RWaitControl] <-- 0x%08x\n",
  3235. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3236. #endif
  3237. }
  3238. GH_INLINE U8 GH_SDIO1_get_Control00Reg_RWaitControl(void)
  3239. {
  3240. GH_SDIO1_CONTROL00REG_S tmp_value;
  3241. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3242. tmp_value.all = value;
  3243. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3244. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_RWaitControl] --> 0x%08x\n",
  3245. REG_SDIO1_CONTROL00REG,value);
  3246. #endif
  3247. return tmp_value.bitc.rwaitcontrol;
  3248. }
  3249. GH_INLINE void GH_SDIO1_set_Control00Reg_ContinueReq(U8 data)
  3250. {
  3251. GH_SDIO1_CONTROL00REG_S d;
  3252. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3253. d.bitc.continuereq = data;
  3254. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3255. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3256. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_ContinueReq] <-- 0x%08x\n",
  3257. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3258. #endif
  3259. }
  3260. GH_INLINE U8 GH_SDIO1_get_Control00Reg_ContinueReq(void)
  3261. {
  3262. GH_SDIO1_CONTROL00REG_S tmp_value;
  3263. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3264. tmp_value.all = value;
  3265. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3266. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_ContinueReq] --> 0x%08x\n",
  3267. REG_SDIO1_CONTROL00REG,value);
  3268. #endif
  3269. return tmp_value.bitc.continuereq;
  3270. }
  3271. GH_INLINE void GH_SDIO1_set_Control00Reg_IntAtBlkGap(U8 data)
  3272. {
  3273. GH_SDIO1_CONTROL00REG_S d;
  3274. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3275. d.bitc.intatblkgap = data;
  3276. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3277. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3278. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_IntAtBlkGap] <-- 0x%08x\n",
  3279. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3280. #endif
  3281. }
  3282. GH_INLINE U8 GH_SDIO1_get_Control00Reg_IntAtBlkGap(void)
  3283. {
  3284. GH_SDIO1_CONTROL00REG_S tmp_value;
  3285. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3286. tmp_value.all = value;
  3287. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3288. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_IntAtBlkGap] --> 0x%08x\n",
  3289. REG_SDIO1_CONTROL00REG,value);
  3290. #endif
  3291. return tmp_value.bitc.intatblkgap;
  3292. }
  3293. GH_INLINE void GH_SDIO1_set_Control00Reg_DriveCcsd(U8 data)
  3294. {
  3295. GH_SDIO1_CONTROL00REG_S d;
  3296. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3297. d.bitc.driveccsd = data;
  3298. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3299. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3300. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_DriveCcsd] <-- 0x%08x\n",
  3301. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3302. #endif
  3303. }
  3304. GH_INLINE U8 GH_SDIO1_get_Control00Reg_DriveCcsd(void)
  3305. {
  3306. GH_SDIO1_CONTROL00REG_S tmp_value;
  3307. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3308. tmp_value.all = value;
  3309. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3310. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_DriveCcsd] --> 0x%08x\n",
  3311. REG_SDIO1_CONTROL00REG,value);
  3312. #endif
  3313. return tmp_value.bitc.driveccsd;
  3314. }
  3315. GH_INLINE void GH_SDIO1_set_Control00Reg_SpiMode(U8 data)
  3316. {
  3317. GH_SDIO1_CONTROL00REG_S d;
  3318. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3319. d.bitc.spimode = data;
  3320. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3321. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3322. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_SpiMode] <-- 0x%08x\n",
  3323. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3324. #endif
  3325. }
  3326. GH_INLINE U8 GH_SDIO1_get_Control00Reg_SpiMode(void)
  3327. {
  3328. GH_SDIO1_CONTROL00REG_S tmp_value;
  3329. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3330. tmp_value.all = value;
  3331. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3332. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_SpiMode] --> 0x%08x\n",
  3333. REG_SDIO1_CONTROL00REG,value);
  3334. #endif
  3335. return tmp_value.bitc.spimode;
  3336. }
  3337. GH_INLINE void GH_SDIO1_set_Control00Reg_BootEn(U8 data)
  3338. {
  3339. GH_SDIO1_CONTROL00REG_S d;
  3340. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3341. d.bitc.booten = data;
  3342. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3343. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3344. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_BootEn] <-- 0x%08x\n",
  3345. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3346. #endif
  3347. }
  3348. GH_INLINE U8 GH_SDIO1_get_Control00Reg_BootEn(void)
  3349. {
  3350. GH_SDIO1_CONTROL00REG_S tmp_value;
  3351. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3352. tmp_value.all = value;
  3353. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3354. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_BootEn] --> 0x%08x\n",
  3355. REG_SDIO1_CONTROL00REG,value);
  3356. #endif
  3357. return tmp_value.bitc.booten;
  3358. }
  3359. GH_INLINE void GH_SDIO1_set_Control00Reg_AltBootEn(U8 data)
  3360. {
  3361. GH_SDIO1_CONTROL00REG_S d;
  3362. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3363. d.bitc.altbooten = data;
  3364. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3365. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3366. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_AltBootEn] <-- 0x%08x\n",
  3367. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3368. #endif
  3369. }
  3370. GH_INLINE U8 GH_SDIO1_get_Control00Reg_AltBootEn(void)
  3371. {
  3372. GH_SDIO1_CONTROL00REG_S tmp_value;
  3373. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3374. tmp_value.all = value;
  3375. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3376. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_AltBootEn] --> 0x%08x\n",
  3377. REG_SDIO1_CONTROL00REG,value);
  3378. #endif
  3379. return tmp_value.bitc.altbooten;
  3380. }
  3381. GH_INLINE void GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardIns(U8 data)
  3382. {
  3383. GH_SDIO1_CONTROL00REG_S d;
  3384. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3385. d.bitc.wakeupevetenoncardins = data;
  3386. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3387. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3388. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardIns] <-- 0x%08x\n",
  3389. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3390. #endif
  3391. }
  3392. GH_INLINE U8 GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardIns(void)
  3393. {
  3394. GH_SDIO1_CONTROL00REG_S tmp_value;
  3395. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3396. tmp_value.all = value;
  3397. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3398. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardIns] --> 0x%08x\n",
  3399. REG_SDIO1_CONTROL00REG,value);
  3400. #endif
  3401. return tmp_value.bitc.wakeupevetenoncardins;
  3402. }
  3403. GH_INLINE void GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardInt(U8 data)
  3404. {
  3405. GH_SDIO1_CONTROL00REG_S d;
  3406. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3407. d.bitc.wakeupevetenoncardint = data;
  3408. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3409. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3410. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardInt] <-- 0x%08x\n",
  3411. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3412. #endif
  3413. }
  3414. GH_INLINE U8 GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardInt(void)
  3415. {
  3416. GH_SDIO1_CONTROL00REG_S tmp_value;
  3417. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3418. tmp_value.all = value;
  3419. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3420. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardInt] --> 0x%08x\n",
  3421. REG_SDIO1_CONTROL00REG,value);
  3422. #endif
  3423. return tmp_value.bitc.wakeupevetenoncardint;
  3424. }
  3425. GH_INLINE void GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardRem(U8 data)
  3426. {
  3427. GH_SDIO1_CONTROL00REG_S d;
  3428. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3429. d.bitc.wakeupevetenoncardrem = data;
  3430. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3431. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3432. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardRem] <-- 0x%08x\n",
  3433. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3434. #endif
  3435. }
  3436. GH_INLINE U8 GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardRem(void)
  3437. {
  3438. GH_SDIO1_CONTROL00REG_S tmp_value;
  3439. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3440. tmp_value.all = value;
  3441. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3442. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardRem] --> 0x%08x\n",
  3443. REG_SDIO1_CONTROL00REG,value);
  3444. #endif
  3445. return tmp_value.bitc.wakeupevetenoncardrem;
  3446. }
  3447. #endif /* GH_INLINE_LEVEL == 0 */
  3448. /*----------------------------------------------------------------------------*/
  3449. /* register SDIO1_PresentStateReg (read) */
  3450. /*----------------------------------------------------------------------------*/
  3451. #if GH_INLINE_LEVEL == 0
  3452. /*! \brief Reads the register 'SDIO1_PresentStateReg'. */
  3453. U32 GH_SDIO1_get_PresentStateReg(void);
  3454. /*! \brief Reads the bit group 'CmdInhibitCmd' of register 'SDIO1_PresentStateReg'. */
  3455. U8 GH_SDIO1_get_PresentStateReg_CmdInhibitCmd(void);
  3456. /*! \brief Reads the bit group 'DataLineActive' of register 'SDIO1_PresentStateReg'. */
  3457. U8 GH_SDIO1_get_PresentStateReg_DataLineActive(void);
  3458. /*! \brief Reads the bit group 'CmdInhibitData' of register 'SDIO1_PresentStateReg'. */
  3459. U8 GH_SDIO1_get_PresentStateReg_CmdInhibitData(void);
  3460. /*! \brief Reads the bit group 'RTraActive' of register 'SDIO1_PresentStateReg'. */
  3461. U8 GH_SDIO1_get_PresentStateReg_RTraActive(void);
  3462. /*! \brief Reads the bit group 'BufWEn' of register 'SDIO1_PresentStateReg'. */
  3463. U8 GH_SDIO1_get_PresentStateReg_BufWEn(void);
  3464. /*! \brief Reads the bit group 'WTraActive' of register 'SDIO1_PresentStateReg'. */
  3465. U8 GH_SDIO1_get_PresentStateReg_WTraActive(void);
  3466. /*! \brief Reads the bit group 'BufREn' of register 'SDIO1_PresentStateReg'. */
  3467. U8 GH_SDIO1_get_PresentStateReg_BufREn(void);
  3468. /*! \brief Reads the bit group 'CardInserted' of register 'SDIO1_PresentStateReg'. */
  3469. U8 GH_SDIO1_get_PresentStateReg_CardInserted(void);
  3470. /*! \brief Reads the bit group 'CardDetectPinLevel' of register 'SDIO1_PresentStateReg'. */
  3471. U8 GH_SDIO1_get_PresentStateReg_CardDetectPinLevel(void);
  3472. /*! \brief Reads the bit group 'CardStateStable' of register 'SDIO1_PresentStateReg'. */
  3473. U8 GH_SDIO1_get_PresentStateReg_CardStateStable(void);
  3474. /*! \brief Reads the bit group 'WProSwiPinLevel' of register 'SDIO1_PresentStateReg'. */
  3475. U8 GH_SDIO1_get_PresentStateReg_WProSwiPinLevel(void);
  3476. /*! \brief Reads the bit group 'Data03LineSigLevel' of register 'SDIO1_PresentStateReg'. */
  3477. U8 GH_SDIO1_get_PresentStateReg_Data03LineSigLevel(void);
  3478. /*! \brief Reads the bit group 'CmdLineSigLevel' of register 'SDIO1_PresentStateReg'. */
  3479. U8 GH_SDIO1_get_PresentStateReg_CmdLineSigLevel(void);
  3480. /*! \brief Reads the bit group 'Data47LineSigLevel' of register 'SDIO1_PresentStateReg'. */
  3481. U8 GH_SDIO1_get_PresentStateReg_Data47LineSigLevel(void);
  3482. #else /* GH_INLINE_LEVEL == 0 */
  3483. GH_INLINE U32 GH_SDIO1_get_PresentStateReg(void)
  3484. {
  3485. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3486. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3487. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg] --> 0x%08x\n",
  3488. REG_SDIO1_PRESENTSTATEREG,value);
  3489. #endif
  3490. return value;
  3491. }
  3492. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_CmdInhibitCmd(void)
  3493. {
  3494. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3495. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3496. tmp_value.all = value;
  3497. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3498. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_CmdInhibitCmd] --> 0x%08x\n",
  3499. REG_SDIO1_PRESENTSTATEREG,value);
  3500. #endif
  3501. return tmp_value.bitc.cmdinhibitcmd;
  3502. }
  3503. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_DataLineActive(void)
  3504. {
  3505. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3506. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3507. tmp_value.all = value;
  3508. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3509. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_DataLineActive] --> 0x%08x\n",
  3510. REG_SDIO1_PRESENTSTATEREG,value);
  3511. #endif
  3512. return tmp_value.bitc.datalineactive;
  3513. }
  3514. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_CmdInhibitData(void)
  3515. {
  3516. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3517. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3518. tmp_value.all = value;
  3519. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3520. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_CmdInhibitData] --> 0x%08x\n",
  3521. REG_SDIO1_PRESENTSTATEREG,value);
  3522. #endif
  3523. return tmp_value.bitc.cmdinhibitdata;
  3524. }
  3525. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_RTraActive(void)
  3526. {
  3527. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3528. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3529. tmp_value.all = value;
  3530. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3531. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_RTraActive] --> 0x%08x\n",
  3532. REG_SDIO1_PRESENTSTATEREG,value);
  3533. #endif
  3534. return tmp_value.bitc.rtraactive;
  3535. }
  3536. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_BufWEn(void)
  3537. {
  3538. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3539. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3540. tmp_value.all = value;
  3541. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3542. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_BufWEn] --> 0x%08x\n",
  3543. REG_SDIO1_PRESENTSTATEREG,value);
  3544. #endif
  3545. return tmp_value.bitc.bufwen;
  3546. }
  3547. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_WTraActive(void)
  3548. {
  3549. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3550. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3551. tmp_value.all = value;
  3552. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3553. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_WTraActive] --> 0x%08x\n",
  3554. REG_SDIO1_PRESENTSTATEREG,value);
  3555. #endif
  3556. return tmp_value.bitc.wtraactive;
  3557. }
  3558. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_BufREn(void)
  3559. {
  3560. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3561. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3562. tmp_value.all = value;
  3563. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3564. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_BufREn] --> 0x%08x\n",
  3565. REG_SDIO1_PRESENTSTATEREG,value);
  3566. #endif
  3567. return tmp_value.bitc.bufren;
  3568. }
  3569. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_CardInserted(void)
  3570. {
  3571. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3572. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3573. tmp_value.all = value;
  3574. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3575. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_CardInserted] --> 0x%08x\n",
  3576. REG_SDIO1_PRESENTSTATEREG,value);
  3577. #endif
  3578. return tmp_value.bitc.cardinserted;
  3579. }
  3580. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_CardDetectPinLevel(void)
  3581. {
  3582. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3583. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3584. tmp_value.all = value;
  3585. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3586. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_CardDetectPinLevel] --> 0x%08x\n",
  3587. REG_SDIO1_PRESENTSTATEREG,value);
  3588. #endif
  3589. return tmp_value.bitc.carddetectpinlevel;
  3590. }
  3591. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_CardStateStable(void)
  3592. {
  3593. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3594. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3595. tmp_value.all = value;
  3596. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3597. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_CardStateStable] --> 0x%08x\n",
  3598. REG_SDIO1_PRESENTSTATEREG,value);
  3599. #endif
  3600. return tmp_value.bitc.cardstatestable;
  3601. }
  3602. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_WProSwiPinLevel(void)
  3603. {
  3604. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3605. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3606. tmp_value.all = value;
  3607. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3608. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_WProSwiPinLevel] --> 0x%08x\n",
  3609. REG_SDIO1_PRESENTSTATEREG,value);
  3610. #endif
  3611. return tmp_value.bitc.wproswipinlevel;
  3612. }
  3613. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_Data03LineSigLevel(void)
  3614. {
  3615. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3616. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3617. tmp_value.all = value;
  3618. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3619. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_Data03LineSigLevel] --> 0x%08x\n",
  3620. REG_SDIO1_PRESENTSTATEREG,value);
  3621. #endif
  3622. return tmp_value.bitc.data03linesiglevel;
  3623. }
  3624. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_CmdLineSigLevel(void)
  3625. {
  3626. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3627. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3628. tmp_value.all = value;
  3629. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3630. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_CmdLineSigLevel] --> 0x%08x\n",
  3631. REG_SDIO1_PRESENTSTATEREG,value);
  3632. #endif
  3633. return tmp_value.bitc.cmdlinesiglevel;
  3634. }
  3635. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_Data47LineSigLevel(void)
  3636. {
  3637. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3638. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3639. tmp_value.all = value;
  3640. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3641. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_Data47LineSigLevel] --> 0x%08x\n",
  3642. REG_SDIO1_PRESENTSTATEREG,value);
  3643. #endif
  3644. return tmp_value.bitc.data47linesiglevel;
  3645. }
  3646. #endif /* GH_INLINE_LEVEL == 0 */
  3647. /*----------------------------------------------------------------------------*/
  3648. /* register SDIO1_ArgReg (read/write) */
  3649. /*----------------------------------------------------------------------------*/
  3650. #if GH_INLINE_LEVEL == 0
  3651. /*! \brief Writes the register 'SDIO1_ArgReg'. */
  3652. void GH_SDIO1_set_ArgReg(U32 data);
  3653. /*! \brief Reads the register 'SDIO1_ArgReg'. */
  3654. U32 GH_SDIO1_get_ArgReg(void);
  3655. #else /* GH_INLINE_LEVEL == 0 */
  3656. GH_INLINE void GH_SDIO1_set_ArgReg(U32 data)
  3657. {
  3658. *(volatile U32 *)REG_SDIO1_ARGREG = data;
  3659. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3660. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ArgReg] <-- 0x%08x\n",
  3661. REG_SDIO1_ARGREG,data,data);
  3662. #endif
  3663. }
  3664. GH_INLINE U32 GH_SDIO1_get_ArgReg(void)
  3665. {
  3666. U32 value = (*(volatile U32 *)REG_SDIO1_ARGREG);
  3667. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3668. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ArgReg] --> 0x%08x\n",
  3669. REG_SDIO1_ARGREG,value);
  3670. #endif
  3671. return value;
  3672. }
  3673. #endif /* GH_INLINE_LEVEL == 0 */
  3674. /*----------------------------------------------------------------------------*/
  3675. /* register SDIO1_CapReg (read) */
  3676. /*----------------------------------------------------------------------------*/
  3677. #if GH_INLINE_LEVEL == 0
  3678. /*! \brief Reads the register 'SDIO1_CapReg'. */
  3679. U32 GH_SDIO1_get_CapReg(void);
  3680. /*! \brief Reads the bit group 'TimeoutClkFre' of register 'SDIO1_CapReg'. */
  3681. U8 GH_SDIO1_get_CapReg_TimeoutClkFre(void);
  3682. /*! \brief Reads the bit group 'TimeoutClkUnit' of register 'SDIO1_CapReg'. */
  3683. U8 GH_SDIO1_get_CapReg_TimeoutClkUnit(void);
  3684. /*! \brief Reads the bit group 'BaseClkFreForSdClk' of register 'SDIO1_CapReg'. */
  3685. U8 GH_SDIO1_get_CapReg_BaseClkFreForSdClk(void);
  3686. /*! \brief Reads the bit group 'MaxBlkLen' of register 'SDIO1_CapReg'. */
  3687. U8 GH_SDIO1_get_CapReg_MaxBlkLen(void);
  3688. /*! \brief Reads the bit group 'ExtendedMediaBusSup' of register 'SDIO1_CapReg'. */
  3689. U8 GH_SDIO1_get_CapReg_ExtendedMediaBusSup(void);
  3690. /*! \brief Reads the bit group 'HighSpeedSup' of register 'SDIO1_CapReg'. */
  3691. U8 GH_SDIO1_get_CapReg_HighSpeedSup(void);
  3692. /*! \brief Reads the bit group 'SusResSup' of register 'SDIO1_CapReg'. */
  3693. U8 GH_SDIO1_get_CapReg_SusResSup(void);
  3694. /*! \brief Reads the bit group 'SdmaSup' of register 'SDIO1_CapReg'. */
  3695. U8 GH_SDIO1_get_CapReg_SdmaSup(void);
  3696. /*! \brief Reads the bit group 'VoltageSup33v' of register 'SDIO1_CapReg'. */
  3697. U8 GH_SDIO1_get_CapReg_VoltageSup33v(void);
  3698. /*! \brief Reads the bit group 'VoltageSup30v' of register 'SDIO1_CapReg'. */
  3699. U8 GH_SDIO1_get_CapReg_VoltageSup30v(void);
  3700. /*! \brief Reads the bit group 'VoltageSup18v' of register 'SDIO1_CapReg'. */
  3701. U8 GH_SDIO1_get_CapReg_VoltageSup18v(void);
  3702. /*! \brief Reads the bit group 'IntMode' of register 'SDIO1_CapReg'. */
  3703. U8 GH_SDIO1_get_CapReg_IntMode(void);
  3704. #else /* GH_INLINE_LEVEL == 0 */
  3705. GH_INLINE U32 GH_SDIO1_get_CapReg(void)
  3706. {
  3707. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3708. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3709. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg] --> 0x%08x\n",
  3710. REG_SDIO1_CAPREG,value);
  3711. #endif
  3712. return value;
  3713. }
  3714. GH_INLINE U8 GH_SDIO1_get_CapReg_TimeoutClkFre(void)
  3715. {
  3716. GH_SDIO1_CAPREG_S tmp_value;
  3717. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3718. tmp_value.all = value;
  3719. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3720. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_TimeoutClkFre] --> 0x%08x\n",
  3721. REG_SDIO1_CAPREG,value);
  3722. #endif
  3723. return tmp_value.bitc.timeoutclkfre;
  3724. }
  3725. GH_INLINE U8 GH_SDIO1_get_CapReg_TimeoutClkUnit(void)
  3726. {
  3727. GH_SDIO1_CAPREG_S tmp_value;
  3728. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3729. tmp_value.all = value;
  3730. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3731. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_TimeoutClkUnit] --> 0x%08x\n",
  3732. REG_SDIO1_CAPREG,value);
  3733. #endif
  3734. return tmp_value.bitc.timeoutclkunit;
  3735. }
  3736. GH_INLINE U8 GH_SDIO1_get_CapReg_BaseClkFreForSdClk(void)
  3737. {
  3738. GH_SDIO1_CAPREG_S tmp_value;
  3739. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3740. tmp_value.all = value;
  3741. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3742. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_BaseClkFreForSdClk] --> 0x%08x\n",
  3743. REG_SDIO1_CAPREG,value);
  3744. #endif
  3745. return tmp_value.bitc.baseclkfreforsdclk;
  3746. }
  3747. GH_INLINE U8 GH_SDIO1_get_CapReg_MaxBlkLen(void)
  3748. {
  3749. GH_SDIO1_CAPREG_S tmp_value;
  3750. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3751. tmp_value.all = value;
  3752. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3753. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_MaxBlkLen] --> 0x%08x\n",
  3754. REG_SDIO1_CAPREG,value);
  3755. #endif
  3756. return tmp_value.bitc.maxblklen;
  3757. }
  3758. GH_INLINE U8 GH_SDIO1_get_CapReg_ExtendedMediaBusSup(void)
  3759. {
  3760. GH_SDIO1_CAPREG_S tmp_value;
  3761. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3762. tmp_value.all = value;
  3763. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3764. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_ExtendedMediaBusSup] --> 0x%08x\n",
  3765. REG_SDIO1_CAPREG,value);
  3766. #endif
  3767. return tmp_value.bitc.extendedmediabussup;
  3768. }
  3769. GH_INLINE U8 GH_SDIO1_get_CapReg_HighSpeedSup(void)
  3770. {
  3771. GH_SDIO1_CAPREG_S tmp_value;
  3772. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3773. tmp_value.all = value;
  3774. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3775. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_HighSpeedSup] --> 0x%08x\n",
  3776. REG_SDIO1_CAPREG,value);
  3777. #endif
  3778. return tmp_value.bitc.highspeedsup;
  3779. }
  3780. GH_INLINE U8 GH_SDIO1_get_CapReg_SusResSup(void)
  3781. {
  3782. GH_SDIO1_CAPREG_S tmp_value;
  3783. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3784. tmp_value.all = value;
  3785. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3786. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_SusResSup] --> 0x%08x\n",
  3787. REG_SDIO1_CAPREG,value);
  3788. #endif
  3789. return tmp_value.bitc.susressup;
  3790. }
  3791. GH_INLINE U8 GH_SDIO1_get_CapReg_SdmaSup(void)
  3792. {
  3793. GH_SDIO1_CAPREG_S tmp_value;
  3794. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3795. tmp_value.all = value;
  3796. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3797. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_SdmaSup] --> 0x%08x\n",
  3798. REG_SDIO1_CAPREG,value);
  3799. #endif
  3800. return tmp_value.bitc.sdmasup;
  3801. }
  3802. GH_INLINE U8 GH_SDIO1_get_CapReg_VoltageSup33v(void)
  3803. {
  3804. GH_SDIO1_CAPREG_S tmp_value;
  3805. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3806. tmp_value.all = value;
  3807. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3808. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_VoltageSup33v] --> 0x%08x\n",
  3809. REG_SDIO1_CAPREG,value);
  3810. #endif
  3811. return tmp_value.bitc.voltagesup33v;
  3812. }
  3813. GH_INLINE U8 GH_SDIO1_get_CapReg_VoltageSup30v(void)
  3814. {
  3815. GH_SDIO1_CAPREG_S tmp_value;
  3816. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3817. tmp_value.all = value;
  3818. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3819. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_VoltageSup30v] --> 0x%08x\n",
  3820. REG_SDIO1_CAPREG,value);
  3821. #endif
  3822. return tmp_value.bitc.voltagesup30v;
  3823. }
  3824. GH_INLINE U8 GH_SDIO1_get_CapReg_VoltageSup18v(void)
  3825. {
  3826. GH_SDIO1_CAPREG_S tmp_value;
  3827. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3828. tmp_value.all = value;
  3829. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3830. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_VoltageSup18v] --> 0x%08x\n",
  3831. REG_SDIO1_CAPREG,value);
  3832. #endif
  3833. return tmp_value.bitc.voltagesup18v;
  3834. }
  3835. GH_INLINE U8 GH_SDIO1_get_CapReg_IntMode(void)
  3836. {
  3837. GH_SDIO1_CAPREG_S tmp_value;
  3838. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3839. tmp_value.all = value;
  3840. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3841. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_IntMode] --> 0x%08x\n",
  3842. REG_SDIO1_CAPREG,value);
  3843. #endif
  3844. return tmp_value.bitc.intmode;
  3845. }
  3846. #endif /* GH_INLINE_LEVEL == 0 */
  3847. /*----------------------------------------------------------------------------*/
  3848. /* register SDIO1_AutoCmd12ErrStatusReg (read) */
  3849. /*----------------------------------------------------------------------------*/
  3850. #if GH_INLINE_LEVEL == 0
  3851. /*! \brief Reads the register 'SDIO1_AutoCmd12ErrStatusReg'. */
  3852. U32 GH_SDIO1_get_AutoCmd12ErrStatusReg(void);
  3853. /*! \brief Reads the bit group 'AutoCmd12TimeoutErr' of register 'SDIO1_AutoCmd12ErrStatusReg'. */
  3854. U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12TimeoutErr(void);
  3855. /*! \brief Reads the bit group 'AutoCmd12CrcErr' of register 'SDIO1_AutoCmd12ErrStatusReg'. */
  3856. U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12CrcErr(void);
  3857. /*! \brief Reads the bit group 'AutoCmd12EndBitErr' of register 'SDIO1_AutoCmd12ErrStatusReg'. */
  3858. U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12EndBitErr(void);
  3859. /*! \brief Reads the bit group 'AutoCmd12NotExe' of register 'SDIO1_AutoCmd12ErrStatusReg'. */
  3860. U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12NotExe(void);
  3861. /*! \brief Reads the bit group 'AutoCmd12IndexErr' of register 'SDIO1_AutoCmd12ErrStatusReg'. */
  3862. U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12IndexErr(void);
  3863. /*! \brief Reads the bit group 'CmdNotIssuedByAutoCmd12Err' of register 'SDIO1_AutoCmd12ErrStatusReg'. */
  3864. U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_CmdNotIssuedByAutoCmd12Err(void);
  3865. #else /* GH_INLINE_LEVEL == 0 */
  3866. GH_INLINE U32 GH_SDIO1_get_AutoCmd12ErrStatusReg(void)
  3867. {
  3868. U32 value = (*(volatile U32 *)REG_SDIO1_AUTOCMD12ERRSTATUSREG);
  3869. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3870. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_AutoCmd12ErrStatusReg] --> 0x%08x\n",
  3871. REG_SDIO1_AUTOCMD12ERRSTATUSREG,value);
  3872. #endif
  3873. return value;
  3874. }
  3875. GH_INLINE U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12TimeoutErr(void)
  3876. {
  3877. GH_SDIO1_AUTOCMD12ERRSTATUSREG_S tmp_value;
  3878. U32 value = (*(volatile U32 *)REG_SDIO1_AUTOCMD12ERRSTATUSREG);
  3879. tmp_value.all = value;
  3880. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3881. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12TimeoutErr] --> 0x%08x\n",
  3882. REG_SDIO1_AUTOCMD12ERRSTATUSREG,value);
  3883. #endif
  3884. return tmp_value.bitc.autocmd12timeouterr;
  3885. }
  3886. GH_INLINE U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12CrcErr(void)
  3887. {
  3888. GH_SDIO1_AUTOCMD12ERRSTATUSREG_S tmp_value;
  3889. U32 value = (*(volatile U32 *)REG_SDIO1_AUTOCMD12ERRSTATUSREG);
  3890. tmp_value.all = value;
  3891. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3892. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12CrcErr] --> 0x%08x\n",
  3893. REG_SDIO1_AUTOCMD12ERRSTATUSREG,value);
  3894. #endif
  3895. return tmp_value.bitc.autocmd12crcerr;
  3896. }
  3897. GH_INLINE U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12EndBitErr(void)
  3898. {
  3899. GH_SDIO1_AUTOCMD12ERRSTATUSREG_S tmp_value;
  3900. U32 value = (*(volatile U32 *)REG_SDIO1_AUTOCMD12ERRSTATUSREG);
  3901. tmp_value.all = value;
  3902. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3903. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12EndBitErr] --> 0x%08x\n",
  3904. REG_SDIO1_AUTOCMD12ERRSTATUSREG,value);
  3905. #endif
  3906. return tmp_value.bitc.autocmd12endbiterr;
  3907. }
  3908. GH_INLINE U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12NotExe(void)
  3909. {
  3910. GH_SDIO1_AUTOCMD12ERRSTATUSREG_S tmp_value;
  3911. U32 value = (*(volatile U32 *)REG_SDIO1_AUTOCMD12ERRSTATUSREG);
  3912. tmp_value.all = value;
  3913. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3914. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12NotExe] --> 0x%08x\n",
  3915. REG_SDIO1_AUTOCMD12ERRSTATUSREG,value);
  3916. #endif
  3917. return tmp_value.bitc.autocmd12notexe;
  3918. }
  3919. GH_INLINE U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12IndexErr(void)
  3920. {
  3921. GH_SDIO1_AUTOCMD12ERRSTATUSREG_S tmp_value;
  3922. U32 value = (*(volatile U32 *)REG_SDIO1_AUTOCMD12ERRSTATUSREG);
  3923. tmp_value.all = value;
  3924. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3925. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12IndexErr] --> 0x%08x\n",
  3926. REG_SDIO1_AUTOCMD12ERRSTATUSREG,value);
  3927. #endif
  3928. return tmp_value.bitc.autocmd12indexerr;
  3929. }
  3930. GH_INLINE U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_CmdNotIssuedByAutoCmd12Err(void)
  3931. {
  3932. GH_SDIO1_AUTOCMD12ERRSTATUSREG_S tmp_value;
  3933. U32 value = (*(volatile U32 *)REG_SDIO1_AUTOCMD12ERRSTATUSREG);
  3934. tmp_value.all = value;
  3935. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3936. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_AutoCmd12ErrStatusReg_CmdNotIssuedByAutoCmd12Err] --> 0x%08x\n",
  3937. REG_SDIO1_AUTOCMD12ERRSTATUSREG,value);
  3938. #endif
  3939. return tmp_value.bitc.cmdnotissuedbyautocmd12err;
  3940. }
  3941. #endif /* GH_INLINE_LEVEL == 0 */
  3942. /*----------------------------------------------------------------------------*/
  3943. /* register SDIO1_BufferDataPortReg (read/write) */
  3944. /*----------------------------------------------------------------------------*/
  3945. #if GH_INLINE_LEVEL == 0
  3946. /*! \brief Writes the register 'SDIO1_BufferDataPortReg'. */
  3947. void GH_SDIO1_set_BufferDataPortReg(U32 data);
  3948. /*! \brief Reads the register 'SDIO1_BufferDataPortReg'. */
  3949. U32 GH_SDIO1_get_BufferDataPortReg(void);
  3950. #else /* GH_INLINE_LEVEL == 0 */
  3951. GH_INLINE void GH_SDIO1_set_BufferDataPortReg(U32 data)
  3952. {
  3953. *(volatile U32 *)REG_SDIO1_BUFFERDATAPORTREG = data;
  3954. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3955. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BufferDataPortReg] <-- 0x%08x\n",
  3956. REG_SDIO1_BUFFERDATAPORTREG,data,data);
  3957. #endif
  3958. }
  3959. GH_INLINE U32 GH_SDIO1_get_BufferDataPortReg(void)
  3960. {
  3961. U32 value = (*(volatile U32 *)REG_SDIO1_BUFFERDATAPORTREG);
  3962. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3963. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BufferDataPortReg] --> 0x%08x\n",
  3964. REG_SDIO1_BUFFERDATAPORTREG,value);
  3965. #endif
  3966. return value;
  3967. }
  3968. #endif /* GH_INLINE_LEVEL == 0 */
  3969. /*----------------------------------------------------------------------------*/
  3970. /* register SDIO1_MaxCurCapReg (read/write) */
  3971. /*----------------------------------------------------------------------------*/
  3972. #if GH_INLINE_LEVEL == 0
  3973. /*! \brief Writes the register 'SDIO1_MaxCurCapReg'. */
  3974. void GH_SDIO1_set_MaxCurCapReg(U32 data);
  3975. /*! \brief Reads the register 'SDIO1_MaxCurCapReg'. */
  3976. U32 GH_SDIO1_get_MaxCurCapReg(void);
  3977. /*! \brief Writes the bit group 'MaxCurFor33v' of register 'SDIO1_MaxCurCapReg'. */
  3978. void GH_SDIO1_set_MaxCurCapReg_MaxCurFor33v(U8 data);
  3979. /*! \brief Reads the bit group 'MaxCurFor33v' of register 'SDIO1_MaxCurCapReg'. */
  3980. U8 GH_SDIO1_get_MaxCurCapReg_MaxCurFor33v(void);
  3981. /*! \brief Writes the bit group 'MaxCurFor30v' of register 'SDIO1_MaxCurCapReg'. */
  3982. void GH_SDIO1_set_MaxCurCapReg_MaxCurFor30v(U8 data);
  3983. /*! \brief Reads the bit group 'MaxCurFor30v' of register 'SDIO1_MaxCurCapReg'. */
  3984. U8 GH_SDIO1_get_MaxCurCapReg_MaxCurFor30v(void);
  3985. /*! \brief Writes the bit group 'MaxCurFor18v' of register 'SDIO1_MaxCurCapReg'. */
  3986. void GH_SDIO1_set_MaxCurCapReg_MaxCurFor18v(U8 data);
  3987. /*! \brief Reads the bit group 'MaxCurFor18v' of register 'SDIO1_MaxCurCapReg'. */
  3988. U8 GH_SDIO1_get_MaxCurCapReg_MaxCurFor18v(void);
  3989. #else /* GH_INLINE_LEVEL == 0 */
  3990. GH_INLINE void GH_SDIO1_set_MaxCurCapReg(U32 data)
  3991. {
  3992. *(volatile U32 *)REG_SDIO1_MAXCURCAPREG = data;
  3993. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3994. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_MaxCurCapReg] <-- 0x%08x\n",
  3995. REG_SDIO1_MAXCURCAPREG,data,data);
  3996. #endif
  3997. }
  3998. GH_INLINE U32 GH_SDIO1_get_MaxCurCapReg(void)
  3999. {
  4000. U32 value = (*(volatile U32 *)REG_SDIO1_MAXCURCAPREG);
  4001. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  4002. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_MaxCurCapReg] --> 0x%08x\n",
  4003. REG_SDIO1_MAXCURCAPREG,value);
  4004. #endif
  4005. return value;
  4006. }
  4007. GH_INLINE void GH_SDIO1_set_MaxCurCapReg_MaxCurFor33v(U8 data)
  4008. {
  4009. GH_SDIO1_MAXCURCAPREG_S d;
  4010. d.all = *(volatile U32 *)REG_SDIO1_MAXCURCAPREG;
  4011. d.bitc.maxcurfor33v = data;
  4012. *(volatile U32 *)REG_SDIO1_MAXCURCAPREG = d.all;
  4013. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  4014. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_MaxCurCapReg_MaxCurFor33v] <-- 0x%08x\n",
  4015. REG_SDIO1_MAXCURCAPREG,d.all,d.all);
  4016. #endif
  4017. }
  4018. GH_INLINE U8 GH_SDIO1_get_MaxCurCapReg_MaxCurFor33v(void)
  4019. {
  4020. GH_SDIO1_MAXCURCAPREG_S tmp_value;
  4021. U32 value = (*(volatile U32 *)REG_SDIO1_MAXCURCAPREG);
  4022. tmp_value.all = value;
  4023. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  4024. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_MaxCurCapReg_MaxCurFor33v] --> 0x%08x\n",
  4025. REG_SDIO1_MAXCURCAPREG,value);
  4026. #endif
  4027. return tmp_value.bitc.maxcurfor33v;
  4028. }
  4029. GH_INLINE void GH_SDIO1_set_MaxCurCapReg_MaxCurFor30v(U8 data)
  4030. {
  4031. GH_SDIO1_MAXCURCAPREG_S d;
  4032. d.all = *(volatile U32 *)REG_SDIO1_MAXCURCAPREG;
  4033. d.bitc.maxcurfor30v = data;
  4034. *(volatile U32 *)REG_SDIO1_MAXCURCAPREG = d.all;
  4035. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  4036. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_MaxCurCapReg_MaxCurFor30v] <-- 0x%08x\n",
  4037. REG_SDIO1_MAXCURCAPREG,d.all,d.all);
  4038. #endif
  4039. }
  4040. GH_INLINE U8 GH_SDIO1_get_MaxCurCapReg_MaxCurFor30v(void)
  4041. {
  4042. GH_SDIO1_MAXCURCAPREG_S tmp_value;
  4043. U32 value = (*(volatile U32 *)REG_SDIO1_MAXCURCAPREG);
  4044. tmp_value.all = value;
  4045. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  4046. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_MaxCurCapReg_MaxCurFor30v] --> 0x%08x\n",
  4047. REG_SDIO1_MAXCURCAPREG,value);
  4048. #endif
  4049. return tmp_value.bitc.maxcurfor30v;
  4050. }
  4051. GH_INLINE void GH_SDIO1_set_MaxCurCapReg_MaxCurFor18v(U8 data)
  4052. {
  4053. GH_SDIO1_MAXCURCAPREG_S d;
  4054. d.all = *(volatile U32 *)REG_SDIO1_MAXCURCAPREG;
  4055. d.bitc.maxcurfor18v = data;
  4056. *(volatile U32 *)REG_SDIO1_MAXCURCAPREG = d.all;
  4057. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  4058. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_MaxCurCapReg_MaxCurFor18v] <-- 0x%08x\n",
  4059. REG_SDIO1_MAXCURCAPREG,d.all,d.all);
  4060. #endif
  4061. }
  4062. GH_INLINE U8 GH_SDIO1_get_MaxCurCapReg_MaxCurFor18v(void)
  4063. {
  4064. GH_SDIO1_MAXCURCAPREG_S tmp_value;
  4065. U32 value = (*(volatile U32 *)REG_SDIO1_MAXCURCAPREG);
  4066. tmp_value.all = value;
  4067. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  4068. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_MaxCurCapReg_MaxCurFor18v] --> 0x%08x\n",
  4069. REG_SDIO1_MAXCURCAPREG,value);
  4070. #endif
  4071. return tmp_value.bitc.maxcurfor18v;
  4072. }
  4073. #endif /* GH_INLINE_LEVEL == 0 */
  4074. /*----------------------------------------------------------------------------*/
  4075. /* register SDIO1_SlotIntStatusReg (read) */
  4076. /*----------------------------------------------------------------------------*/
  4077. #if GH_INLINE_LEVEL == 0
  4078. /*! \brief Reads the register 'SDIO1_SlotIntStatusReg'. */
  4079. U32 GH_SDIO1_get_SlotIntStatusReg(void);
  4080. /*! \brief Reads the bit group 'IntSigForEachSlot' of register 'SDIO1_SlotIntStatusReg'. */
  4081. U8 GH_SDIO1_get_SlotIntStatusReg_IntSigForEachSlot(void);
  4082. /*! \brief Reads the bit group 'SpecifiVerNum' of register 'SDIO1_SlotIntStatusReg'. */
  4083. U8 GH_SDIO1_get_SlotIntStatusReg_SpecifiVerNum(void);
  4084. /*! \brief Reads the bit group 'VendorVerNum' of register 'SDIO1_SlotIntStatusReg'. */
  4085. U8 GH_SDIO1_get_SlotIntStatusReg_VendorVerNum(void);
  4086. #else /* GH_INLINE_LEVEL == 0 */
  4087. GH_INLINE U32 GH_SDIO1_get_SlotIntStatusReg(void)
  4088. {
  4089. U32 value = (*(volatile U32 *)REG_SDIO1_SLOTINTSTATUSREG);
  4090. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  4091. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_SlotIntStatusReg] --> 0x%08x\n",
  4092. REG_SDIO1_SLOTINTSTATUSREG,value);
  4093. #endif
  4094. return value;
  4095. }
  4096. GH_INLINE U8 GH_SDIO1_get_SlotIntStatusReg_IntSigForEachSlot(void)
  4097. {
  4098. GH_SDIO1_SLOTINTSTATUSREG_S tmp_value;
  4099. U32 value = (*(volatile U32 *)REG_SDIO1_SLOTINTSTATUSREG);
  4100. tmp_value.all = value;
  4101. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  4102. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_SlotIntStatusReg_IntSigForEachSlot] --> 0x%08x\n",
  4103. REG_SDIO1_SLOTINTSTATUSREG,value);
  4104. #endif
  4105. return tmp_value.bitc.intsigforeachslot;
  4106. }
  4107. GH_INLINE U8 GH_SDIO1_get_SlotIntStatusReg_SpecifiVerNum(void)
  4108. {
  4109. GH_SDIO1_SLOTINTSTATUSREG_S tmp_value;
  4110. U32 value = (*(volatile U32 *)REG_SDIO1_SLOTINTSTATUSREG);
  4111. tmp_value.all = value;
  4112. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  4113. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_SlotIntStatusReg_SpecifiVerNum] --> 0x%08x\n",
  4114. REG_SDIO1_SLOTINTSTATUSREG,value);
  4115. #endif
  4116. return tmp_value.bitc.specifivernum;
  4117. }
  4118. GH_INLINE U8 GH_SDIO1_get_SlotIntStatusReg_VendorVerNum(void)
  4119. {
  4120. GH_SDIO1_SLOTINTSTATUSREG_S tmp_value;
  4121. U32 value = (*(volatile U32 *)REG_SDIO1_SLOTINTSTATUSREG);
  4122. tmp_value.all = value;
  4123. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  4124. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_SlotIntStatusReg_VendorVerNum] --> 0x%08x\n",
  4125. REG_SDIO1_SLOTINTSTATUSREG,value);
  4126. #endif
  4127. return tmp_value.bitc.vendorvernum;
  4128. }
  4129. #endif /* GH_INLINE_LEVEL == 0 */
  4130. /*----------------------------------------------------------------------------*/
  4131. /* init function */
  4132. /*----------------------------------------------------------------------------*/
  4133. /*! \brief Initialises the registers and mirror variables. */
  4134. void GH_SDIO1_init(void);
  4135. #ifdef __cplusplus
  4136. }
  4137. #endif
  4138. #endif /* _GH_SDIO1_H */
  4139. /*----------------------------------------------------------------------------*/
  4140. /* end of file */
  4141. /*----------------------------------------------------------------------------*/